Merge pull request #318 from F4FXL/dstar_correlator_fm

Merge master into dstar correlator fm

CWIdTX.cpp

@@ -77,6 +77,7 @@ const struct {
   {',', 0xEEAEE000U, 22U},
   {'-', 0xEAAE0000U, 18U},
   {'=', 0xEAB80000U, 16U},
+  {'.', 0xBAEB8000U, 20U},
   {' ', 0x00000000U, 4U},
   {0U,  0x00000000U, 0U}
 };
@@ -170,4 +171,3 @@ void CCWIdTX::reset()
   m_poPtr = 0U;
   m_n     = 0U;
 }
-

CalDStarRX.cpp

@@ -24,7 +24,7 @@
 const unsigned int BUFFER_LENGTH = 200U;
 
 const uint32_t PLLMAX = 0x10000U;
-const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
+const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_SYMBOL_LENGTH;
 const uint32_t INC    = PLLINC / 32U;
 
 // D-Star bit order version of 0x55 0x2D 0x16

CalFM.cpp

@@ -38,13 +38,13 @@ const struct TONE_TABLE {
 const uint8_t TONE_TABLE_DATA_LEN = 6U;
 
 CCalFM::CCalFM() :
-m_tone(NULL),
 m_frequency(0),
 m_length(0),
-m_level(128*32),
+m_tone(NULL),
+m_level(128 * 12),
 m_transmit(false),
-m_lastState(STATE_IDLE),
-m_audioSeq(0)
+m_audioSeq(0),
+m_lastState(STATE_IDLE)
 {
 }
 
@@ -56,25 +56,25 @@ void CCalFM::process()
   {
     switch (m_modemState) {
         case STATE_FMCAL10K:
-          m_frequency=956U;
+          m_frequency = 956U;
           break;
         case STATE_FMCAL12K:
-          m_frequency=1039U;
+          m_frequency = 1039U;
           break;
         case STATE_FMCAL15K:
-          m_frequency=1247U;
+          m_frequency = 1247U;
           break;
         case STATE_FMCAL20K:
-          m_frequency=1633U;
+          m_frequency = 1633U;
           break;
         case STATE_FMCAL25K:
-          m_frequency=2079U;
+          m_frequency = 2079U;
           break;
         case STATE_FMCAL30K:
-          m_frequency=2495U;
+          m_frequency = 2495U;
           break;
         default:
-          m_frequency=0;
+          m_frequency = 0U;
           break;
     }
 

Config.h

@@ -35,9 +35,6 @@
 // For 19.2 MHz
 // #define EXTERNAL_OSC 19200000
 
-// Allow the use of the COS line to lockout the modem
-// #define USE_COS_AS_LOCKOUT
-
 // Use pins to output the current mode via LEDs
 // #define MODE_LEDS
 
@@ -85,6 +82,6 @@
 // #define USE_ALTERNATE_POCSAG_LEDS
 
 // Use the D-Star and YSF LEDs for FM
-// #define USE_ALTERNATE_FM_LEDS
+#define USE_ALTERNATE_FM_LEDS
 
 #endif

DStarDefines.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2009-2015,2017 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -19,30 +19,50 @@
 #if !defined(DSTARDEFINES_H)
 #define  DSTARDEFINES_H
 
-const unsigned int DSTAR_RADIO_BIT_LENGTH = 5U;      // At 24 kHz sample rate
+const unsigned int DSTAR_RADIO_SYMBOL_LENGTH = 5U;      // At 24 kHz sample rate
 
-const unsigned int DSTAR_HEADER_LENGTH_BYTES = 41U;
-const unsigned int DSTAR_HEADER_LENGTH_BITS  = DSTAR_HEADER_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_HEADER_LENGTH_BYTES   = 41U;
 
-const unsigned int DSTAR_FEC_SECTION_LENGTH_BYTES = 83U;
-const unsigned int DSTAR_FEC_SECTION_LENGTH_BITS  = 660U;
+const unsigned int DSTAR_FEC_SECTION_LENGTH_BYTES   = 83U;
+const unsigned int DSTAR_FEC_SECTION_LENGTH_SYMBOLS = 660U;
+const unsigned int DSTAR_FEC_SECTION_LENGTH_SAMPLES = DSTAR_FEC_SECTION_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
 
-const unsigned int DSTAR_DATA_LENGTH_BYTES = 12U;
-const unsigned int DSTAR_DATA_LENGTH_BITS  = DSTAR_DATA_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_DATA_LENGTH_BYTES   = 12U;
+const unsigned int DSTAR_DATA_LENGTH_SYMBOLS = DSTAR_DATA_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_DATA_LENGTH_SAMPLES = DSTAR_DATA_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
 
-const uint8_t      DSTAR_EOT_BYTES[] = {0x55, 0x55, 0x55, 0x55, 0xC8, 0x7A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
-const unsigned int DSTAR_EOT_LENGTH_BYTES = 6U;
-const unsigned int DSTAR_EOT_LENGTH_BITS  = DSTAR_EOT_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_END_SYNC_LENGTH_BYTES = 6U;
+const unsigned int DSTAR_END_SYNC_LENGTH_BITS  = DSTAR_END_SYNC_LENGTH_BYTES * 8U;
 
-const uint8_t      DSTAR_DATA_SYNC_LENGTH_BYTES = 3U;
-const uint8_t      DSTAR_DATA_SYNC_LENGTH_BITS  = DSTAR_DATA_SYNC_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_FRAME_SYNC_LENGTH_BYTES   = 3U;
+const unsigned int DSTAR_FRAME_SYNC_LENGTH_SYMBOLS = DSTAR_FRAME_SYNC_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_FRAME_SYNC_LENGTH_SAMPLES = DSTAR_FRAME_SYNC_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
 
-const uint8_t      DSTAR_DATA_SYNC_BYTES[] = {0x9E, 0x8D, 0x32, 0x88, 0x26, 0x1A, 0x3F, 0x61, 0xE8, 0x55, 0x2D, 0x16};
+const unsigned int DSTAR_DATA_SYNC_LENGTH_BYTES   = 3U;
+const unsigned int DSTAR_DATA_SYNC_LENGTH_SYMBOLS = DSTAR_DATA_SYNC_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_DATA_SYNC_LENGTH_SAMPLES = DSTAR_DATA_SYNC_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
 
-const uint8_t      DSTAR_SLOW_DATA_TYPE_TEXT   = 0x40U;
-const uint8_t      DSTAR_SLOW_DATA_TYPE_HEADER = 0x50U;
+const uint8_t DSTAR_DATA_SYNC_BYTES[] = {0x9E, 0x8D, 0x32, 0x88, 0x26, 0x1A, 0x3F, 0x61, 0xE8, 0x55, 0x2D, 0x16};
 
-const uint8_t      DSTAR_SCRAMBLER_BYTES[] = {0x70U, 0x4FU, 0x93U};
+// D-Star bit order version of 0x55 0x6E 0x0A
+const uint32_t DSTAR_FRAME_SYNC_DATA = 0x00557650U;
+const uint32_t DSTAR_FRAME_SYNC_MASK = 0x00FFFFFFU;
+const bool     DSTAR_FRAME_SYNC_SYMBOLS[] = {false, true, false, true, false, true, false, true, false, true, true, true, false, true, true, false, false, true, false, true, false, false, false, false};
+
+// D-Star bit order version of 0x55 0x2D 0x16
+const uint32_t DSTAR_DATA_SYNC_DATA = 0x00AAB468U;
+const uint32_t DSTAR_DATA_SYNC_MASK = 0x00FFFFFFU;
+const bool     DSTAR_DATA_SYNC_SYMBOLS[] = {true, false, true, false, true, false, true, false, true, false, true, true, false, true, false, false, false, true, true, false, true, false, false, false};
+
+// D-Star bit order version of 0x55 0x55 0xC8 0x7A
+const uint32_t DSTAR_END_SYNC_DATA = 0xAAAA135EU;
+const uint32_t DSTAR_END_SYNC_MASK = 0xFFFFFFFFU;
+const uint8_t  DSTAR_END_SYNC_BYTES[] = {0x55, 0x55, 0x55, 0x55, 0xC8, 0x7A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+const uint8_t  DSTAR_SLOW_DATA_TYPE_TEXT   = 0x40U;
+const uint8_t  DSTAR_SLOW_DATA_TYPE_HEADER = 0x50U;
+
+const uint8_t  DSTAR_SCRAMBLER_BYTES[] = {0x70U, 0x4FU, 0x93U};
 
 #endif
 

DStarRX.cpp

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2009-2017,2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2017 by Andy Uribe CA6JAU
  *
  *   This program is free software; you can redistribute it and/or modify
@@ -22,27 +22,21 @@
 #include "DStarRX.h"
 #include "Utils.h"
 
-const unsigned int BUFFER_LENGTH = 200U;
-
-const uint32_t PLLMAX = 0x10000U;
-const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
-const uint32_t INC    = PLLINC / 32U;
-
-const unsigned int MAX_SYNC_BITS = 100U * DSTAR_DATA_LENGTH_BITS;
+const unsigned int MAX_FRAMES = 150U;
 
 // D-Star bit order version of 0x55 0x55 0x6E 0x0A
 const uint32_t FRAME_SYNC_DATA = 0x00557650U;
 const uint32_t FRAME_SYNC_MASK = 0x00FFFFFFU;
-const uint8_t  FRAME_SYNC_ERRS = 2U;
+const uint8_t  FRAME_SYNC_ERRS = 1U;
 
 // D-Star bit order version of 0x55 0x2D 0x16
-const uint32_t DATA_SYNC_DATA = 0x00AAB468U;
-const uint32_t DATA_SYNC_MASK = 0x00FFFFFFU;
+const uint64_t DATA_SYNC_DATA = 0x0000000000AAB468U;
+const uint64_t DATA_SYNC_MASK = 0x0000000000FFFFFFU;
 const uint8_t  DATA_SYNC_ERRS = 2U;
 
 // D-Star bit order version of 0x55 0x55 0xC8 0x7A
-const uint32_t END_SYNC_DATA = 0xAAAA135EU;
-const uint32_t END_SYNC_MASK = 0xFFFFFFFFU;
+const uint64_t END_SYNC_DATA = 0x0000AAAAAAAA135EU;
+const uint64_t END_SYNC_MASK = 0x0000FFFFFFFFFFFFU;
 const uint8_t  END_SYNC_ERRS = 1U;
 
 const uint8_t BIT_MASK_TABLE0[] = {0x7FU, 0xBFU, 0xDFU, 0xEFU, 0xF7U, 0xFBU, 0xFDU, 0xFEU};
@@ -237,14 +231,24 @@ const uint16_t CCITT_TABLE[] = {
   0xf78fU, 0xe606U, 0xd49dU, 0xc514U, 0xb1abU, 0xa022U, 0x92b9U, 0x8330U,
   0x7bc7U, 0x6a4eU, 0x58d5U, 0x495cU, 0x3de3U, 0x2c6aU, 0x1ef1U, 0x0f78U};
 
+const uint16_t NOENDPTR = 9999U;
+
 CDStarRX::CDStarRX() :
-m_pll(0U),
-m_prev(false),
 m_rxState(DSRXS_NONE),
-m_patternBuffer(0x00U),
-m_rxBuffer(),
-m_rxBufferBits(0U),
-m_dataBits(0U),
+m_bitBuffer(),
+m_headerBuffer(),
+m_dataBuffer(),
+m_bitPtr(0U),
+m_headerPtr(0U),
+m_dataPtr(0U),
+m_startPtr(NOENDPTR),
+m_syncPtr(NOENDPTR),
+m_minSyncPtr(NOENDPTR),
+m_maxSyncPtr(NOENDPTR),
+m_maxFrameCorr(0),
+m_maxDataCorr(0),
+m_frameCount(0U),
+m_countdown(0U),
 m_mar(0U),
 m_pathMetric(),
 m_pathMemory0(),
@@ -259,14 +263,20 @@ m_rssiCount(0U)
 
 void CDStarRX::reset()
 {
-  m_pll           = 0U;
-  m_prev          = false;
-  m_rxState       = DSRXS_NONE;
-  m_patternBuffer = 0x00U;
-  m_rxBufferBits  = 0U;
-  m_dataBits      = 0U;
-  m_rssiAccum     = 0U;
-  m_rssiCount     = 0U;
+  m_rxState      = DSRXS_NONE;
+  m_headerPtr    = 0U;
+  m_dataPtr      = 0U;
+  m_bitPtr       = 0U;
+  m_maxFrameCorr = 0;
+  m_maxDataCorr  = 0;
+  m_startPtr     = NOENDPTR;
+  m_syncPtr      = NOENDPTR;
+  m_minSyncPtr   = NOENDPTR;
+  m_maxSyncPtr   = NOENDPTR;
+  m_frameCount   = 0U;
+  m_countdown    = 0U;
+  m_rssiAccum    = 0U;
+  m_rssiCount    = 0U;
 }
 
 void CDStarRX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t length)
@@ -275,125 +285,117 @@ void CDStarRX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t lengt
     m_rssiAccum += rssi[i];
     m_rssiCount++;
 
-    bool bit = samples[i] < 0;
+    q15_t sample = samples[i];
 
-    if (bit != m_prev) {
-      if (m_pll < (PLLMAX / 2U))
-        m_pll += INC;
-      else
-        m_pll -= INC;
+    m_bitBuffer[m_bitPtr] <<= 1;
+    if (sample < 0)
+      m_bitBuffer[m_bitPtr] |= 0x01U;
+
+    m_dataBuffer[m_dataPtr] = sample;
+
+    switch (m_rxState) {
+      case DSRXS_HEADER:
+        processHeader(sample);
+        break;
+      case DSRXS_DATA:
+        processData();
+        break;
+      default:
+        processNone(sample);
+        break;
     }
 
-    m_prev = bit;
+    m_dataPtr++;
+    if (m_dataPtr >= DSTAR_DATA_LENGTH_SAMPLES)
+      m_dataPtr = 0U;
 
-    m_pll += PLLINC;
-
-    if (m_pll >= PLLMAX) {
-      m_pll -= PLLMAX;
-
-      switch (m_rxState) {
-        case DSRXS_NONE:
-          processNone(bit);
-          break;
-        case DSRXS_HEADER:
-          processHeader(bit);
-          break;
-        case DSRXS_DATA:
-          processData(bit);
-          break;
-        default:
-          break;
-      }
-    }
+    m_bitPtr++;
+    if (m_bitPtr >= DSTAR_RADIO_SYMBOL_LENGTH)
+      m_bitPtr = 0U;
   }
 }
 
-void CDStarRX::processNone(bool bit)
+void CDStarRX::processNone(q15_t sample)
 {
-  m_patternBuffer <<= 1;
-  if (bit)
-    m_patternBuffer |= 0x01U;
-
   // Fuzzy matching of the frame sync sequence
-  if (countBits32((m_patternBuffer & FRAME_SYNC_MASK) ^ FRAME_SYNC_DATA) <= FRAME_SYNC_ERRS) {
-    DEBUG1("DStarRX: found frame sync in None");
-
-    ::memset(m_rxBuffer, 0x00U, DSTAR_FEC_SECTION_LENGTH_BYTES);
-    m_rxBufferBits = 0U;
+  bool ret = correlateFrameSync();
+  if (ret) {
+    m_countdown = 5U;
+	
+    m_headerBuffer[m_headerPtr] = sample;
+    m_headerPtr++;
 
     m_rssiAccum = 0U;
     m_rssiCount = 0U;
 
     m_rxState = DSRXS_HEADER;
+
     return;
   }
 
-  // Exact matching of the data sync bit sequence
-  if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) == 0U) {
+  // Fuzzy matching of the data sync bit sequence
+  ret = correlateDataSync();
+  if (ret) {
     DEBUG1("DStarRX: found data sync in None");
 
     io.setDecode(true);
     io.setADCDetection(true);
 
-    // Suppress RSSI on the dummy sync message
-    m_rssiAccum = 0U;
-    m_rssiCount = 0U;
-
-    ::memcpy(m_rxBuffer, DSTAR_DATA_SYNC_BYTES, DSTAR_DATA_LENGTH_BYTES);
-    writeRSSIData(m_rxBuffer);
-
-    ::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
-    m_rxBufferBits = 0U;
-
-    m_dataBits  = MAX_SYNC_BITS;
-    m_rxState   = DSRXS_DATA;
-    return;
+    m_rxState = DSRXS_DATA;
   }
 }
 
-void CDStarRX::processHeader(bool bit)
+void CDStarRX::processHeader(q15_t sample)
 {
-  m_patternBuffer <<= 1;
-  if (bit)
-    m_patternBuffer |= 0x01U;
+  if (m_countdown > 0U) {
+    correlateFrameSync();
+    m_countdown--;
+  }
 
-  WRITE_BIT2(m_rxBuffer, m_rxBufferBits, bit);
-  m_rxBufferBits++;
+  m_headerBuffer[m_headerPtr] = sample;
+  m_headerPtr++;
 
   // A full FEC header
-  if (m_rxBufferBits == DSTAR_FEC_SECTION_LENGTH_BITS) {
-    // Process the scrambling, interleaving and FEC, then return if the chcksum was correct
-    unsigned char header[DSTAR_HEADER_LENGTH_BYTES];
-    bool ok = rxHeader(m_rxBuffer, header);
-    if (ok) {
+  if (m_headerPtr == (DSTAR_FEC_SECTION_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH)) {
+    uint8_t buffer[DSTAR_FEC_SECTION_LENGTH_BYTES];
+    samplesToBits(m_headerBuffer, DSTAR_RADIO_SYMBOL_LENGTH, DSTAR_FEC_SECTION_LENGTH_SYMBOLS, buffer, DSTAR_FEC_SECTION_LENGTH_SAMPLES);
+
+    // Process the scrambling, interleaving and FEC, then return true if the chcksum was correct
+    uint8_t header[DSTAR_HEADER_LENGTH_BYTES];
+    bool ok = rxHeader(buffer, header);
+    if (!ok) {
+      // The checksum failed, return to looking for syncs
+      m_rxState = DSRXS_NONE;
+      m_maxFrameCorr = 0;
+      m_maxDataCorr  = 0;
+    } else {
       io.setDecode(true);
       io.setADCDetection(true);
 
       writeRSSIHeader(header);
-
-      ::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
-      m_rxBufferBits = 0U;
-
-      m_rxState  = DSRXS_DATA;
-      m_dataBits = MAX_SYNC_BITS;
-    } else {
-      // The checksum failed, return to looking for syncs
-      m_rxState = DSRXS_NONE;
     }
   }
+
+  // Ready to start the first data section
+  if (m_headerPtr == (DSTAR_FEC_SECTION_LENGTH_SAMPLES + 2U * DSTAR_RADIO_SYMBOL_LENGTH)) {
+    m_frameCount = 0U;
+    m_dataPtr    = 0U;
+
+    m_startPtr   = 476U;
+    m_syncPtr    = 471U;
+    m_maxSyncPtr = 472U;
+    m_minSyncPtr = 470U;
+
+    DEBUG5("DStarRX: calc start/sync/max/min", m_startPtr, m_syncPtr, m_maxSyncPtr, m_minSyncPtr);
+
+    m_rxState = DSRXS_DATA;
+  }
 }
 
-void CDStarRX::processData(bool bit)
+void CDStarRX::processData()
 {
-  m_patternBuffer <<= 1;
-  if (bit)
-    m_patternBuffer |= 0x01U;
-
-  WRITE_BIT2(m_rxBuffer, m_rxBufferBits, bit);
-  m_rxBufferBits++;
-
   // Fuzzy matching of the end frame sequences
-  if (countBits32((m_patternBuffer & END_SYNC_MASK) ^ END_SYNC_DATA) <= END_SYNC_ERRS) {
+  if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_END_SYNC_MASK) ^ DSTAR_END_SYNC_DATA) <= END_SYNC_ERRS) {
     DEBUG1("DStarRX: Found end sync in Data");
 
     io.setDecode(false);
@@ -401,35 +403,24 @@ void CDStarRX::processData(bool bit)
 
     serial.writeDStarEOT();
 
+    m_maxFrameCorr = 0;
+    m_maxDataCorr  = 0;
+
     m_rxState = DSRXS_NONE;
     return;
   }
 
   // Fuzzy matching of the data sync bit sequence
-  bool syncSeen = false;
-  if (m_rxBufferBits >= (DSTAR_DATA_LENGTH_BITS - 3U)) {
-    if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) <= DATA_SYNC_ERRS) {
-      m_rxBufferBits = DSTAR_DATA_LENGTH_BITS;
-      m_dataBits     = MAX_SYNC_BITS;
-      syncSeen       = true;
-    }
+  if (m_minSyncPtr < m_maxSyncPtr) {
+    if (m_dataPtr >= m_minSyncPtr && m_dataPtr <= m_maxSyncPtr)
+      correlateDataSync();
+  } else {
+    if (m_dataPtr >= m_minSyncPtr || m_dataPtr <= m_maxSyncPtr)
+      correlateDataSync();
   }
 
-  // Check to see if the sync is arriving late
-  if (m_rxBufferBits == DSTAR_DATA_LENGTH_BITS && !syncSeen) {
-    for (uint8_t i = 1U; i <= 3U; i++) {
-      uint32_t syncMask = DATA_SYNC_MASK >> i;
-      uint32_t syncData = DATA_SYNC_DATA >> i;
-      if (countBits32((m_patternBuffer & syncMask) ^ syncData) <= DATA_SYNC_ERRS) {
-        m_rxBufferBits -= i;
-        break;
-      }
-    }
-  }
-
-  m_dataBits--;
-
-  if (m_dataBits == 0U) {
+  // We've not seen a data sync for too long, signal RXLOST and change to RX_NONE
+  if (m_frameCount >= MAX_FRAMES) {
     DEBUG1("DStarRX: data sync timed out, lost lock");
 
     io.setDecode(false);
@@ -437,24 +428,35 @@ void CDStarRX::processData(bool bit)
 
     serial.writeDStarLost();
 
+    m_maxFrameCorr = 0;
+    m_maxDataCorr  = 0;
+
     m_rxState = DSRXS_NONE;
     return;
   }
 
-  // Send a data frame to the host if the required number of bits have been received, or if a data sync has been seen
-  if (m_rxBufferBits == DSTAR_DATA_LENGTH_BITS) {
-    if (syncSeen) {
-      m_rxBuffer[9U]  = DSTAR_DATA_SYNC_BYTES[9U];
-      m_rxBuffer[10U] = DSTAR_DATA_SYNC_BYTES[10U];
-      m_rxBuffer[11U] = DSTAR_DATA_SYNC_BYTES[11U];
-	    writeRSSIData(m_rxBuffer);
-    } else {
-	    serial.writeDStarData(m_rxBuffer, DSTAR_DATA_LENGTH_BYTES);
-	  }
+  // Send a data frame to the host if the required number of bits have been received
+  if (m_dataPtr == m_maxSyncPtr) {
+    uint8_t buffer[DSTAR_DATA_LENGTH_BYTES + 2U];
+    samplesToBits(m_dataBuffer, m_startPtr, DSTAR_DATA_LENGTH_SYMBOLS, buffer, DSTAR_DATA_LENGTH_SAMPLES);
 
-    // Start the next frame
-    ::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
-    m_rxBufferBits = 0U;
+    if ((m_frameCount % 21U) == 0U) {
+      if (m_frameCount == 0U) {
+        buffer[9U]  = DSTAR_DATA_SYNC_BYTES[9U];
+        buffer[10U] = DSTAR_DATA_SYNC_BYTES[10U];
+        buffer[11U] = DSTAR_DATA_SYNC_BYTES[11U];
+        DEBUG5("DStarRX: found start/sync/max/min", m_startPtr, m_syncPtr, m_maxSyncPtr, m_minSyncPtr);
+      }
+
+      writeRSSIData(buffer);
+    } else {
+      serial.writeDStarData(buffer, DSTAR_DATA_LENGTH_BYTES);
+    }
+
+    m_frameCount++;
+
+    m_maxFrameCorr = 0;
+    m_maxDataCorr  = 0;
   }
 }
 
@@ -500,6 +502,105 @@ void CDStarRX::writeRSSIData(unsigned char* data)
   m_rssiCount = 0U;
 }
 
+bool CDStarRX::correlateFrameSync()
+{
+  if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_FRAME_SYNC_MASK) ^ DSTAR_FRAME_SYNC_DATA) <= FRAME_SYNC_ERRS) {
+    uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_FRAME_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
+    if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
+      ptr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+    q31_t corr = 0;
+
+    for (uint8_t i = 0U; i < DSTAR_FRAME_SYNC_LENGTH_SYMBOLS; i++) {
+      q15_t val = m_dataBuffer[ptr];
+
+      if (DSTAR_FRAME_SYNC_SYMBOLS[i])
+        corr -= val;
+      else
+        corr += val;
+
+      ptr += DSTAR_RADIO_SYMBOL_LENGTH;
+      if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
+        ptr -= DSTAR_DATA_LENGTH_SAMPLES;
+    }
+
+    if (corr > m_maxFrameCorr) {
+      m_maxFrameCorr = corr;
+      m_headerPtr    = 0U;
+      return true;
+    }
+  }
+
+  return false;
+}
+
+bool CDStarRX::correlateDataSync()
+{
+  uint8_t maxErrs = 0U;
+  if (m_rxState == DSRXS_DATA)
+    maxErrs = DATA_SYNC_ERRS;
+
+  if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_DATA_SYNC_MASK) ^ DSTAR_DATA_SYNC_DATA) <= maxErrs) {
+    uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_DATA_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
+    if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
+      ptr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+    q31_t corr = 0;
+
+    for (uint8_t i = 0U; i < DSTAR_DATA_SYNC_LENGTH_SYMBOLS; i++) {
+      q15_t val = m_dataBuffer[ptr];
+
+      if (DSTAR_DATA_SYNC_SYMBOLS[i])
+        corr -= val;
+      else
+        corr += val;
+
+      ptr += DSTAR_RADIO_SYMBOL_LENGTH;
+      if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
+        ptr -= DSTAR_DATA_LENGTH_SAMPLES;
+    }
+
+    if (corr > m_maxDataCorr) {
+      m_maxDataCorr = corr;
+      m_frameCount  = 0U;
+
+      m_syncPtr    = m_dataPtr;
+
+      m_startPtr   = m_dataPtr + DSTAR_RADIO_SYMBOL_LENGTH;
+      if (m_startPtr >= DSTAR_DATA_LENGTH_SAMPLES)
+        m_startPtr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+      m_maxSyncPtr = m_syncPtr + 1U;
+      if (m_maxSyncPtr >= DSTAR_DATA_LENGTH_SAMPLES)
+        m_maxSyncPtr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+      m_minSyncPtr = m_syncPtr + DSTAR_DATA_LENGTH_SAMPLES - 1U;
+      if (m_minSyncPtr >= DSTAR_DATA_LENGTH_SAMPLES)
+        m_minSyncPtr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+      return true;
+    }
+  }
+
+  return false;
+}
+
+void CDStarRX::samplesToBits(const q15_t* inBuffer, uint16_t start, uint16_t count, uint8_t* outBuffer, uint16_t limit)
+{
+  for (uint16_t i = 0U; i < count; i++) {
+    q15_t sample = inBuffer[start];
+
+    if (sample < 0)
+      WRITE_BIT2(outBuffer, i, true);
+    else
+      WRITE_BIT2(outBuffer, i, false);
+
+    start += DSTAR_RADIO_SYMBOL_LENGTH;
+    if (start >= limit)
+      start -= limit;
+  }
+}
+
 bool CDStarRX::rxHeader(uint8_t* in, uint8_t* out)
 {
   int i;

DStarRX.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015,2016,2017,2020 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -37,13 +37,21 @@ public:
   void reset();
 
 private:
-  uint32_t     m_pll;
-  bool         m_prev;
   DSRX_STATE   m_rxState;
-  uint32_t     m_patternBuffer;
-  uint8_t      m_rxBuffer[100U];
-  unsigned int m_rxBufferBits;
-  unsigned int m_dataBits;
+  uint32_t     m_bitBuffer[DSTAR_RADIO_SYMBOL_LENGTH];
+  q15_t        m_headerBuffer[DSTAR_FEC_SECTION_LENGTH_SAMPLES + 2U * DSTAR_RADIO_SYMBOL_LENGTH];
+  q15_t        m_dataBuffer[DSTAR_DATA_LENGTH_SAMPLES];
+  uint16_t     m_bitPtr;
+  uint16_t     m_headerPtr;
+  uint16_t     m_dataPtr;
+  uint16_t     m_startPtr;
+  uint16_t     m_syncPtr;
+  uint16_t     m_minSyncPtr;
+  uint16_t     m_maxSyncPtr;
+  q31_t        m_maxFrameCorr;
+  q31_t        m_maxDataCorr;
+  uint16_t     m_frameCount;
+  uint8_t      m_countdown;
   unsigned int m_mar;
   int          m_pathMetric[4U];
   unsigned int m_pathMemory0[42U];
@@ -54,9 +62,12 @@ private:
   uint32_t     m_rssiAccum;
   uint16_t     m_rssiCount;
   
-  void    processNone(bool bit);
-  void    processHeader(bool bit);
-  void    processData(bool bit);
+  void    processNone(q15_t sample);
+  void    processHeader(q15_t sample);
+  void    processData();
+  bool    correlateFrameSync();
+  bool    correlateDataSync();
+  void    samplesToBits(const q15_t* inBuffer, uint16_t start, uint16_t count, uint8_t* outBuffer, uint16_t limit);
   void    writeRSSIHeader(unsigned char* header);
   void    writeRSSIData(unsigned char* data);
   bool    rxHeader(uint8_t* in, uint8_t* out);

DStarTX.cpp

@@ -198,7 +198,7 @@ m_txDelay(60U)       // 100ms
 {
   ::memset(m_modState, 0x00U, 20U * sizeof(q15_t));
 
-  m_modFilter.L           = DSTAR_RADIO_BIT_LENGTH;
+  m_modFilter.L           = DSTAR_RADIO_SYMBOL_LENGTH;
   m_modFilter.phaseLength = GAUSSIAN_0_35_FILTER_PHASE_LEN;
   m_modFilter.pCoeffs     = GAUSSIAN_0_35_FILTER;
   m_modFilter.pState      = m_modState;
@@ -252,8 +252,8 @@ void CDStarTX::process()
     m_buffer.get();
 
     for (uint8_t j = 0U; j < 3U; j++) {
-      for (uint8_t i = 0U; i < DSTAR_EOT_LENGTH_BYTES; i++)
-        m_poBuffer[m_poLen++] = DSTAR_EOT_BYTES[i];
+      for (uint8_t i = 0U; i < DSTAR_END_SYNC_LENGTH_BYTES; i++)
+        m_poBuffer[m_poLen++] = DSTAR_END_SYNC_BYTES[i];
     }
      
     m_poPtr = 0U;
@@ -262,11 +262,11 @@ void CDStarTX::process()
   if (m_poLen > 0U) {
     uint16_t space = io.getSpace();
     
-    while (space > (8U * DSTAR_RADIO_BIT_LENGTH)) {
+    while (space > (8U * DSTAR_RADIO_SYMBOL_LENGTH)) {
       uint8_t c = m_poBuffer[m_poPtr++];
       writeByte(c);
 
-      space -= 8U * DSTAR_RADIO_BIT_LENGTH;
+      space -= 8U * DSTAR_RADIO_SYMBOL_LENGTH;
       
       if (m_poPtr >= m_poLen) {
         m_poPtr = 0U;
@@ -412,7 +412,7 @@ void CDStarTX::txHeader(const uint8_t* in, uint8_t* out) const
 void CDStarTX::writeByte(uint8_t c)
 {
   q15_t inBuffer[8U];
-  q15_t outBuffer[DSTAR_RADIO_BIT_LENGTH * 8U];
+  q15_t outBuffer[DSTAR_RADIO_SYMBOL_LENGTH * 8U];
 
   uint8_t mask = 0x01U;
 
@@ -427,7 +427,7 @@ void CDStarTX::writeByte(uint8_t c)
 
   ::arm_fir_interpolate_q15(&m_modFilter, inBuffer, outBuffer, 8U);
   
-  io.write(STATE_DSTAR, outBuffer, DSTAR_RADIO_BIT_LENGTH * 8U);
+  io.write(STATE_DSTAR, outBuffer, DSTAR_RADIO_SYMBOL_LENGTH * 8U);
 }
 
 void CDStarTX::setTXDelay(uint8_t delay)

FM.cpp

@@ -20,6 +20,14 @@
 #include "Globals.h"
 #include "FM.h"
 
+/*
+ * Access Mode values are:
+ *   0 - Carrier access with COS
+ *   1 - CTCSS only access without COS
+ *   2 - CTCSS only access with COS
+ *   3 - CTCSS only access with COS to start, then carrier access with COS
+ */
+
 CFM::CFM() :
 m_callsign(),
 m_rfAck(),
@@ -29,6 +37,7 @@ m_timeoutTone(),
 m_state(FS_LISTENING),
 m_callsignAtStart(false),
 m_callsignAtEnd(false),
+m_callsignAtLatch(false),
 m_callsignTimer(),
 m_timeoutTimer(),
 m_holdoffTimer(),
@@ -36,55 +45,89 @@ m_kerchunkTimer(),
 m_ackMinTimer(),
 m_ackDelayTimer(),
 m_hangTimer(),
+m_reverseTimer(),
 m_filterStage1(  724,   1448,   724, 32768, -37895, 21352),//3rd order Cheby Filter 300 to 2700Hz, 0.2dB passband ripple, sampling rate 24kHz
 m_filterStage2(32768,      0,-32768, 32768, -50339, 19052),
 m_filterStage3(32768, -65536, 32768, 32768, -64075, 31460),
-m_preemphasis(32768,  13967, 0, 32768, -18801, 0),//75µS 24kHz sampling rate
-m_deemphasis (32768, -18801, 0, 32768,  13967, 0),//75µS 24kHz sampling rate
 m_blanking(),
-m_useCOS(true),
+m_accessMode(1U),
+m_cosInvert(false),
 m_rfAudioBoost(1U),
-m_downsampler(1024)//Size might need adjustement
+m_downsampler(128U),//Size might need adjustement
+m_rxLevel(1),
+m_inputRB(4800U),   // 200ms of audio
+m_outputRB(2400U)   // 100ms of audio
 {
+  m_reverseTimer.setTimeout(0U, 150U);
+
+  insertDelay(100U);
 }
 
-void CFM::samples(bool cos, q15_t* samples, uint8_t length)
+void CFM::samples(bool cos, const q15_t* samples, uint8_t length)
 {
-  if (!m_useCOS)
-    cos = true;
+  if (m_cosInvert)
+    cos = !cos;
+
+  clock(length);
 
   uint8_t i = 0U;
   for (; i < length; i++) {
-    q15_t currentSample = samples[i];//save to a local variable to avoid indirection on every access
+    // ARMv7-M has hardware integer division 
+    q15_t currentSample = q15_t((q31_t(samples[i]) << 8) / m_rxLevel);
 
-    CTCSSState ctcssState = m_ctcssRX.process(currentSample);
+    switch (m_accessMode) {
+      case 0U:
+        stateMachine(cos);
+        break;
 
-    if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
-      //Not enough samples to determine if you have CTCSS, just carry on
-      continue;
-    } else if (CTCSS_READY(ctcssState) && m_modemState != STATE_FM) {
-      //we had enough samples for CTCSS and we are in some other mode than FM
-      bool validCTCSS = CTCSS_VALID(ctcssState);
-      stateMachine(validCTCSS && cos, i + 1U);
-      if (m_modemState != STATE_FM)
-        continue;
-    } else if (CTCSS_READY(ctcssState) && m_modemState == STATE_FM) {
-      //We had enough samples for CTCSS and we are in FM mode, trigger the state machine
-      bool validCTCSS = CTCSS_VALID(ctcssState);
-      stateMachine(validCTCSS && cos, i + 1U);
-      if (m_modemState != STATE_FM)
+      case 1U: {
+          uint8_t ctcssState = m_ctcssRX.process(currentSample);
+
+          // Delay the audio by 100ms to better match the CTCSS detector output
+          m_inputRB.put(currentSample);
+          m_inputRB.get(currentSample);
+
+          if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
+            // Not enough samples to determine if you have CTCSS, just carry on
+          } else {
+            bool validCTCSS = CTCSS_VALID(ctcssState);
+            stateMachine(validCTCSS);
+          }
+        }
+        break;
+
+      case 2U: {
+          uint8_t ctcssState = m_ctcssRX.process(currentSample);
+          if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
+            // Not enough samples to determine if you have CTCSS, just carry on
+          } else {
+            bool validCTCSS = CTCSS_VALID(ctcssState);
+            stateMachine(validCTCSS && cos);
+          }
+        }
+        break;
+
+      default: {
+          uint8_t ctcssState = m_ctcssRX.process(currentSample);
+          if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
+            // Not enough samples to determine if you have CTCSS, just carry on
+          } else if (CTCSS_READY(ctcssState) && m_modemState != STATE_FM) {
+            // We had enough samples for CTCSS and we are in some other mode than FM
+            bool validCTCSS = CTCSS_VALID(ctcssState);
+            stateMachine(validCTCSS && cos);
+          } else {
+            stateMachine(cos);
+          }
+        }
         break;
-    } else if (CTCSS_NOT_READY(ctcssState) && m_modemState == STATE_FM && i == length - 1) {
-      //Not enough samples for CTCSS but we already are in FM, trigger the state machine
-      //but do not trigger the state machine on every single sample, save CPU!
-      bool validCTCSS = CTCSS_VALID(ctcssState);
-      stateMachine(validCTCSS && cos, i + 1U);
     }
 
+    if (m_modemState != STATE_FM)
+      continue;
+
     // Only let audio through when relaying audio
-    if (m_state == FS_RELAYING || m_state == FS_KERCHUNK) {    
-      currentSample = m_deemphasis.filter(currentSample);
-      m_downsampler.addSample(currentSample);
+    if (m_state == FS_RELAYING || m_state == FS_KERCHUNK) {  
+      // m_downsampler.addSample(currentSample);
       currentSample = m_blanking.process(currentSample);
       currentSample *= m_rfAudioBoost;
     } else {
@@ -101,35 +144,49 @@ void CFM::samples(bool cos, q15_t* samples, uint8_t length)
         currentSample += m_callsign.getLowAudio();
     }
 
+    currentSample = m_filterStage3.filter(m_filterStage2.filter(m_filterStage1.filter(currentSample)));
+
     if (!m_callsign.isRunning() && !m_rfAck.isRunning())
       currentSample += m_timeoutTone.getAudio();
 
-    currentSample = m_filterStage3.filter(m_filterStage2.filter(m_filterStage1.filter(currentSample)));
+    currentSample += m_ctcssTX.getAudio(m_reverseTimer.isRunning());
 
-    currentSample = m_preemphasis.filter(currentSample);
-
-    currentSample += m_ctcssTX.getAudio();
-
-    samples[i] = currentSample;
+    m_outputRB.put(currentSample);
   }
-
-  if (m_modemState == STATE_FM)
-    io.write(STATE_FM, samples, i);//only write the actual number of processed samples to IO
 }
 
 void CFM::process()
 {
+  q15_t sample;
+  while (io.getSpace() >= 3U && m_outputRB.get(sample))
+    io.write(STATE_FM, &sample, 1U);
 }
 
 void CFM::reset()
 {
+  m_state = FS_LISTENING;
+
+  m_callsignTimer.stop();
+  m_timeoutTimer.stop();
+  m_kerchunkTimer.stop();
+  m_ackMinTimer.stop();
+  m_ackDelayTimer.stop();
+  m_hangTimer.stop();
+  m_reverseTimer.stop();
+
   m_ctcssRX.reset();
+  m_rfAck.stop();
+  m_callsign.stop();
+  m_timeoutTone.stop();
+
+  m_outputRB.reset();
 }
 
-uint8_t CFM::setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd)
+uint8_t CFM::setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd, bool callsignAtLatch)
 {
   m_callsignAtStart = callsignAtStart;
   m_callsignAtEnd   = callsignAtEnd;
+  m_callsignAtLatch = callsignAtLatch;
 
   uint16_t holdoffTime  = holdoff * 60U;
   uint16_t callsignTime = time * 60U;
@@ -146,14 +203,18 @@ uint8_t CFM::setCallsign(const char* callsign, uint8_t speed, uint16_t frequency
 uint8_t CFM::setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_t minTime, uint16_t delay, uint8_t level)
 {
   m_ackDelayTimer.setTimeout(0U, delay);
-  m_ackMinTimer.setTimeout(minTime, 0U);
+
+  if (minTime > 0U)
+    m_ackMinTimer.setTimeout(minTime, delay);
 
   return m_rfAck.setParams(rfAck, speed, frequency, level, level);
 }
 
-uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel)
+uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, uint8_t accessMode, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel)
 {
-  m_useCOS       = useCOS;
+  m_accessMode = accessMode;
+  m_cosInvert  = cosInvert;
+
   m_rfAudioBoost = q15_t(rfAudioBoost);
 
   m_timeoutTimer.setTimeout(timeout, 0U);
@@ -163,23 +224,17 @@ uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFreque
   m_timeoutTone.setParams(timeoutLevel);
   m_blanking.setParams(maxDev, timeoutLevel);
 
-  uint8_t ret = m_ctcssRX.setParams(ctcssFrequency, ctcssThreshold, rxLevel);
+  m_rxLevel = rxLevel; //q15_t(255)/q15_t(rxLevel >> 1);
+
+  uint8_t ret = m_ctcssRX.setParams(ctcssFrequency, ctcssHighThreshold, ctcssLowThreshold);
   if (ret != 0U)
     return ret;
 
   return m_ctcssTX.setParams(ctcssFrequency, ctcssLevel);
 }
 
-void CFM::stateMachine(bool validSignal, uint8_t length)
+void CFM::stateMachine(bool validSignal)
 {
-  m_callsignTimer.clock(length);
-  m_timeoutTimer.clock(length);
-  m_holdoffTimer.clock(length);
-  m_kerchunkTimer.clock(length);
-  m_ackMinTimer.clock(length);
-  m_ackDelayTimer.clock(length);
-  m_hangTimer.clock(length);
-
   switch (m_state) {
     case FS_LISTENING:
       listeningState(validSignal);
@@ -207,7 +262,10 @@ void CFM::stateMachine(bool validSignal, uint8_t length)
   }
 
   if (m_state == FS_LISTENING && m_modemState == STATE_FM) {
-    if (!m_callsign.isRunning() && !m_rfAck.isRunning()) {
+    if (!m_callsign.isWanted() && !m_rfAck.isWanted() && !m_reverseTimer.isRunning())
+      m_reverseTimer.start();
+
+    if (!m_callsign.isWanted() && !m_rfAck.isWanted() && m_reverseTimer.isRunning() && m_reverseTimer.hasExpired()) {
       DEBUG1("Change to STATE_IDLE");
       m_modemState = STATE_IDLE;
       m_callsignTimer.stop();
@@ -216,10 +274,23 @@ void CFM::stateMachine(bool validSignal, uint8_t length)
       m_ackMinTimer.stop();
       m_ackDelayTimer.stop();
       m_hangTimer.stop();
+      m_reverseTimer.stop();
     }
   }
 }
 
+void CFM::clock(uint8_t length)
+{
+  m_callsignTimer.clock(length);
+  m_timeoutTimer.clock(length);
+  m_holdoffTimer.clock(length);
+  m_kerchunkTimer.clock(length);
+  m_ackMinTimer.clock(length);
+  m_ackDelayTimer.clock(length);
+  m_hangTimer.clock(length);
+  m_reverseTimer.clock(length);
+}
+
 void CFM::listeningState(bool validSignal)
 {
   if (validSignal) {
@@ -227,6 +298,8 @@ void CFM::listeningState(bool validSignal)
       DEBUG1("State to KERCHUNK");
       m_state = FS_KERCHUNK;
       m_kerchunkTimer.start();
+      if (m_callsignAtStart && !m_callsignAtLatch)
+        sendCallsign();
     } else {
       DEBUG1("State to RELAYING");
       m_state = FS_RELAYING;
@@ -234,9 +307,15 @@ void CFM::listeningState(bool validSignal)
         sendCallsign();
     }
 
+    insertSilence(50U);
+
     beginRelaying();
 
     m_callsignTimer.start();
+    m_reverseTimer.stop();
+
+    io.setDecode(true);
+    io.setADCDetection(true);
 
     DEBUG1("Change to STATE_FM");
     m_modemState = STATE_FM;
@@ -250,8 +329,15 @@ void CFM::kerchunkState(bool validSignal)
       DEBUG1("State to RELAYING");
       m_state = FS_RELAYING;
       m_kerchunkTimer.stop();
+      if (m_callsignAtStart && m_callsignAtLatch) {
+        sendCallsign();
+        m_callsignTimer.start();
+      }
     }
   } else {
+    io.setDecode(false);
+    io.setADCDetection(false);
+
     DEBUG1("State to LISTENING");
     m_state = FS_LISTENING;
     m_kerchunkTimer.stop();
@@ -272,6 +358,9 @@ void CFM::relayingState(bool validSignal)
       m_timeoutTone.start();
     }
   } else {
+    io.setDecode(false);
+    io.setADCDetection(false);
+
     DEBUG1("State to RELAYING_WAIT");
     m_state = FS_RELAYING_WAIT;
     m_ackDelayTimer.start();
@@ -286,6 +375,9 @@ void CFM::relayingState(bool validSignal)
 void CFM::relayingWaitState(bool validSignal)
 {
   if (validSignal) {
+    io.setDecode(true);
+    io.setADCDetection(true);
+
     DEBUG1("State to RELAYING");
     m_state = FS_RELAYING;
     m_ackDelayTimer.stop();
@@ -321,6 +413,9 @@ void CFM::relayingWaitState(bool validSignal)
 void CFM::hangState(bool validSignal)
 {
   if (validSignal) {
+    io.setDecode(true);
+    io.setADCDetection(true);
+
     DEBUG1("State to RELAYING");
     m_state = FS_RELAYING;
     DEBUG1("Stop ack");
@@ -348,6 +443,9 @@ void CFM::hangState(bool validSignal)
 void CFM::timeoutState(bool validSignal)
 {
   if (!validSignal) {
+    io.setDecode(false);
+    io.setADCDetection(false);
+
     DEBUG1("State to TIMEOUT_WAIT");
     m_state = FS_TIMEOUT_WAIT;
     m_ackDelayTimer.start();
@@ -362,6 +460,9 @@ void CFM::timeoutState(bool validSignal)
 void CFM::timeoutWaitState(bool validSignal)
 {
   if (validSignal) {
+    io.setDecode(true);
+    io.setADCDetection(true);
+
     DEBUG1("State to TIMEOUT");
     m_state = FS_TIMEOUT;
     m_ackDelayTimer.stop();
@@ -404,3 +505,19 @@ void CFM::beginRelaying()
   m_timeoutTimer.start();
   m_ackMinTimer.start();
 }
+
+void CFM::insertDelay(uint16_t ms)
+{
+  uint32_t nSamples = ms * 24U;
+
+  for (uint32_t i = 0U; i < nSamples; i++)
+    m_inputRB.put(0);
+}
+
+void CFM::insertSilence(uint16_t ms)
+{
+  uint32_t nSamples = ms * 24U;
+
+  for (uint32_t i = 0U; i < nSamples; i++)
+    m_outputRB.put(0);
+}

FM.h

@@ -27,6 +27,7 @@
 #include "FMTimeout.h"
 #include "FMKeyer.h"
 #include "FMTimer.h"
+#include "FMRB.h"
 #include "FMDirectForm1.h"
 #include "FMDownsampler.h"
 
@@ -47,15 +48,15 @@ class CFM {
 public:
   CFM();
 
-  void samples(bool cos, q15_t* samples, uint8_t length);
+  void samples(bool cos, const q15_t* samples, uint8_t length);
 
   void process();
 
   void reset();
 
-  uint8_t setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd);
+  uint8_t setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd, bool callsignAtLatch);
   uint8_t setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_t minTime, uint16_t delay, uint8_t level);
-  uint8_t setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel);
+  uint8_t setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, uint8_t accessMode, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel);
 
 private:
   CFMKeyer             m_callsign;
@@ -66,6 +67,7 @@ private:
   FM_STATE             m_state;
   bool                 m_callsignAtStart;
   bool                 m_callsignAtEnd;
+  bool                 m_callsignAtLatch;
   CFMTimer             m_callsignTimer;
   CFMTimer             m_timeoutTimer;
   CFMTimer             m_holdoffTimer;
@@ -73,17 +75,20 @@ private:
   CFMTimer             m_ackMinTimer;
   CFMTimer             m_ackDelayTimer;
   CFMTimer             m_hangTimer;
+  CFMTimer             m_reverseTimer;
   CFMDirectFormI       m_filterStage1;
   CFMDirectFormI       m_filterStage2;
   CFMDirectFormI       m_filterStage3;
-  CFMDirectFormI       m_preemphasis;
-  CFMDirectFormI       m_deemphasis;
   CFMBlanking          m_blanking;
-  bool                 m_useCOS;
+  uint8_t              m_accessMode;
+  bool                 m_cosInvert;
   q15_t                m_rfAudioBoost;
   CFMDownsampler       m_downsampler;
+  q15_t                m_rxLevel;
+  CFMRB                m_inputRB;
+  CFMRB                m_outputRB;
 
-  void stateMachine(bool validSignal, uint8_t length);
+  void stateMachine(bool validSignal);
   void listeningState(bool validSignal);
   void kerchunkState(bool validSignal);
   void relayingState(bool validSignal);
@@ -92,8 +97,13 @@ private:
   void timeoutWaitState(bool validSignal);
   void hangState(bool validSignal);
 
+  void clock(uint8_t length);
+
   void sendCallsign();
   void beginRelaying();
+
+  void insertDelay(uint16_t ms);
+  void insertSilence(uint16_t ms);
 };
 
 #endif

FMCTCSSRX.cpp

@@ -82,19 +82,17 @@ const uint16_t N = 24000U / 4U;
 
 CFMCTCSSRX::CFMCTCSSRX() :
 m_coeffDivTwo(0),
-m_threshold(0),
+m_highThreshold(0),
+m_lowThreshold(0),
 m_count(0U),
 m_q0(0),
 m_q1(0),
-m_result(CTS_NONE),
-m_rxLevelInverse(1)
+m_result(CTS_NONE)
 {
 }
 
-uint8_t CFMCTCSSRX::setParams(uint8_t frequency, uint8_t threshold, uint8_t level)
+uint8_t CFMCTCSSRX::setParams(uint8_t frequency, uint8_t highThreshold, uint8_t lowThreshold)
 {
-  m_rxLevelInverse = 511 / q15_t(level);
-
   m_coeffDivTwo = 0;
 
   for (uint8_t i = 0U; i < CTCSS_TABLE_DATA_LEN; i++) {
@@ -107,16 +105,18 @@ uint8_t CFMCTCSSRX::setParams(uint8_t frequency, uint8_t threshold, uint8_t leve
   if (m_coeffDivTwo == 0)
     return 4U;
 
-  m_threshold = q31_t(threshold);
+  m_highThreshold = q31_t(highThreshold);
+  m_lowThreshold  = q31_t(lowThreshold);
 
   return 0U;
 }
 
-CTCSSState CFMCTCSSRX::process(q15_t sample)
+uint8_t CFMCTCSSRX::process(q15_t sample)
 {
-  q31_t sample31 = q31_t(sample) * m_rxLevelInverse;
+  //get more dynamic into the decoder by multiplying the sample by 1.5
+  q31_t sample31 = q31_t(sample) +  (q31_t(sample) >> 1);
 
-  m_result = m_result & (~CTS_READY); 
+  m_result &= ~CTS_READY;
 
   q31_t q2 = m_q1;
   m_q1 = m_q0;
@@ -150,14 +150,19 @@ CTCSSState CFMCTCSSRX::process(q15_t sample)
     q31_t value = t2 + t4 - t9;
 
     bool previousCTCSSValid = CTCSS_VALID(m_result);
-    m_result = m_result | CTS_READY;
-    if (value >= m_threshold)
-      m_result = m_result | CTS_VALID;
-    else
-      m_result = m_result & ~CTS_VALID;
 
-    if(previousCTCSSValid != CTCSS_VALID(m_result))
-      DEBUG4("CTCSS Value / Threshold / Valid", value, m_threshold, CTCSS_VALID(m_result));
+    q31_t threshold = m_highThreshold;
+    if (previousCTCSSValid)
+      threshold = m_lowThreshold;
+
+    m_result |= CTS_READY;
+    if (value >= threshold)
+      m_result |= CTS_VALID;
+    else
+      m_result &= ~CTS_VALID;
+
+    if (previousCTCSSValid != CTCSS_VALID(m_result))
+      DEBUG4("CTCSS Value / Threshold / Valid", value, threshold, CTCSS_VALID(m_result));
 
     m_count = 0U;
     m_q0 = 0;
@@ -167,11 +172,6 @@ CTCSSState CFMCTCSSRX::process(q15_t sample)
   return m_result;
 }
 
-CTCSSState CFMCTCSSRX::getState()
-{
-  return m_result;
-}
-
 void CFMCTCSSRX::reset()
 {
   m_q0 = 0;

FMCTCSSRX.h

@@ -21,28 +21,9 @@
 
 #include "Config.h"
 
-enum CTCSSState
-{
-  CTS_NONE  = 0,
-  CTS_READY = 1,
-  CTS_VALID = 2,
-  CTS_READY_VALID = CTS_READY | CTS_VALID
-};
-
-inline CTCSSState operator|(CTCSSState a, CTCSSState b)
-{
-  return static_cast<CTCSSState>(static_cast<uint8_t>(a) | static_cast<uint8_t>(b));
-}
-
-inline CTCSSState operator&(CTCSSState a, CTCSSState b)
-{
-  return static_cast<CTCSSState>(static_cast<uint8_t>(a) & static_cast<uint8_t>(b));
-}
-
-inline CTCSSState operator~(CTCSSState a)
-{
-  return static_cast<CTCSSState>(~(static_cast<uint8_t>(a)));
-}
+const uint8_t CTS_NONE  = 0U;
+const uint8_t CTS_READY = 1U;
+const uint8_t CTS_VALID = 2U;
 
 #define CTCSS_READY(a) ((a & CTS_READY) != 0)
 #define CTCSS_NOT_READY(a) ((a & CTS_READY) == 0)
@@ -53,22 +34,20 @@ class CFMCTCSSRX {
 public:
   CFMCTCSSRX();
 
-  uint8_t setParams(uint8_t frequency, uint8_t threshold, uint8_t level);
+  uint8_t setParams(uint8_t frequency, uint8_t highThreshold, uint8_t lowThreshold);
   
-  CTCSSState process(q15_t sample);
-
-  CTCSSState getState();
+  uint8_t process(q15_t sample);
 
   void reset();
 
 private:
-  q63_t      m_coeffDivTwo;
-  q31_t      m_threshold;
-  uint16_t   m_count;
-  q31_t      m_q0;
-  q31_t      m_q1;
-  CTCSSState m_result;
-  q15_t      m_rxLevelInverse;
+  q63_t    m_coeffDivTwo;
+  q31_t    m_highThreshold;
+  q31_t    m_lowThreshold;
+  uint16_t m_count;
+  q31_t    m_q0;
+  q31_t    m_q1;
+  uint8_t  m_result;
 };
 
 #endif

FMCTCSSTX.cpp

@@ -115,11 +115,14 @@ uint8_t CFMCTCSSTX::setParams(uint8_t frequency, uint8_t level)
   return 0U;
 }
 
-q15_t CFMCTCSSTX::getAudio()
+q15_t CFMCTCSSTX::getAudio(bool reverse)
 {
   q15_t sample = m_values[m_n++];
-  if(m_n >= m_length)
+  if (m_n >= m_length)
     m_n = 0U;
   
-  return sample;
+  if (reverse)
+    return -sample;
+  else
+    return sample;
 }

FMCTCSSTX.h

@@ -27,7 +27,7 @@ public:
 
   uint8_t setParams(uint8_t frequency, uint8_t level);
 
-  q15_t getAudio();
+  q15_t getAudio(bool reverse);
 
 private:
   q15_t*   m_values;

FMDownsampleRB.h

@@ -16,8 +16,8 @@
  *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#if !defined(FMRB_H)
-#define  FMRB_H
+#if !defined(FMDOWNSAMPLERB_H)
+#define  FMDOWNSAMPLERB_H
 
 #if defined(STM32F4XX)
 #include "stm32f4xx.h"

FMDownsampler.h

@@ -40,4 +40,4 @@ private:
   uint8_t m_downSampleIndex;
 };
 
-#endif
+#endif

FMKeyer.cpp

@@ -66,6 +66,7 @@ const struct {
   {',', 0xEEAEE000U, 22U},
   {'-', 0xEAAE0000U, 18U},
   {'=', 0xEAB80000U, 16U},
+  {'.', 0xBAEB8000U, 20U},
   {' ', 0x00000000U, 4U},
   {0U,  0x00000000U, 0U}
 };
@@ -204,6 +205,11 @@ void CFMKeyer::stop()
   m_audioPos = 0U;
 }
 
+bool CFMKeyer::isWanted() const
+{
+  return m_wanted;
+}
+
 bool CFMKeyer::isRunning() const
 {
   return m_poPos > 0U || m_dotPos > 0U || m_audioPos > 0U;

FMKeyer.h

@@ -35,6 +35,8 @@ public:
 
   bool isRunning() const;
 
+  bool isWanted() const;
+
 private:
   bool     m_wanted;
   uint8_t  m_poBuffer[1000U];

FMRB.cpp

@@ -0,0 +1,110 @@
+/*
+TX fifo control - Copyright (C) KI6ZUM 2015
+Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with this library; if not, write to the
+Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
+Boston, MA  02110-1301, USA.
+*/
+
+#include "FMRB.h"
+
+CFMRB::CFMRB(uint16_t length) :
+m_length(length),
+m_head(0U),
+m_tail(0U),
+m_full(false),
+m_overflow(false)
+{
+  m_samples = new q15_t[length];
+}
+
+uint16_t CFMRB::getSpace() const
+{
+  uint16_t n = 0U;
+
+  if (m_tail == m_head)
+    n = m_full ? 0U : m_length;
+  else if (m_tail < m_head)
+    n = m_length - m_head + m_tail;
+  else
+    n = m_tail - m_head;
+
+  if (n > m_length)
+    n = 0U;
+
+  return n;
+}
+
+uint16_t CFMRB::getData() const
+{
+  if (m_tail == m_head)
+    return m_full ? m_length : 0U;
+  else if (m_tail < m_head)
+    return m_head - m_tail;
+  else
+    return m_length - m_tail + m_head;
+}
+
+bool CFMRB::put(q15_t sample)
+{
+  if (m_full) {
+    m_overflow = true;
+    return false;
+  }
+
+  m_samples[m_head] = sample;
+
+  m_head++;
+  if (m_head >= m_length)
+    m_head = 0U;
+
+  if (m_head == m_tail)
+    m_full = true;
+
+  return true;
+}
+
+bool CFMRB::get(q15_t& sample)
+{
+  if (m_head == m_tail && !m_full)
+    return false;
+
+  sample = m_samples[m_tail];
+
+  m_full = false;
+
+  m_tail++;
+  if (m_tail >= m_length)
+    m_tail = 0U;
+
+  return true;
+}
+
+bool CFMRB::hasOverflowed()
+{
+  bool overflow = m_overflow;
+
+  m_overflow = false;
+
+  return overflow;
+}
+
+void CFMRB::reset()
+{
+  m_head = 0U;
+  m_tail = 0U;
+  m_full     = false;
+  m_overflow = false;
+}

FMRB.h

@@ -0,0 +1,72 @@
+/*
+Serial fifo control - Copyright (C) KI6ZUM 2015
+Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with this library; if not, write to the
+Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
+Boston, MA  02110-1301, USA.
+*/
+
+#if !defined(FMRB_H)
+#define  FMRB_H
+
+#if defined(STM32F4XX)
+#include "stm32f4xx.h"
+#elif defined(STM32F7XX)
+#include "stm32f7xx.h"
+#elif defined(STM32F105xC)
+#include "stm32f1xx.h"
+#include <cstddef>
+#else
+#include <Arduino.h>
+#endif
+
+#if defined(__SAM3X8E__) || defined(STM32F105xC)
+#define  ARM_MATH_CM3
+#elif defined(STM32F7XX)
+#define  ARM_MATH_CM7
+#elif defined(STM32F4XX) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
+#define  ARM_MATH_CM4
+#else
+#error "Unknown processor type"
+#endif
+
+#include <arm_math.h>
+
+class CFMRB {
+public:
+  CFMRB(uint16_t length);
+  
+  uint16_t getSpace() const;
+  
+  uint16_t getData() const;
+
+  bool put(q15_t sample);
+
+  bool get(q15_t& sample);
+
+  bool hasOverflowed();
+
+  void reset();
+
+private:
+  uint16_t          m_length;
+  volatile q15_t*   m_samples;
+  volatile uint16_t m_head;
+  volatile uint16_t m_tail;
+  volatile bool     m_full;
+  bool              m_overflow;
+};
+
+#endif

FMTimeout.cpp

@@ -36,24 +36,22 @@ m_n(0U)
 
 void CFMTimeout::setParams(uint8_t level)
 {
-  m_level = q15_t(level * 128);
+  m_level = q15_t(level * 5);
 }
 
 q15_t CFMTimeout::getAudio()
 {
-  q15_t sample = 0U;
+  q15_t sample = 0;
   if (!m_running)
     return sample;
 
-  if (m_pos > 12000U) {
-    q31_t sample = BUSY_AUDIO[m_n] * m_level;
-    sample = q15_t(__SSAT((sample >> 15), 16));
+  if (m_pos >= 12000U) {
+    q31_t sample31 = BUSY_AUDIO[m_n] * m_level;
+    sample = q15_t(__SSAT((sample31 >> 15), 16));
 
     m_n++;
     if (m_n >= BUSY_AUDIO_LEN)
       m_n = 0U;
-  } else {
-    sample = 0U;
   }
 
   m_pos++;

IO.cpp

@@ -83,6 +83,7 @@ m_pocsagTXLevel(128 * 128),
 m_fmTXLevel(128 * 128),
 m_rxDCOffset(DC_OFFSET),
 m_txDCOffset(DC_OFFSET),
+m_useCOSAsLockout(false),
 m_ledCount(0U),
 m_ledValue(true),
 m_detect(false),
@@ -132,7 +133,7 @@ void CIO::selfTest()
 {
   bool ledValue = false;
 
-  for (uint8_t i = 0; i < 6; i++) {
+  for (uint8_t i = 0U; i < 6U; i++) {
     ledValue = !ledValue;
 
     // We exclude PTT to avoid trigger the transmitter
@@ -143,21 +144,34 @@ void CIO::selfTest()
     setDMRInt(ledValue);
     setYSFInt(ledValue);
     setP25Int(ledValue);
+#if !defined(USE_ALTERNATE_NXDN_LEDS)
     setNXDNInt(ledValue);
+#endif
+#if !defined(USE_ALTERNATE_POCSAG_LEDS)
     setPOCSAGInt(ledValue);
+#endif
+#if !defined(USE_ALTERNATE_FM_LEDS)
     setFMInt(ledValue);
+#endif
 #endif
     delayInt(250);
   }
 
 #if defined(MODE_LEDS)
-  setDStarInt(true);
+  setDStarInt(false);
   setDMRInt(false);
   setYSFInt(false);
   setP25Int(false);
+#if !defined(USE_ALTERNATE_NXDN_LEDS)
   setNXDNInt(false);
+#endif
+#if !defined(USE_ALTERNATE_POCSAG_LEDS)
   setPOCSAGInt(false);
+#endif
+#if !defined(USE_ALTERNATE_FM_LEDS)
   setFMInt(false);
+#endif
+  setDStarInt(true);
 
   delayInt(250);
   setDMRInt(true);
@@ -219,7 +233,7 @@ void CIO::start()
 
   m_started = true;
 
-  setMode();
+  setMode(STATE_IDLE);
 }
 
 void CIO::process()
@@ -231,8 +245,7 @@ void CIO::process()
       if (m_modemState == STATE_DSTAR || m_modemState == STATE_DMR || m_modemState == STATE_YSF || m_modemState == STATE_P25 || m_modemState == STATE_NXDN || m_modemState == STATE_POCSAG) {
         if (m_modemState == STATE_DMR && m_tx)
           dmrTX.setStart(false);
-        m_modemState = STATE_IDLE;
-        setMode();
+        setMode(STATE_IDLE);
       }
 
       m_watchdog = 0U;
@@ -256,9 +269,8 @@ void CIO::process()
     return;
   }
 
-#if defined(USE_COS_AS_LOCKOUT)
-  m_lockout = getCOSInt();
-#endif
+  if (m_useCOSAsLockout)
+    m_lockout = getCOSInt();
 
   // Switch off the transmitter if needed
   if (m_txBuffer.getData() == 0U && m_tx) {
@@ -516,20 +528,37 @@ void CIO::setADCDetection(bool detect)
   m_detect = detect;
 }
 
-void CIO::setMode()
+void CIO::setMode(MMDVM_STATE state)
 {
+  if (state == m_modemState)
+    return;
+
 #if defined(MODE_LEDS)
-  setDStarInt(m_modemState == STATE_DSTAR);
-  setDMRInt(m_modemState   == STATE_DMR);
-  setYSFInt(m_modemState   == STATE_YSF);
-  setP25Int(m_modemState   == STATE_P25);
-  setNXDNInt(m_modemState  == STATE_NXDN);
-  setPOCSAGInt(m_modemState  == STATE_POCSAG);
-  setFMInt(m_modemState == STATE_FM);
+  switch (m_modemState) {
+    case STATE_DSTAR:  setDStarInt(false);  break;
+    case STATE_DMR:    setDMRInt(false);    break;
+    case STATE_YSF:    setYSFInt(false);    break;
+    case STATE_P25:    setP25Int(false);    break;
+    case STATE_NXDN:   setNXDNInt(false);   break;
+    case STATE_POCSAG: setPOCSAGInt(false); break;
+    case STATE_FM:     setFMInt(false);     break;
+  }
+
+  switch (state) {
+    case STATE_DSTAR:  setDStarInt(true);  break;
+    case STATE_DMR:    setDMRInt(true);    break;
+    case STATE_YSF:    setYSFInt(true);    break;
+    case STATE_P25:    setP25Int(true);    break;
+    case STATE_NXDN:   setNXDNInt(true);   break;
+    case STATE_POCSAG: setPOCSAGInt(true); break;
+    case STATE_FM:     setFMInt(true);     break;
+  }
 #endif
+
+  m_modemState = state;
 }
 
-void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset)
+void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset, bool useCOSAsLockout)
 {
   m_pttInvert = pttInvert;
 
@@ -545,6 +574,8 @@ void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rx
 
   m_rxDCOffset   = DC_OFFSET + rxDCOffset;
   m_txDCOffset   = DC_OFFSET + txDCOffset;
+
+  m_useCOSAsLockout = useCOSAsLockout;
   
   if (rxInvert)
     m_rxLevel = -m_rxLevel;

IO.h

@@ -38,11 +38,11 @@ public:
 
   void setDecode(bool dcd);
   void setADCDetection(bool detect);
-  void setMode();
+  void setMode(MMDVM_STATE state);
   
   void interrupt();
 
-  void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset);
+  void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset, bool useCOSAsLockout);
 
   void getOverflow(bool& adcOverflow, bool& dacOverflow);
 
@@ -91,6 +91,8 @@ private:
   uint16_t             m_rxDCOffset;
   uint16_t             m_txDCOffset;
 
+  bool                 m_useCOSAsLockout;
+
   uint32_t             m_ledCount;
   bool                 m_ledValue;
 

IOPins.h

@@ -0,0 +1,79 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _IO_PINS_H
+#define _IO_PINS_H
+
+#if !defined(CONFIG_H)
+#error "Requires Config.h to be included first!"
+#endif
+
+#if defined(STM32F4_RPT_HAT_TGO)
+    #include "pins/pins_f4_rpt_tgo.h"
+
+#elif defined(STM32F4_DISCOVERY)
+    #include "pins/pins_f4_discovery.h"
+
+#elif defined(STM32F4_PI)
+    #include "pins/pins_f4_pi.h"
+
+#elif defined(STM32F722_PI)
+    #include "pins/pins_f7_pi.h"
+
+#elif defined(STM32F4_F4M)
+    #include "pins/pins_f4_f4m.h"
+
+#elif defined(STM32F722_F7M)
+    #include "pins/pins_f7_f7m.h"
+
+#elif defined(STM32F722_RPT_HAT)
+    #include "pins/pins_f7_rpt_hat.h"
+
+#elif defined(STM32F4_NUCLEO)
+    #if defined(STM32F4_NUCLEO_MORPHO_HEADER)
+        #include "pins/pins_f4_nucleo_morpho.h"
+    #elif defined(STM32F4_NUCLEO_ARDUINO_HEADER)
+        #include "pins/pins_f4_nucleo_arduino.h"
+    #else
+        #error "Either STM32F4_NUCLEO_MORPHO_HEADER or STM32F4_NUCLEO_ARDUINO_HEADER need to be defined"
+    #endif
+
+#elif defined(STM32F7_NUCLEO)
+    #include "pins/pins_f7_nucleo.h"
+
+#elif defined(STM32F4_DVM)
+    #include "pins/pins_f4_stm32dvm_v3.h"
+
+#elif defined(STM32F7_DVM)
+    #include "pins/pins_f7_stm32dvm_v5.h"
+
+#elif defined(DRCC_DVM_NQF)
+    #include "pins/pins_f4_drcc_nqf.h"
+
+#elif defined(DRCC_DVM_HHP446)
+    #include "pins/pins_f4_drcc_hhp446.h"
+
+#elif defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
+    #include "pins/pins_f4_stm32eda.h"
+
+#else
+    #error "A valid board type macro need to be defined."
+
+#endif
+
+#endif  //#ifndef _IO_PINS_H

IOSTM_CMSIS.cpp

@@ -41,7 +41,6 @@ YSF      PB8    output
 P25      PB9    output
 NXDN     PB10   output
 POCSAG   PB11   output
-FM       PB12   output
 
 RX       PB0    analog input (ADC1_8)
 RSSI     PB1    analog input (ADC2_9)
@@ -85,9 +84,6 @@ USART1_RXD PA10  input (AF)
 #define PIN_POCSAG        11
 #define PORT_POCSAG       GPIOB
 #define BB_POCSAG         *((bitband_t)BITBAND_PERIPH(&PORT_POCSAG->ODR, PIN_POCSAG))
-#define PIN_FM            12
-#define PORT_FM           GPIOB
-#define BB_FM             *((bitband_t)BITBAND_PERIPH(&PORT_FM->ODR, PIN_FM))
 
 #define PIN_RX            0
 #define PIN_RX_ADC_CH     8
@@ -158,9 +154,9 @@ void GPIOConfigPin(GPIO_TypeDef *port_ptr, uint32_t pin, uint32_t mode_cnf_value
 #if defined(STM32F1_POG)
 void FancyLEDEffect()
 {
-  bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25, &BB_NXDN, &BB_POCSAG, &BB_FM};
+  bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25};
    
-  for(int i=0; i<10; i++){
+  for(int i=0; i<7; i++){
     *foo[i] = 0x01;
   }
   GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1);
@@ -176,12 +172,12 @@ void FancyLEDEffect()
   *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
   
   *foo[0] = 0x01;
-  for(int i=1; i<10; i++){
+  for(int i=1; i<7; i++){
     delay(SystemCoreClock/1000*10);
     *foo[i-1] = 0x00;
     *foo[i] = 0x01;
   }
-  for(int i=10; i>=0; i--){
+  for(int i=5; i>=0; i--){
     delay(SystemCoreClock/1000*10);
     *foo[i+1] = 0x00;
     *foo[i] = 0x01;
@@ -232,9 +228,6 @@ static inline void GPIOInit()
 #if !defined(USE_ALTERNATE_POCSAG_LEDS)
   GPIOConfigPin(PORT_POCSAG, PIN_POCSAG, GPIO_CRL_MODE0_1);
 #endif
-#if !defined(USE_ALTERNATE_FM_LEDS)
-  GPIOConfigPin(PORT_FM,     PIN_FM,     GPIO_CRL_MODE0_1);
-#endif
 
   GPIOConfigPin(PORT_RX, PIN_RX, 0);
 #if defined(SEND_RSSI_DATA)
@@ -472,8 +465,6 @@ void CIO::setFMInt(bool on)
 #if defined(USE_ALTERNATE_FM_LEDS)
   BB_DSTAR = !!on;
   BB_YSF   = !!on;
-#else
-  BB_FM = !!on;
 #endif
 }
 

MMDVM_STM32F4xx.coproj

@@ -1,340 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<Project version="2G - 1.7.8" name="MMDVM_STM32F4xx">
-  <Target name="MMDVM_Discovery_407" isCurrent="1">
-    <Device manufacturerId="9" manufacturerName="ST" chipId="344" chipName="STM32F407VG" boardId="" boardName=""/>
-    <BuildOption>
-      <Compile>
-        <Option name="OptimizationLevel" value="4"/>
-        <Option name="UseFPU" value="0"/>
-        <Option name="UserEditCompiler" value=""/>
-        <Option name="SupportCPlusplus" value="1"/>
-        <Option name="FPU" value="2"/>
-        <Includepaths>
-          <Includepath path="."/>
-        </Includepaths>
-        <DefinedSymbols>
-          <Define name="STM32F4XX"/>
-          <Define name="USE_STDPERIPH_DRIVER"/>
-          <Define name="__ASSEMBLY__"/>
-          <Define name="SUPPORT_CPLUSPLUS"/>
-          <Define name="STM32F40_41xxx"/>
-          <Define name="HSE_VALUE=8000000"/>
-          <Define name="STM32F4_DISCOVERY"/>
-          <Define name="__FPU_USED"/>
-        </DefinedSymbols>
-      </Compile>
-      <Link useDefault="0">
-        <Option name="DiscardUnusedSection" value="0"/>
-        <Option name="UserEditLinkder" value=""/>
-        <Option name="UseMemoryLayout" value="0"/>
-        <Option name="nostartfiles" value="1"/>
-        <Option name="LTO" value="0"/>
-        <Option name="IsNewStartupCode" value="1"/>
-        <Option name="Library" value="Semihosting"/>
-        <Option name="UserEditLinker" value="-lstdc++; --specs=nano.specs;"/>
-        <LinkedLibraries>
-          <Libset dir="stm32f4xx_lib\cmsis\lib\gcc\" libs="arm_cortexm4lf_math"/>
-        </LinkedLibraries>
-        <MemoryAreas debugInFlashNotRAM="1">
-          <Memory name="IROM1" type="ReadOnly" size="0x00100000" startValue="0x08000000"/>
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-          <Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
-          <Memory name="IRAM2" type="ReadWrite" size="0x00010000" startValue="0x10000000"/>
-        </MemoryAreas>
-        <LocateLinkFile path="./stm32f4xx_link.ld" type="0"/>
-      </Link>
-      <Output>
-        <Option name="OutputFileType" value="0"/>
-        <Option name="Path" value="./"/>
-        <Option name="Name" value="MMDVM_DIS"/>
-        <Option name="HEX" value="1"/>
-        <Option name="BIN" value="1"/>
-      </Output>
-      <User>
-        <UserRun name="Run#1" type="Before" checked="0" value=""/>
-        <UserRun name="Run#1" type="After" checked="0" value=""/>
-      </User>
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-      <Option name="org.coocox.codebugger.gdbjtag.core.adapter" value="ST-Link"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.debugMode" value="SWD"/>
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-      <Option name="org.coocox.codebugger.gdbjtag.core.ifSemihost" value="0"/>
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-      <Option name="org.coocox.codebugger.gdbjtag.core.portNumber" value="2009"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.autoDownload" value="1"/>
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-      <Option name="org.coocox.codebugger.gdbjtag.core.downloadFuction" value="Erase Effected"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.defaultAlgorithm" value="STM32F4xx_1024.elf"/>
-    </DebugOption>
-    <ExcludeFile/>
-  </Target>
-  <Target name="MMDVM_Pi_446" isCurrent="0">
-    <Device manufacturerId="9" manufacturerName="ST" chipId="344" chipName="STM32F407VG" boardId="" boardName=""/>
-    <BuildOption>
-      <Compile>
-        <Option name="OptimizationLevel" value="4"/>
-        <Option name="UseFPU" value="0"/>
-        <Option name="UserEditCompiler" value=""/>
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-        <Option name="FPU" value="2"/>
-        <Includepaths>
-          <Includepath path="."/>
-        </Includepaths>
-        <DefinedSymbols>
-          <Define name="STM32F4XX"/>
-          <Define name="USE_STDPERIPH_DRIVER"/>
-          <Define name="__ASSEMBLY__"/>
-          <Define name="SUPPORT_CPLUSPLUS"/>
-          <Define name="__FPU_USED"/>
-          <Define name="STM32F446xx"/>
-          <Define name="HSE_VALUE=12000000"/>
-          <Define name="STM32F4_PI"/>
-          <Define name="MODE_LEDS"/>
-        </DefinedSymbols>
-      </Compile>
-      <Link useDefault="0">
-        <Option name="DiscardUnusedSection" value="0"/>
-        <Option name="UserEditLinkder" value=""/>
-        <Option name="UseMemoryLayout" value="0"/>
-        <Option name="nostartfiles" value="1"/>
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-        <Option name="Library" value="Semihosting"/>
-        <Option name="UserEditLinker" value="-lstdc++; --specs=nano.specs;"/>
-        <LinkedLibraries>
-          <Libset dir="stm32f4xx_lib\cmsis\lib\gcc\" libs="arm_cortexm4lf_math"/>
-        </LinkedLibraries>
-        <MemoryAreas debugInFlashNotRAM="1">
-          <Memory name="IROM1" type="ReadOnly" size="0x00100000" startValue="0x08000000"/>
-          <Memory name="IRAM1" type="ReadWrite" size="0x00020000" startValue="0x20000000"/>
-          <Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
-          <Memory name="IRAM2" type="ReadWrite" size="0x00010000" startValue="0x10000000"/>
-        </MemoryAreas>
-        <LocateLinkFile path="./stm32f4xx_link.ld" type="0"/>
-      </Link>
-      <Output>
-        <Option name="OutputFileType" value="0"/>
-        <Option name="Path" value="./"/>
-        <Option name="Name" value="MMDVM_PI"/>
-        <Option name="HEX" value="1"/>
-        <Option name="BIN" value="1"/>
-      </Output>
-      <User>
-        <UserRun name="Run#1" type="Before" checked="0" value=""/>
-        <UserRun name="Run#1" type="After" checked="0" value=""/>
-      </User>
-    </BuildOption>
-    <DebugOption>
-      <Option name="org.coocox.codebugger.gdbjtag.core.adapter" value="ST-Link"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.debugMode" value="SWD"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.clockDiv" value="1M"/>
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-    </DebugOption>
-    <ExcludeFile/>
-  </Target>
-  <Target name="MMDVM_Nucleo_446" isCurrent="0">
-    <Device manufacturerId="9" manufacturerName="ST" chipId="344" chipName="STM32F407VG" boardId="" boardName=""/>
-    <BuildOption>
-      <Compile>
-        <Option name="OptimizationLevel" value="4"/>
-        <Option name="UseFPU" value="0"/>
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-  <Components path="./">
-  </Components>
-  <Files>
-    <File name="DMRIdleRX.h" path="DMRIdleRX.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_dac.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_dac.c" type="1"/>
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-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_usart.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_usart.c" type="1"/>
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-    <File name="MMDVM.cpp" path="MMDVM.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Include/core_cmSimd.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmSimd.h" type="1"/>
-    <File name="DMRDMORX.h" path="DMRDMORX.h" type="1"/>
-    <File name="SerialPort.h" path="SerialPort.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_dac.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_dac.h" type="1"/>
-    <File name="CWIdTX.h" path="CWIdTX.h" type="1"/>
-    <File name="STM32F4XX_Lib/Device/system_stm32f4xx.h" path="STM32F4XX_Lib/Device/system_stm32f4xx.h" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Include/core_cmFunc.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmFunc.h" type="1"/>
-    <File name="CalDStarTX.cpp" path="CalDStarTX.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source" path="" type="2"/>
-    <File name="CalDMR.h" path="CalDMR.h" type="1"/>
-    <File name="CalFM.h" path="CalFM.h" type="1"/>
-    <File name="DMRDMOTX.h" path="DMRDMOTX.h" type="1"/>
-    <File name="IODue.cpp" path="IODue.cpp" type="1"/>
-    <File name="DMRTX.cpp" path="DMRTX.cpp" type="1"/>
-    <File name="P25RX.cpp" path="P25RX.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Lib/GCC" path="" type="2"/>
-    <File name="STM32F4XX_Lib" path="" type="2"/>
-    <File name="STM32F4XX_Lib/CMSIS/Include/core_cmInstr.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmInstr.h" type="1"/>
-    <File name="DMRTX.h" path="DMRTX.h" type="1"/>
-    <File name="STM32F4XX_Lib/Device/system_stm32f4xx.c" path="STM32F4XX_Lib/Device/system_stm32f4xx.c" type="1"/>
-    <File name="RSSIRB.h" path="RSSIRB.h" type="1"/>
-    <File name="STM32F4XX_Lib/Device/startup/startup_stm32f4xx.c" path="STM32F4XX_Lib/Device/startup/startup_stm32f4xx.c" type="1"/>
-    <File name="STM32F4XX_Lib/Device/startup" path="" type="2"/>
-    <File name="SerialRB.h" path="SerialRB.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_gpio.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_gpio.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver" path="" type="2"/>
-    <File name="DMRDefines.h" path="DMRDefines.h" type="1"/>
-    <File name="CalDMR.cpp" path="CalDMR.cpp" type="1"/>
-    <File name="CalFM.cpp" path="CalFM.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_adc.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_adc.h" type="1"/>
-    <File name="SerialSTM.cpp" path="SerialSTM.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" path="STM32F4XX_Lib/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" type="1"/>
-    <File name="DStarDefines.h" path="DStarDefines.h" type="1"/>
-    <File name="DStarRX.h" path="DStarRX.h" type="1"/>
-    <File name="Config.h" path="Config.h" type="1"/>
-    <File name="DMRSlotType.cpp" path="DMRSlotType.cpp" type="1"/>
-    <File name="Globals.h" path="Globals.h" type="1"/>
-    <File name="STM32F4XX_Lib/Device" path="" type="2"/>
-    <File name="CalDStarRX.cpp" path="CalDStarRX.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_tim.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_tim.h" type="1"/>
-    <File name="CalDStarRX.h" path="CalDStarRX.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include" path="" type="2"/>
-    <File name="IO.h" path="IO.h" type="1"/>
-    <File name="Utils.cpp" path="Utils.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/.DS_Store" path="STM32F4XX_Lib/CMSIS/.DS_Store" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Lib/.DS_Store" path="STM32F4XX_Lib/CMSIS/Lib/.DS_Store" type="1"/>
-    <File name="Utils.h" path="Utils.h" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Lib" path="" type="2"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/.DS_Store" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/.DS_Store" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Include/.DS_Store" path="STM32F4XX_Lib/CMSIS/Include/.DS_Store" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Include/arm_math.h" path="STM32F4XX_Lib/CMSIS/Include/arm_math.h" type="1"/>
-    <File name="YSFDefines.h" path="YSFDefines.h" type="1"/>
-    <File name="DStarTX.h" path="DStarTX.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_rcc.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_rcc.c" type="1"/>
-    <File name="STM32F4XX_Lib/Device/.DS_Store" path="STM32F4XX_Lib/Device/.DS_Store" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_rcc.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_rcc.h" type="1"/>
-    <File name="P25Defines.h" path="P25Defines.h" type="1"/>
-    <File name="DMRSlotType.h" path="DMRSlotType.h" type="1"/>
-    <File name="Debug.h" path="Debug.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/misc.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/misc.h" type="1"/>
-    <File name="P25TX.h" path="P25TX.h" type="1"/>
-    <File name="RSSIRB.cpp" path="RSSIRB.cpp" type="1"/>
-    <File name="DStarRX.cpp" path="DStarRX.cpp" type="1"/>
-    <File name="DMRSlotRX.cpp" path="DMRSlotRX.cpp" type="1"/>
-    <File name="IOSTM.cpp" path="IOSTM.cpp" type="1"/>
-    <File name="P25TX.cpp" path="P25TX.cpp" type="1"/>
-    <File name="SerialRB.cpp" path="SerialRB.cpp" type="1"/>
-    <File name="CWIdTX.cpp" path="CWIdTX.cpp" type="1"/>
-    <File name="DMRIdleRX.cpp" path="DMRIdleRX.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_usart.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_usart.h" type="1"/>
-    <File name="STM32F4XX_Lib/.DS_Store" path="STM32F4XX_Lib/.DS_Store" type="1"/>
-    <File name="YSFTX.cpp" path="YSFTX.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_gpio.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_gpio.c" type="1"/>
-  </Files>
-</Project>

Makefile

@@ -25,6 +25,7 @@ F7_LIB_PATH=./STM32F7XX_Lib
 # MCU external clock frequency (Hz)
 CLK_MMDVM_PI=12000000
 CLK_NUCLEO=8000000
+CLK_12MHZ=12000000
 
 # Directory Structure
 BINDIR=bin
@@ -93,6 +94,8 @@ ifndef $(OSC)
 		OSC=$(CLK_MMDVM_PI)
 	else ifeq ($(MAKECMDGOALS),pi-f722)
 		OSC=$(CLK_MMDVM_PI)
+	else ifeq ($(MAKECMDGOALS),drcc_nqf)
+		OSC=$(CLK_12MHZ)
 	else
 		OSC=$(CLK_NUCLEO)
 	endif
@@ -130,10 +133,19 @@ DEFS_PI_F722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_PI -DHSE_VAL
 DEFS_F7M=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_F7M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
 # MMDVM_RPT_Hat F0DEI, DB9MAT, DF2ET board:
 DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# STM32F4 DVM board:
+# RB STM32F4_DVM board:
 DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
+# RB STM32F7 DVM board:
+DEFS_DVM722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F7_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
 # MMDVM_RPT_Hat BG4TGO, BG5HHP board:
 DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
+# DRCC_DVM BG7NQF board:
+DEFS_DRCC_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DDRCC_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
+# WA0EDA F405 MTR2K, MASTR3 board:
+DEFS_EDA_405=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_EDA_405 -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
+# WA0EDA F446 MTR2K, MASTR3 board:
+DEFS_EDA_446=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_EDA_446 -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
+
 
 # Build compiler flags
 CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
@@ -149,10 +161,10 @@ LDFLAGS_F722 =-T stm32f722_link.ld $(MCFLAGS_F7) --specs=nosys.specs $(INCLUDES_
 # Common flags
 CFLAGS=-Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
 CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
-LDFLAGS=-Os --specs=nano.specs
+LDFLAGS=-Os --specs=nano.specs -Wl,-Map=bin/mmdvm.map
 
 # Build Rules
-.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm clean
+.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm drcc_nqf clean
 
 # Default target: Nucleo-64 F446RE board
 all: nucleo
@@ -212,11 +224,41 @@ f767: LDFLAGS+=$(LDFLAGS_F767)
 f767: release_f7
 
 dvm: GitVersion.h
-dvm: CFLAGS+=$(CFLAGS_F4) $(DEFS_DVM)
-dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM)
+dvm: CFLAGS+=$(CFLAGS_F4) $(DEFS_DVM) -DDRCC_DVM_446
+dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM) -DDRCC_DVM_446
 dvm: LDFLAGS+=$(LDFLAGS_F4)
 dvm: release_f4
 
+dvm722: GitVersion.h
+dvm722: CFLAGS+=$(CFLAGS_F7) $(DEFS_DVM722) -DDRCC_DVM_722
+dvm722: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_DVM722) -DDRCC_DVM_722
+dvm722: LDFLAGS+=$(LDFLAGS_F722)
+dvm722: release_f7
+
+drcc_nqf: GitVersion.h
+drcc_nqf: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
+drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
+drcc_nqf: LDFLAGS+=$(LDFLAGS_F4)
+drcc_nqf: release_f4
+
+hhp446: GitVersion.h
+hhp446: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_HHP446
+hhp446: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_HHP446
+hhp446: LDFLAGS+=$(LDFLAGS_F4)
+hhp446: release_f4
+
+eda405: GitVersion.h
+eda405: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_405)
+eda405: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_405)
+eda405: LDFLAGS+=$(LDFLAGS_F4)
+eda405: release_f4
+
+eda446: GitVersion.h
+eda446: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_446)
+eda446: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_446)
+eda446: LDFLAGS+=$(LDFLAGS_F4)
+eda446: release_f4
+
 release_f4: $(BINDIR)
 release_f4: $(OBJDIR_F4)
 release_f4: $(BINDIR)/$(BINHEX_F4)
@@ -326,27 +368,27 @@ endif
 deploy-pi:
 ifneq ($(wildcard /usr/local/bin/stm32flash),)
 	-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	-/usr/local/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F4)
-	/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R -c /dev/ttyAMA0
+	/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R /dev/ttyAMA0
 endif
 
 ifneq ($(wildcard /usr/bin/stm32flash),)
 	-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	-/usr/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F4)
-	/usr/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R -c /dev/ttyAMA0
+	/usr/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R /dev/ttyAMA0
 endif
 
 deploy-f4m: deploy-pi
 deploy-dvm: deploy-pi
+deploy-eda405: deploy-pi
+deploy-eda446: deploy-pi
 
 deploy-pi-f7:
 ifneq ($(wildcard /usr/local/bin/stm32flash),)
 	-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
+	/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R /dev/ttyAMA0
 
 else ifneq ($(wildcard /usr/bin/stm32flash),)
 	-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	/usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
+	/usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R /dev/ttyAMA0
 endif
 
 deploy-f7m:   deploy-pi-f7
@@ -365,3 +407,7 @@ else
 	echo "#define GITVERSION \"0000000\"" > $@
 endif
 endif
+
+flash_f4:
+	@echo "flashing firmware..."
+	st-flash write bin/$(BINBIN_F4) 0x8000000

NXDNTX.cpp

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2009-2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2009-2018,2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2017 by Andy Uribe CA6JAU
  *
  *   This program is free software; you can redistribute it and/or modify
@@ -53,7 +53,9 @@ m_sincState(),
 m_poBuffer(),
 m_poLen(0U),
 m_poPtr(0U),
-m_txDelay(240U)      // 200ms
+m_txDelay(240U),     // 200ms
+m_txHang(3000U),     // 5s
+m_txCount(0U)
 {
   ::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
   ::memset(m_sincState,  0x00U, 70U * sizeof(q15_t));
@@ -70,10 +72,7 @@ m_txDelay(240U)      // 200ms
 
 void CNXDNTX::process()
 {
-  if (m_buffer.getData() == 0U && m_poLen == 0U)
-    return;
-
-  if (m_poLen == 0U) {
+  if (m_poLen == 0U && m_buffer.getData() > 0U) {
     if (!m_tx) {
       for (uint16_t i = 0U; i < m_txDelay; i++)
         m_poBuffer[m_poLen++] = NXDN_SYNC;
@@ -98,6 +97,8 @@ void CNXDNTX::process()
       writeByte(c);
 
       space -= 4U * NXDN_RADIO_SYMBOL_LENGTH;
+      if (m_duplex)
+        m_txCount = m_txHang;
       
       if (m_poPtr >= m_poLen) {
         m_poPtr = 0U;
@@ -105,6 +106,19 @@ void CNXDNTX::process()
         return;
       }
     }
+  } else if (m_txCount > 0U) {
+    // Transmit silence until the hang timer has expired.
+    uint16_t space = io.getSpace();
+
+    while (space > (4U * NXDN_RADIO_SYMBOL_LENGTH)) {
+      writeSilence();
+
+      space -= 4U * NXDN_RADIO_SYMBOL_LENGTH;
+      m_txCount--;
+
+      if (m_txCount == 0U)
+        return;
+    }
   }
 }
 
@@ -155,6 +169,19 @@ void CNXDNTX::writeByte(uint8_t c)
   io.write(STATE_NXDN, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
 }
 
+void CNXDNTX::writeSilence()
+{
+  q15_t inBuffer[4U] = {0x00U, 0x00U, 0x00U, 0x00U};
+  q15_t intBuffer[NXDN_RADIO_SYMBOL_LENGTH * 4U];
+  q15_t outBuffer[NXDN_RADIO_SYMBOL_LENGTH * 4U];
+
+  ::arm_fir_interpolate_q15(&m_modFilter, inBuffer, intBuffer, 4U);
+
+  ::arm_fir_fast_q15(&m_sincFilter, intBuffer, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
+
+  io.write(STATE_NXDN, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
+}
+
 void CNXDNTX::setTXDelay(uint8_t delay)
 {
   m_txDelay = 300U + uint16_t(delay) * 6U;        // 500ms + tx delay
@@ -168,3 +195,7 @@ uint8_t CNXDNTX::getSpace() const
   return m_buffer.getSpace() / NXDN_FRAME_LENGTH_BYTES;
 }
 
+void CNXDNTX::setParams(uint8_t txHang)
+{
+  m_txHang = txHang * 600U;
+}

NXDNTX.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -35,6 +35,8 @@ public:
 
   uint8_t getSpace() const;
 
+  void setParams(uint8_t txHang);
+
 private:
   CSerialRB                        m_buffer;
   arm_fir_interpolate_instance_q15 m_modFilter;
@@ -45,9 +47,11 @@ private:
   uint16_t                         m_poLen;
   uint16_t                         m_poPtr;
   uint16_t                         m_txDelay;
+  uint32_t                         m_txHang;
+  uint32_t                         m_txCount;
 
   void writeByte(uint8_t c);
+  void writeSilence();
 };
 
 #endif
-

P25TX.cpp

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2016,2017,2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2017 by Andy Uribe CA6JAU
  *
  *   This program is free software; you can redistribute it and/or modify
@@ -51,7 +51,9 @@ m_lpState(),
 m_poBuffer(),
 m_poLen(0U),
 m_poPtr(0U),
-m_txDelay(240U)       // 200ms
+m_txDelay(240U),      // 200ms
+m_txHang(6000U),      // 5s
+m_txCount(0U)
 {
   ::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
   ::memset(m_lpState,  0x00U, 60U * sizeof(q15_t));
@@ -68,10 +70,7 @@ m_txDelay(240U)       // 200ms
 
 void CP25TX::process()
 {
-  if (m_buffer.getData() == 0U && m_poLen == 0U)
-    return;
-
-  if (m_poLen == 0U) {
+  if (m_poLen == 0U && m_buffer.getData() > 0U) {
     if (!m_tx) {
       for (uint16_t i = 0U; i < m_txDelay; i++)
         m_poBuffer[m_poLen++] = P25_START_SYNC;
@@ -94,13 +93,28 @@ void CP25TX::process()
       writeByte(c);
 
       space -= 4U * P25_RADIO_SYMBOL_LENGTH;
-      
+       if (m_duplex)
+        m_txCount = m_txHang;
+
       if (m_poPtr >= m_poLen) {
         m_poPtr = 0U;
         m_poLen = 0U;
         return;
       }
     }
+  } else if (m_txCount > 0U) {
+    // Transmit silence until the hang timer has expired.
+    uint16_t space = io.getSpace();
+
+    while (space > (4U * P25_RADIO_SYMBOL_LENGTH)) {
+      writeSilence();
+
+      space -= 4U * P25_RADIO_SYMBOL_LENGTH;
+      m_txCount--;
+
+      if (m_txCount == 0U)
+        return;
+    }
   }
 }
 
@@ -152,6 +166,19 @@ void CP25TX::writeByte(uint8_t c)
   io.write(STATE_P25, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
 }
 
+void CP25TX::writeSilence()
+{
+  q15_t inBuffer[4U] = {0x00U, 0x00U, 0x00U, 0x00U};
+  q15_t intBuffer[P25_RADIO_SYMBOL_LENGTH * 4U];
+  q15_t outBuffer[P25_RADIO_SYMBOL_LENGTH * 4U];
+
+  ::arm_fir_interpolate_q15(&m_modFilter, inBuffer, intBuffer, 4U);
+
+  ::arm_fir_fast_q15(&m_lpFilter, intBuffer, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
+
+  io.write(STATE_P25, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
+}
+
 void CP25TX::setTXDelay(uint8_t delay)
 {
   m_txDelay = 600U + uint16_t(delay) * 12U;        // 500ms + tx delay
@@ -164,3 +191,8 @@ uint8_t CP25TX::getSpace() const
 {
   return m_buffer.getSpace() / P25_LDU_FRAME_LENGTH_BYTES;
 }
+
+void CP25TX::setParams(uint8_t txHang)
+{
+  m_txHang = txHang * 1200U;
+}

P25TX.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2016,2017,2020 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -35,6 +35,8 @@ public:
 
   uint8_t getSpace() const;
 
+  void setParams(uint8_t txHang);
+
 private:
   CSerialRB                        m_buffer;
   arm_fir_interpolate_instance_q15 m_modFilter;
@@ -45,9 +47,11 @@ private:
   uint16_t                         m_poLen;
   uint16_t                         m_poPtr;
   uint16_t                         m_txDelay;
+  uint32_t                         m_txHang;
+  uint32_t                         m_txCount;
 
   void writeByte(uint8_t c);
+  void writeSilence();
 };
 
 #endif
-

README.md

@@ -1,7 +1,17 @@
-This is the source code of the MMDVM firmware that supports D-Star, DMR, System Fusion, P25, NXDN, and POCSAG modes.
+This is the source code of the MMDVM firmware that supports D-Star, DMR,
+System Fusion, P25, NXDN, POCSAG, and FM modes.
 
-It runs on the Arduino Due, the ST-Micro STM32F1xxx, STM32F4xxx and STM32F7xxx processors, as well as the Teensy 3.1/3.2/3.5/3.6. What these platforms have in common is the use of an ARM Cortex-M3 or M4 processor with a clock speed greater than 70 MHz, and access to at least one analogue to digital converter and one digital to analogue converter.
+It runs on the Arduino Due, the ST-Micro STM32F1xxx, STM32F4xxx and STM32F7xxx
+processors, as well as the Teensy 3.1/3.2/3.5/3.6. What these platforms have in
+common is the use of an ARM Cortex-M3, M4, or M7 processors with a clock speed
+greater than 70 MHz, and access to at least one analogue to digital converter
+and one digital to analogue converter.
 
-In order to build this software for the Arduino Due, you will need to edit a file within the Arduino GUI and that is detailed in the BUILD.txt file. The STM32 support is being supplied via the Coocox IDE with ARM GCC. The Teensy support uses Teensyduino.
+In order to build this software for the Arduino Due, you will need to edit a
+file within the Arduino GUI and that is detailed in the BUILD.txt file. The
+STM32 support is being supplied via the ARM GCC compiler. The Teensy support
+uses Teensyduino.
 
-This software is licenced under the GPL v2 and is intended for amateur and educational use only. Use of this software for commercial purposes is strictly forbidden.
+This software is licenced under the GPL v2 and is intended for amateur and
+educational use only. Use of this software for commercial purposes is strictly
+forbidden.

SerialPort.cpp

@@ -95,13 +95,19 @@ const uint8_t MMDVM_DEBUG5       = 0xF5U;
 #define TCXO "NO TCXO"
 #endif
 
-#if defined(STM32F4_RPT_HAT_TGO)
-#define	HW_TYPE	"MMDVM RPT_HAT_TGO"
+#if defined(DRCC_DVM_NQF)
+#define	HW_TYPE	"MMDVM DRCC_DVM_NQF"
+#elif defined(DRCC_DVM_HHP446)
+#define	HW_TYPE	"MMDVM DRCC_DVM_HHP(446)"
+#elif defined(DRCC_DVM_722)
+#define HW_TYPE "MMDVM RB_STM32_DVM(722)"
+#elif defined(DRCC_DVM_446)
+#define HW_TYPE "MMDVM RB_STM32_DVM(446)"
 #else
 #define	HW_TYPE	"MMDVM"
 #endif
 
-#define DESCRIPTION "20200429 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
+#define DESCRIPTION "20210101 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
 
 #if defined(GITVERSION)
 #define concat(h, a, b, c) h " " a " " b " GitID #" c ""
@@ -262,14 +268,15 @@ void CSerialPort::getVersion()
 
 uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
 {
-  if (length < 19U)
+  if (length < 21U)
     return 4U;
 
-  bool rxInvert  = (data[0U] & 0x01U) == 0x01U;
-  bool txInvert  = (data[0U] & 0x02U) == 0x02U;
-  bool pttInvert = (data[0U] & 0x04U) == 0x04U;
-  bool ysfLoDev  = (data[0U] & 0x08U) == 0x08U;
-  bool simplex   = (data[0U] & 0x80U) == 0x80U;
+  bool rxInvert        = (data[0U] & 0x01U) == 0x01U;
+  bool txInvert        = (data[0U] & 0x02U) == 0x02U;
+  bool pttInvert       = (data[0U] & 0x04U) == 0x04U;
+  bool ysfLoDev        = (data[0U] & 0x08U) == 0x08U;
+  bool useCOSAsLockout = (data[0U] & 0x20U) == 0x20U;
+  bool simplex         = (data[0U] & 0x80U) == 0x80U;
 
   m_debug = (data[0U] & 0x10U) == 0x10U;
 
@@ -329,7 +336,11 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
 
   uint8_t fmTXLevel     = data[18U];
 
-  m_modemState  = modemState;
+  uint8_t p25TXHang     = data[19U];
+
+  uint8_t nxdnTXHang    = data[20U];
+
+  setMode(modemState);
 
   m_dstarEnable  = dstarEnable;
   m_dmrEnable    = dmrEnable;
@@ -354,8 +365,10 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
   dmrIdleRX.setColorCode(colorCode);
 
   ysfTX.setParams(ysfLoDev, ysfTXHang);
+  p25TX.setParams(p25TXHang);
+  nxdnTX.setParams(nxdnTXHang);
 
-  io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, nxdnTXLevel, pocsagTXLevel, fmTXLevel, txDCOffset, rxDCOffset);
+  io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, nxdnTXLevel, pocsagTXLevel, fmTXLevel, txDCOffset, rxDCOffset, useCOSAsLockout);
 
   io.start();
 
@@ -376,6 +389,7 @@ uint8_t CSerialPort::setFMParams1(const uint8_t* data, uint8_t length)
 
   bool callAtStart = (data[6U] & 0x01U) == 0x01U;
   bool callAtEnd   = (data[6U] & 0x02U) == 0x02U;
+  bool callAtLatch = (data[6U] & 0x04U) == 0x04U;
 
   char callsign[50U];
   uint8_t n = 0U;
@@ -383,7 +397,7 @@ uint8_t CSerialPort::setFMParams1(const uint8_t* data, uint8_t length)
     callsign[n] = data[i];
   callsign[n] = '\0';
 
-  return fm.setCallsign(callsign, speed, frequency, time, holdoff, highLevel, lowLevel, callAtStart, callAtEnd);
+  return fm.setCallsign(callsign, speed, frequency, time, holdoff, highLevel, lowLevel, callAtStart, callAtEnd, callAtLatch);
 }
 
 uint8_t CSerialPort::setFMParams2(const uint8_t* data, uint8_t length)
@@ -408,26 +422,28 @@ uint8_t CSerialPort::setFMParams2(const uint8_t* data, uint8_t length)
 
 uint8_t CSerialPort::setFMParams3(const uint8_t* data, uint8_t length)
 {
-  if (length < 11U)
+  if (length < 12U)
     return 4U;
 
   uint16_t timeout        = data[0U] * 5U;
   uint8_t  timeoutLevel   = data[1U];
 
-  uint8_t  ctcssFrequency = data[2U];
-  uint8_t  ctcssThreshold = data[3U];
-  uint8_t  ctcssLevel     = data[4U];
+  uint8_t  ctcssFrequency     = data[2U];
+  uint8_t  ctcssHighThreshold = data[3U];
+  uint8_t  ctcssLowThreshold  = data[4U];
+  uint8_t  ctcssLevel         = data[5U];
 
-  uint8_t  kerchunkTime   = data[5U];
-  uint8_t  hangTime       = data[6U];
+  uint8_t  kerchunkTime   = data[6U];
+  uint8_t  hangTime       = data[7U];
 
-  bool     useCOS         = (data[7U] & 0x01U) == 0x01U;
+  uint8_t  accessMode     = data[8U] & 0x7FU;
+  bool     cosInvert      = (data[8U] & 0x80U) == 0x80U;
 
-  uint8_t  rfAudioBoost   = data[8U];
-  uint8_t  maxDev         = data[9U];
-  uint8_t  rxLevel        = data[10U];
+  uint8_t  rfAudioBoost   = data[9U];
+  uint8_t  maxDev         = data[10U];
+  uint8_t  rxLevel        = data[11U];
 
-  return fm.setMisc(timeout, timeoutLevel, ctcssFrequency, ctcssThreshold, ctcssLevel, kerchunkTime, hangTime, useCOS, rfAudioBoost, maxDev, rxLevel);
+  return fm.setMisc(timeout, timeoutLevel, ctcssFrequency, ctcssHighThreshold, ctcssLowThreshold, ctcssLevel, kerchunkTime, hangTime, accessMode, cosInvert, rfAudioBoost, maxDev, rxLevel);
 }
 
 uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
@@ -556,9 +572,7 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
 
   cwIdTX.reset();
 
-  m_modemState = modemState;
-
-  io.setMode();
+  io.setMode(modemState);
 }
 
 void CSerialPort::start()
@@ -581,8 +595,7 @@ void CSerialPort::process()
         m_buffer[0U] = c;
         m_ptr = 1U;
         m_len = 0U;
-      }
-      else {
+      } else {
         m_ptr = 0U;
         m_len = 0U;
       }

SerialSTM.cpp

@@ -27,14 +27,14 @@
 Pin definitions:
 
 - Host communication:
-USART1 - TXD PA9  - RXD PA10 (MMDVM-Pi board, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board)
+USART1 - TXD PA9  - RXD PA10 (MMDVM-Pi board, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, STM32F7-DVM board)
 USART2 - TXD PA2  - RXD PA3  (Nucleo64 F446RE board, Morpho or Arduino header, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
 USART3 - TXD PC10 - RXD PC11 (Discovery board)
 USART3 - TXD PD8  - RXD PD9  (Nucleo144 F767ZI board)
 
 - Serial repeater:
 USART1 - TXD PA9  - RXD PA10 (Nucleo with Arduino header)
-UART5  - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
+UART5  - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, STM32F7-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
 */
 
 #if defined(STM32F4XX) || defined(STM32F7XX)
@@ -50,7 +50,7 @@ extern "C" {
 }
 
 /* ************* USART1 ***************** */
-#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
+#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
 
 volatile uint8_t  TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
 volatile uint8_t  RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
@@ -241,7 +241,7 @@ void WriteUSART1(const uint8_t* data, uint16_t length)
 #endif
 
 /* ************* USART2 ***************** */
-#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
+#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) || defined(DRCC_DVM)
 
 volatile uint8_t  TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
 volatile uint8_t  RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
@@ -841,15 +841,19 @@ void CSerialPort::beginInt(uint8_t n, int speed)
       case 1U:
          #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
          InitUSART3(speed);
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
          InitUSART1(speed);
          #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          InitUSART2(speed);
+         #elif defined(DRCC_DVM)
+         InitUSART1(speed);
          #endif
          break;
       case 3U:
          #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
          InitUSART1(speed);
+         #elif defined(DRCC_DVM)
+         InitUSART2(speed);
          #else
          InitUART5(speed);
          #endif
@@ -865,14 +869,18 @@ int CSerialPort::availableInt(uint8_t n)
       case 1U:
          #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
          return AvailUSART3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
          return AvailUSART1();
          #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          return AvailUSART2();
+         #elif defined(DRCC_DVM)
+         return AvailUSART1();
          #endif
       case 3U:
          #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
          return AvailUSART1();
+         #elif defined(DRCC_DVM)
+         return AvailUSART2();
          #else
          return AvailUART5();
          #endif
@@ -887,14 +895,18 @@ int CSerialPort::availableForWriteInt(uint8_t n)
       case 1U:
          #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
          return AvailForWriteUSART3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
          return AvailForWriteUSART1();
          #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          return AvailForWriteUSART2();
+         #elif defined(DRCC_DVM)
+         return AvailForWriteUSART1();
          #endif
       case 3U:
          #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
          return AvailForWriteUSART1();
+         #elif defined(DRCC_DVM)
+         return AvailForWriteUSART2();
          #else
          return AvailForWriteUART5();
          #endif
@@ -909,14 +921,18 @@ uint8_t CSerialPort::readInt(uint8_t n)
       case 1U:
          #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
          return ReadUSART3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
          return ReadUSART1();
          #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          return ReadUSART2();
+         #elif defined(DRCC_DVM)
+         return ReadUSART1();
          #endif
       case 3U:
          #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
          return ReadUSART1();
+         #elif defined(DRCC_DVM)
+         return ReadUSART2();
          #else
          return ReadUART5();
          #endif
@@ -933,7 +949,7 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
          WriteUSART3(data, length);
          if (flush)
             TXSerialFlush3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
          WriteUSART1(data, length);
          if (flush)
             TXSerialFlush1();
@@ -941,6 +957,10 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
          WriteUSART2(data, length);
          if (flush)
             TXSerialFlush2();
+         #elif defined(DRCC_DVM)
+         WriteUSART1(data, length);
+         if (flush)
+            TXSerialFlush1();
          #endif
          break;
       case 3U:
@@ -948,6 +968,10 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
          WriteUSART1(data, length);
          if (flush)
             TXSerialFlush1();
+         #elif defined(DRCC_DVM)
+         WriteUSART2(data, length);
+         if (flush)
+            TXSerialFlush2();
          #else
          WriteUART5(data, length);
          if (flush)

YSFRX.cpp

@@ -36,7 +36,7 @@ const uint8_t NOAVEPTR = 99U;
 
 const uint16_t NOENDPTR = 9999U;
 
-const unsigned int MAX_SYNC_FRAMES = 4U + 1U;
+const unsigned int MAX_SYNC_FRAMES = 1U + 1U;
 
 CYSFRX::CYSFRX() :
 m_state(YSFRXS_NONE),

YSFTX.cpp

@@ -66,9 +66,6 @@ m_txCount(0U)
 
 void CYSFTX::process()
 {
-  if (m_buffer.getData() == 0U && m_poLen == 0U && m_txCount == 0U)
-    return;
-
   // If we have YSF data to transmit, do so.
   if (m_poLen == 0U && m_buffer.getData() > 0U) {
     if (!m_tx) {
@@ -191,4 +188,3 @@ void CYSFTX::setParams(bool on, uint8_t txHang)
   m_loDev  = on;
   m_txHang = txHang * 1200U;
 }
-

pins/pins_f4_discovery.h

@@ -0,0 +1,96 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_DISCOVERY_H
+#define _PINS_F4_DISCOVERY_H
+
+/*
+Pin definitions for STM32F4 Discovery Board:
+
+PTT      PB13   output           P1 Pin37
+COSLED   PA7    output           P1 Pin17
+LED      PD15   output           P1 Pin47
+COS      PA5    input            P1 Pin15
+
+DSTAR    PD12   output           P1 Pin44
+DMR      PD13   output           P1 Pin45
+YSF      PD14   output           P1 Pin46
+P25      PD11   output           P1 Pin43
+NXDN     PD10   output           P1 Pin42
+
+RX       PA0    analog input     P1 Pin12
+RSSI     PA1    analog input     P1 Pin11
+TX       PA4    analog output    P1 Pin16
+
+EXT_CLK  PA15   input            P2 Pin40
+*/
+
+#define PIN_COS           GPIO_Pin_5
+#define PORT_COS          GPIOA
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOA
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_7
+#define PORT_COSLED       GPIOA
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOA
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOD
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOD
+
+#define PIN_P25           GPIO_Pin_11
+#define PORT_P25          GPIOD
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOD
+
+#define PIN_NXDN          GPIO_Pin_10
+#define PORT_NXDN         GPIOD
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOD
+
+#define PIN_DSTAR         GPIO_Pin_12
+#define PORT_DSTAR        GPIOD
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOD
+
+#define PIN_DMR           GPIO_Pin_13
+#define PORT_DMR          GPIOD
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOD
+
+#define PIN_YSF           GPIO_Pin_14
+#define PORT_YSF          GPIOD
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOD
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_drcc_hhp446.h

@@ -0,0 +1,143 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_DRCC_HHP446_H
+#define _PINS_F4_DRCC_HHP446_H
+
+/*
+Pin definitions for DRCC_DVM BG5HHP F446 board rev1
+
+TX/PTT_LED  PB12   output
+RX/COS_LED  PB5    output
+STATUS_LED  PB10   output
+
+COS_IN      PB13   input
+
+DSTAR       N/A
+DMR         N/A
+YSF         N/A
+P25         N/A
+NXDN        N/A
+POCSAG      N/A
+
+MDMR/BIT0   PB8    output
+MYSF/BIT1   PB9    output
+MDSTAR/BIT2 PB14   output
+MP25/BIT3   PB15   output          Generic Mode Pins
+MNXDN       N/A
+MPOCSAG     N/A
+
+RX          PA0    analog input
+RSSI        PA1    analog input
+TX          PA4    analog output
+
+EXT_CLK     N/A
+
+UART1_TX    PA9    output
+UART1_RX    PA10   output          Host Data Communication
+
+UART2_TX    PA2    output
+UART2_RX    PA3    output          Nextion Data Communication
+
+I2C1_SCL    PB6    output
+I2C1_SDA    PB7    output          OLED Data Communication as master
+
+*/
+
+#define PIN_COS           GPIO_Pin_13
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_12
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_5
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_10
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_TXLED         GPIO_Pin_4
+#define PORT_TXLED        GPIOB
+#define RCC_Per_TXLED     RCC_AHB1Periph_GPIOB
+
+// #define PIN_P25           GPIO_Pin_3
+// #define PORT_P25          GPIOB
+// #define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+// #define PIN_NXDN          GPIO_Pin_10
+// #define PORT_NXDN         GPIOA
+// #define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+// #define PIN_POCSAG        GPIO_Pin_12
+// #define PORT_POCSAG       GPIOB
+// #define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+// #define PIN_DSTAR         GPIO_Pin_10
+// #define PORT_DSTAR        GPIOB
+// #define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+// #define PIN_DMR           GPIO_Pin_4
+// #define PORT_DMR          GPIOB
+// #define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+// #define PIN_YSF           GPIO_Pin_5
+// #define PORT_YSF          GPIOB
+// #define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_15
+#define PORT_MP25         GPIOB
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOB
+
+#define PIN_MDSTAR        GPIO_Pin_9
+#define PORT_MDSTAR       GPIOB
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOB
+
+#define PIN_MDMR          GPIO_Pin_8
+#define PORT_MDMR         GPIOB
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOB
+
+#define PIN_MYSF          GPIO_Pin_14
+#define PORT_MYSF         GPIOB
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOB
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+#define PORT_TX           GPIOA
+#define RCC_Per_TX        RCC_AHB1Periph_GPIOA
+
+#endif

pins/pins_f4_drcc_nqf.h

@@ -0,0 +1,144 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_DRCC_NQF_H
+#define _PINS_F4_DRCC_NQF_H
+
+/*
+Pin definitions for DRCC_DVM BG7NQF  board rev1
+
+TX/PTT_LED  PB12   output
+RX/COS_LED  PB5    output
+STATUS_LED  PB10   output
+
+COS_IN      PB13   input
+
+DSTAR       N/A
+DMR         N/A
+YSF         N/A
+P25         N/A
+NXDN        N/A
+POCSAG      N/A
+
+MDMR/BIT0   PB8    output
+MYSF/BIT1   PB9    output
+MDSTAR/BIT2 PB14   output
+MP25/BIT3   PB15   output          Generic Mode Pins
+MNXDN       N/A
+MPOCSAG     N/A
+
+RX          PA0    analog input
+RSSI        PA1    analog input
+TX          PA4    analog output
+
+EXT_CLK     PA15   input
+
+UART1_TX    PA9    output
+UART1_RX    PA10   output          Host Data Communication
+
+UART2_TX    PA2    output
+UART2_RX    PA3    output          Nextion Data Communication
+
+I2C1_SCL    PB6    output
+I2C1_SDA    PB7    output          OLED Data Communication as master
+
+*/
+
+#define PIN_COS           GPIO_Pin_13
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_12
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_5
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_10
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_TXLED         GPIO_Pin_4
+#define PORT_TXLED        GPIOB
+#define RCC_Per_TXLED     RCC_AHB1Periph_GPIOB
+
+// #define PIN_P25           GPIO_Pin_3
+// #define PORT_P25          GPIOB
+// #define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+// #define PIN_NXDN          GPIO_Pin_10
+// #define PORT_NXDN         GPIOA
+// #define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+// #define PIN_POCSAG        GPIO_Pin_12
+// #define PORT_POCSAG       GPIOB
+// #define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+// #define PIN_DSTAR         GPIO_Pin_10
+// #define PORT_DSTAR        GPIOB
+// #define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+// #define PIN_DMR           GPIO_Pin_4
+// #define PORT_DMR          GPIOB
+// #define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+// #define PIN_YSF           GPIO_Pin_5
+// #define PORT_YSF          GPIOB
+// #define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_15
+#define PORT_MP25         GPIOB
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOB
+
+#define PIN_MDSTAR        GPIO_Pin_9
+#define PORT_MDSTAR       GPIOB
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOB
+
+#define PIN_MDMR          GPIO_Pin_8
+#define PORT_MDMR         GPIOB
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOB
+
+#define PIN_MYSF          GPIO_Pin_14
+#define PORT_MYSF         GPIOB
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOB
+
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+#define PORT_TX           GPIOA
+#define RCC_Per_TX        RCC_AHB1Periph_GPIOA
+
+#endif

pins/pins_f4_f4m.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_F4M_H
+#define _PINS_F4_F4M_H
+
+/*
+Pin definitions for MMDVM-F4M Pi-Hat F0DEI board:
+
+PTT      PB13   output
+COSLED   PB14   output
+LED      PB15   output
+COS      PC0    input
+
+DSTAR    PC7    output
+DMR      PC8    output
+YSF      PA8    output
+P25      PC9    output
+NXDN     PB1    output
+POCSAG   PB12   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_9
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_1
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_7
+#define PORT_DSTAR        GPIOC
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
+
+#define PIN_DMR           GPIO_Pin_8
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_8
+#define PORT_YSF          GPIOA
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_nucleo_arduino.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_NUCLEO_ARDUINO_H
+#define _PINS_F4_NUCLEO_ARDUINO_H
+
+/*
+Pin definitions for STM32F4 Nucleo boards (Arduino header):
+
+PTT      PB10   output           CN9 Pin7
+COSLED   PB3    output           CN9 Pin4
+LED      PB5    output           CN9 Pin5
+COS      PB4    input            CN9 Pin6
+
+DSTAR    PA1    output           CN8 Pin2
+DMR      PA4    output           CN8 Pin3
+YSF      PB0    output           CN8 Pin4
+P25      PC1    output           CN8 Pin5
+NXDN     PA3    output           CN9 Pin1
+POCSAG   PB12   output
+
+RX       PA0    analog input     CN8 Pin1
+RSSI     PC0    analog input     CN8 Pin6
+TX       PA5    analog output    CN5 Pin6
+
+EXT_CLK  PB8    input            CN5 Pin10
+*/
+
+#define PIN_COS           GPIO_Pin_4
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_10
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_3
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_5
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_1
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_3
+#define PORT_NXDN         GPIOA
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_1
+#define PORT_DSTAR        GPIOA
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOA
+
+#define PIN_DMR           GPIO_Pin_4
+#define PORT_DMR          GPIOA
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOA
+
+#define PIN_YSF           GPIO_Pin_0
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#define PIN_EXT_CLK       GPIO_Pin_8
+#define SRC_EXT_CLK       GPIO_PinSource8
+#define PORT_EXT_CLK      GPIOB
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_0
+#define PIN_RSSI_CH       ADC_Channel_10
+#define PORT_RSSI         GPIOC
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOC
+
+#define PIN_TX            GPIO_Pin_5
+#define PIN_TX_CH         DAC_Channel_2
+
+#endif

pins/pins_f4_nucleo_morpho.h

@@ -0,0 +1,134 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_NUCLEO_MORPHO_H
+#define _PINS_F4_NUCLEO_MORPHO_H
+
+/*
+Pin definitions for STM32F4 Nucleo boards (ST Morpho header):
+
+PTT      PB13   output           CN10 Pin30
+COSLED   PB14   output           CN10 Pin28
+LED      PA5    output           CN10 Pin11
+COS      PB15   input            CN10 Pin26
+
+DSTAR    PB10   output           CN10 Pin25
+DMR      PB4    output           CN10 Pin27
+YSF      PB5    output           CN10 Pin29
+P25      PB3    output           CN10 Pin31
+NXDN     PA10   output           CN10 Pin33
+POCSAG   PB12   output           CN10 Pin16
+
+MDSTAR   PC4    output           CN10 Pin34
+MDMR     PC5    output           CN10 Pin6
+MYSF     PC2    output           CN7 Pin35
+MP25     PC3    output           CN7 Pin37
+MNXDN    PC6    output           CN10 Pin4
+MPOCSAG  PC8    output           CN10 Pin2
+
+RX       PA0    analog input     CN7 Pin28
+RSSI     PA1    analog input     CN7 Pin30
+TX       PA4    analog output    CN7 Pin32
+
+EXT_CLK  PA15   input            CN7 Pin17
+*/
+
+#define PIN_COS           GPIO_Pin_15
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_5
+#define PORT_LED          GPIOA
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
+
+#define PIN_P25           GPIO_Pin_3
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_10
+#define PORT_NXDN         GPIOA
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_10
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_4
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_5
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_3
+#define PORT_MP25         GPIOC
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
+
+#define PIN_MNXDN         GPIO_Pin_6
+#define PORT_MNXDN        GPIOC
+#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
+
+#define PIN_MDSTAR        GPIO_Pin_4
+#define PORT_MDSTAR       GPIOC
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
+
+#define PIN_MDMR          GPIO_Pin_5
+#define PORT_MDMR         GPIOC
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
+
+#define PIN_MYSF          GPIO_Pin_2
+#define PORT_MYSF         GPIOC
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
+
+#define PIN_MPOCSAG       GPIO_Pin_8
+#define PORT_MPOCSAG      GPIOC
+#define RCC_Per_MPOCSAG   RCC_AHB1Periph_GPIOC
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_pi.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_PI_H
+#define _PINS_F4_PI_H
+
+/*
+Pin definitions for STM32F4 Pi Board:
+
+PTT      PB13   output
+COSLED   PB14   output
+LED      PB15   output
+COS      PC0    input
+
+DSTAR    PC7    output
+DMR      PC8    output
+YSF      PA8    output
+P25      PC9    output
+NXDN     PB1    output
+POCSAG   PB12   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_9
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_1
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_7
+#define PORT_DSTAR        GPIOC
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
+
+#define PIN_DMR           GPIO_Pin_8
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_8
+#define PORT_YSF          GPIOA
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_rpt_tgo.h

@@ -0,0 +1,134 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_RPT_TGO_H
+#define _PINS_F4_RPT_TGO_H
+
+/*
+Pin definitions for MMDVM_RPT_Hat Pi-Hat BG4TGO  board::
+
+PTT      PB13   output           CN10 Pin30
+COSLED   PB14   output           CN10 Pin28
+LED      PA5    output           CN10 Pin11
+COS      PB15   input            CN10 Pin26
+
+DSTAR    PB10   output           CN10 Pin25
+DMR      PB4    output           CN10 Pin27
+YSF      PB5    output           CN10 Pin29
+P25      PB3    output           CN10 Pin31
+NXDN     PA10   output           CN10 Pin33
+POCSAG   PB12   output           CN10 Pin16
+
+MDSTAR   PC4    output           CN10 Pin34
+MDMR     PC5    output           CN10 Pin6
+MYSF     PC2    output           CN7 Pin35
+MP25     PC3    output           CN7 Pin37
+MNXDN    PC6    output           CN10 Pin4
+MPOCSAG  PC8    output           CN10 Pin2
+
+RX       PA0    analog input     CN7 Pin28
+RSSI     PA1    analog input     CN7 Pin30
+TX       PA4    analog output    CN7 Pin32
+
+EXT_CLK  PA15   input            CN7 Pin17
+*/
+
+#define PIN_COS           GPIO_Pin_15
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_5
+#define PORT_LED          GPIOA
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
+
+#define PIN_P25           GPIO_Pin_3
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_10
+#define PORT_NXDN         GPIOA
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_10
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_4
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_5
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_3
+#define PORT_MP25         GPIOC
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
+
+#define PIN_MNXDN         GPIO_Pin_6
+#define PORT_MNXDN        GPIOC
+#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
+
+#define PIN_MDSTAR        GPIO_Pin_4
+#define PORT_MDSTAR       GPIOC
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
+
+#define PIN_MDMR          GPIO_Pin_5
+#define PORT_MDMR         GPIOC
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
+
+#define PIN_MYSF          GPIO_Pin_2
+#define PORT_MYSF         GPIOC
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
+
+#define PIN_MPOCSAG       GPIO_Pin_8
+#define PORT_MPOCSAG      GPIOC
+#define RCC_Per_MPOCSAG   RCC_AHB1Periph_GPIOC
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_stm32dvm_v3.h

@@ -0,0 +1,108 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_STM32DVM_V3_H
+#define _PINS_F4_STM32DVM_V3_H
+
+/*
+Pin definitions for STM32F4 STM32-DVM rev 3 Board:
+
+COS      PB13   input
+PTT      PB12   output
+COSLED   PB4    output
+LED      PB3    output
+
+P25      PB8    output
+NXDN     PB9    output
+DSTAR    PB6    output
+DMR      PB5    output
+YSF      PB7    output
+POCSAG   PC10   output (Not Valid)
+
+RX       PB0    analog input
+RSSI     PB1    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_13
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+
+#define PIN_PTT           GPIO_Pin_12
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_4
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_3
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_8
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_9
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_6
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_5
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_7
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+/*
+#define PIN_POCSAG        GPIO_Pin_10
+#define PORT_POCSAG       GPIOC
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOC
+*/
+
+#define PIN_FM            GPIO_Pin_14
+#define PORT_FM           GPIOB
+#define RCC_Per_FM        RCC_AHB1Periph_GPIOB
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_8
+#define PORT_RX           GPIOB
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOB
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_9
+#define PORT_RSSI         GPIOB
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOB
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_stm32eda.h

@@ -0,0 +1,108 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_STM32EDA
+#define _PINS_F4_STM32EDA
+
+/*
+Pin definitions for STM32F4 STM32-DVM-MTR2K & STM32-DVM-MASTR3:
+
+COS      PB13   input
+PTT      PB12   output
+COSLED   PB4    output
+LED      PB3    output
+
+P25      PB8    output
+NXDN     PB9    output
+DSTAR    PB6    output
+DMR      PB5    output
+YSF      PB7    output
+POCSAG   PC10   output
+FM       PC11   output
+
+RX       PB0    analog input
+RSSI     PB1    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_13
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+
+#define PIN_PTT           GPIO_Pin_12
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_4
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_3
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_8
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_9
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_6
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_5
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_7
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_10
+#define PORT_POCSAG       GPIOC
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOC
+
+#define PIN_FM            GPIO_Pin_11
+#define PORT_FM           GPIOC
+#define RCC_Per_FM        RCC_AHB1Periph_GPIOC
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_8
+#define PORT_RX           GPIOB
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOB
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_9
+#define PORT_RSSI         GPIOB
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOB
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif
+

pins/pins_f7_f7m.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_F7M_H
+#define _PINS_F7_F7M_H
+
+/*
+Pin definitions for MMDVM-F7M Pi-Hat F0DEI board:
+
+PTT      PB13   output
+COSLED   PB14   output
+LED      PB15   output
+COS      PC0    input
+
+DSTAR    PC7    output
+DMR      PC8    output
+YSF      PA8    output
+P25      PC9    output
+NXDN     PB1    output
+POCSAG   PB12   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_9
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_1
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_7
+#define PORT_DSTAR        GPIOC
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
+
+#define PIN_DMR           GPIO_Pin_8
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_8
+#define PORT_YSF          GPIOA
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f7_nucleo.h

@@ -0,0 +1,129 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_NUCLEO_H
+#define _PINS_F7_NUCLEO_H
+
+/*
+Pin definitions for STM32F7 Nucleo boards (ST Morpho header):
+
+PTT      PB13   output           CN12 Pin30
+COSLED   PB14   output           CN12 Pin28
+LED      PA5    output           CN12 Pin11
+COS      PB15   input            CN12 Pin26
+
+DSTAR    PB10   output           CN12 Pin25
+DMR      PB4    output           CN12 Pin27
+YSF      PB5    output           CN12 Pin29
+P25      PB3    output           CN12 Pin31
+NXDN     PA10   output           CN12 Pin33
+POCSAG   PB12   output           CN12 Pin16
+
+MDSTAR   PC4    output           CN12 Pin34
+MDMR     PC5    output           CN12 Pin6
+MYSF     PC2    output           CN11 Pin35
+MP25     PC3    output           CN11 Pin37
+MNXDN    PC6    output           CN12 Pin4
+
+RX       PA0    analog input     CN11 Pin28
+RSSI     PA1    analog input     CN11 Pin30
+TX       PA4    analog output    CN11 Pin32
+
+EXT_CLK  PA15   input            CN11 Pin17
+*/
+
+#define PIN_COS           GPIO_Pin_15
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_5
+#define PORT_LED          GPIOA
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
+
+#define PIN_P25           GPIO_Pin_3
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_10
+#define PORT_NXDN         GPIOA
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_10
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_4
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_5
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_3
+#define PORT_MP25         GPIOC
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
+
+#define PIN_MNXDN         GPIO_Pin_6
+#define PORT_MNXDN        GPIOC
+#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
+
+#define PIN_MDSTAR        GPIO_Pin_4
+#define PORT_MDSTAR       GPIOC
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
+
+#define PIN_MDMR          GPIO_Pin_5
+#define PORT_MDMR         GPIOC
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
+
+#define PIN_MYSF          GPIO_Pin_2
+#define PORT_MYSF         GPIOC
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f7_pi.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_PI_H
+#define _PINS_F7_PI_H
+
+/*
+Pin definitions for STM32F722 Pi Board:
+
+PTT      PB13   output
+COSLED   PB14   output
+LED      PB15   output
+COS      PC0    input
+
+DSTAR    PC7    output
+DMR      PC8    output
+YSF      PA8    output
+P25      PC9    output
+NXDN     PB1    output
+POCSAG   PB12   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_9
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_1
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_7
+#define PORT_DSTAR        GPIOC
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
+
+#define PIN_DMR           GPIO_Pin_8
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_8
+#define PORT_YSF          GPIOA
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f7_rpt_hat.h

@@ -0,0 +1,144 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_RPT_HAT_H
+#define _PINS_F7_RPT_HAT_H
+
+/*
+Pin definitions for MMDVM_RPT_Hat Pi-Hat F0DEI DB9MAT DF2ET board:
+
+PTT      PB14   output
+COSLED   PB13   output
+LED      PB12   output
+COS      PC0    input
+
+DSTAR    PB15   output
+DMR      PC6    output
+YSF      PC7    output
+P25      PC8    output
+NXDN     PC9    output
+POCSAG   PA8    output
+FM       PA11   output
+
+MDSTAR   PC1    output
+MDMR     PC2    output
+MYSF     PC3    output
+MP25     PC4    output
+MNXDN    PC10   output
+MPOCSAG  PC11   output
+MFM      PC13   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_14
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_13
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_12
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_8
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_9
+#define PORT_NXDN         GPIOC
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOC
+
+#define PIN_POCSAG        GPIO_Pin_8
+#define PORT_POCSAG       GPIOA
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOA
+
+#define PIN_FM            GPIO_Pin_11
+#define PORT_FM           GPIOA
+#define RCC_Per_FM        RCC_AHB1Periph_GPIOA
+
+#define PIN_DSTAR         GPIO_Pin_15
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_6
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_7
+#define PORT_YSF          GPIOC
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOC
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_4
+#define PORT_MP25         GPIOC
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
+
+#define PIN_MNXDN         GPIO_Pin_10
+#define PORT_MNXDN        GPIOC
+#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
+
+#define PIN_MDSTAR        GPIO_Pin_1
+#define PORT_MDSTAR       GPIOC
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
+
+#define PIN_MDMR          GPIO_Pin_2
+#define PORT_MDMR         GPIOC
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
+
+#define PIN_MYSF          GPIO_Pin_3
+#define PORT_MYSF         GPIOC
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
+
+#define PIN_MPOCSAG       GPIO_Pin_11
+#define PORT_MPOCSAG      GPIOC
+#define RCC_Per_MPOCSAG   RCC_AHB1Periph_GPIOC
+
+#define PIN_MFM           GPIO_Pin_13
+#define PORT_MFM          GPIOC
+#define RCC_Per_MFM       RCC_AHB1Periph_GPIOC
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f7_stm32dvm_v5.h

@@ -0,0 +1,108 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_STM32DVM_V5_H
+#define _PINS_F7_STM32DVM_V5_H
+
+/*
+Pin definitions for STM32F4 STM32-DVM rev 5 Board:
+
+COS      PB13   input
+PTT      PB12   output
+COSLED   PB4    output
+LED      PB3    output
+
+P25      PB8    output
+NXDN     PB9    output
+DSTAR    PB6    output
+DMR      PB5    output
+YSF      PB7    output
+POCSAG   PC10   output (Not Valid)
+
+RX       PB0    analog input
+RSSI     PB1    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_13
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+
+#define PIN_PTT           GPIO_Pin_12
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_4
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_3
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_8
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_9
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_6
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_5
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_7
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+/*
+#define PIN_POCSAG        GPIO_Pin_10
+#define PORT_POCSAG       GPIOC
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOC
+*/
+
+#define PIN_FM            GPIO_Pin_14
+#define PORT_FM           GPIOB
+#define RCC_Per_FM        RCC_AHB1Periph_GPIOB
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_8
+#define PORT_RX           GPIOB
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOB
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_9
+#define PORT_RSSI         GPIOB
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOB
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif