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Merge branch 'master' into dstar_correlator_fm

This commit is contained in:
Geoffrey Merck 2021-05-02 14:05:49 +02:00
parent 459a1413b7 4fa0e052f8
commit ea63acdf41
23 changed files with 619 additions and 169 deletions
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3
Config.h
View File

@ -35,9 +35,6 @@
// For 19.2 MHz
// #define EXTERNAL_OSC 19200000
// Allow the use of the COS line to lockout the modem
// #define USE_COS_AS_LOCKOUT
// Use pins to output the current mode via LEDs
// #define MODE_LEDS

10
DStarRX.cpp
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
@ -30,13 +30,13 @@ const uint32_t FRAME_SYNC_MASK = 0x00FFFFFFU;
const uint8_t FRAME_SYNC_ERRS = 1U;
// D-Star bit order version of 0x55 0x2D 0x16
const uint32_t DATA_SYNC_DATA = 0x00AAB468U;
const uint32_t DATA_SYNC_MASK = 0x00FFFFFFU;
const uint64_t DATA_SYNC_DATA = 0x0000000000AAB468U;
const uint64_t DATA_SYNC_MASK = 0x0000000000FFFFFFU;
const uint8_t DATA_SYNC_ERRS = 2U;
// D-Star bit order version of 0x55 0x55 0xC8 0x7A
const uint32_t END_SYNC_DATA = 0xAAAA135EU;
const uint32_t END_SYNC_MASK = 0xFFFFFFFFU;
const uint64_t END_SYNC_DATA = 0x0000AAAAAAAA135EU;
const uint64_t END_SYNC_MASK = 0x0000FFFFFFFFFFFFU;
const uint8_t END_SYNC_ERRS = 1U;
const uint8_t BIT_MASK_TABLE0[] = {0x7FU, 0xBFU, 0xDFU, 0xEFU, 0xF7U, 0xFBU, 0xFDU, 0xFEU};

2
DStarRX.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017,2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

119
FM.cpp
View File

@ -20,6 +20,14 @@
#include "Globals.h"
#include "FM.h"
/*
* Access Mode values are:
* 0 - Carrier access with COS
* 1 - CTCSS only access without COS
* 2 - CTCSS only access with COS
* 3 - CTCSS only access with COS to start, then carrier access with COS
*/
CFM::CFM() :
m_callsign(),
m_rfAck(),
@ -37,11 +45,12 @@ m_kerchunkTimer(),
m_ackMinTimer(),
m_ackDelayTimer(),
m_hangTimer(),
m_reverseTimer(),
m_filterStage1( 724, 1448, 724, 32768, -37895, 21352),//3rd order Cheby Filter 300 to 2700Hz, 0.2dB passband ripple, sampling rate 24kHz
m_filterStage2(32768, 0,-32768, 32768, -50339, 19052),
m_filterStage3(32768, -65536, 32768, 32768, -64075, 31460),
m_blanking(),
m_useCOS(true),
m_accessMode(1U),
m_cosInvert(false),
m_rfAudioBoost(1U),
m_downsampler(128U),//Size might need adjustement
@ -49,17 +58,15 @@ m_rxLevel(1),
m_inputRB(4800U), // 200ms of audio
m_outputRB(2400U) // 100ms of audio
{
m_reverseTimer.setTimeout(0U, 150U);
insertDelay(100U);
}
void CFM::samples(bool cos, const q15_t* samples, uint8_t length)
{
if (m_useCOS) {
if (m_cosInvert)
cos = !cos;
} else {
cos = true;
}
if (m_cosInvert)
cos = !cos;
clock(length);
@ -68,36 +75,56 @@ void CFM::samples(bool cos, const q15_t* samples, uint8_t length)
// ARMv7-M has hardware integer division
q15_t currentSample = q15_t((q31_t(samples[i]) << 8) / m_rxLevel);
uint8_t ctcssState = m_ctcssRX.process(currentSample);
if (!m_useCOS) {
// Delay the audio by 100ms to better match the CTCSS detector output
m_inputRB.put(currentSample);
m_inputRB.get(currentSample);
}
if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
//Not enough samples to determine if you have CTCSS, just carry on
continue;
} else if (CTCSS_READY(ctcssState) && m_modemState != STATE_FM) {
//we had enough samples for CTCSS and we are in some other mode than FM
bool validCTCSS = CTCSS_VALID(ctcssState);
stateMachine(validCTCSS && cos);
if (m_modemState != STATE_FM)
continue;
} else if (CTCSS_READY(ctcssState) && m_modemState == STATE_FM) {
//We had enough samples for CTCSS and we are in FM mode, trigger the state machine
bool validCTCSS = CTCSS_VALID(ctcssState);
stateMachine(validCTCSS && cos);
if (m_modemState != STATE_FM)
switch (m_accessMode) {
case 0U:
stateMachine(cos);
break;
case 1U: {
uint8_t ctcssState = m_ctcssRX.process(currentSample);
// Delay the audio by 100ms to better match the CTCSS detector output
m_inputRB.put(currentSample);
m_inputRB.get(currentSample);
if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
// Not enough samples to determine if you have CTCSS, just carry on
} else {
bool validCTCSS = CTCSS_VALID(ctcssState);
stateMachine(validCTCSS);
}
}
break;
case 2U: {
uint8_t ctcssState = m_ctcssRX.process(currentSample);
if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
// Not enough samples to determine if you have CTCSS, just carry on
} else {
bool validCTCSS = CTCSS_VALID(ctcssState);
stateMachine(validCTCSS && cos);
}
}
break;
default: {
uint8_t ctcssState = m_ctcssRX.process(currentSample);
if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
// Not enough samples to determine if you have CTCSS, just carry on
} else if (CTCSS_READY(ctcssState) && m_modemState != STATE_FM) {
// We had enough samples for CTCSS and we are in some other mode than FM
bool validCTCSS = CTCSS_VALID(ctcssState);
stateMachine(validCTCSS && cos);
} else {
stateMachine(cos);
}
}
break;
} else if (CTCSS_NOT_READY(ctcssState) && m_modemState == STATE_FM && i == length - 1) {
//Not enough samples for CTCSS but we already are in FM, trigger the state machine
//but do not trigger the state machine on every single sample, save CPU!
bool validCTCSS = CTCSS_VALID(ctcssState);
stateMachine(validCTCSS && cos);
}
if (m_modemState != STATE_FM)
continue;
// Only let audio through when relaying audio
if (m_state == FS_RELAYING || m_state == FS_KERCHUNK) {
// m_downsampler.addSample(currentSample);
@ -117,15 +144,14 @@ void CFM::samples(bool cos, const q15_t* samples, uint8_t length)
currentSample += m_callsign.getLowAudio();
}
currentSample = m_filterStage3.filter(m_filterStage2.filter(m_filterStage1.filter(currentSample)));
if (!m_callsign.isRunning() && !m_rfAck.isRunning())
currentSample += m_timeoutTone.getAudio();
currentSample = m_filterStage3.filter(m_filterStage2.filter(m_filterStage1.filter(currentSample)));
currentSample += m_ctcssTX.getAudio(m_reverseTimer.isRunning());
currentSample += m_ctcssTX.getAudio();
if (m_modemState == STATE_FM)
m_outputRB.put(currentSample);
m_outputRB.put(currentSample);
}
}
@ -146,6 +172,7 @@ void CFM::reset()
m_ackMinTimer.stop();
m_ackDelayTimer.stop();
m_hangTimer.stop();
m_reverseTimer.stop();
m_ctcssRX.reset();
m_rfAck.stop();
@ -183,10 +210,10 @@ uint8_t CFM::setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_
return m_rfAck.setParams(rfAck, speed, frequency, level, level);
}
uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel)
uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, uint8_t accessMode, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel)
{
m_useCOS = useCOS;
m_cosInvert = cosInvert;
m_accessMode = accessMode;
m_cosInvert = cosInvert;
m_rfAudioBoost = q15_t(rfAudioBoost);
@ -235,7 +262,10 @@ void CFM::stateMachine(bool validSignal)
}
if (m_state == FS_LISTENING && m_modemState == STATE_FM) {
if (!m_callsign.isWanted() && !m_rfAck.isWanted()) {
if (!m_callsign.isWanted() && !m_rfAck.isWanted() && !m_reverseTimer.isRunning())
m_reverseTimer.start();
if (!m_callsign.isWanted() && !m_rfAck.isWanted() && m_reverseTimer.isRunning() && m_reverseTimer.hasExpired()) {
DEBUG1("Change to STATE_IDLE");
m_modemState = STATE_IDLE;
m_callsignTimer.stop();
@ -244,6 +274,7 @@ void CFM::stateMachine(bool validSignal)
m_ackMinTimer.stop();
m_ackDelayTimer.stop();
m_hangTimer.stop();
m_reverseTimer.stop();
}
}
}
@ -257,6 +288,7 @@ void CFM::clock(uint8_t length)
m_ackMinTimer.clock(length);
m_ackDelayTimer.clock(length);
m_hangTimer.clock(length);
m_reverseTimer.clock(length);
}
void CFM::listeningState(bool validSignal)
@ -280,6 +312,7 @@ void CFM::listeningState(bool validSignal)
beginRelaying();
m_callsignTimer.start();
m_reverseTimer.stop();
io.setDecode(true);
io.setADCDetection(true);

5
FM.h
View File

@ -56,7 +56,7 @@ public:
uint8_t setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd, bool callsignAtLatch);
uint8_t setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_t minTime, uint16_t delay, uint8_t level);
uint8_t setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel);
uint8_t setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, uint8_t accessMode, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel);
private:
CFMKeyer m_callsign;
@ -75,11 +75,12 @@ private:
CFMTimer m_ackMinTimer;
CFMTimer m_ackDelayTimer;
CFMTimer m_hangTimer;
CFMTimer m_reverseTimer;
CFMDirectFormI m_filterStage1;
CFMDirectFormI m_filterStage2;
CFMDirectFormI m_filterStage3;
CFMBlanking m_blanking;
bool m_useCOS;
uint8_t m_accessMode;
bool m_cosInvert;
q15_t m_rfAudioBoost;
CFMDownsampler m_downsampler;

9
FMCTCSSTX.cpp
View File

@ -115,11 +115,14 @@ uint8_t CFMCTCSSTX::setParams(uint8_t frequency, uint8_t level)
return 0U;
}
q15_t CFMCTCSSTX::getAudio()
q15_t CFMCTCSSTX::getAudio(bool reverse)
{
q15_t sample = m_values[m_n++];
if(m_n >= m_length)
if (m_n >= m_length)
m_n = 0U;
return sample;
if (reverse)
return -sample;
else
return sample;
}

2
FMCTCSSTX.h
View File

@ -27,7 +27,7 @@ public:
uint8_t setParams(uint8_t frequency, uint8_t level);
q15_t getAudio();
q15_t getAudio(bool reverse);
private:
q15_t* m_values;

12
FMTimeout.cpp
View File

@ -36,24 +36,22 @@ m_n(0U)
void CFMTimeout::setParams(uint8_t level)
{
m_level = q15_t(level * 128);
m_level = q15_t(level * 5);
}
q15_t CFMTimeout::getAudio()
{
q15_t sample = 0U;
q15_t sample = 0;
if (!m_running)
return sample;
if (m_pos > 12000U) {
q31_t sample = BUSY_AUDIO[m_n] * m_level;
sample = q15_t(__SSAT((sample >> 15), 16));
if (m_pos >= 12000U) {
q31_t sample31 = BUSY_AUDIO[m_n] * m_level;
sample = q15_t(__SSAT((sample31 >> 15), 16));
m_n++;
if (m_n >= BUSY_AUDIO_LEN)
m_n = 0U;
} else {
sample = 0U;
}
m_pos++;

65
IO.cpp
View File

@ -83,6 +83,7 @@ m_pocsagTXLevel(128 * 128),
m_fmTXLevel(128 * 128),
m_rxDCOffset(DC_OFFSET),
m_txDCOffset(DC_OFFSET),
m_useCOSAsLockout(false),
m_ledCount(0U),
m_ledValue(true),
m_detect(false),
@ -132,7 +133,7 @@ void CIO::selfTest()
{
bool ledValue = false;
for (uint8_t i = 0; i < 6; i++) {
for (uint8_t i = 0U; i < 6U; i++) {
ledValue = !ledValue;
// We exclude PTT to avoid trigger the transmitter
@ -143,21 +144,34 @@ void CIO::selfTest()
setDMRInt(ledValue);
setYSFInt(ledValue);
setP25Int(ledValue);
#if !defined(USE_ALTERNATE_NXDN_LEDS)
setNXDNInt(ledValue);
#endif
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
setPOCSAGInt(ledValue);
#endif
#if !defined(USE_ALTERNATE_FM_LEDS)
setFMInt(ledValue);
#endif
#endif
delayInt(250);
}
#if defined(MODE_LEDS)
setDStarInt(true);
setDStarInt(false);
setDMRInt(false);
setYSFInt(false);
setP25Int(false);
#if !defined(USE_ALTERNATE_NXDN_LEDS)
setNXDNInt(false);
#endif
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
setPOCSAGInt(false);
#endif
#if !defined(USE_ALTERNATE_FM_LEDS)
setFMInt(false);
#endif
setDStarInt(true);
delayInt(250);
setDMRInt(true);
@ -219,7 +233,7 @@ void CIO::start()
m_started = true;
setMode();
setMode(STATE_IDLE);
}
void CIO::process()
@ -231,8 +245,7 @@ void CIO::process()
if (m_modemState == STATE_DSTAR || m_modemState == STATE_DMR || m_modemState == STATE_YSF || m_modemState == STATE_P25 || m_modemState == STATE_NXDN || m_modemState == STATE_POCSAG) {
if (m_modemState == STATE_DMR && m_tx)
dmrTX.setStart(false);
m_modemState = STATE_IDLE;
setMode();
setMode(STATE_IDLE);
}
m_watchdog = 0U;
@ -256,9 +269,8 @@ void CIO::process()
return;
}
#if defined(USE_COS_AS_LOCKOUT)
m_lockout = getCOSInt();
#endif
if (m_useCOSAsLockout)
m_lockout = getCOSInt();
// Switch off the transmitter if needed
if (m_txBuffer.getData() == 0U && m_tx) {
@ -516,20 +528,37 @@ void CIO::setADCDetection(bool detect)
m_detect = detect;
}
void CIO::setMode()
void CIO::setMode(MMDVM_STATE state)
{
if (state == m_modemState)
return;
#if defined(MODE_LEDS)
setDStarInt(m_modemState == STATE_DSTAR);
setDMRInt(m_modemState == STATE_DMR);
setYSFInt(m_modemState == STATE_YSF);
setP25Int(m_modemState == STATE_P25);
setNXDNInt(m_modemState == STATE_NXDN);
setPOCSAGInt(m_modemState == STATE_POCSAG);
setFMInt(m_modemState == STATE_FM);
switch (m_modemState) {
case STATE_DSTAR: setDStarInt(false); break;
case STATE_DMR: setDMRInt(false); break;
case STATE_YSF: setYSFInt(false); break;
case STATE_P25: setP25Int(false); break;
case STATE_NXDN: setNXDNInt(false); break;
case STATE_POCSAG: setPOCSAGInt(false); break;
case STATE_FM: setFMInt(false); break;
}
switch (state) {
case STATE_DSTAR: setDStarInt(true); break;
case STATE_DMR: setDMRInt(true); break;
case STATE_YSF: setYSFInt(true); break;
case STATE_P25: setP25Int(true); break;
case STATE_NXDN: setNXDNInt(true); break;
case STATE_POCSAG: setPOCSAGInt(true); break;
case STATE_FM: setFMInt(true); break;
}
#endif
m_modemState = state;
}
void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset)
void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset, bool useCOSAsLockout)
{
m_pttInvert = pttInvert;
@ -545,6 +574,8 @@ void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rx
m_rxDCOffset = DC_OFFSET + rxDCOffset;
m_txDCOffset = DC_OFFSET + txDCOffset;
m_useCOSAsLockout = useCOSAsLockout;
if (rxInvert)
m_rxLevel = -m_rxLevel;

6
IO.h
View File

@ -38,11 +38,11 @@ public:
void setDecode(bool dcd);
void setADCDetection(bool detect);
void setMode();
void setMode(MMDVM_STATE state);
void interrupt();
void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset);
void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset, bool useCOSAsLockout);
void getOverflow(bool& adcOverflow, bool& dacOverflow);
@ -91,6 +91,8 @@ private:
uint16_t m_rxDCOffset;
uint16_t m_txDCOffset;
bool m_useCOSAsLockout;
uint32_t m_ledCount;
bool m_ledValue;

11
IOPins.h
View File

@ -59,12 +59,21 @@
#elif defined(STM32F4_DVM)
#include "pins/pins_f4_stm32dvm_v3.h"
#elif defined(STM32F7_DVM)
#include "pins/pins_f7_stm32dvm_v5.h"
#elif defined(DRCC_DVM_NQF)
#include "pins/pins_f4_drcc_nqf.h"
#elif defined(DRCC_DVM_HHP446)
#include "pins/pins_f4_drcc_hhp446.h"
#elif defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
#include "pins/pins_f4_stm32eda.h"
#else
#error "A valid board type macro need to be defined."
#endif
#endif //#ifndef _IO_PINS_H
#endif //#ifndef _IO_PINS_H

58
IOSTM_CMSIS.cpp
View File

@ -41,7 +41,6 @@ YSF PB8 output
P25 PB9 output
NXDN PB10 output
POCSAG PB11 output
FM PB12 output
RX PB0 analog input (ADC1_8)
RSSI PB1 analog input (ADC2_9)
@ -85,9 +84,6 @@ USART1_RXD PA10 input (AF)
#define PIN_POCSAG 11
#define PORT_POCSAG GPIOB
#define BB_POCSAG *((bitband_t)BITBAND_PERIPH(&PORT_POCSAG->ODR, PIN_POCSAG))
#define PIN_FM 14
#define PORT_FM GPIOB
#define BB_FM *((bitband_t)BITBAND_PERIPH(&PORT_FM->ODR, PIN_FM))
#define PIN_RX 0
#define PIN_RX_ADC_CH 8
@ -158,35 +154,16 @@ void GPIOConfigPin(GPIO_TypeDef *port_ptr, uint32_t pin, uint32_t mode_cnf_value
#if defined(STM32F1_POG)
void FancyLEDEffect()
{
int ledCount = 10;
bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25,
#if defined(USE_ALTERNATE_NXDN_LEDS)
NULL,
#else
&BB_NXDN,
#endif
#if defined(USE_ALTERNATE_POCSAG_LEDS)
NULL,
#else
&BB_POCSAG,
#endif
#if defined(USE_ALTERNATE_FM_LEDS)
NULL};
#else
&BB_FM};
#endif
for(int i=0; i<ledCount; i++){
if(foo[i] != NULL)
*foo[i] = 0x01;
bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25};
for(int i=0; i<7; i++){
*foo[i] = 0x01;
}
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1);
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
delay(SystemCoreClock/1000*100);
for(int i=0; i<ledCount; i++){
if(foo[i] != NULL)
*foo[i] = 0x00;
for(int i=0; i<7; i++){
*foo[i] = 0x00;
}
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
delay(SystemCoreClock/1000*20);
@ -195,22 +172,18 @@ void FancyLEDEffect()
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
*foo[0] = 0x01;
for(int i=1; i<ledCount; i++){
for(int i=1; i<7; i++){
delay(SystemCoreClock/1000*10);
if (foo[i-1] != NULL)
*foo[i-1] = 0x00;
if (foo[i] != NULL)
*foo[i] = 0x01;
*foo[i-1] = 0x00;
*foo[i] = 0x01;
}
for(int i=ledCount - 2; i>=0; i--) {
for(int i=5; i>=0; i--){
delay(SystemCoreClock/1000*10);
if (foo[i+1] != NULL)
*foo[i+1] = 0x00;
if (foo[i] != NULL)
*foo[i] = 0x01;
*foo[i+1] = 0x00;
*foo[i] = 0x01;
}
delay(SystemCoreClock/1000*10);
*foo[0] = 0x00;
*foo[5+1-6] = 0x00;
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
delay(SystemCoreClock/1000*10);
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
@ -255,9 +228,6 @@ static inline void GPIOInit()
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
GPIOConfigPin(PORT_POCSAG, PIN_POCSAG, GPIO_CRL_MODE0_1);
#endif
#if !defined(USE_ALTERNATE_FM_LEDS)
GPIOConfigPin(PORT_FM, PIN_FM, GPIO_CRL_MODE0_1);
#endif
GPIOConfigPin(PORT_RX, PIN_RX, 0);
#if defined(SEND_RSSI_DATA)
@ -495,8 +465,6 @@ void CIO::setFMInt(bool on)
#if defined(USE_ALTERNATE_FM_LEDS)
BB_DSTAR = !!on;
BB_YSF = !!on;
#else
BB_FM = !!on;
#endif
}

48
Makefile
View File

@ -133,12 +133,18 @@ DEFS_PI_F722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_PI -DHSE_VAL
DEFS_F7M=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_F7M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# MMDVM_RPT_Hat F0DEI, DB9MAT, DF2ET board:
DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# STM32F4 DVM board:
# RB STM32F4_DVM board:
DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# RB STM32F7 DVM board:
DEFS_DVM722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F7_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# MMDVM_RPT_Hat BG4TGO, BG5HHP board:
DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# DRCC_DVM BG7NQF board:
DEFS_DRCC_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DDRCC_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# WA0EDA F405 MTR2K, MASTR3 board:
DEFS_EDA_405=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_EDA_405 -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# WA0EDA F446 MTR2K, MASTR3 board:
DEFS_EDA_446=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_EDA_446 -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# Build compiler flags
@ -218,17 +224,41 @@ f767: LDFLAGS+=$(LDFLAGS_F767)
f767: release_f7
dvm: GitVersion.h
dvm: CFLAGS+=$(CFLAGS_F4) $(DEFS_DVM)
dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM)
dvm: CFLAGS+=$(CFLAGS_F4) $(DEFS_DVM) -DDRCC_DVM_446
dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM) -DDRCC_DVM_446
dvm: LDFLAGS+=$(LDFLAGS_F4)
dvm: release_f4
dvm722: GitVersion.h
dvm722: CFLAGS+=$(CFLAGS_F7) $(DEFS_DVM722) -DDRCC_DVM_722
dvm722: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_DVM722) -DDRCC_DVM_722
dvm722: LDFLAGS+=$(LDFLAGS_F722)
dvm722: release_f7
drcc_nqf: GitVersion.h
drcc_nqf: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
drcc_nqf: LDFLAGS+=$(LDFLAGS_F4)
drcc_nqf: release_f4
hhp446: GitVersion.h
hhp446: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_HHP446
hhp446: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_HHP446
hhp446: LDFLAGS+=$(LDFLAGS_F4)
hhp446: release_f4
eda405: GitVersion.h
eda405: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_405)
eda405: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_405)
eda405: LDFLAGS+=$(LDFLAGS_F4)
eda405: release_f4
eda446: GitVersion.h
eda446: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_446)
eda446: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_446)
eda446: LDFLAGS+=$(LDFLAGS_F4)
eda446: release_f4
release_f4: $(BINDIR)
release_f4: $(OBJDIR_F4)
release_f4: $(BINDIR)/$(BINHEX_F4)
@ -338,27 +368,27 @@ endif
deploy-pi:
ifneq ($(wildcard /usr/local/bin/stm32flash),)
-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-/usr/local/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F4)
/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R -c /dev/ttyAMA0
/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R /dev/ttyAMA0
endif
ifneq ($(wildcard /usr/bin/stm32flash),)
-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-/usr/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F4)
/usr/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R -c /dev/ttyAMA0
/usr/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R /dev/ttyAMA0
endif
deploy-f4m: deploy-pi
deploy-dvm: deploy-pi
deploy-eda405: deploy-pi
deploy-eda446: deploy-pi
deploy-pi-f7:
ifneq ($(wildcard /usr/local/bin/stm32flash),)
-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R /dev/ttyAMA0
else ifneq ($(wildcard /usr/bin/stm32flash),)
-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
/usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
/usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R /dev/ttyAMA0
endif
deploy-f7m: deploy-pi-f7

18
README.md
View File

@ -1,7 +1,17 @@
This is the source code of the MMDVM firmware that supports D-Star, DMR, System Fusion, P25, NXDN, and POCSAG modes.
This is the source code of the MMDVM firmware that supports D-Star, DMR,
System Fusion, P25, NXDN, POCSAG, and FM modes.
It runs on the Arduino Due, the ST-Micro STM32F1xxx, STM32F4xxx and STM32F7xxx processors, as well as the Teensy 3.1/3.2/3.5/3.6. What these platforms have in common is the use of an ARM Cortex-M3 or M4 processor with a clock speed greater than 70 MHz, and access to at least one analogue to digital converter and one digital to analogue converter.
It runs on the Arduino Due, the ST-Micro STM32F1xxx, STM32F4xxx and STM32F7xxx
processors, as well as the Teensy 3.1/3.2/3.5/3.6. What these platforms have in
common is the use of an ARM Cortex-M3, M4, or M7 processors with a clock speed
greater than 70 MHz, and access to at least one analogue to digital converter
and one digital to analogue converter.
In order to build this software for the Arduino Due, you will need to edit a file within the Arduino GUI and that is detailed in the BUILD.txt file. The STM32 support is being supplied via the Coocox IDE with ARM GCC. The Teensy support uses Teensyduino.
In order to build this software for the Arduino Due, you will need to edit a
file within the Arduino GUI and that is detailed in the BUILD.txt file. The
STM32 support is being supplied via the ARM GCC compiler. The Teensy support
uses Teensyduino.
This software is licenced under the GPL v2 and is intended for amateur and educational use only. Use of this software for commercial purposes is strictly forbidden.
This software is licenced under the GPL v2 and is intended for amateur and
educational use only. Use of this software for commercial purposes is strictly
forbidden.

2
STM32F4XX_Lib

@ -1 +1 @@
Subproject commit bcd346f53036ed0eab6643d662a410861655afe2
Subproject commit 18aeb6ea3a236088fc9f376077c651098e3a495e

2
STM32F7XX_Lib

@ -1 +1 @@
Subproject commit 2d5f4236fa5e9828beadbc72473293f25b3ad65e
Subproject commit 6241f7c05eeb6cf1ecd16ca0274bf310efee853f

33
SerialPort.cpp
View File

@ -97,13 +97,17 @@ const uint8_t MMDVM_DEBUG5 = 0xF5U;
#if defined(DRCC_DVM_NQF)
#define HW_TYPE "MMDVM DRCC_DVM_NQF"
#elif defined(STM32F4_RPT_HAT_TGO)
#define HW_TYPE "MMDVM RPT_HAT_TGO"
#elif defined(DRCC_DVM_HHP446)
#define HW_TYPE "MMDVM DRCC_DVM_HHP(446)"
#elif defined(DRCC_DVM_722)
#define HW_TYPE "MMDVM RB_STM32_DVM(722)"
#elif defined(DRCC_DVM_446)
#define HW_TYPE "MMDVM RB_STM32_DVM(446)"
#else
#define HW_TYPE "MMDVM"
#endif
#define DESCRIPTION "20200520 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
#define DESCRIPTION "20210101 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
#if defined(GITVERSION)
#define concat(h, a, b, c) h " " a " " b " GitID #" c ""
@ -267,11 +271,12 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
if (length < 21U)
return 4U;
bool rxInvert = (data[0U] & 0x01U) == 0x01U;
bool txInvert = (data[0U] & 0x02U) == 0x02U;
bool pttInvert = (data[0U] & 0x04U) == 0x04U;
bool ysfLoDev = (data[0U] & 0x08U) == 0x08U;
bool simplex = (data[0U] & 0x80U) == 0x80U;
bool rxInvert = (data[0U] & 0x01U) == 0x01U;
bool txInvert = (data[0U] & 0x02U) == 0x02U;
bool pttInvert = (data[0U] & 0x04U) == 0x04U;
bool ysfLoDev = (data[0U] & 0x08U) == 0x08U;
bool useCOSAsLockout = (data[0U] & 0x20U) == 0x20U;
bool simplex = (data[0U] & 0x80U) == 0x80U;
m_debug = (data[0U] & 0x10U) == 0x10U;
@ -363,7 +368,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
p25TX.setParams(p25TXHang);
nxdnTX.setParams(nxdnTXHang);
io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, nxdnTXLevel, pocsagTXLevel, fmTXLevel, txDCOffset, rxDCOffset);
io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, nxdnTXLevel, pocsagTXLevel, fmTXLevel, txDCOffset, rxDCOffset, useCOSAsLockout);
io.start();
@ -431,14 +436,14 @@ uint8_t CSerialPort::setFMParams3(const uint8_t* data, uint8_t length)
uint8_t kerchunkTime = data[6U];
uint8_t hangTime = data[7U];
bool useCOS = (data[8U] & 0x01U) == 0x01U;
bool cosInvert = (data[8U] & 0x02U) == 0x02U;
uint8_t accessMode = data[8U] & 0x7FU;
bool cosInvert = (data[8U] & 0x80U) == 0x80U;
uint8_t rfAudioBoost = data[9U];
uint8_t maxDev = data[10U];
uint8_t rxLevel = data[11U];
return fm.setMisc(timeout, timeoutLevel, ctcssFrequency, ctcssHighThreshold, ctcssLowThreshold, ctcssLevel, kerchunkTime, hangTime, useCOS, cosInvert, rfAudioBoost, maxDev, rxLevel);
return fm.setMisc(timeout, timeoutLevel, ctcssFrequency, ctcssHighThreshold, ctcssLowThreshold, ctcssLevel, kerchunkTime, hangTime, accessMode, cosInvert, rfAudioBoost, maxDev, rxLevel);
}
uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
@ -567,9 +572,7 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
cwIdTX.reset();
m_modemState = modemState;
io.setMode();
io.setMode(modemState);
}
void CSerialPort::start()

12
SerialSTM.cpp
View File

@ -50,7 +50,7 @@ extern "C" {
}
/* ************* USART1 ***************** */
#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM)
#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
@ -841,7 +841,7 @@ void CSerialPort::beginInt(uint8_t n, int speed)
case 1U:
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
InitUSART3(speed);
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
InitUSART1(speed);
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
InitUSART2(speed);
@ -869,7 +869,7 @@ int CSerialPort::availableInt(uint8_t n)
case 1U:
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
return AvailUSART3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
return AvailUSART1();
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
return AvailUSART2();
@ -895,7 +895,7 @@ int CSerialPort::availableForWriteInt(uint8_t n)
case 1U:
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
return AvailForWriteUSART3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
return AvailForWriteUSART1();
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
return AvailForWriteUSART2();
@ -921,7 +921,7 @@ uint8_t CSerialPort::readInt(uint8_t n)
case 1U:
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
return ReadUSART3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
return ReadUSART1();
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
return ReadUSART2();
@ -949,7 +949,7 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
WriteUSART3(data, length);
if (flush)
TXSerialFlush3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
WriteUSART1(data, length);
if (flush)
TXSerialFlush1();

2
YSFRX.cpp
View File

@ -36,7 +36,7 @@ const uint8_t NOAVEPTR = 99U;
const uint16_t NOENDPTR = 9999U;
const unsigned int MAX_SYNC_FRAMES = 4U + 1U;
const unsigned int MAX_SYNC_FRAMES = 1U + 1U;
CYSFRX::CYSFRX() :
m_state(YSFRXS_NONE),

143
pins/pins_f4_drcc_hhp446.h Normal file
View File

@ -0,0 +1,143 @@
/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_DRCC_HHP446_H
#define _PINS_F4_DRCC_HHP446_H
/*
Pin definitions for DRCC_DVM BG5HHP F446 board rev1
TX/PTT_LED PB12 output
RX/COS_LED PB5 output
STATUS_LED PB10 output
COS_IN PB13 input
DSTAR N/A
DMR N/A
YSF N/A
P25 N/A
NXDN N/A
POCSAG N/A
MDMR/BIT0 PB8 output
MYSF/BIT1 PB9 output
MDSTAR/BIT2 PB14 output
MP25/BIT3 PB15 output Generic Mode Pins
MNXDN N/A
MPOCSAG N/A
RX PA0 analog input
RSSI PA1 analog input
TX PA4 analog output
EXT_CLK N/A
UART1_TX PA9 output
UART1_RX PA10 output Host Data Communication
UART2_TX PA2 output
UART2_RX PA3 output Nextion Data Communication
I2C1_SCL PB6 output
I2C1_SDA PB7 output OLED Data Communication as master
*/
#define PIN_COS GPIO_Pin_13
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_12
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_5
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_10
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_TXLED GPIO_Pin_4
#define PORT_TXLED GPIOB
#define RCC_Per_TXLED RCC_AHB1Periph_GPIOB
// #define PIN_P25 GPIO_Pin_3
// #define PORT_P25 GPIOB
// #define RCC_Per_P25 RCC_AHB1Periph_GPIOB
// #define PIN_NXDN GPIO_Pin_10
// #define PORT_NXDN GPIOA
// #define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
// #define PIN_POCSAG GPIO_Pin_12
// #define PORT_POCSAG GPIOB
// #define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
// #define PIN_DSTAR GPIO_Pin_10
// #define PORT_DSTAR GPIOB
// #define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
// #define PIN_DMR GPIO_Pin_4
// #define PORT_DMR GPIOB
// #define RCC_Per_DMR RCC_AHB1Periph_GPIOB
// #define PIN_YSF GPIO_Pin_5
// #define PORT_YSF GPIOB
// #define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#if defined(MODE_PINS)
#define PIN_MP25 GPIO_Pin_15
#define PORT_MP25 GPIOB
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOB
#define PIN_MDSTAR GPIO_Pin_9
#define PORT_MDSTAR GPIOB
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOB
#define PIN_MDMR GPIO_Pin_8
#define PORT_MDMR GPIOB
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOB
#define PIN_MYSF GPIO_Pin_14
#define PORT_MYSF GPIOB
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOB
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#define PORT_TX GPIOA
#define RCC_Per_TX RCC_AHB1Periph_GPIOA
#endif

10
pins/pins_f4_stm32dvm_v3.h
View File

@ -32,7 +32,7 @@ NXDN PB9 output
DSTAR PB6 output
DMR PB5 output
YSF PB7 output
POCSAG PC10 output
POCSAG PC10 output (Not Valid)
RX PB0 analog input
RSSI PB1 analog input
@ -78,9 +78,15 @@ EXT_CLK PA15 input
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
/*
#define PIN_POCSAG GPIO_Pin_10
#define PORT_POCSAG GPIOC
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOC
*/
#define PIN_FM GPIO_Pin_14
#define PORT_FM GPIOB
#define RCC_Per_FM RCC_AHB1Periph_GPIOB
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
@ -99,4 +105,4 @@ EXT_CLK PA15 input
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
#endif

108
pins/pins_f4_stm32eda.h Normal file
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@ -0,0 +1,108 @@
/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_STM32EDA
#define _PINS_F4_STM32EDA
/*
Pin definitions for STM32F4 STM32-DVM-MTR2K & STM32-DVM-MASTR3:
COS PB13 input
PTT PB12 output
COSLED PB4 output
LED PB3 output
P25 PB8 output
NXDN PB9 output
DSTAR PB6 output
DMR PB5 output
YSF PB7 output
POCSAG PC10 output
FM PC11 output
RX PB0 analog input
RSSI PB1 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_13
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_12
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_4
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_3
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_8
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_9
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_6
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_5
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_7
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#define PIN_POCSAG GPIO_Pin_10
#define PORT_POCSAG GPIOC
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOC
#define PIN_FM GPIO_Pin_11
#define PORT_FM GPIOC
#define RCC_Per_FM RCC_AHB1Periph_GPIOC
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_8
#define PORT_RX GPIOB
#define RCC_Per_RX RCC_AHB1Periph_GPIOB
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_9
#define PORT_RSSI GPIOB
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOB
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif

108
pins/pins_f7_stm32dvm_v5.h Normal file
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F7_STM32DVM_V5_H
#define _PINS_F7_STM32DVM_V5_H
/*
Pin definitions for STM32F4 STM32-DVM rev 5 Board:
COS PB13 input
PTT PB12 output
COSLED PB4 output
LED PB3 output
P25 PB8 output
NXDN PB9 output
DSTAR PB6 output
DMR PB5 output
YSF PB7 output
POCSAG PC10 output (Not Valid)
RX PB0 analog input
RSSI PB1 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_13
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_12
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_4
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_3
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_8
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_9
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_6
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_5
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_7
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
/*
#define PIN_POCSAG GPIO_Pin_10
#define PORT_POCSAG GPIOC
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOC
*/
#define PIN_FM GPIO_Pin_14
#define PORT_FM GPIOB
#define RCC_Per_FM RCC_AHB1Periph_GPIOB
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_8
#define PORT_RX GPIOB
#define RCC_Per_RX RCC_AHB1Periph_GPIOB
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_9
#define PORT_RSSI GPIOB
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOB
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif