mirror of https://github.com/g4klx/MMDVM.git
Merge branch 'master' into dstar_correlator
This commit is contained in:
Jonathan Naylor
commit
88ab312da0
2
Config.h
2
Config.h
|
|
@ -27,7 +27,7 @@
|
|||
// Frequencies such as 10.0 Mhz (48000 * 208.333) or 20 Mhz (48000 * 416.666) are not suitable.
|
||||
//
|
||||
// For 12 MHz
|
||||
// #define EXTERNAL_OSC 12000000
|
||||
#define EXTERNAL_OSC 12000000
|
||||
// For 12.288 MHz
|
||||
// #define EXTERNAL_OSC 12288000
|
||||
// For 14.4 MHz
|
||||
|
|
|
|||
54
DStarRX.cpp
54
DStarRX.cpp
|
|
@ -24,13 +24,20 @@
|
|||
|
||||
const unsigned int MAX_FRAMES = 75U;
|
||||
|
||||
// Generated using [b, a] = butter(1, 0.001) in MATLAB
|
||||
static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2}
|
||||
const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
|
||||
// D-Star bit order version of 0x55 0x55 0x6E 0x0A
|
||||
const uint32_t FRAME_SYNC_DATA = 0x00557650U;
|
||||
const uint32_t FRAME_SYNC_MASK = 0x00FFFFFFU;
|
||||
const uint8_t FRAME_SYNC_ERRS = 2U;
|
||||
|
||||
const uint8_t MAX_FRAME_SYNC_BIT_ERRS = 2U;
|
||||
const uint8_t MAX_DATA_SYNC_BIT_ERRS = 2U;
|
||||
const uint8_t MAX_END_SYNC_BIT_ERRS = 3U;
|
||||
// D-Star bit order version of 0x55 0x2D 0x16
|
||||
const uint32_t DATA_SYNC_DATA = 0x00AAB468U;
|
||||
const uint32_t DATA_SYNC_MASK = 0x00FFFFFFU;
|
||||
const uint8_t DATA_SYNC_ERRS = 2U;
|
||||
|
||||
// D-Star bit order version of 0x55 0x55 0xC8 0x7A
|
||||
const uint32_t END_SYNC_DATA = 0xAAAA135EU;
|
||||
const uint32_t END_SYNC_MASK = 0xFFFFFFFFU;
|
||||
const uint8_t END_SYNC_ERRS = 3U;
|
||||
|
||||
const uint8_t BIT_MASK_TABLE0[] = {0x7FU, 0xBFU, 0xDFU, 0xEFU, 0xF7U, 0xFBU, 0xFDU, 0xFEU};
|
||||
const uint8_t BIT_MASK_TABLE1[] = {0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U};
|
||||
|
|
@ -250,16 +257,8 @@ m_pathMemory2(),
|
|||
m_pathMemory3(),
|
||||
m_fecOutput(),
|
||||
m_rssiAccum(0U),
|
||||
m_rssiCount(0U),
|
||||
m_dcFilter(),
|
||||
m_dcState()
|
||||
m_rssiCount(0U)
|
||||
{
|
||||
::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
|
||||
|
||||
m_dcFilter.numStages = DC_FILTER_STAGES;
|
||||
m_dcFilter.pState = m_dcState;
|
||||
m_dcFilter.pCoeffs = DC_FILTER;
|
||||
m_dcFilter.postShift = 0;
|
||||
}
|
||||
|
||||
void CDStarRX::reset()
|
||||
|
|
@ -281,24 +280,12 @@ void CDStarRX::reset()
|
|||
}
|
||||
|
||||
void CDStarRX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t length)
|
||||
{
|
||||
q31_t dc_level = 0;
|
||||
q31_t dcVals[20];
|
||||
q31_t intSamp[20];
|
||||
|
||||
::arm_q15_to_q31((q15_t*)samples, intSamp, length);
|
||||
::arm_biquad_cascade_df1_q31(&m_dcFilter, intSamp, dcVals, length);
|
||||
|
||||
for (uint8_t i = 0U; i < length; i++)
|
||||
dc_level += dcVals[i];
|
||||
|
||||
dc_level /= length;
|
||||
|
||||
{
|
||||
for (uint16_t i = 0U; i < length; i++) {
|
||||
m_rssiAccum += rssi[i];
|
||||
m_rssiCount++;
|
||||
|
||||
q15_t sample = samples[i] - q15_t(dc_level >> 16);
|
||||
q15_t sample = samples[i];
|
||||
|
||||
m_bitBuffer[m_bitPtr] <<= 1;
|
||||
if (sample < 0)
|
||||
|
|
@ -408,7 +395,7 @@ void CDStarRX::processHeader(q15_t sample)
|
|||
void CDStarRX::processData()
|
||||
{
|
||||
// Fuzzy matching of the end frame sequences
|
||||
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_END_SYNC_MASK) ^ DSTAR_END_SYNC_DATA) <= MAX_END_SYNC_BIT_ERRS) {
|
||||
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_END_SYNC_MASK) ^ DSTAR_END_SYNC_DATA) <= END_SYNC_ERRS) {
|
||||
DEBUG1("DStarRX: Found end sync in Data");
|
||||
|
||||
io.setDecode(false);
|
||||
|
|
@ -460,9 +447,8 @@ void CDStarRX::processData()
|
|||
buffer[9U] = DSTAR_DATA_SYNC_BYTES[9U];
|
||||
buffer[10U] = DSTAR_DATA_SYNC_BYTES[10U];
|
||||
buffer[11U] = DSTAR_DATA_SYNC_BYTES[11U];
|
||||
|
||||
DEBUG5("DStarRX: found start/sync/max/min", m_startPtr, m_syncPtr, m_maxSyncPtr, m_minSyncPtr);
|
||||
}
|
||||
}
|
||||
|
||||
writeRSSIData(buffer);
|
||||
} else {
|
||||
|
|
@ -520,7 +506,7 @@ void CDStarRX::writeRSSIData(unsigned char* data)
|
|||
|
||||
bool CDStarRX::correlateFrameSync()
|
||||
{
|
||||
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_FRAME_SYNC_MASK) ^ DSTAR_FRAME_SYNC_DATA) <= MAX_FRAME_SYNC_BIT_ERRS) {
|
||||
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_FRAME_SYNC_MASK) ^ DSTAR_FRAME_SYNC_DATA) <= FRAME_SYNC_ERRS) {
|
||||
uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_FRAME_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
|
||||
ptr -= DSTAR_DATA_LENGTH_SAMPLES;
|
||||
|
|
@ -554,7 +540,7 @@ bool CDStarRX::correlateDataSync()
|
|||
{
|
||||
uint8_t maxErrs = 0U;
|
||||
if (m_rxState == DSRXS_DATA)
|
||||
maxErrs = MAX_DATA_SYNC_BIT_ERRS;
|
||||
maxErrs = DATA_SYNC_ERRS;
|
||||
|
||||
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_DATA_SYNC_MASK) ^ DSTAR_DATA_SYNC_DATA) <= maxErrs) {
|
||||
uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_DATA_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
|
|
|
|||
|
|
@ -61,8 +61,6 @@ private:
|
|||
uint8_t m_fecOutput[42U];
|
||||
uint32_t m_rssiAccum;
|
||||
uint16_t m_rssiCount;
|
||||
arm_biquad_casd_df1_inst_q31 m_dcFilter;
|
||||
q31_t m_dcState[4];
|
||||
|
||||
void processNone(q15_t sample);
|
||||
void processHeader(q15_t sample);
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
/*
|
||||
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
|
|||
32
IO.cpp
32
IO.cpp
|
|
@ -33,9 +33,13 @@ static q15_t GAUSSIAN_0_5_FILTER[] = {8, 104, 760, 3158, 7421, 9866, 7421, 315
|
|||
const uint16_t GAUSSIAN_0_5_FILTER_LEN = 12U;
|
||||
|
||||
// One symbol boxcar filter
|
||||
static q15_t BOXCAR_FILTER[] = {3000, 3000, 3000, 3000, 3000, 0};
|
||||
static q15_t BOXCAR_FILTER[] = {12000, 12000, 12000, 12000, 12000, 0};
|
||||
const uint16_t BOXCAR_FILTER_LEN = 6U;
|
||||
|
||||
// Generated using [b, a] = butter(1, 0.001) in MATLAB
|
||||
static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2}
|
||||
const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
|
||||
|
||||
const uint16_t DC_OFFSET = 2048U;
|
||||
|
||||
CIO::CIO() :
|
||||
|
|
@ -62,11 +66,14 @@ m_detect(false),
|
|||
m_adcOverflow(0U),
|
||||
m_dacOverflow(0U),
|
||||
m_watchdog(0U),
|
||||
m_lockout(false)
|
||||
m_lockout(false),
|
||||
m_dcFilter(),
|
||||
m_dcState()
|
||||
{
|
||||
::memset(m_rrcState, 0x00U, 70U * sizeof(q15_t));
|
||||
::memset(m_gaussianState, 0x00U, 40U * sizeof(q15_t));
|
||||
::memset(m_boxcarState, 0x00U, 30U * sizeof(q15_t));
|
||||
::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
|
||||
|
||||
m_rrcFilter.numTaps = RRC_0_2_FILTER_LEN;
|
||||
m_rrcFilter.pState = m_rrcState;
|
||||
|
|
@ -79,6 +86,11 @@ m_lockout(false)
|
|||
m_boxcarFilter.numTaps = BOXCAR_FILTER_LEN;
|
||||
m_boxcarFilter.pState = m_boxcarState;
|
||||
m_boxcarFilter.pCoeffs = BOXCAR_FILTER;
|
||||
|
||||
m_dcFilter.numStages = DC_FILTER_STAGES;
|
||||
m_dcFilter.pState = m_dcState;
|
||||
m_dcFilter.pCoeffs = DC_FILTER;
|
||||
m_dcFilter.postShift = 0;
|
||||
|
||||
initInt();
|
||||
}
|
||||
|
|
@ -156,6 +168,22 @@ void CIO::process()
|
|||
|
||||
if (m_lockout)
|
||||
return;
|
||||
|
||||
q31_t dcLevel = 0;
|
||||
q31_t dcVals[20];
|
||||
q31_t q31Samples[20U];
|
||||
|
||||
::arm_q15_to_q31(samples, q31Samples, RX_BLOCK_SIZE);
|
||||
::arm_biquad_cascade_df1_q31(&m_dcFilter, q31Samples, dcVals, RX_BLOCK_SIZE);
|
||||
|
||||
for (uint8_t i = 0U; i < RX_BLOCK_SIZE; i++)
|
||||
dcLevel += dcVals[i];
|
||||
dcLevel /= RX_BLOCK_SIZE;
|
||||
|
||||
q15_t offset = q15_t(dcLevel >> 16);
|
||||
|
||||
for (uint8_t i = 0U; i < RX_BLOCK_SIZE; i++)
|
||||
samples[i] -= offset;
|
||||
|
||||
if (m_modemState == STATE_IDLE) {
|
||||
if (m_dstarEnable) {
|
||||
|
|
|
|||
14
IO.h
14
IO.h
|
|
@ -60,12 +60,14 @@ private:
|
|||
CSampleRB m_txBuffer;
|
||||
CRSSIRB m_rssiBuffer;
|
||||
|
||||
arm_fir_instance_q15 m_rrcFilter;
|
||||
arm_fir_instance_q15 m_gaussianFilter;
|
||||
arm_fir_instance_q15 m_boxcarFilter;
|
||||
q15_t m_rrcState[70U]; // NoTaps + BlockSize - 1, 42 + 20 - 1 plus some spare
|
||||
q15_t m_gaussianState[40U]; // NoTaps + BlockSize - 1, 12 + 20 - 1 plus some spare
|
||||
q15_t m_boxcarState[30U]; // NoTaps + BlockSize - 1, 6 + 20 - 1 plus some spare
|
||||
arm_fir_instance_q15 m_rrcFilter;
|
||||
arm_fir_instance_q15 m_gaussianFilter;
|
||||
arm_fir_instance_q15 m_boxcarFilter;
|
||||
q15_t m_rrcState[70U]; // NoTaps + BlockSize - 1, 42 + 20 - 1 plus some spare
|
||||
q15_t m_gaussianState[40U]; // NoTaps + BlockSize - 1, 12 + 20 - 1 plus some spare
|
||||
q15_t m_boxcarState[30U]; // NoTaps + BlockSize - 1, 6 + 20 - 1 plus some spare
|
||||
arm_biquad_casd_df1_inst_q31 m_dcFilter;
|
||||
q31_t m_dcState[4];
|
||||
|
||||
bool m_pttInvert;
|
||||
q15_t m_rxLevel;
|
||||
|
|
|
|||
|
|
@ -98,8 +98,6 @@
|
|||
<Define name="HSE_VALUE=12000000"/>
|
||||
<Define name="STM32F4_PI"/>
|
||||
<Define name="ARDUINO_MODE_PINS"/>
|
||||
<Define name="SEND_RSSI_DATA"/>
|
||||
<Define name="SERIAL_REPEATER"/>
|
||||
</DefinedSymbols>
|
||||
</Compile>
|
||||
<Link useDefault="0">
|
||||
|
|
|
|||
4
Makefile
4
Makefile
|
|
@ -87,7 +87,7 @@ MCFLAGS=-mcpu=cortex-m4 -mthumb -mlittle-endian \
|
|||
# STM32F4 Discovery board:
|
||||
DEFS_DIS=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_DISCOVERY -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# Pi board:
|
||||
DEFS_PI=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_PI -DARDUINO_MODE_PINS -DSEND_RSSI_DATA -DSERIAL_REPEATER -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
DEFS_PI=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_PI -DARDUINO_MODE_PINS -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# STM32F4 Nucleo 446 board:
|
||||
DEFS_NUCLEO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_NUCLEO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
|
||||
|
|
@ -178,11 +178,13 @@ endif
|
|||
deploy-pi:
|
||||
ifneq ($(wildcard /usr/local/bin/stm32flash),)
|
||||
-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
|
||||
-/usr/local/bin/stm32ld /dev/ttyAMA0 57600 bin/outp.bin
|
||||
/usr/local/bin/stm32flash -v -w bin/outp.bin -g 0x0 -R -c /dev/ttyAMA0
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /usr/bin/stm32flash),)
|
||||
-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
|
||||
-/usr/bin/stm32ld /dev/ttyAMA0 57600 bin/outp.bin
|
||||
/usr/bin/stm32flash -v -w bin/outp.bin -g 0x0 -R -c /dev/ttyAMA0
|
||||
endif
|
||||
|
||||
|
|
|
|||
|
|
@ -52,7 +52,6 @@ extern "C" {
|
|||
/* ************* USART1 ***************** */
|
||||
#if defined(STM32F4_PI) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
|
||||
|
||||
volatile uint32_t intcount1;
|
||||
volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead1, TXSerialfifotail1;
|
||||
|
|
@ -139,7 +138,6 @@ void USART1_IRQHandler()
|
|||
}
|
||||
|
||||
USART_ClearITPendingBit(USART1, USART_IT_RXNE);
|
||||
intcount1++;
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(USART1, USART_IT_TXE)) {
|
||||
|
|
@ -245,7 +243,6 @@ void WriteUSART1(const uint8_t* data, uint16_t length)
|
|||
/* ************* USART2 ***************** */
|
||||
#if defined(STM32F4_NUCLEO)
|
||||
|
||||
volatile uint32_t intcount2;
|
||||
volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead2, TXSerialfifotail2;
|
||||
|
|
@ -332,7 +329,6 @@ void USART2_IRQHandler()
|
|||
}
|
||||
|
||||
USART_ClearITPendingBit(USART2, USART_IT_RXNE);
|
||||
intcount2++;
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(USART2, USART_IT_TXE)) {
|
||||
|
|
@ -438,7 +434,6 @@ void WriteUSART2(const uint8_t* data, uint16_t length)
|
|||
/* ************* USART3 ***************** */
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F4_PI)
|
||||
|
||||
volatile uint32_t intcount3;
|
||||
volatile uint8_t TXSerialfifo3[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo3[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead3, TXSerialfifotail3;
|
||||
|
|
@ -525,7 +520,6 @@ void USART3_IRQHandler()
|
|||
}
|
||||
|
||||
USART_ClearITPendingBit(USART3, USART_IT_RXNE);
|
||||
intcount3++;
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(USART3, USART_IT_TXE)) {
|
||||
|
|
@ -631,7 +625,6 @@ void WriteUSART3(const uint8_t* data, uint16_t length)
|
|||
/* ************* UART5 ***************** */
|
||||
#if !(defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
|
||||
|
||||
volatile uint32_t intcount5;
|
||||
volatile uint8_t TXSerialfifo5[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo5[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead5, TXSerialfifotail5;
|
||||
|
|
@ -718,7 +711,6 @@ void UART5_IRQHandler()
|
|||
}
|
||||
|
||||
USART_ClearITPendingBit(UART5, USART_IT_RXNE);
|
||||
intcount5++;
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(UART5, USART_IT_TXE)) {
|
||||
|
|
|
|||
Loading…
Reference in New Issue