mirror of https://github.com/g4klx/MMDVM.git
Merge pull request #308 from shawnchain/drcc_dvm_hhp_board_support
Add DRCC_DVM_HHP446 board support
This commit is contained in:
commit
8038ce9c9c
3
IOPins.h
3
IOPins.h
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@ -62,6 +62,9 @@
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#elif defined(DRCC_DVM_NQF)
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#include "pins/pins_f4_drcc_nqf.h"
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#elif defined(DRCC_DVM_HHP446)
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#include "pins/pins_f4_drcc_hhp446.h"
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#elif defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
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#include "pins/pins_f4_stm32eda.h"
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6
Makefile
6
Makefile
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@ -233,6 +233,12 @@ drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
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drcc_nqf: LDFLAGS+=$(LDFLAGS_F4)
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drcc_nqf: release_f4
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hhp446: GitVersion.h
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hhp446: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_HHP446
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hhp446: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_HHP446
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hhp446: LDFLAGS+=$(LDFLAGS_F4)
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hhp446: release_f4
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eda405: GitVersion.h
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eda405: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_405)
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eda405: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_405)
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@ -97,13 +97,13 @@ const uint8_t MMDVM_DEBUG5 = 0xF5U;
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#if defined(DRCC_DVM_NQF)
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#define HW_TYPE "MMDVM DRCC_DVM_NQF"
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#elif defined(STM32F4_RPT_HAT_TGO)
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#define HW_TYPE "MMDVM RPT_HAT_TGO"
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#elif defined(DRCC_DVM_HHP446)
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#define HW_TYPE "MMDVM DRCC_DVM_HHP(446)"
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#else
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#define HW_TYPE "MMDVM"
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#endif
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#define DESCRIPTION "20201214 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
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#define DESCRIPTION "20210101 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
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#if defined(GITVERSION)
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#define concat(h, a, b, c) h " " a " " b " GitID #" c ""
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@ -0,0 +1,143 @@
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/*
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* Copyright (C) 2019,2020 by BG5HHP
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef _PINS_F4_DRCC_HHP446_H
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#define _PINS_F4_DRCC_HHP446_H
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/*
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Pin definitions for DRCC_DVM BG5HHP F446 board rev1
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TX/PTT_LED PB12 output
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RX/COS_LED PB5 output
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STATUS_LED PB10 output
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COS_IN PB13 input
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DSTAR N/A
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DMR N/A
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YSF N/A
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P25 N/A
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NXDN N/A
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POCSAG N/A
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MDMR/BIT0 PB8 output
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MYSF/BIT1 PB9 output
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MDSTAR/BIT2 PB14 output
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MP25/BIT3 PB15 output Generic Mode Pins
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MNXDN N/A
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MPOCSAG N/A
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RX PA0 analog input
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RSSI PA1 analog input
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TX PA4 analog output
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EXT_CLK N/A
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UART1_TX PA9 output
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UART1_RX PA10 output Host Data Communication
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UART2_TX PA2 output
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UART2_RX PA3 output Nextion Data Communication
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I2C1_SCL PB6 output
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I2C1_SDA PB7 output OLED Data Communication as master
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*/
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#define PIN_COS GPIO_Pin_13
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#define PORT_COS GPIOB
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#define RCC_Per_COS RCC_AHB1Periph_GPIOB
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#define PIN_PTT GPIO_Pin_12
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#define PORT_PTT GPIOB
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#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
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#define PIN_COSLED GPIO_Pin_5
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#define PORT_COSLED GPIOB
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#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
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#define PIN_LED GPIO_Pin_10
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#define PORT_LED GPIOB
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#define RCC_Per_LED RCC_AHB1Periph_GPIOB
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#define PIN_TXLED GPIO_Pin_4
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#define PORT_TXLED GPIOB
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#define RCC_Per_TXLED RCC_AHB1Periph_GPIOB
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// #define PIN_P25 GPIO_Pin_3
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// #define PORT_P25 GPIOB
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// #define RCC_Per_P25 RCC_AHB1Periph_GPIOB
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// #define PIN_NXDN GPIO_Pin_10
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// #define PORT_NXDN GPIOA
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// #define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
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// #define PIN_POCSAG GPIO_Pin_12
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// #define PORT_POCSAG GPIOB
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// #define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
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// #define PIN_DSTAR GPIO_Pin_10
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// #define PORT_DSTAR GPIOB
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// #define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
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// #define PIN_DMR GPIO_Pin_4
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// #define PORT_DMR GPIOB
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// #define RCC_Per_DMR RCC_AHB1Periph_GPIOB
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// #define PIN_YSF GPIO_Pin_5
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// #define PORT_YSF GPIOB
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// #define RCC_Per_YSF RCC_AHB1Periph_GPIOB
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#if defined(MODE_PINS)
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#define PIN_MP25 GPIO_Pin_15
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#define PORT_MP25 GPIOB
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#define RCC_Per_MP25 RCC_AHB1Periph_GPIOB
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#define PIN_MDSTAR GPIO_Pin_9
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#define PORT_MDSTAR GPIOB
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#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOB
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#define PIN_MDMR GPIO_Pin_8
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#define PORT_MDMR GPIOB
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#define RCC_Per_MDMR RCC_AHB1Periph_GPIOB
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#define PIN_MYSF GPIO_Pin_14
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#define PORT_MYSF GPIOB
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#define RCC_Per_MYSF RCC_AHB1Periph_GPIOB
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#endif
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#define PIN_EXT_CLK GPIO_Pin_15
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#define SRC_EXT_CLK GPIO_PinSource15
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#define PORT_EXT_CLK GPIOA
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#define PIN_RX GPIO_Pin_0
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#define PIN_RX_CH ADC_Channel_0
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#define PORT_RX GPIOA
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#define RCC_Per_RX RCC_AHB1Periph_GPIOA
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#define PIN_RSSI GPIO_Pin_1
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#define PIN_RSSI_CH ADC_Channel_1
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#define PORT_RSSI GPIOA
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#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
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#define PIN_TX GPIO_Pin_4
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#define PIN_TX_CH DAC_Channel_1
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#define PORT_TX GPIOA
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#define RCC_Per_TX RCC_AHB1Periph_GPIOA
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#endif
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