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Author SHA1 Message Date
Jonathan Naylor 5ef05cb6c0 Merge branch 'FM' into boxcar_dstar_correlator_fm 2020-05-21 10:59:11 +01:00
Jonathan Naylor 4ed53348b0 Merge branch 'FM' into boxcar_dstar_correlator_fm 2020-05-14 13:42:25 +01:00
Jonathan Naylor 893d48256b Merge branch 'FM' into boxcar_dstar_correlator_fm 2020-05-13 12:04:31 +01:00
Jonathan Naylor 9f2ece50d9 Merge branch 'FM' into boxcar_dstar_correlator_fm 2020-05-13 10:32:33 +01:00
Jonathan Naylor a4166efa84 Merge branch 'FM' into boxcar_dstar_correlator_fm 2020-05-12 15:20:59 +01:00
Jonathan Naylor 3a807535fa Merge branch 'FM' into boxcar_dstar_correlator_fm 2020-05-06 11:35:27 +01:00
Jonathan Naylor 088d6b857c Merge branch 'FM' into boxcar_dstar_correlator_fm 2020-05-05 21:04:30 +01:00
Jonathan Naylor 1fb7b53b9b Merge branch 'FM' into boxcar_dstar_correlator_fm 2020-05-02 17:53:46 +01:00
Jonathan Naylor 8b0c87a1aa Merge branch 'FM' into boxcar_dstar_correlator_fm 2020-05-02 16:52:46 +01:00
Jonathan Naylor 4c7eab5720 Merge branch 'FM' into boxcar_dstar_correlator_fm 2020-05-01 18:48:27 +01:00
Jonathan Naylor e9c1ced5d9 Merge branch 'FM' into boxcar_dstar_correlator_fm 2020-04-29 21:52:28 +01:00
Jonathan Naylor 1ffee17475 Merge branch 'FM' into boxcar_dstar_correlator_fm 2020-04-29 21:42:10 +01:00
Jonathan Naylor 1214fb0590 Merge branch 'master' into boxcar_dstar_correlator 2020-04-29 21:30:19 +01:00
Jonathan Naylor 69f2d82082 Merge branch 'master' into boxcar_dstar_correlator 2019-07-15 09:12:07 +01:00
Jonathan Naylor 5f7efa8bcb Merge branch 'boxcar' into boxcar_dstar_correlator 2019-05-19 13:27:42 +01:00
Jonathan Naylor c06a32af07 Merge branch 'master' into boxcar 2019-05-19 13:26:55 +01:00
Jonathan Naylor 1d8f82a47c Merge branch 'master' into boxcar_dstar_correlator 2019-01-31 08:11:04 +00:00
Jonathan Naylor b40701a8e6 Merge branch 'master' into boxcar 2019-01-31 08:10:38 +00:00
Jonathan Naylor 4add1453a4 Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-10-31 14:51:56 +00:00
Jonathan Naylor 2f05727b25 Merge branch 'master' into dstar_correlator 2018-10-31 14:51:20 +00:00
Jonathan Naylor 608a10d159 Merge branch 'master' into boxcar 2018-10-31 14:50:47 +00:00
Jonathan Naylor eb51c9dd17 Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-10-14 17:27:24 +01:00
Jonathan Naylor 7519429c43 Merge branch 'master' into dstar_correlator 2018-10-14 17:26:24 +01:00
Jonathan Naylor 7ef6708d9d Merge branch 'master' into boxcar 2018-10-14 17:21:20 +01:00
Jonathan Naylor 7bfe400c8a Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-09-18 09:30:24 +01:00
Jonathan Naylor a0706c9fd4 Merge branch 'master' into boxcar 2018-09-18 09:29:47 +01:00
Jonathan Naylor b0e2867663 Merge branch 'master' into dstar_correlator 2018-09-18 09:29:04 +01:00
Jonathan Naylor 63165a0f9f Merge branch 'boxcar' into boxcar_dstar_correlator 2018-09-02 13:14:43 +01:00
Jonathan Naylor cb25a64a4b Merge branch 'master' into dstar_correlator 2018-09-02 13:14:02 +01:00
Jonathan Naylor 21cd848064 Merge branch 'master' into boxcar 2018-09-02 13:12:50 +01:00
Jonathan Naylor e0f2206825 Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-07-24 19:15:05 +01:00
Jonathan Naylor 2099096acb Merge branch 'master' into dstar_correlator 2018-07-24 19:14:47 +01:00
Jonathan Naylor a69d1adaf0 Merge branch 'master' into boxcar 2018-07-24 19:14:27 +01:00
Jonathan Naylor 59cbc6846d Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-07-23 21:54:54 +01:00
Jonathan Naylor 51b0be7e2e Merge branch 'master' into dstar_correlator 2018-07-23 21:54:37 +01:00
Jonathan Naylor 2eff3090a9 Merge branch 'master' into boxcar 2018-07-23 21:54:22 +01:00
Jonathan Naylor 748d5823ef Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-07-23 17:49:13 +01:00
Jonathan Naylor d30d768bdc Merge branch 'master' into dstar_correlator 2018-07-23 17:48:55 +01:00
Jonathan Naylor ce51b8daa8 Merge branch 'master' into boxcar 2018-07-23 17:48:34 +01:00
Jonathan Naylor fcd4357bd9 Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-07-19 18:22:41 +01:00
Jonathan Naylor 7107625b12 Merge branch 'master' into dstar_correlator 2018-07-19 18:22:18 +01:00
Jonathan Naylor aa70be0973 Merge branch 'master' into boxcar 2018-07-19 18:21:57 +01:00
Jonathan Naylor fe5e9bf4ea Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-07-13 08:11:14 +01:00
Jonathan Naylor 554094540d Merge branch 'master' into dstar_correlator 2018-07-13 08:10:52 +01:00
Jonathan Naylor cadbfaa546 Merge branch 'master' into boxcar 2018-07-13 08:10:34 +01:00
Jonathan Naylor 1d7b351511 Merge branch 'master' into boxcar_dstar_correlator 2018-07-05 18:45:34 +01:00
Jonathan Naylor ddaac983a4 Merge branch 'master' into dstar_correlator 2018-07-05 18:45:17 +01:00
Jonathan Naylor bd413d2e05 Merge branch 'master' into boxcar 2018-07-05 18:45:01 +01:00
Jonathan Naylor 06b5a08b6d Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-07-05 18:33:01 +01:00
Jonathan Naylor 4b3736a189 Merge branch 'master' into dstar_correlator 2018-07-05 18:32:27 +01:00
Jonathan Naylor 7ab774d941 Merge branch 'master' into boxcar 2018-07-05 18:31:46 +01:00
Jonathan Naylor 700190db9a Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-06-04 20:52:18 +01:00
Jonathan Naylor fd5822df19 Merge branch 'master' into dstar_correlator 2018-06-04 20:51:51 +01:00
Jonathan Naylor 1a1f721b3f Merge branch 'master' into boxcar 2018-06-04 20:51:25 +01:00
Jonathan Naylor d31b71fab1 Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-05-15 18:33:51 +01:00
Jonathan Naylor 508c3000fa Merge branch 'master' into dstar_correlator 2018-05-15 18:33:22 +01:00
Jonathan Naylor bed9665b3a Merge branch 'master' into boxcar 2018-05-15 18:32:55 +01:00
Jonathan Naylor ae5328142e Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-05-14 18:46:50 +01:00
Jonathan Naylor fcd1012ff4 Merge branch 'master' into dstar_correlator 2018-05-14 18:46:11 +01:00
Jonathan Naylor 056016c022 Merge branch 'master' into boxcar 2018-05-14 18:45:54 +01:00
Jonathan Naylor 8ad8a18c0e Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-04-30 18:00:42 +01:00
Jonathan Naylor f2e9f2d753 Merge branch 'master' into dstar_correlator 2018-04-30 18:00:13 +01:00
Jonathan Naylor a582cbe1e3 Merge branch 'master' into boxcar 2018-04-30 17:59:33 +01:00
Jonathan Naylor 355f7d0152 Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-04-17 22:34:21 +01:00
Jonathan Naylor 7454a08e4a Merge branch 'master' into boxcar 2018-04-17 22:33:56 +01:00
Jonathan Naylor 96dc2282a8 Merge branch 'master' into dstar_correlator 2018-04-17 22:33:28 +01:00
Jonathan Naylor 8a646f36d4 Merge branch 'master' into boxcar_dstar_correlator 2018-03-27 21:37:28 +01:00
Jonathan Naylor 00891dfa2f Merge branch 'master' into dstar_correlator 2018-03-27 21:36:52 +01:00
Jonathan Naylor 0fc3e8182d Merge branch 'master' into boxcar 2018-03-27 21:36:30 +01:00
Jonathan Naylor 95c1cf1f6c Merge branch 'master' into boxcar_dstar_correlator 2018-03-22 07:11:36 +00:00
Jonathan Naylor 335fba3930 Merge branch 'master' into boxcar 2018-03-22 07:11:13 +00:00
Jonathan Naylor 0bfc59b2d7 Merge branch 'master' into dstar_correlator 2018-03-22 07:10:50 +00:00
Jonathan Naylor 8409d7e425 Merge branch 'master' into boxcar_dstar_correlator 2018-03-07 20:06:11 +00:00
Jonathan Naylor 374fae594c Merge branch 'master' into boxcar 2018-03-07 20:05:39 +00:00
Jonathan Naylor 387221665f Merge branch 'master' into dstar_correlator 2018-03-07 20:05:13 +00:00
Jonathan Naylor 3bef5acb6e Merge branch 'boxcar' into boxcar_dstar_correlator 2018-02-27 18:59:04 +00:00
Jonathan Naylor 24ac2b902d Improve efficiency slightly. 2018-02-27 18:58:31 +00:00
Jonathan Naylor 605f079075 Merge branch 'boxcar' into boxcar_dstar_correlator 2018-02-26 20:36:17 +00:00
Jonathan Naylor dbd84d7803 Merge branch 'master' into boxcar 2018-02-26 20:35:43 +00:00
Jonathan Naylor 8da0ea7740 Merge branch 'master' into dstar_correlator 2018-02-26 19:55:53 +00:00
Jonathan Naylor 6098ac3e6d Merge branch 'boxcar' into boxcar_dstar_correlator 2018-01-11 07:29:04 +00:00
Jonathan Naylor c1f12705a9 Merge branch 'master' into boxcar 2018-01-11 07:28:42 +00:00
Jonathan Naylor 46035fa212 Merge branch 'master' into dstar_correlator 2018-01-11 07:28:15 +00:00
Jonathan Naylor 373e1893bc Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-01-08 18:24:16 +00:00
Jonathan Naylor aa52b03bc2 Merge branch 'master' into dstar_correlator 2018-01-08 18:23:55 +00:00
Jonathan Naylor 6192a88b98 Merge branch 'master' into boxcar 2018-01-08 18:23:07 +00:00
Jonathan Naylor 017df518a6 Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-01-01 13:36:34 +00:00
Jonathan Naylor cf849ccf65 Merge branch 'master' into dstar_correlator 2018-01-01 13:36:03 +00:00
Jonathan Naylor 8651e3a77b Merge branch 'master' into boxcar 2018-01-01 13:35:27 +00:00
Jonathan Naylor 83dd360062 Merge pull request #128 from F4FXL/dstar_correlator
Fixes erroneous end sync seen on station having QSB
2017-12-16 21:03:53 +00:00
Jonathan Naylor d298a5bde5 Merge pull request #129 from F4FXL/boxcar_dstar_correlator
Fixes erroneous end sync on stations having QSB
2017-12-16 21:03:38 +00:00
F4FXL 925263a216 Fixes erroneous end sync on stations having QSB 2017-12-16 09:04:31 +01:00
F4FXL 551aa3bb20 Fixes erroneous end of frame seen on station having QSB 2017-12-16 09:02:15 +01:00
Jonathan Naylor c62a686d30 Merge branch 'master' into boxcar_dstar_correlator 2017-11-06 09:33:59 +00:00
Jonathan Naylor cb78220156 Merge branch 'master' into dstar_correlator 2017-11-06 09:33:44 +00:00
Jonathan Naylor cb00f4aba7 Merge branch 'master' into boxcar 2017-11-06 09:33:22 +00:00
Jonathan Naylor 750ac02b7e Merge branch 'boxcar' into boxcar_dstar_correlator 2017-10-30 14:07:07 +00:00
Jonathan Naylor 22297c613c Merge branch 'master' into dstar_correlator 2017-10-30 14:06:42 +00:00
Jonathan Naylor 91a87f4581 Merge branch 'master' into boxcar 2017-10-30 14:06:06 +00:00
Jonathan Naylor 4ccc004de3 Merge branch 'master' into boxcar_dstar_correlator 2017-10-28 12:46:40 +01:00
Jonathan Naylor bf1de4f307 Merge branch 'master' into boxcar 2017-10-28 12:46:19 +01:00
Jonathan Naylor 24741a11c6 Merge branch 'master' into dstar_correlator 2017-10-28 12:45:40 +01:00
Jonathan Naylor 293a5b6912 Merge branch 'master' into dstar_correlator 2017-10-15 13:21:50 +01:00
Jonathan Naylor 442627dc35 Merge branch 'master' into boxcar_dstar_correlator 2017-10-15 13:21:16 +01:00
Jonathan Naylor 5f8a323dde Merge branch 'master' into boxcar 2017-10-15 13:20:52 +01:00
Jonathan Naylor 11809a6baf Merge branch 'master' into boxcar_dstar_correlator 2017-10-02 16:35:46 +01:00
Jonathan Naylor 7e8d018242 Merge branch 'master' into dstar_correlator 2017-10-02 16:35:30 +01:00
Jonathan Naylor 436ca1d851 Merge branch 'master' into boxcar 2017-10-02 16:35:14 +01:00
Jonathan Naylor 1162354c43 Merge branch 'boxcar' into boxcar_dstar_correlator 2017-09-27 09:22:20 +01:00
Jonathan Naylor 3b84cf85c3 Merge branch 'master' into dstar_correlator 2017-09-27 09:21:56 +01:00
Jonathan Naylor ec34eb4a64 Merge branch 'master' into boxcar 2017-09-27 09:21:33 +01:00
Jonathan Naylor 9a5f932e6a Merge branch 'master' into boxcar_dstar_correlator 2017-09-10 14:41:12 +01:00
Jonathan Naylor ef8f5bb80b Merge branch 'master' into dstar_correlator 2017-09-10 14:40:40 +01:00
Jonathan Naylor b76e95b540 Merge branch 'master' into boxcar 2017-09-10 14:39:51 +01:00
Jonathan Naylor 0231ce38d5 Merge branch 'master' into boxcar_dstar_correlator 2017-09-07 09:03:48 +01:00
Jonathan Naylor 037810b23b Merge branch 'master' into dstar_correlator 2017-09-07 09:03:34 +01:00
Jonathan Naylor b017e75787 Merge branch 'master' into boxcar 2017-09-07 09:03:17 +01:00
Jonathan Naylor 8ff924e376 Merge branch 'master' into boxcar_dstar_correlator 2017-08-31 08:39:53 +01:00
Jonathan Naylor f7de632cd5 Merge branch 'master' into dstar_correlator 2017-08-31 08:39:36 +01:00
Jonathan Naylor 6221386873 Merge branch 'master' into boxcar 2017-08-31 08:39:15 +01:00
Jonathan Naylor cc3c676082 Merge branch 'master' into boxcar_dstar_correlator 2017-08-30 09:18:31 +01:00
Jonathan Naylor a554a86202 Merge branch 'master' into dstar_correlator 2017-08-30 09:18:11 +01:00
Jonathan Naylor 3c1b41c03f Merge branch 'master' into boxcar 2017-08-30 09:17:50 +01:00
Jonathan Naylor 4eda2b61f5 Merge pull request #109 from juribeparada/dstar_correlator
Adding support for STM32F767 dstar_correlator branch
2017-08-29 09:17:09 +01:00
Jonathan Naylor f06bd5125b Merge branch 'dstar_correlator' into dstar_correlator 2017-08-29 09:17:01 +01:00
Jonathan Naylor 84df334f52 Merge pull request #110 from juribeparada/boxcar_dstar_correlator
Adding support for STM32F767 boxcar_dstar_correlator branch
2017-08-29 09:15:45 +01:00
Jonathan Naylor b88a3d02bf Merge branch 'boxcar' into boxcar_dstar_correlator 2017-08-29 08:55:12 +01:00
Jonathan Naylor a0afe0e54f Merge branch 'master' into dstar_correlator 2017-08-29 08:50:44 +01:00
Jonathan Naylor 7e85a64a41 Remove compiler warning. 2017-08-29 08:37:48 +01:00
Jonathan Naylor c820b22524 Merge pull request #108 from juribeparada/boxcar
Adding support for STM32F767 boxcar branch
2017-08-29 07:24:25 +01:00
Andy CA6JAU 7fae32042f Fix typo 2017-08-28 23:07:30 -03:00
Andy CA6JAU edbf2b3ec0 Fix typo 2017-08-28 23:02:28 -03:00
Andy CA6JAU ac31999d9d Adding support for STM32F767 boxcar_dstar_correlator branch 2017-08-28 22:59:37 -03:00
Andy CA6JAU 2833ed2d2e Adding support for STM32F767 dstar_correlator branch 2017-08-28 22:42:26 -03:00
Andy CA6JAU ebd86df3ef Fix Config.h 2017-08-28 21:25:40 -03:00
Andy CA6JAU 918403c399 Adding support for STM32F767 boxcar branch 2017-08-28 21:18:06 -03:00
Andy CA6JAU 7c243af5da Merge branch 'boxcar' of https://github.com/g4klx/MMDVM into boxcar 2017-08-28 20:54:31 -03:00
Jonathan Naylor 2b502848c1 Adding watchdog to host serial port. 2017-08-20 16:07:28 +01:00
Jonathan Naylor d91a155084 Add watchdog to host serial port. 2017-08-20 15:59:48 +01:00
Jonathan Naylor 7bb042a6ca Adding watchdog to the host serial port. 2017-08-20 15:52:52 +01:00
Jonathan Naylor 14ce682210 Add optional TX DC offset. 2017-08-20 12:23:51 +01:00
Jonathan Naylor dc9d83f9f0 Add optional TX DC offset. 2017-08-20 12:19:04 +01:00
Jonathan Naylor fbd9c4d18b Add an optional TX DC offset. 2017-08-20 12:14:58 +01:00
Jonathan Naylor 76312c7bb9 Re-add the const qualifiers. 2017-08-18 11:04:06 +01:00
Jonathan Naylor 2a5690fd4d Re-add the const qualifiers. 2017-08-18 11:02:33 +01:00
Jonathan Naylor 58966406da Re-add the const qualifiers. 2017-08-18 11:00:25 +01:00
Jonathan Naylor 161736925e Optimise the DC offset processing. 2017-08-18 10:55:32 +01:00
Jonathan Naylor 9398d03e0b Optimised the DC offset processing. 2017-08-18 10:48:23 +01:00
Jonathan Naylor e707391a5e Optimise the DC offset removal. 2017-08-18 10:40:34 +01:00
Andy CA6JAU cff5a58bc7 Merge branch 'boxcar' of https://github.com/g4klx/MMDVM into boxcar 2017-08-13 17:19:50 -03:00
Jonathan Naylor 51577efd79 Merge branch 'master' into boxcar 2017-08-13 18:51:41 +01:00
Jonathan Naylor 064de9fef7 Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2017-08-13 18:41:41 +01:00
Jonathan Naylor c43616f3c5 Enhancements suggested by IZ1MLT. 2017-08-13 18:40:05 +01:00
Jonathan Naylor e6adc0a296 Forgot the Q31 to Q15 conversion. 2017-08-02 20:38:46 +01:00
Jonathan Naylor 13f340917e Merge branch 'boxcar' into boxcar_dstar_correlator 2017-08-02 20:36:57 +01:00
Jonathan Naylor f195fd6f66 Merge branch 'master' into dstar_correlator 2017-08-02 19:39:15 +01:00
Jonathan Naylor 469be87dc3 Merge branch 'master' into boxcar 2017-07-31 21:58:16 +01:00
Jonathan Naylor 7f8a0a71f5 Merge branch 'boxcar' into boxcar_dstar_correlator 2017-07-20 21:44:39 +01:00
Jonathan Naylor 16a43db79a Further optimisation of the calculated values. 2017-07-17 21:26:39 +01:00
Jonathan Naylor a033b2db7b Adjust values slightly. 2017-07-17 21:16:24 +01:00
Jonathan Naylor 88ab312da0 Merge branch 'master' into dstar_correlator 2017-07-16 19:22:56 +01:00
Jonathan Naylor 8ce38eec9a Merge branch 'master' into boxcar 2017-07-16 19:01:54 +01:00
Jonathan Naylor 49383ca921 Get the RSSI working properly and simplify calculations. 2017-07-16 18:46:09 +01:00
Jonathan Naylor ed07175437 Tweak the settings. 2017-07-11 21:10:03 +01:00
Jonathan Naylor c8208ab1df Added extra debugging and updated position calculations. 2017-07-10 19:58:50 +01:00
Jonathan Naylor 68f0fa8132 Merge branch 'master' into boxcar 2017-07-10 19:45:47 +01:00
Andy CA6JAU 954131f73c Merge branch 'boxcar' of https://github.com/g4klx/MMDVM into boxcar 2017-07-06 19:55:34 -04:00
Andy CA6JAU 06ec4b79a5 Merge remote-tracking branch 'g4klx/master' into boxcar 2017-07-06 19:55:01 -04:00
Jonathan Naylor 90797696dd First compileable version, but untested. 2017-07-06 20:28:20 +01:00
Jonathan Naylor de0aed2d2b Increase amplitude of the boxcar filter. 2017-07-06 20:09:57 +01:00
Jonathan Naylor 4b253f888d Increase the boxcar level. 2017-07-03 20:29:52 +01:00
Jonathan Naylor c22f360ed1 More changes to the D-Star RX. 2017-07-03 20:26:24 +01:00
Jonathan Naylor 5d74c2f7bf First changes for correlation of D-Star. 2017-07-02 17:57:17 +01:00
Jonathan Naylor 316085f2a6 Try the boxcar filter on all modes. 2017-07-02 17:08:45 +01:00
12 changed files with 436 additions and 366 deletions
+1 -1
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@@ -24,7 +24,7 @@
const unsigned int BUFFER_LENGTH = 200U;
const uint32_t PLLMAX = 0x10000U;
const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_SYMBOL_LENGTH;
const uint32_t INC = PLLINC / 32U;
// D-Star bit order version of 0x55 0x2D 0x16
+37 -17
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2015,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,30 +19,50 @@
#if !defined(DSTARDEFINES_H)
#define DSTARDEFINES_H
const unsigned int DSTAR_RADIO_BIT_LENGTH = 5U; // At 24 kHz sample rate
const unsigned int DSTAR_RADIO_SYMBOL_LENGTH = 5U; // At 24 kHz sample rate
const unsigned int DSTAR_HEADER_LENGTH_BYTES = 41U;
const unsigned int DSTAR_HEADER_LENGTH_BITS = DSTAR_HEADER_LENGTH_BYTES * 8U;
const unsigned int DSTAR_HEADER_LENGTH_BYTES = 41U;
const unsigned int DSTAR_FEC_SECTION_LENGTH_BYTES = 83U;
const unsigned int DSTAR_FEC_SECTION_LENGTH_BITS = 660U;
const unsigned int DSTAR_FEC_SECTION_LENGTH_BYTES = 83U;
const unsigned int DSTAR_FEC_SECTION_LENGTH_SYMBOLS = 660U;
const unsigned int DSTAR_FEC_SECTION_LENGTH_SAMPLES = DSTAR_FEC_SECTION_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
const unsigned int DSTAR_DATA_LENGTH_BYTES = 12U;
const unsigned int DSTAR_DATA_LENGTH_BITS = DSTAR_DATA_LENGTH_BYTES * 8U;
const unsigned int DSTAR_DATA_LENGTH_BYTES = 12U;
const unsigned int DSTAR_DATA_LENGTH_SYMBOLS = DSTAR_DATA_LENGTH_BYTES * 8U;
const unsigned int DSTAR_DATA_LENGTH_SAMPLES = DSTAR_DATA_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
const uint8_t DSTAR_EOT_BYTES[] = {0x55, 0x55, 0x55, 0x55, 0xC8, 0x7A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
const unsigned int DSTAR_EOT_LENGTH_BYTES = 6U;
const unsigned int DSTAR_EOT_LENGTH_BITS = DSTAR_EOT_LENGTH_BYTES * 8U;
const unsigned int DSTAR_END_SYNC_LENGTH_BYTES = 6U;
const unsigned int DSTAR_END_SYNC_LENGTH_BITS = DSTAR_END_SYNC_LENGTH_BYTES * 8U;
const uint8_t DSTAR_DATA_SYNC_LENGTH_BYTES = 3U;
const uint8_t DSTAR_DATA_SYNC_LENGTH_BITS = DSTAR_DATA_SYNC_LENGTH_BYTES * 8U;
const unsigned int DSTAR_FRAME_SYNC_LENGTH_BYTES = 3U;
const unsigned int DSTAR_FRAME_SYNC_LENGTH_SYMBOLS = DSTAR_FRAME_SYNC_LENGTH_BYTES * 8U;
const unsigned int DSTAR_FRAME_SYNC_LENGTH_SAMPLES = DSTAR_FRAME_SYNC_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
const uint8_t DSTAR_DATA_SYNC_BYTES[] = {0x9E, 0x8D, 0x32, 0x88, 0x26, 0x1A, 0x3F, 0x61, 0xE8, 0x55, 0x2D, 0x16};
const unsigned int DSTAR_DATA_SYNC_LENGTH_BYTES = 3U;
const unsigned int DSTAR_DATA_SYNC_LENGTH_SYMBOLS = DSTAR_DATA_SYNC_LENGTH_BYTES * 8U;
const unsigned int DSTAR_DATA_SYNC_LENGTH_SAMPLES = DSTAR_DATA_SYNC_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
const uint8_t DSTAR_SLOW_DATA_TYPE_TEXT = 0x40U;
const uint8_t DSTAR_SLOW_DATA_TYPE_HEADER = 0x50U;
const uint8_t DSTAR_DATA_SYNC_BYTES[] = {0x9E, 0x8D, 0x32, 0x88, 0x26, 0x1A, 0x3F, 0x61, 0xE8, 0x55, 0x2D, 0x16};
const uint8_t DSTAR_SCRAMBLER_BYTES[] = {0x70U, 0x4FU, 0x93U};
// D-Star bit order version of 0x55 0x6E 0x0A
const uint32_t DSTAR_FRAME_SYNC_DATA = 0x00557650U;
const uint32_t DSTAR_FRAME_SYNC_MASK = 0x00FFFFFFU;
const bool DSTAR_FRAME_SYNC_SYMBOLS[] = {false, true, false, true, false, true, false, true, false, true, true, true, false, true, true, false, false, true, false, true, false, false, false, false};
// D-Star bit order version of 0x55 0x2D 0x16
const uint32_t DSTAR_DATA_SYNC_DATA = 0x00AAB468U;
const uint32_t DSTAR_DATA_SYNC_MASK = 0x00FFFFFFU;
const bool DSTAR_DATA_SYNC_SYMBOLS[] = {true, false, true, false, true, false, true, false, true, false, true, true, false, true, false, false, false, true, true, false, true, false, false, false};
// D-Star bit order version of 0x55 0x55 0xC8 0x7A
const uint32_t DSTAR_END_SYNC_DATA = 0xAAAA135EU;
const uint32_t DSTAR_END_SYNC_MASK = 0xFFFFFFFFU;
const uint8_t DSTAR_END_SYNC_BYTES[] = {0x55, 0x55, 0x55, 0x55, 0xC8, 0x7A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
const uint8_t DSTAR_SLOW_DATA_TYPE_TEXT = 0x40U;
const uint8_t DSTAR_SLOW_DATA_TYPE_HEADER = 0x50U;
const uint8_t DSTAR_SCRAMBLER_BYTES[] = {0x70U, 0x4FU, 0x93U};
#endif
+238 -137
View File
@@ -22,18 +22,12 @@
#include "DStarRX.h"
#include "Utils.h"
const unsigned int BUFFER_LENGTH = 200U;
const uint32_t PLLMAX = 0x10000U;
const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
const uint32_t INC = PLLINC / 32U;
const unsigned int MAX_SYNC_BITS = 100U * DSTAR_DATA_LENGTH_BITS;
const unsigned int MAX_FRAMES = 150U;
// D-Star bit order version of 0x55 0x55 0x6E 0x0A
const uint32_t FRAME_SYNC_DATA = 0x00557650U;
const uint32_t FRAME_SYNC_MASK = 0x00FFFFFFU;
const uint8_t FRAME_SYNC_ERRS = 2U;
const uint8_t FRAME_SYNC_ERRS = 1U;
// D-Star bit order version of 0x55 0x2D 0x16
const uint32_t DATA_SYNC_DATA = 0x00AAB468U;
@@ -237,14 +231,24 @@ const uint16_t CCITT_TABLE[] = {
0xf78fU, 0xe606U, 0xd49dU, 0xc514U, 0xb1abU, 0xa022U, 0x92b9U, 0x8330U,
0x7bc7U, 0x6a4eU, 0x58d5U, 0x495cU, 0x3de3U, 0x2c6aU, 0x1ef1U, 0x0f78U};
const uint16_t NOENDPTR = 9999U;
CDStarRX::CDStarRX() :
m_pll(0U),
m_prev(false),
m_rxState(DSRXS_NONE),
m_patternBuffer(0x00U),
m_rxBuffer(),
m_rxBufferBits(0U),
m_dataBits(0U),
m_bitBuffer(),
m_headerBuffer(),
m_dataBuffer(),
m_bitPtr(0U),
m_headerPtr(0U),
m_dataPtr(0U),
m_startPtr(NOENDPTR),
m_syncPtr(NOENDPTR),
m_minSyncPtr(NOENDPTR),
m_maxSyncPtr(NOENDPTR),
m_maxFrameCorr(0),
m_maxDataCorr(0),
m_frameCount(0U),
m_countdown(0U),
m_mar(0U),
m_pathMetric(),
m_pathMemory0(),
@@ -259,14 +263,20 @@ m_rssiCount(0U)
void CDStarRX::reset()
{
m_pll = 0U;
m_prev = false;
m_rxState = DSRXS_NONE;
m_patternBuffer = 0x00U;
m_rxBufferBits = 0U;
m_dataBits = 0U;
m_rssiAccum = 0U;
m_rssiCount = 0U;
m_rxState = DSRXS_NONE;
m_headerPtr = 0U;
m_dataPtr = 0U;
m_bitPtr = 0U;
m_maxFrameCorr = 0;
m_maxDataCorr = 0;
m_startPtr = NOENDPTR;
m_syncPtr = NOENDPTR;
m_minSyncPtr = NOENDPTR;
m_maxSyncPtr = NOENDPTR;
m_frameCount = 0U;
m_countdown = 0U;
m_rssiAccum = 0U;
m_rssiCount = 0U;
}
void CDStarRX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t length)
@@ -275,125 +285,117 @@ void CDStarRX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t lengt
m_rssiAccum += rssi[i];
m_rssiCount++;
bool bit = samples[i] < 0;
q15_t sample = samples[i];
if (bit != m_prev) {
if (m_pll < (PLLMAX / 2U))
m_pll += INC;
else
m_pll -= INC;
m_bitBuffer[m_bitPtr] <<= 1;
if (sample < 0)
m_bitBuffer[m_bitPtr] |= 0x01U;
m_dataBuffer[m_dataPtr] = sample;
switch (m_rxState) {
case DSRXS_HEADER:
processHeader(sample);
break;
case DSRXS_DATA:
processData();
break;
default:
processNone(sample);
break;
}
m_prev = bit;
m_dataPtr++;
if (m_dataPtr >= DSTAR_DATA_LENGTH_SAMPLES)
m_dataPtr = 0U;
m_pll += PLLINC;
if (m_pll >= PLLMAX) {
m_pll -= PLLMAX;
switch (m_rxState) {
case DSRXS_NONE:
processNone(bit);
break;
case DSRXS_HEADER:
processHeader(bit);
break;
case DSRXS_DATA:
processData(bit);
break;
default:
break;
}
}
m_bitPtr++;
if (m_bitPtr >= DSTAR_RADIO_SYMBOL_LENGTH)
m_bitPtr = 0U;
}
}
void CDStarRX::processNone(bool bit)
void CDStarRX::processNone(q15_t sample)
{
m_patternBuffer <<= 1;
if (bit)
m_patternBuffer |= 0x01U;
// Fuzzy matching of the frame sync sequence
if (countBits32((m_patternBuffer & FRAME_SYNC_MASK) ^ FRAME_SYNC_DATA) <= FRAME_SYNC_ERRS) {
DEBUG1("DStarRX: found frame sync in None");
::memset(m_rxBuffer, 0x00U, DSTAR_FEC_SECTION_LENGTH_BYTES);
m_rxBufferBits = 0U;
bool ret = correlateFrameSync();
if (ret) {
m_countdown = 5U;
m_headerBuffer[m_headerPtr] = sample;
m_headerPtr++;
m_rssiAccum = 0U;
m_rssiCount = 0U;
m_rxState = DSRXS_HEADER;
return;
}
// Exact matching of the data sync bit sequence
if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) == 0U) {
// Fuzzy matching of the data sync bit sequence
ret = correlateDataSync();
if (ret) {
DEBUG1("DStarRX: found data sync in None");
io.setDecode(true);
io.setADCDetection(true);
// Suppress RSSI on the dummy sync message
m_rssiAccum = 0U;
m_rssiCount = 0U;
::memcpy(m_rxBuffer, DSTAR_DATA_SYNC_BYTES, DSTAR_DATA_LENGTH_BYTES);
writeRSSIData(m_rxBuffer);
::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
m_rxBufferBits = 0U;
m_dataBits = MAX_SYNC_BITS;
m_rxState = DSRXS_DATA;
return;
m_rxState = DSRXS_DATA;
}
}
void CDStarRX::processHeader(bool bit)
void CDStarRX::processHeader(q15_t sample)
{
m_patternBuffer <<= 1;
if (bit)
m_patternBuffer |= 0x01U;
if (m_countdown > 0U) {
correlateFrameSync();
m_countdown--;
}
WRITE_BIT2(m_rxBuffer, m_rxBufferBits, bit);
m_rxBufferBits++;
m_headerBuffer[m_headerPtr] = sample;
m_headerPtr++;
// A full FEC header
if (m_rxBufferBits == DSTAR_FEC_SECTION_LENGTH_BITS) {
// Process the scrambling, interleaving and FEC, then return if the chcksum was correct
unsigned char header[DSTAR_HEADER_LENGTH_BYTES];
bool ok = rxHeader(m_rxBuffer, header);
if (ok) {
if (m_headerPtr == (DSTAR_FEC_SECTION_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH)) {
uint8_t buffer[DSTAR_FEC_SECTION_LENGTH_BYTES];
samplesToBits(m_headerBuffer, DSTAR_RADIO_SYMBOL_LENGTH, DSTAR_FEC_SECTION_LENGTH_SYMBOLS, buffer, DSTAR_FEC_SECTION_LENGTH_SAMPLES);
// Process the scrambling, interleaving and FEC, then return true if the chcksum was correct
uint8_t header[DSTAR_HEADER_LENGTH_BYTES];
bool ok = rxHeader(buffer, header);
if (!ok) {
// The checksum failed, return to looking for syncs
m_rxState = DSRXS_NONE;
m_maxFrameCorr = 0;
m_maxDataCorr = 0;
} else {
io.setDecode(true);
io.setADCDetection(true);
writeRSSIHeader(header);
::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
m_rxBufferBits = 0U;
m_rxState = DSRXS_DATA;
m_dataBits = MAX_SYNC_BITS;
} else {
// The checksum failed, return to looking for syncs
m_rxState = DSRXS_NONE;
}
}
// Ready to start the first data section
if (m_headerPtr == (DSTAR_FEC_SECTION_LENGTH_SAMPLES + 2U * DSTAR_RADIO_SYMBOL_LENGTH)) {
m_frameCount = 0U;
m_dataPtr = 0U;
m_startPtr = 476U;
m_syncPtr = 471U;
m_maxSyncPtr = 472U;
m_minSyncPtr = 470U;
DEBUG5("DStarRX: calc start/sync/max/min", m_startPtr, m_syncPtr, m_maxSyncPtr, m_minSyncPtr);
m_rxState = DSRXS_DATA;
}
}
void CDStarRX::processData(bool bit)
void CDStarRX::processData()
{
m_patternBuffer <<= 1;
if (bit)
m_patternBuffer |= 0x01U;
WRITE_BIT2(m_rxBuffer, m_rxBufferBits, bit);
m_rxBufferBits++;
// Fuzzy matching of the end frame sequences
if (countBits32((m_patternBuffer & END_SYNC_MASK) ^ END_SYNC_DATA) <= END_SYNC_ERRS) {
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_END_SYNC_MASK) ^ DSTAR_END_SYNC_DATA) <= END_SYNC_ERRS) {
DEBUG1("DStarRX: Found end sync in Data");
io.setDecode(false);
@@ -401,35 +403,24 @@ void CDStarRX::processData(bool bit)
serial.writeDStarEOT();
m_maxFrameCorr = 0;
m_maxDataCorr = 0;
m_rxState = DSRXS_NONE;
return;
}
// Fuzzy matching of the data sync bit sequence
bool syncSeen = false;
if (m_rxBufferBits >= (DSTAR_DATA_LENGTH_BITS - 3U)) {
if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) <= DATA_SYNC_ERRS) {
m_rxBufferBits = DSTAR_DATA_LENGTH_BITS;
m_dataBits = MAX_SYNC_BITS;
syncSeen = true;
}
if (m_minSyncPtr < m_maxSyncPtr) {
if (m_dataPtr >= m_minSyncPtr && m_dataPtr <= m_maxSyncPtr)
correlateDataSync();
} else {
if (m_dataPtr >= m_minSyncPtr || m_dataPtr <= m_maxSyncPtr)
correlateDataSync();
}
// Check to see if the sync is arriving late
if (m_rxBufferBits == DSTAR_DATA_LENGTH_BITS && !syncSeen) {
for (uint8_t i = 1U; i <= 3U; i++) {
uint32_t syncMask = DATA_SYNC_MASK >> i;
uint32_t syncData = DATA_SYNC_DATA >> i;
if (countBits32((m_patternBuffer & syncMask) ^ syncData) <= DATA_SYNC_ERRS) {
m_rxBufferBits -= i;
break;
}
}
}
m_dataBits--;
if (m_dataBits == 0U) {
// We've not seen a data sync for too long, signal RXLOST and change to RX_NONE
if (m_frameCount >= MAX_FRAMES) {
DEBUG1("DStarRX: data sync timed out, lost lock");
io.setDecode(false);
@@ -437,24 +428,35 @@ void CDStarRX::processData(bool bit)
serial.writeDStarLost();
m_maxFrameCorr = 0;
m_maxDataCorr = 0;
m_rxState = DSRXS_NONE;
return;
}
// Send a data frame to the host if the required number of bits have been received, or if a data sync has been seen
if (m_rxBufferBits == DSTAR_DATA_LENGTH_BITS) {
if (syncSeen) {
m_rxBuffer[9U] = DSTAR_DATA_SYNC_BYTES[9U];
m_rxBuffer[10U] = DSTAR_DATA_SYNC_BYTES[10U];
m_rxBuffer[11U] = DSTAR_DATA_SYNC_BYTES[11U];
writeRSSIData(m_rxBuffer);
} else {
serial.writeDStarData(m_rxBuffer, DSTAR_DATA_LENGTH_BYTES);
}
// Send a data frame to the host if the required number of bits have been received
if (m_dataPtr == m_maxSyncPtr) {
uint8_t buffer[DSTAR_DATA_LENGTH_BYTES + 2U];
samplesToBits(m_dataBuffer, m_startPtr, DSTAR_DATA_LENGTH_SYMBOLS, buffer, DSTAR_DATA_LENGTH_SAMPLES);
// Start the next frame
::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
m_rxBufferBits = 0U;
if ((m_frameCount % 21U) == 0U) {
if (m_frameCount == 0U) {
buffer[9U] = DSTAR_DATA_SYNC_BYTES[9U];
buffer[10U] = DSTAR_DATA_SYNC_BYTES[10U];
buffer[11U] = DSTAR_DATA_SYNC_BYTES[11U];
DEBUG5("DStarRX: found start/sync/max/min", m_startPtr, m_syncPtr, m_maxSyncPtr, m_minSyncPtr);
}
writeRSSIData(buffer);
} else {
serial.writeDStarData(buffer, DSTAR_DATA_LENGTH_BYTES);
}
m_frameCount++;
m_maxFrameCorr = 0;
m_maxDataCorr = 0;
}
}
@@ -500,6 +502,105 @@ void CDStarRX::writeRSSIData(unsigned char* data)
m_rssiCount = 0U;
}
bool CDStarRX::correlateFrameSync()
{
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_FRAME_SYNC_MASK) ^ DSTAR_FRAME_SYNC_DATA) <= FRAME_SYNC_ERRS) {
uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_FRAME_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
ptr -= DSTAR_DATA_LENGTH_SAMPLES;
q31_t corr = 0;
for (uint8_t i = 0U; i < DSTAR_FRAME_SYNC_LENGTH_SYMBOLS; i++) {
q15_t val = m_dataBuffer[ptr];
if (DSTAR_FRAME_SYNC_SYMBOLS[i])
corr -= val;
else
corr += val;
ptr += DSTAR_RADIO_SYMBOL_LENGTH;
if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
ptr -= DSTAR_DATA_LENGTH_SAMPLES;
}
if (corr > m_maxFrameCorr) {
m_maxFrameCorr = corr;
m_headerPtr = 0U;
return true;
}
}
return false;
}
bool CDStarRX::correlateDataSync()
{
uint8_t maxErrs = 0U;
if (m_rxState == DSRXS_DATA)
maxErrs = DATA_SYNC_ERRS;
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_DATA_SYNC_MASK) ^ DSTAR_DATA_SYNC_DATA) <= maxErrs) {
uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_DATA_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
ptr -= DSTAR_DATA_LENGTH_SAMPLES;
q31_t corr = 0;
for (uint8_t i = 0U; i < DSTAR_DATA_SYNC_LENGTH_SYMBOLS; i++) {
q15_t val = m_dataBuffer[ptr];
if (DSTAR_DATA_SYNC_SYMBOLS[i])
corr -= val;
else
corr += val;
ptr += DSTAR_RADIO_SYMBOL_LENGTH;
if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
ptr -= DSTAR_DATA_LENGTH_SAMPLES;
}
if (corr > m_maxDataCorr) {
m_maxDataCorr = corr;
m_frameCount = 0U;
m_syncPtr = m_dataPtr;
m_startPtr = m_dataPtr + DSTAR_RADIO_SYMBOL_LENGTH;
if (m_startPtr >= DSTAR_DATA_LENGTH_SAMPLES)
m_startPtr -= DSTAR_DATA_LENGTH_SAMPLES;
m_maxSyncPtr = m_syncPtr + 1U;
if (m_maxSyncPtr >= DSTAR_DATA_LENGTH_SAMPLES)
m_maxSyncPtr -= DSTAR_DATA_LENGTH_SAMPLES;
m_minSyncPtr = m_syncPtr + DSTAR_DATA_LENGTH_SAMPLES - 1U;
if (m_minSyncPtr >= DSTAR_DATA_LENGTH_SAMPLES)
m_minSyncPtr -= DSTAR_DATA_LENGTH_SAMPLES;
return true;
}
}
return false;
}
void CDStarRX::samplesToBits(const q15_t* inBuffer, uint16_t start, uint16_t count, uint8_t* outBuffer, uint16_t limit)
{
for (uint16_t i = 0U; i < count; i++) {
q15_t sample = inBuffer[start];
if (sample < 0)
WRITE_BIT2(outBuffer, i, true);
else
WRITE_BIT2(outBuffer, i, false);
start += DSTAR_RADIO_SYMBOL_LENGTH;
if (start >= limit)
start -= limit;
}
}
bool CDStarRX::rxHeader(uint8_t* in, uint8_t* out)
{
int i;
+20 -9
View File
@@ -37,13 +37,21 @@ public:
void reset();
private:
uint32_t m_pll;
bool m_prev;
DSRX_STATE m_rxState;
uint32_t m_patternBuffer;
uint8_t m_rxBuffer[100U];
unsigned int m_rxBufferBits;
unsigned int m_dataBits;
uint32_t m_bitBuffer[DSTAR_RADIO_SYMBOL_LENGTH];
q15_t m_headerBuffer[DSTAR_FEC_SECTION_LENGTH_SAMPLES + 2U * DSTAR_RADIO_SYMBOL_LENGTH];
q15_t m_dataBuffer[DSTAR_DATA_LENGTH_SAMPLES];
uint16_t m_bitPtr;
uint16_t m_headerPtr;
uint16_t m_dataPtr;
uint16_t m_startPtr;
uint16_t m_syncPtr;
uint16_t m_minSyncPtr;
uint16_t m_maxSyncPtr;
q31_t m_maxFrameCorr;
q31_t m_maxDataCorr;
uint16_t m_frameCount;
uint8_t m_countdown;
unsigned int m_mar;
int m_pathMetric[4U];
unsigned int m_pathMemory0[42U];
@@ -54,9 +62,12 @@ private:
uint32_t m_rssiAccum;
uint16_t m_rssiCount;
void processNone(bool bit);
void processHeader(bool bit);
void processData(bool bit);
void processNone(q15_t sample);
void processHeader(q15_t sample);
void processData();
bool correlateFrameSync();
bool correlateDataSync();
void samplesToBits(const q15_t* inBuffer, uint16_t start, uint16_t count, uint8_t* outBuffer, uint16_t limit);
void writeRSSIHeader(unsigned char* header);
void writeRSSIData(unsigned char* data);
bool rxHeader(uint8_t* in, uint8_t* out);
+7 -7
View File
@@ -198,7 +198,7 @@ m_txDelay(60U) // 100ms
{
::memset(m_modState, 0x00U, 20U * sizeof(q15_t));
m_modFilter.L = DSTAR_RADIO_BIT_LENGTH;
m_modFilter.L = DSTAR_RADIO_SYMBOL_LENGTH;
m_modFilter.phaseLength = GAUSSIAN_0_35_FILTER_PHASE_LEN;
m_modFilter.pCoeffs = GAUSSIAN_0_35_FILTER;
m_modFilter.pState = m_modState;
@@ -252,8 +252,8 @@ void CDStarTX::process()
m_buffer.get();
for (uint8_t j = 0U; j < 3U; j++) {
for (uint8_t i = 0U; i < DSTAR_EOT_LENGTH_BYTES; i++)
m_poBuffer[m_poLen++] = DSTAR_EOT_BYTES[i];
for (uint8_t i = 0U; i < DSTAR_END_SYNC_LENGTH_BYTES; i++)
m_poBuffer[m_poLen++] = DSTAR_END_SYNC_BYTES[i];
}
m_poPtr = 0U;
@@ -262,11 +262,11 @@ void CDStarTX::process()
if (m_poLen > 0U) {
uint16_t space = io.getSpace();
while (space > (8U * DSTAR_RADIO_BIT_LENGTH)) {
while (space > (8U * DSTAR_RADIO_SYMBOL_LENGTH)) {
uint8_t c = m_poBuffer[m_poPtr++];
writeByte(c);
space -= 8U * DSTAR_RADIO_BIT_LENGTH;
space -= 8U * DSTAR_RADIO_SYMBOL_LENGTH;
if (m_poPtr >= m_poLen) {
m_poPtr = 0U;
@@ -412,7 +412,7 @@ void CDStarTX::txHeader(const uint8_t* in, uint8_t* out) const
void CDStarTX::writeByte(uint8_t c)
{
q15_t inBuffer[8U];
q15_t outBuffer[DSTAR_RADIO_BIT_LENGTH * 8U];
q15_t outBuffer[DSTAR_RADIO_SYMBOL_LENGTH * 8U];
uint8_t mask = 0x01U;
@@ -427,7 +427,7 @@ void CDStarTX::writeByte(uint8_t c)
::arm_fir_interpolate_q15(&m_modFilter, inBuffer, outBuffer, 8U);
io.write(STATE_DSTAR, outBuffer, DSTAR_RADIO_BIT_LENGTH * 8U);
io.write(STATE_DSTAR, outBuffer, DSTAR_RADIO_SYMBOL_LENGTH * 8U);
}
void CDStarTX::setTXDelay(uint8_t delay)
+8 -27
View File
@@ -34,7 +34,6 @@ m_callsignTimer(),
m_timeoutTimer(),
m_holdoffTimer(),
m_kerchunkTimer(),
m_kerchunkTX(true),
m_ackMinTimer(),
m_ackDelayTimer(),
m_hangTimer(),
@@ -184,7 +183,7 @@ uint8_t CFM::setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_
return m_rfAck.setParams(rfAck, speed, frequency, level, level);
}
uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, bool kerchunkTX, uint8_t hangTime, bool useCOS, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel)
uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel)
{
m_useCOS = useCOS;
m_cosInvert = cosInvert;
@@ -192,10 +191,7 @@ uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFreque
m_rfAudioBoost = q15_t(rfAudioBoost);
m_timeoutTimer.setTimeout(timeout, 0U);
m_kerchunkTimer.setTimeout(kerchunkTime, 0U);
m_kerchunkTX = kerchunkTX;
m_hangTimer.setTimeout(hangTime, 0U);
m_timeoutTone.setParams(timeoutLevel);
@@ -279,19 +275,17 @@ void CFM::listeningState(bool validSignal)
sendCallsign();
}
if (m_state == FS_RELAYING || (m_state == FS_KERCHUNK && m_kerchunkTX)) {
insertSilence(50U);
insertSilence(50U);
beginRelaying();
beginRelaying();
m_callsignTimer.start();
m_callsignTimer.start();
io.setDecode(true);
io.setADCDetection(true);
io.setDecode(true);
io.setADCDetection(true);
DEBUG1("Change to STATE_FM");
m_modemState = STATE_FM;
}
DEBUG1("Change to STATE_FM");
m_modemState = STATE_FM;
}
}
@@ -306,19 +300,6 @@ void CFM::kerchunkState(bool validSignal)
sendCallsign();
m_callsignTimer.start();
}
if (!m_kerchunkTX) {
insertSilence(50U);
beginRelaying();
m_callsignTimer.start();
io.setDecode(true);
io.setADCDetection(true);
DEBUG1("Change to STATE_FM");
m_modemState = STATE_FM;
}
}
} else {
io.setDecode(false);
+1 -2
View File
@@ -56,7 +56,7 @@ public:
uint8_t setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd, bool callsignAtLatch);
uint8_t setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_t minTime, uint16_t delay, uint8_t level);
uint8_t setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, bool kerchunkTX, uint8_t hangTime, bool useCOS, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel);
uint8_t setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel);
private:
CFMKeyer m_callsign;
@@ -72,7 +72,6 @@ private:
CFMTimer m_timeoutTimer;
CFMTimer m_holdoffTimer;
CFMTimer m_kerchunkTimer;
bool m_kerchunkTX;
CFMTimer m_ackMinTimer;
CFMTimer m_ackDelayTimer;
CFMTimer m_hangTimer;
+68 -124
View File
@@ -26,31 +26,12 @@
static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2}
const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
// Generated using rcosdesign(0.2, 8, 5, 'sqrt') in MATLAB
static q15_t RRC_0_2_FILTER[] = {401, 104, -340, -731, -847, -553, 112, 909, 1472, 1450, 683, -675, -2144, -3040, -2706, -770, 2667, 6995,
11237, 14331, 15464, 14331, 11237, 6995, 2667, -770, -2706, -3040, -2144, -675, 683, 1450, 1472, 909, 112,
-553, -847, -731, -340, 104, 401, 0};
const uint16_t RRC_0_2_FILTER_LEN = 42U;
// One symbol boxcar filters
static q15_t BOXCAR5_FILTER[] = {12000, 12000, 12000, 12000, 12000, 0};
const uint16_t BOXCAR5_FILTER_LEN = 6U;
// Generated using rcosdesign(0.2, 8, 10, 'sqrt') in MATLAB
static q15_t NXDN_0_2_FILTER[] = {284, 198, 73, -78, -240, -393, -517, -590, -599, -533, -391, -181, 79, 364, 643, 880, 1041, 1097, 1026, 819,
483, 39, -477, -1016, -1516, -1915, -2150, -2164, -1914, -1375, -545, 557, 1886, 3376, 4946, 6502, 7946, 9184,
10134, 10731, 10935, 10731, 10134, 9184, 7946, 6502, 4946, 3376, 1886, 557, -545, -1375, -1914, -2164, -2150,
-1915, -1516, -1016, -477, 39, 483, 819, 1026, 1097, 1041, 880, 643, 364, 79, -181, -391, -533, -599, -590,
-517, -393, -240, -78, 73, 198, 284, 0};
const uint16_t NXDN_0_2_FILTER_LEN = 82U;
static q15_t NXDN_ISINC_FILTER[] = {790, -1085, -1073, -553, 747, 2341, 3156, 2152, -893, -4915, -7834, -7536, -3102, 4441, 12354, 17394, 17394,
12354, 4441, -3102, -7536, -7834, -4915, -893, 2152, 3156, 2341, 747, -553, -1073, -1085, 790};
const uint16_t NXDN_ISINC_FILTER_LEN = 32U;
// Generated using gaussfir(0.5, 4, 5) in MATLAB
static q15_t GAUSSIAN_0_5_FILTER[] = {8, 104, 760, 3158, 7421, 9866, 7421, 3158, 760, 104, 8, 0};
const uint16_t GAUSSIAN_0_5_FILTER_LEN = 12U;
// One symbol boxcar filter
static q15_t BOXCAR_FILTER[] = {12000, 12000, 12000, 12000, 12000, 0};
const uint16_t BOXCAR_FILTER_LEN = 6U;
static q15_t BOXCAR10_FILTER[] = {6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000};
const uint16_t BOXCAR10_FILTER_LEN = 10U;
const uint16_t DC_OFFSET = 2048U;
@@ -61,16 +42,10 @@ m_txBuffer(TX_RINGBUFFER_SIZE),
m_rssiBuffer(RX_RINGBUFFER_SIZE),
m_dcFilter(),
m_dcState(),
m_rrcFilter(),
m_gaussianFilter(),
m_boxcarFilter(),
m_nxdnFilter(),
m_nxdnISincFilter(),
m_rrcState(),
m_gaussianState(),
m_boxcarState(),
m_nxdnState(),
m_nxdnISincState(),
m_boxcar5Filter(),
m_boxcar10Filter(),
m_boxcar5State(),
m_boxcar10State(),
m_pttInvert(false),
m_rxLevel(128 * 128),
m_cwIdTXLevel(128 * 128),
@@ -91,37 +66,22 @@ m_dacOverflow(0U),
m_watchdog(0U),
m_lockout(false)
{
::memset(m_rrcState, 0x00U, 70U * sizeof(q15_t));
::memset(m_gaussianState, 0x00U, 40U * sizeof(q15_t));
::memset(m_boxcarState, 0x00U, 30U * sizeof(q15_t));
::memset(m_nxdnState, 0x00U, 110U * sizeof(q15_t));
::memset(m_nxdnISincState, 0x00U, 60U * sizeof(q15_t));
::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
::memset(m_boxcar5State, 0x00U, 30U * sizeof(q15_t));
::memset(m_boxcar10State, 0x00U, 40U * sizeof(q15_t));
::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
m_dcFilter.numStages = DC_FILTER_STAGES;
m_dcFilter.pState = m_dcState;
m_dcFilter.pCoeffs = DC_FILTER;
m_dcFilter.postShift = 0;
m_rrcFilter.numTaps = RRC_0_2_FILTER_LEN;
m_rrcFilter.pState = m_rrcState;
m_rrcFilter.pCoeffs = RRC_0_2_FILTER;
m_boxcar5Filter.numTaps = BOXCAR5_FILTER_LEN;
m_boxcar5Filter.pState = m_boxcar5State;
m_boxcar5Filter.pCoeffs = BOXCAR5_FILTER;
m_gaussianFilter.numTaps = GAUSSIAN_0_5_FILTER_LEN;
m_gaussianFilter.pState = m_gaussianState;
m_gaussianFilter.pCoeffs = GAUSSIAN_0_5_FILTER;
m_boxcarFilter.numTaps = BOXCAR_FILTER_LEN;
m_boxcarFilter.pState = m_boxcarState;
m_boxcarFilter.pCoeffs = BOXCAR_FILTER;
m_nxdnFilter.numTaps = NXDN_0_2_FILTER_LEN;
m_nxdnFilter.pState = m_nxdnState;
m_nxdnFilter.pCoeffs = NXDN_0_2_FILTER;
m_nxdnISincFilter.numTaps = NXDN_ISINC_FILTER_LEN;
m_nxdnISincFilter.pState = m_nxdnISincState;
m_nxdnISincFilter.pCoeffs = NXDN_ISINC_FILTER;
m_boxcar10Filter.numTaps = BOXCAR10_FILTER_LEN;
m_boxcar10Filter.pState = m_boxcar10State;
m_boxcar10Filter.pCoeffs = BOXCAR10_FILTER;
initInt();
@@ -308,54 +268,37 @@ void CIO::process()
#endif
if (m_modemState == STATE_IDLE) {
if (m_dstarEnable) {
q15_t GMSKVals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_gaussianFilter, dcSamples, GMSKVals, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
#endif
dstarRX.samples(GMSKVals, rssi, RX_BLOCK_SIZE);
}
if (m_dstarEnable || m_dmrEnable || m_ysfEnable || m_p25Enable) {
q15_t vals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE);
if (m_p25Enable) {
q15_t P25Vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_boxcarFilter, dcSamples, P25Vals, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_boxcarFilter, samples, P25Vals, RX_BLOCK_SIZE);
#endif
p25RX.samples(P25Vals, rssi, RX_BLOCK_SIZE);
}
if (m_dstarEnable)
dstarRX.samples(vals, rssi, RX_BLOCK_SIZE);
if (m_nxdnEnable) {
q15_t NXDNValsTmp[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_nxdnFilter, dcSamples, NXDNValsTmp, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_nxdnFilter, samples, NXDNValsTmp, RX_BLOCK_SIZE);
#endif
q15_t NXDNVals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_nxdnISincFilter, NXDNValsTmp, NXDNVals, RX_BLOCK_SIZE);
nxdnRX.samples(NXDNVals, rssi, RX_BLOCK_SIZE);
}
if (m_dmrEnable || m_ysfEnable) {
q15_t RRCVals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_rrcFilter, samples, RRCVals, RX_BLOCK_SIZE);
if (m_p25Enable)
p25RX.samples(vals, rssi, RX_BLOCK_SIZE);
if (m_ysfEnable)
ysfRX.samples(RRCVals, rssi, RX_BLOCK_SIZE);
ysfRX.samples(vals, rssi, RX_BLOCK_SIZE);
if (m_dmrEnable) {
if (m_duplex)
dmrIdleRX.samples(RRCVals, RX_BLOCK_SIZE);
dmrIdleRX.samples(vals, RX_BLOCK_SIZE);
else
dmrDMORX.samples(RRCVals, rssi, RX_BLOCK_SIZE);
dmrDMORX.samples(vals, rssi, RX_BLOCK_SIZE);
}
}
if (m_nxdnEnable) {
q15_t vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_boxcar10Filter, dcSamples, vals, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_boxcar10Filter, samples, vals, RX_BLOCK_SIZE);
#endif
nxdnRX.samples(vals, rssi, RX_BLOCK_SIZE);
}
if (m_fmEnable) {
bool cos = getCOSInt();
#if defined(USE_DCBLOCKER)
@@ -366,61 +309,59 @@ void CIO::process()
}
} else if (m_modemState == STATE_DSTAR) {
if (m_dstarEnable) {
q15_t GMSKVals[RX_BLOCK_SIZE];
q15_t vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_gaussianFilter, dcSamples, GMSKVals, RX_BLOCK_SIZE);
::arm_fir_fast_q15(&m_boxcar5Filter, dcSamples, vals, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE);
#endif
dstarRX.samples(GMSKVals, rssi, RX_BLOCK_SIZE);
dstarRX.samples(vals, rssi, RX_BLOCK_SIZE);
}
} else if (m_modemState == STATE_DMR) {
if (m_dmrEnable) {
q15_t DMRVals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_rrcFilter, samples, DMRVals, RX_BLOCK_SIZE);
q15_t vals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE);
if (m_duplex) {
// If the transmitter isn't on, use the DMR idle RX to detect the wakeup CSBKs
if (m_tx)
dmrRX.samples(DMRVals, rssi, control, RX_BLOCK_SIZE);
dmrRX.samples(vals, rssi, control, RX_BLOCK_SIZE);
else
dmrIdleRX.samples(DMRVals, RX_BLOCK_SIZE);
dmrIdleRX.samples(vals, RX_BLOCK_SIZE);
} else {
dmrDMORX.samples(DMRVals, rssi, RX_BLOCK_SIZE);
dmrDMORX.samples(vals, rssi, RX_BLOCK_SIZE);
}
}
} else if (m_modemState == STATE_YSF) {
if (m_ysfEnable) {
q15_t YSFVals[RX_BLOCK_SIZE];
q15_t vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_rrcFilter, dcSamples, YSFVals, RX_BLOCK_SIZE);
::arm_fir_fast_q15(&m_boxcar5Filter, dcSamples, vals, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_rrcFilter, samples, YSFVals, RX_BLOCK_SIZE);
::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE);
#endif
ysfRX.samples(YSFVals, rssi, RX_BLOCK_SIZE);
ysfRX.samples(vals, rssi, RX_BLOCK_SIZE);
}
} else if (m_modemState == STATE_P25) {
if (m_p25Enable) {
q15_t P25Vals[RX_BLOCK_SIZE];
q15_t vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_boxcarFilter, dcSamples, P25Vals, RX_BLOCK_SIZE);
::arm_fir_fast_q15(&m_boxcar5Filter, dcSamples, vals, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_boxcarFilter, samples, P25Vals, RX_BLOCK_SIZE);
::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE);
#endif
p25RX.samples(P25Vals, rssi, RX_BLOCK_SIZE);
p25RX.samples(vals, rssi, RX_BLOCK_SIZE);
}
} else if (m_modemState == STATE_NXDN) {
} else if (m_modemState == STATE_NXDN) {
if (m_nxdnEnable) {
q15_t NXDNValsTmp[RX_BLOCK_SIZE];
q15_t vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_nxdnFilter, dcSamples, NXDNValsTmp, RX_BLOCK_SIZE);
::arm_fir_fast_q15(&m_boxcar10Filter, dcSamples, vals, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_nxdnFilter, samples, NXDNValsTmp, RX_BLOCK_SIZE);
::arm_fir_fast_q15(&m_boxcar10Filter, samples, vals, RX_BLOCK_SIZE);
#endif
q15_t NXDNVals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_nxdnISincFilter, NXDNValsTmp, NXDNVals, RX_BLOCK_SIZE);
nxdnRX.samples(NXDNVals, rssi, RX_BLOCK_SIZE);
nxdnRX.samples(vals, rssi, RX_BLOCK_SIZE);
}
} else if (m_modemState == STATE_FM) {
bool cos = getCOSInt();
@@ -430,10 +371,13 @@ void CIO::process()
fm.samples(cos, samples, RX_BLOCK_SIZE);
#endif
} else if (m_modemState == STATE_DSTARCAL) {
q15_t GMSKVals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
calDStarRX.samples(GMSKVals, RX_BLOCK_SIZE);
q15_t vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_boxcar5Filter, dcSamples, vals, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE);
#endif
calDStarRX.samples(vals, RX_BLOCK_SIZE);
} else if (m_modemState == STATE_RSSICAL) {
calRSSI.samples(rssi, RX_BLOCK_SIZE);
}
+4 -10
View File
@@ -66,16 +66,10 @@ private:
arm_biquad_casd_df1_inst_q31 m_dcFilter;
q31_t m_dcState[4];
arm_fir_instance_q15 m_rrcFilter;
arm_fir_instance_q15 m_gaussianFilter;
arm_fir_instance_q15 m_boxcarFilter;
arm_fir_instance_q15 m_nxdnFilter;
arm_fir_instance_q15 m_nxdnISincFilter;
q15_t m_rrcState[70U]; // NoTaps + BlockSize - 1, 42 + 20 - 1 plus some spare
q15_t m_gaussianState[40U]; // NoTaps + BlockSize - 1, 12 + 20 - 1 plus some spare
q15_t m_boxcarState[30U]; // NoTaps + BlockSize - 1, 6 + 20 - 1 plus some spare
q15_t m_nxdnState[110U]; // NoTaps + BlockSize - 1, 82 + 20 - 1 plus some spare
q15_t m_nxdnISincState[60U]; // NoTaps + BlockSize - 1, 32 + 20 - 1 plus some spare
arm_fir_instance_q15 m_boxcar5Filter;
arm_fir_instance_q15 m_boxcar10Filter;
q15_t m_boxcar5State[30U]; // NoTaps + BlockSize - 1, 6 + 20 - 1 plus some spare
q15_t m_boxcar10State[40U]; // NoTaps + BlockSize - 1, 10 + 20 - 1 plus some spare
bool m_pttInvert;
q15_t m_rxLevel;
+45 -13
View File
@@ -41,6 +41,7 @@ YSF PB8 output
P25 PB9 output
NXDN PB10 output
POCSAG PB11 output
FM PB12 output
RX PB0 analog input (ADC1_8)
RSSI PB1 analog input (ADC2_9)
@@ -84,6 +85,9 @@ USART1_RXD PA10 input (AF)
#define PIN_POCSAG 11
#define PORT_POCSAG GPIOB
#define BB_POCSAG *((bitband_t)BITBAND_PERIPH(&PORT_POCSAG->ODR, PIN_POCSAG))
#define PIN_FM 14
#define PORT_FM GPIOB
#define BB_FM *((bitband_t)BITBAND_PERIPH(&PORT_FM->ODR, PIN_FM))
#define PIN_RX 0
#define PIN_RX_ADC_CH 8
@@ -154,16 +158,35 @@ void GPIOConfigPin(GPIO_TypeDef *port_ptr, uint32_t pin, uint32_t mode_cnf_value
#if defined(STM32F1_POG)
void FancyLEDEffect()
{
bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25};
for(int i=0; i<7; i++){
*foo[i] = 0x01;
int ledCount = 10;
bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25,
#if defined(USE_ALTERNATE_NXDN_LEDS)
NULL,
#else
&BB_NXDN,
#endif
#if defined(USE_ALTERNATE_POCSAG_LEDS)
NULL,
#else
&BB_POCSAG,
#endif
#if defined(USE_ALTERNATE_FM_LEDS)
NULL};
#else
&BB_FM};
#endif
for(int i=0; i<ledCount; i++){
if(foo[i] != NULL)
*foo[i] = 0x01;
}
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1);
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
delay(SystemCoreClock/1000*100);
for(int i=0; i<7; i++){
*foo[i] = 0x00;
for(int i=0; i<ledCount; i++){
if(foo[i] != NULL)
*foo[i] = 0x00;
}
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
delay(SystemCoreClock/1000*20);
@@ -172,18 +195,22 @@ void FancyLEDEffect()
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
*foo[0] = 0x01;
for(int i=1; i<7; i++){
for(int i=1; i<ledCount; i++){
delay(SystemCoreClock/1000*10);
*foo[i-1] = 0x00;
*foo[i] = 0x01;
if (foo[i-1] != NULL)
*foo[i-1] = 0x00;
if (foo[i] != NULL)
*foo[i] = 0x01;
}
for(int i=5; i>=0; i--){
for(int i=ledCount - 2; i>=0; i--) {
delay(SystemCoreClock/1000*10);
*foo[i+1] = 0x00;
*foo[i] = 0x01;
if (foo[i+1] != NULL)
*foo[i+1] = 0x00;
if (foo[i] != NULL)
*foo[i] = 0x01;
}
delay(SystemCoreClock/1000*10);
*foo[5+1-6] = 0x00;
*foo[0] = 0x00;
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
delay(SystemCoreClock/1000*10);
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
@@ -228,6 +255,9 @@ static inline void GPIOInit()
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
GPIOConfigPin(PORT_POCSAG, PIN_POCSAG, GPIO_CRL_MODE0_1);
#endif
#if !defined(USE_ALTERNATE_FM_LEDS)
GPIOConfigPin(PORT_FM, PIN_FM, GPIO_CRL_MODE0_1);
#endif
GPIOConfigPin(PORT_RX, PIN_RX, 0);
#if defined(SEND_RSSI_DATA)
@@ -465,6 +495,8 @@ void CIO::setFMInt(bool on)
#if defined(USE_ALTERNATE_FM_LEDS)
BB_DSTAR = !!on;
BB_YSF = !!on;
#else
BB_FM = !!on;
#endif
}
+4 -14
View File
@@ -1,17 +1,7 @@
This is the source code of the MMDVM firmware that supports D-Star, DMR,
System Fusion, P25, NXDN, POCSAG, and FM modes.
This is the source code of the MMDVM firmware that supports D-Star, DMR, System Fusion, P25, NXDN, and POCSAG modes.
It runs on the Arduino Due, the ST-Micro STM32F1xxx, STM32F4xxx and STM32F7xxx
processors, as well as the Teensy 3.1/3.2/3.5/3.6. What these platforms have in
common is the use of an ARM Cortex-M3, M4, or M7 processors with a clock speed
greater than 70 MHz, and access to at least one analogue to digital converter
and one digital to analogue converter.
It runs on the Arduino Due, the ST-Micro STM32F1xxx, STM32F4xxx and STM32F7xxx processors, as well as the Teensy 3.1/3.2/3.5/3.6. What these platforms have in common is the use of an ARM Cortex-M3 or M4 processor with a clock speed greater than 70 MHz, and access to at least one analogue to digital converter and one digital to analogue converter.
In order to build this software for the Arduino Due, you will need to edit a
file within the Arduino GUI and that is detailed in the BUILD.txt file. The
STM32 support is being supplied via the ARM GCC compiler. The Teensy support
uses Teensyduino.
In order to build this software for the Arduino Due, you will need to edit a file within the Arduino GUI and that is detailed in the BUILD.txt file. The STM32 support is being supplied via the Coocox IDE with ARM GCC. The Teensy support uses Teensyduino.
This software is licenced under the GPL v2 and is intended for amateur and
educational use only. Use of this software for commercial purposes is strictly
forbidden.
This software is licenced under the GPL v2 and is intended for amateur and educational use only. Use of this software for commercial purposes is strictly forbidden.
+3 -5
View File
@@ -103,7 +103,7 @@ const uint8_t MMDVM_DEBUG5 = 0xF5U;
#define HW_TYPE "MMDVM"
#endif
#define DESCRIPTION "20200620 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
#define DESCRIPTION "20200520 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
#if defined(GITVERSION)
#define concat(h, a, b, c) h " " a " " b " GitID #" c ""
@@ -433,13 +433,12 @@ uint8_t CSerialPort::setFMParams3(const uint8_t* data, uint8_t length)
bool useCOS = (data[8U] & 0x01U) == 0x01U;
bool cosInvert = (data[8U] & 0x02U) == 0x02U;
bool kerchunkTX = (data[8U] & 0x04U) == 0x04U;
uint8_t rfAudioBoost = data[9U];
uint8_t maxDev = data[10U];
uint8_t rxLevel = data[11U];
return fm.setMisc(timeout, timeoutLevel, ctcssFrequency, ctcssHighThreshold, ctcssLowThreshold, ctcssLevel, kerchunkTime, kerchunkTX, hangTime, useCOS, cosInvert, rfAudioBoost, maxDev, rxLevel);
return fm.setMisc(timeout, timeoutLevel, ctcssFrequency, ctcssHighThreshold, ctcssLowThreshold, ctcssLevel, kerchunkTime, hangTime, useCOS, cosInvert, rfAudioBoost, maxDev, rxLevel);
}
uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
@@ -593,8 +592,7 @@ void CSerialPort::process()
m_buffer[0U] = c;
m_ptr = 1U;
m_len = 0U;
}
else {
} else {
m_ptr = 0U;
m_len = 0U;
}