Merge branch 'master' into boxcar

This commit is contained in:
Jonathan Naylor 2018-07-23 17:48:34 +01:00
commit ce51b8daa8
7 changed files with 27 additions and 6 deletions

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@ -194,6 +194,16 @@ int CSerialPort::availableInt(uint8_t n)
}
}
int CSerialPort::availableForWriteInt(uint8_t n)
{
switch (n) {
case 3U:
return Serial3.availableForWrite();
default:
return false;
}
}
uint8_t CSerialPort::readInt(uint8_t n)
{
switch (n) {

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@ -433,6 +433,7 @@ DMR PC6 output
YSF PC7 output
P25 PC8 output
NXDN PC9 output
POCSAG PA8 output
RX PA0 analog input
RSSI PA7 analog input
@ -465,9 +466,9 @@ EXT_CLK PA15 input
#define PORT_NXDN GPIOC
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOC
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_POCSAG GPIO_Pin_8
#define PORT_POCSAG GPIOA
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOA
#define PIN_DSTAR GPIO_Pin_15
#define PORT_DSTAR GPIOB

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@ -102,7 +102,7 @@ void loop()
if (m_nxdnEnable && m_modemState == STATE_NXDN)
nxdnTX.process();
if (m_pocsagEnable && m_modemState == STATE_POCSAG)
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
pocsagTX.process();
if (m_modemState == STATE_DSTARCAL)

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@ -99,7 +99,7 @@ void loop()
if (m_nxdnEnable && m_modemState == STATE_NXDN)
nxdnTX.process();
if (m_pocsagEnable && m_modemState == STATE_POCSAG)
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
pocsagTX.process();
if (m_modemState == STATE_DSTARCAL)

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@ -87,6 +87,14 @@ void CPOCSAGTX::process()
}
}
bool CPOCSAGTX::busy()
{
if (m_poLen > 0U || m_buffer.getData() > 0U)
return true;
else
return false;
}
uint8_t CPOCSAGTX::writeData(const uint8_t* data, uint8_t length)
{
if (length != POCSAG_FRAME_LENGTH_BYTES)

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@ -35,6 +35,8 @@ public:
uint8_t getSpace() const;
bool busy();
private:
CSerialRB m_buffer;
arm_fir_instance_q15 m_modFilter;

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@ -32,7 +32,7 @@ Boston, MA 02110-1301, USA.
#include <Arduino.h>
#endif
const uint16_t SERIAL_RINGBUFFER_SIZE = 2000U;
const uint16_t SERIAL_RINGBUFFER_SIZE = 1000U;
class CSerialRB {
public: