Merge pull request #318 from F4FXL/dstar_correlator_fm

Merge master into dstar correlator fm

CalDStarRX.cpp

@@ -24,7 +24,7 @@
 const unsigned int BUFFER_LENGTH = 200U;
 
 const uint32_t PLLMAX = 0x10000U;
-const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
+const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_SYMBOL_LENGTH;
 const uint32_t INC    = PLLINC / 32U;
 
 // D-Star bit order version of 0x55 0x2D 0x16

DStarDefines.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2009-2015,2017 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -19,30 +19,50 @@
 #if !defined(DSTARDEFINES_H)
 #define  DSTARDEFINES_H
 
-const unsigned int DSTAR_RADIO_BIT_LENGTH = 5U;      // At 24 kHz sample rate
+const unsigned int DSTAR_RADIO_SYMBOL_LENGTH = 5U;      // At 24 kHz sample rate
 
-const unsigned int DSTAR_HEADER_LENGTH_BYTES = 41U;
-const unsigned int DSTAR_HEADER_LENGTH_BITS  = DSTAR_HEADER_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_HEADER_LENGTH_BYTES   = 41U;
 
-const unsigned int DSTAR_FEC_SECTION_LENGTH_BYTES = 83U;
-const unsigned int DSTAR_FEC_SECTION_LENGTH_BITS  = 660U;
+const unsigned int DSTAR_FEC_SECTION_LENGTH_BYTES   = 83U;
+const unsigned int DSTAR_FEC_SECTION_LENGTH_SYMBOLS = 660U;
+const unsigned int DSTAR_FEC_SECTION_LENGTH_SAMPLES = DSTAR_FEC_SECTION_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
 
-const unsigned int DSTAR_DATA_LENGTH_BYTES = 12U;
-const unsigned int DSTAR_DATA_LENGTH_BITS  = DSTAR_DATA_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_DATA_LENGTH_BYTES   = 12U;
+const unsigned int DSTAR_DATA_LENGTH_SYMBOLS = DSTAR_DATA_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_DATA_LENGTH_SAMPLES = DSTAR_DATA_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
 
-const uint8_t      DSTAR_EOT_BYTES[] = {0x55, 0x55, 0x55, 0x55, 0xC8, 0x7A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
-const unsigned int DSTAR_EOT_LENGTH_BYTES = 6U;
-const unsigned int DSTAR_EOT_LENGTH_BITS  = DSTAR_EOT_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_END_SYNC_LENGTH_BYTES = 6U;
+const unsigned int DSTAR_END_SYNC_LENGTH_BITS  = DSTAR_END_SYNC_LENGTH_BYTES * 8U;
 
-const uint8_t      DSTAR_DATA_SYNC_LENGTH_BYTES = 3U;
-const uint8_t      DSTAR_DATA_SYNC_LENGTH_BITS  = DSTAR_DATA_SYNC_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_FRAME_SYNC_LENGTH_BYTES   = 3U;
+const unsigned int DSTAR_FRAME_SYNC_LENGTH_SYMBOLS = DSTAR_FRAME_SYNC_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_FRAME_SYNC_LENGTH_SAMPLES = DSTAR_FRAME_SYNC_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
 
-const uint8_t      DSTAR_DATA_SYNC_BYTES[] = {0x9E, 0x8D, 0x32, 0x88, 0x26, 0x1A, 0x3F, 0x61, 0xE8, 0x55, 0x2D, 0x16};
+const unsigned int DSTAR_DATA_SYNC_LENGTH_BYTES   = 3U;
+const unsigned int DSTAR_DATA_SYNC_LENGTH_SYMBOLS = DSTAR_DATA_SYNC_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_DATA_SYNC_LENGTH_SAMPLES = DSTAR_DATA_SYNC_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
 
-const uint8_t      DSTAR_SLOW_DATA_TYPE_TEXT   = 0x40U;
-const uint8_t      DSTAR_SLOW_DATA_TYPE_HEADER = 0x50U;
+const uint8_t DSTAR_DATA_SYNC_BYTES[] = {0x9E, 0x8D, 0x32, 0x88, 0x26, 0x1A, 0x3F, 0x61, 0xE8, 0x55, 0x2D, 0x16};
 
-const uint8_t      DSTAR_SCRAMBLER_BYTES[] = {0x70U, 0x4FU, 0x93U};
+// D-Star bit order version of 0x55 0x6E 0x0A
+const uint32_t DSTAR_FRAME_SYNC_DATA = 0x00557650U;
+const uint32_t DSTAR_FRAME_SYNC_MASK = 0x00FFFFFFU;
+const bool     DSTAR_FRAME_SYNC_SYMBOLS[] = {false, true, false, true, false, true, false, true, false, true, true, true, false, true, true, false, false, true, false, true, false, false, false, false};
+
+// D-Star bit order version of 0x55 0x2D 0x16
+const uint32_t DSTAR_DATA_SYNC_DATA = 0x00AAB468U;
+const uint32_t DSTAR_DATA_SYNC_MASK = 0x00FFFFFFU;
+const bool     DSTAR_DATA_SYNC_SYMBOLS[] = {true, false, true, false, true, false, true, false, true, false, true, true, false, true, false, false, false, true, true, false, true, false, false, false};
+
+// D-Star bit order version of 0x55 0x55 0xC8 0x7A
+const uint32_t DSTAR_END_SYNC_DATA = 0xAAAA135EU;
+const uint32_t DSTAR_END_SYNC_MASK = 0xFFFFFFFFU;
+const uint8_t  DSTAR_END_SYNC_BYTES[] = {0x55, 0x55, 0x55, 0x55, 0xC8, 0x7A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+const uint8_t  DSTAR_SLOW_DATA_TYPE_TEXT   = 0x40U;
+const uint8_t  DSTAR_SLOW_DATA_TYPE_HEADER = 0x50U;
+
+const uint8_t  DSTAR_SCRAMBLER_BYTES[] = {0x70U, 0x4FU, 0x93U};
 
 #endif
 

DStarRX.cpp

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2009-2017,2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2017 by Andy Uribe CA6JAU
  *
  *   This program is free software; you can redistribute it and/or modify
@@ -22,27 +22,21 @@
 #include "DStarRX.h"
 #include "Utils.h"
 
-const unsigned int BUFFER_LENGTH = 200U;
-
-const uint32_t PLLMAX = 0x10000U;
-const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
-const uint32_t INC    = PLLINC / 32U;
-
-const unsigned int MAX_SYNC_BITS = 100U * DSTAR_DATA_LENGTH_BITS;
+const unsigned int MAX_FRAMES = 150U;
 
 // D-Star bit order version of 0x55 0x55 0x6E 0x0A
 const uint32_t FRAME_SYNC_DATA = 0x00557650U;
 const uint32_t FRAME_SYNC_MASK = 0x00FFFFFFU;
-const uint8_t  FRAME_SYNC_ERRS = 2U;
+const uint8_t  FRAME_SYNC_ERRS = 1U;
 
 // D-Star bit order version of 0x55 0x2D 0x16
-const uint32_t DATA_SYNC_DATA = 0x00AAB468U;
-const uint32_t DATA_SYNC_MASK = 0x00FFFFFFU;
+const uint64_t DATA_SYNC_DATA = 0x0000000000AAB468U;
+const uint64_t DATA_SYNC_MASK = 0x0000000000FFFFFFU;
 const uint8_t  DATA_SYNC_ERRS = 2U;
 
 // D-Star bit order version of 0x55 0x55 0xC8 0x7A
-const uint32_t END_SYNC_DATA = 0xAAAA135EU;
-const uint32_t END_SYNC_MASK = 0xFFFFFFFFU;
+const uint64_t END_SYNC_DATA = 0x0000AAAAAAAA135EU;
+const uint64_t END_SYNC_MASK = 0x0000FFFFFFFFFFFFU;
 const uint8_t  END_SYNC_ERRS = 1U;
 
 const uint8_t BIT_MASK_TABLE0[] = {0x7FU, 0xBFU, 0xDFU, 0xEFU, 0xF7U, 0xFBU, 0xFDU, 0xFEU};
@@ -237,14 +231,24 @@ const uint16_t CCITT_TABLE[] = {
   0xf78fU, 0xe606U, 0xd49dU, 0xc514U, 0xb1abU, 0xa022U, 0x92b9U, 0x8330U,
   0x7bc7U, 0x6a4eU, 0x58d5U, 0x495cU, 0x3de3U, 0x2c6aU, 0x1ef1U, 0x0f78U};
 
+const uint16_t NOENDPTR = 9999U;
+
 CDStarRX::CDStarRX() :
-m_pll(0U),
-m_prev(false),
 m_rxState(DSRXS_NONE),
-m_patternBuffer(0x00U),
-m_rxBuffer(),
-m_rxBufferBits(0U),
-m_dataBits(0U),
+m_bitBuffer(),
+m_headerBuffer(),
+m_dataBuffer(),
+m_bitPtr(0U),
+m_headerPtr(0U),
+m_dataPtr(0U),
+m_startPtr(NOENDPTR),
+m_syncPtr(NOENDPTR),
+m_minSyncPtr(NOENDPTR),
+m_maxSyncPtr(NOENDPTR),
+m_maxFrameCorr(0),
+m_maxDataCorr(0),
+m_frameCount(0U),
+m_countdown(0U),
 m_mar(0U),
 m_pathMetric(),
 m_pathMemory0(),
@@ -259,14 +263,20 @@ m_rssiCount(0U)
 
 void CDStarRX::reset()
 {
-  m_pll           = 0U;
-  m_prev          = false;
-  m_rxState       = DSRXS_NONE;
-  m_patternBuffer = 0x00U;
-  m_rxBufferBits  = 0U;
-  m_dataBits      = 0U;
-  m_rssiAccum     = 0U;
-  m_rssiCount     = 0U;
+  m_rxState      = DSRXS_NONE;
+  m_headerPtr    = 0U;
+  m_dataPtr      = 0U;
+  m_bitPtr       = 0U;
+  m_maxFrameCorr = 0;
+  m_maxDataCorr  = 0;
+  m_startPtr     = NOENDPTR;
+  m_syncPtr      = NOENDPTR;
+  m_minSyncPtr   = NOENDPTR;
+  m_maxSyncPtr   = NOENDPTR;
+  m_frameCount   = 0U;
+  m_countdown    = 0U;
+  m_rssiAccum    = 0U;
+  m_rssiCount    = 0U;
 }
 
 void CDStarRX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t length)
@@ -275,125 +285,117 @@ void CDStarRX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t lengt
     m_rssiAccum += rssi[i];
     m_rssiCount++;
 
-    bool bit = samples[i] < 0;
+    q15_t sample = samples[i];
 
-    if (bit != m_prev) {
-      if (m_pll < (PLLMAX / 2U))
-        m_pll += INC;
-      else
-        m_pll -= INC;
+    m_bitBuffer[m_bitPtr] <<= 1;
+    if (sample < 0)
+      m_bitBuffer[m_bitPtr] |= 0x01U;
+
+    m_dataBuffer[m_dataPtr] = sample;
+
+    switch (m_rxState) {
+      case DSRXS_HEADER:
+        processHeader(sample);
+        break;
+      case DSRXS_DATA:
+        processData();
+        break;
+      default:
+        processNone(sample);
+        break;
     }
 
-    m_prev = bit;
+    m_dataPtr++;
+    if (m_dataPtr >= DSTAR_DATA_LENGTH_SAMPLES)
+      m_dataPtr = 0U;
 
-    m_pll += PLLINC;
-
-    if (m_pll >= PLLMAX) {
-      m_pll -= PLLMAX;
-
-      switch (m_rxState) {
-        case DSRXS_NONE:
-          processNone(bit);
-          break;
-        case DSRXS_HEADER:
-          processHeader(bit);
-          break;
-        case DSRXS_DATA:
-          processData(bit);
-          break;
-        default:
-          break;
-      }
-    }
+    m_bitPtr++;
+    if (m_bitPtr >= DSTAR_RADIO_SYMBOL_LENGTH)
+      m_bitPtr = 0U;
   }
 }
 
-void CDStarRX::processNone(bool bit)
+void CDStarRX::processNone(q15_t sample)
 {
-  m_patternBuffer <<= 1;
-  if (bit)
-    m_patternBuffer |= 0x01U;
-
   // Fuzzy matching of the frame sync sequence
-  if (countBits32((m_patternBuffer & FRAME_SYNC_MASK) ^ FRAME_SYNC_DATA) <= FRAME_SYNC_ERRS) {
-    DEBUG1("DStarRX: found frame sync in None");
-
-    ::memset(m_rxBuffer, 0x00U, DSTAR_FEC_SECTION_LENGTH_BYTES);
-    m_rxBufferBits = 0U;
+  bool ret = correlateFrameSync();
+  if (ret) {
+    m_countdown = 5U;
+	
+    m_headerBuffer[m_headerPtr] = sample;
+    m_headerPtr++;
 
     m_rssiAccum = 0U;
     m_rssiCount = 0U;
 
     m_rxState = DSRXS_HEADER;
+
     return;
   }
 
-  // Exact matching of the data sync bit sequence
-  if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) == 0U) {
+  // Fuzzy matching of the data sync bit sequence
+  ret = correlateDataSync();
+  if (ret) {
     DEBUG1("DStarRX: found data sync in None");
 
     io.setDecode(true);
     io.setADCDetection(true);
 
-    // Suppress RSSI on the dummy sync message
-    m_rssiAccum = 0U;
-    m_rssiCount = 0U;
-
-    ::memcpy(m_rxBuffer, DSTAR_DATA_SYNC_BYTES, DSTAR_DATA_LENGTH_BYTES);
-    writeRSSIData(m_rxBuffer);
-
-    ::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
-    m_rxBufferBits = 0U;
-
-    m_dataBits  = MAX_SYNC_BITS;
-    m_rxState   = DSRXS_DATA;
-    return;
+    m_rxState = DSRXS_DATA;
   }
 }
 
-void CDStarRX::processHeader(bool bit)
+void CDStarRX::processHeader(q15_t sample)
 {
-  m_patternBuffer <<= 1;
-  if (bit)
-    m_patternBuffer |= 0x01U;
+  if (m_countdown > 0U) {
+    correlateFrameSync();
+    m_countdown--;
+  }
 
-  WRITE_BIT2(m_rxBuffer, m_rxBufferBits, bit);
-  m_rxBufferBits++;
+  m_headerBuffer[m_headerPtr] = sample;
+  m_headerPtr++;
 
   // A full FEC header
-  if (m_rxBufferBits == DSTAR_FEC_SECTION_LENGTH_BITS) {
-    // Process the scrambling, interleaving and FEC, then return if the chcksum was correct
-    unsigned char header[DSTAR_HEADER_LENGTH_BYTES];
-    bool ok = rxHeader(m_rxBuffer, header);
-    if (ok) {
+  if (m_headerPtr == (DSTAR_FEC_SECTION_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH)) {
+    uint8_t buffer[DSTAR_FEC_SECTION_LENGTH_BYTES];
+    samplesToBits(m_headerBuffer, DSTAR_RADIO_SYMBOL_LENGTH, DSTAR_FEC_SECTION_LENGTH_SYMBOLS, buffer, DSTAR_FEC_SECTION_LENGTH_SAMPLES);
+
+    // Process the scrambling, interleaving and FEC, then return true if the chcksum was correct
+    uint8_t header[DSTAR_HEADER_LENGTH_BYTES];
+    bool ok = rxHeader(buffer, header);
+    if (!ok) {
+      // The checksum failed, return to looking for syncs
+      m_rxState = DSRXS_NONE;
+      m_maxFrameCorr = 0;
+      m_maxDataCorr  = 0;
+    } else {
       io.setDecode(true);
       io.setADCDetection(true);
 
       writeRSSIHeader(header);
-
-      ::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
-      m_rxBufferBits = 0U;
-
-      m_rxState  = DSRXS_DATA;
-      m_dataBits = MAX_SYNC_BITS;
-    } else {
-      // The checksum failed, return to looking for syncs
-      m_rxState = DSRXS_NONE;
     }
   }
+
+  // Ready to start the first data section
+  if (m_headerPtr == (DSTAR_FEC_SECTION_LENGTH_SAMPLES + 2U * DSTAR_RADIO_SYMBOL_LENGTH)) {
+    m_frameCount = 0U;
+    m_dataPtr    = 0U;
+
+    m_startPtr   = 476U;
+    m_syncPtr    = 471U;
+    m_maxSyncPtr = 472U;
+    m_minSyncPtr = 470U;
+
+    DEBUG5("DStarRX: calc start/sync/max/min", m_startPtr, m_syncPtr, m_maxSyncPtr, m_minSyncPtr);
+
+    m_rxState = DSRXS_DATA;
+  }
 }
 
-void CDStarRX::processData(bool bit)
+void CDStarRX::processData()
 {
-  m_patternBuffer <<= 1;
-  if (bit)
-    m_patternBuffer |= 0x01U;
-
-  WRITE_BIT2(m_rxBuffer, m_rxBufferBits, bit);
-  m_rxBufferBits++;
-
   // Fuzzy matching of the end frame sequences
-  if (countBits32((m_patternBuffer & END_SYNC_MASK) ^ END_SYNC_DATA) <= END_SYNC_ERRS) {
+  if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_END_SYNC_MASK) ^ DSTAR_END_SYNC_DATA) <= END_SYNC_ERRS) {
     DEBUG1("DStarRX: Found end sync in Data");
 
     io.setDecode(false);
@@ -401,35 +403,24 @@ void CDStarRX::processData(bool bit)
 
     serial.writeDStarEOT();
 
+    m_maxFrameCorr = 0;
+    m_maxDataCorr  = 0;
+
     m_rxState = DSRXS_NONE;
     return;
   }
 
   // Fuzzy matching of the data sync bit sequence
-  bool syncSeen = false;
-  if (m_rxBufferBits >= (DSTAR_DATA_LENGTH_BITS - 3U)) {
-    if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) <= DATA_SYNC_ERRS) {
-      m_rxBufferBits = DSTAR_DATA_LENGTH_BITS;
-      m_dataBits     = MAX_SYNC_BITS;
-      syncSeen       = true;
-    }
+  if (m_minSyncPtr < m_maxSyncPtr) {
+    if (m_dataPtr >= m_minSyncPtr && m_dataPtr <= m_maxSyncPtr)
+      correlateDataSync();
+  } else {
+    if (m_dataPtr >= m_minSyncPtr || m_dataPtr <= m_maxSyncPtr)
+      correlateDataSync();
   }
 
-  // Check to see if the sync is arriving late
-  if (m_rxBufferBits == DSTAR_DATA_LENGTH_BITS && !syncSeen) {
-    for (uint8_t i = 1U; i <= 3U; i++) {
-      uint32_t syncMask = DATA_SYNC_MASK >> i;
-      uint32_t syncData = DATA_SYNC_DATA >> i;
-      if (countBits32((m_patternBuffer & syncMask) ^ syncData) <= DATA_SYNC_ERRS) {
-        m_rxBufferBits -= i;
-        break;
-      }
-    }
-  }
-
-  m_dataBits--;
-
-  if (m_dataBits == 0U) {
+  // We've not seen a data sync for too long, signal RXLOST and change to RX_NONE
+  if (m_frameCount >= MAX_FRAMES) {
     DEBUG1("DStarRX: data sync timed out, lost lock");
 
     io.setDecode(false);
@@ -437,24 +428,35 @@ void CDStarRX::processData(bool bit)
 
     serial.writeDStarLost();
 
+    m_maxFrameCorr = 0;
+    m_maxDataCorr  = 0;
+
     m_rxState = DSRXS_NONE;
     return;
   }
 
-  // Send a data frame to the host if the required number of bits have been received, or if a data sync has been seen
-  if (m_rxBufferBits == DSTAR_DATA_LENGTH_BITS) {
-    if (syncSeen) {
-      m_rxBuffer[9U]  = DSTAR_DATA_SYNC_BYTES[9U];
-      m_rxBuffer[10U] = DSTAR_DATA_SYNC_BYTES[10U];
-      m_rxBuffer[11U] = DSTAR_DATA_SYNC_BYTES[11U];
-	    writeRSSIData(m_rxBuffer);
-    } else {
-	    serial.writeDStarData(m_rxBuffer, DSTAR_DATA_LENGTH_BYTES);
-	  }
+  // Send a data frame to the host if the required number of bits have been received
+  if (m_dataPtr == m_maxSyncPtr) {
+    uint8_t buffer[DSTAR_DATA_LENGTH_BYTES + 2U];
+    samplesToBits(m_dataBuffer, m_startPtr, DSTAR_DATA_LENGTH_SYMBOLS, buffer, DSTAR_DATA_LENGTH_SAMPLES);
 
-    // Start the next frame
-    ::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
-    m_rxBufferBits = 0U;
+    if ((m_frameCount % 21U) == 0U) {
+      if (m_frameCount == 0U) {
+        buffer[9U]  = DSTAR_DATA_SYNC_BYTES[9U];
+        buffer[10U] = DSTAR_DATA_SYNC_BYTES[10U];
+        buffer[11U] = DSTAR_DATA_SYNC_BYTES[11U];
+        DEBUG5("DStarRX: found start/sync/max/min", m_startPtr, m_syncPtr, m_maxSyncPtr, m_minSyncPtr);
+      }
+
+      writeRSSIData(buffer);
+    } else {
+      serial.writeDStarData(buffer, DSTAR_DATA_LENGTH_BYTES);
+    }
+
+    m_frameCount++;
+
+    m_maxFrameCorr = 0;
+    m_maxDataCorr  = 0;
   }
 }
 
@@ -500,6 +502,105 @@ void CDStarRX::writeRSSIData(unsigned char* data)
   m_rssiCount = 0U;
 }
 
+bool CDStarRX::correlateFrameSync()
+{
+  if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_FRAME_SYNC_MASK) ^ DSTAR_FRAME_SYNC_DATA) <= FRAME_SYNC_ERRS) {
+    uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_FRAME_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
+    if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
+      ptr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+    q31_t corr = 0;
+
+    for (uint8_t i = 0U; i < DSTAR_FRAME_SYNC_LENGTH_SYMBOLS; i++) {
+      q15_t val = m_dataBuffer[ptr];
+
+      if (DSTAR_FRAME_SYNC_SYMBOLS[i])
+        corr -= val;
+      else
+        corr += val;
+
+      ptr += DSTAR_RADIO_SYMBOL_LENGTH;
+      if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
+        ptr -= DSTAR_DATA_LENGTH_SAMPLES;
+    }
+
+    if (corr > m_maxFrameCorr) {
+      m_maxFrameCorr = corr;
+      m_headerPtr    = 0U;
+      return true;
+    }
+  }
+
+  return false;
+}
+
+bool CDStarRX::correlateDataSync()
+{
+  uint8_t maxErrs = 0U;
+  if (m_rxState == DSRXS_DATA)
+    maxErrs = DATA_SYNC_ERRS;
+
+  if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_DATA_SYNC_MASK) ^ DSTAR_DATA_SYNC_DATA) <= maxErrs) {
+    uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_DATA_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
+    if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
+      ptr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+    q31_t corr = 0;
+
+    for (uint8_t i = 0U; i < DSTAR_DATA_SYNC_LENGTH_SYMBOLS; i++) {
+      q15_t val = m_dataBuffer[ptr];
+
+      if (DSTAR_DATA_SYNC_SYMBOLS[i])
+        corr -= val;
+      else
+        corr += val;
+
+      ptr += DSTAR_RADIO_SYMBOL_LENGTH;
+      if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
+        ptr -= DSTAR_DATA_LENGTH_SAMPLES;
+    }
+
+    if (corr > m_maxDataCorr) {
+      m_maxDataCorr = corr;
+      m_frameCount  = 0U;
+
+      m_syncPtr    = m_dataPtr;
+
+      m_startPtr   = m_dataPtr + DSTAR_RADIO_SYMBOL_LENGTH;
+      if (m_startPtr >= DSTAR_DATA_LENGTH_SAMPLES)
+        m_startPtr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+      m_maxSyncPtr = m_syncPtr + 1U;
+      if (m_maxSyncPtr >= DSTAR_DATA_LENGTH_SAMPLES)
+        m_maxSyncPtr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+      m_minSyncPtr = m_syncPtr + DSTAR_DATA_LENGTH_SAMPLES - 1U;
+      if (m_minSyncPtr >= DSTAR_DATA_LENGTH_SAMPLES)
+        m_minSyncPtr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+      return true;
+    }
+  }
+
+  return false;
+}
+
+void CDStarRX::samplesToBits(const q15_t* inBuffer, uint16_t start, uint16_t count, uint8_t* outBuffer, uint16_t limit)
+{
+  for (uint16_t i = 0U; i < count; i++) {
+    q15_t sample = inBuffer[start];
+
+    if (sample < 0)
+      WRITE_BIT2(outBuffer, i, true);
+    else
+      WRITE_BIT2(outBuffer, i, false);
+
+    start += DSTAR_RADIO_SYMBOL_LENGTH;
+    if (start >= limit)
+      start -= limit;
+  }
+}
+
 bool CDStarRX::rxHeader(uint8_t* in, uint8_t* out)
 {
   int i;

DStarRX.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015,2016,2017,2020 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -37,13 +37,21 @@ public:
   void reset();
 
 private:
-  uint32_t     m_pll;
-  bool         m_prev;
   DSRX_STATE   m_rxState;
-  uint32_t     m_patternBuffer;
-  uint8_t      m_rxBuffer[100U];
-  unsigned int m_rxBufferBits;
-  unsigned int m_dataBits;
+  uint32_t     m_bitBuffer[DSTAR_RADIO_SYMBOL_LENGTH];
+  q15_t        m_headerBuffer[DSTAR_FEC_SECTION_LENGTH_SAMPLES + 2U * DSTAR_RADIO_SYMBOL_LENGTH];
+  q15_t        m_dataBuffer[DSTAR_DATA_LENGTH_SAMPLES];
+  uint16_t     m_bitPtr;
+  uint16_t     m_headerPtr;
+  uint16_t     m_dataPtr;
+  uint16_t     m_startPtr;
+  uint16_t     m_syncPtr;
+  uint16_t     m_minSyncPtr;
+  uint16_t     m_maxSyncPtr;
+  q31_t        m_maxFrameCorr;
+  q31_t        m_maxDataCorr;
+  uint16_t     m_frameCount;
+  uint8_t      m_countdown;
   unsigned int m_mar;
   int          m_pathMetric[4U];
   unsigned int m_pathMemory0[42U];
@@ -54,9 +62,12 @@ private:
   uint32_t     m_rssiAccum;
   uint16_t     m_rssiCount;
   
-  void    processNone(bool bit);
-  void    processHeader(bool bit);
-  void    processData(bool bit);
+  void    processNone(q15_t sample);
+  void    processHeader(q15_t sample);
+  void    processData();
+  bool    correlateFrameSync();
+  bool    correlateDataSync();
+  void    samplesToBits(const q15_t* inBuffer, uint16_t start, uint16_t count, uint8_t* outBuffer, uint16_t limit);
   void    writeRSSIHeader(unsigned char* header);
   void    writeRSSIData(unsigned char* data);
   bool    rxHeader(uint8_t* in, uint8_t* out);

DStarTX.cpp

@@ -198,7 +198,7 @@ m_txDelay(60U)       // 100ms
 {
   ::memset(m_modState, 0x00U, 20U * sizeof(q15_t));
 
-  m_modFilter.L           = DSTAR_RADIO_BIT_LENGTH;
+  m_modFilter.L           = DSTAR_RADIO_SYMBOL_LENGTH;
   m_modFilter.phaseLength = GAUSSIAN_0_35_FILTER_PHASE_LEN;
   m_modFilter.pCoeffs     = GAUSSIAN_0_35_FILTER;
   m_modFilter.pState      = m_modState;
@@ -252,8 +252,8 @@ void CDStarTX::process()
     m_buffer.get();
 
     for (uint8_t j = 0U; j < 3U; j++) {
-      for (uint8_t i = 0U; i < DSTAR_EOT_LENGTH_BYTES; i++)
-        m_poBuffer[m_poLen++] = DSTAR_EOT_BYTES[i];
+      for (uint8_t i = 0U; i < DSTAR_END_SYNC_LENGTH_BYTES; i++)
+        m_poBuffer[m_poLen++] = DSTAR_END_SYNC_BYTES[i];
     }
      
     m_poPtr = 0U;
@@ -262,11 +262,11 @@ void CDStarTX::process()
   if (m_poLen > 0U) {
     uint16_t space = io.getSpace();
     
-    while (space > (8U * DSTAR_RADIO_BIT_LENGTH)) {
+    while (space > (8U * DSTAR_RADIO_SYMBOL_LENGTH)) {
       uint8_t c = m_poBuffer[m_poPtr++];
       writeByte(c);
 
-      space -= 8U * DSTAR_RADIO_BIT_LENGTH;
+      space -= 8U * DSTAR_RADIO_SYMBOL_LENGTH;
       
       if (m_poPtr >= m_poLen) {
         m_poPtr = 0U;
@@ -412,7 +412,7 @@ void CDStarTX::txHeader(const uint8_t* in, uint8_t* out) const
 void CDStarTX::writeByte(uint8_t c)
 {
   q15_t inBuffer[8U];
-  q15_t outBuffer[DSTAR_RADIO_BIT_LENGTH * 8U];
+  q15_t outBuffer[DSTAR_RADIO_SYMBOL_LENGTH * 8U];
 
   uint8_t mask = 0x01U;
 
@@ -427,7 +427,7 @@ void CDStarTX::writeByte(uint8_t c)
 
   ::arm_fir_interpolate_q15(&m_modFilter, inBuffer, outBuffer, 8U);
   
-  io.write(STATE_DSTAR, outBuffer, DSTAR_RADIO_BIT_LENGTH * 8U);
+  io.write(STATE_DSTAR, outBuffer, DSTAR_RADIO_SYMBOL_LENGTH * 8U);
 }
 
 void CDStarTX::setTXDelay(uint8_t delay)

IO.cpp

@@ -133,7 +133,7 @@ void CIO::selfTest()
 {
   bool ledValue = false;
 
-  for (uint8_t i = 0; i < 6; i++) {
+  for (uint8_t i = 0U; i < 6U; i++) {
     ledValue = !ledValue;
 
     // We exclude PTT to avoid trigger the transmitter
@@ -144,21 +144,34 @@ void CIO::selfTest()
     setDMRInt(ledValue);
     setYSFInt(ledValue);
     setP25Int(ledValue);
+#if !defined(USE_ALTERNATE_NXDN_LEDS)
     setNXDNInt(ledValue);
+#endif
+#if !defined(USE_ALTERNATE_POCSAG_LEDS)
     setPOCSAGInt(ledValue);
+#endif
+#if !defined(USE_ALTERNATE_FM_LEDS)
     setFMInt(ledValue);
+#endif
 #endif
     delayInt(250);
   }
 
 #if defined(MODE_LEDS)
-  setDStarInt(true);
+  setDStarInt(false);
   setDMRInt(false);
   setYSFInt(false);
   setP25Int(false);
+#if !defined(USE_ALTERNATE_NXDN_LEDS)
   setNXDNInt(false);
+#endif
+#if !defined(USE_ALTERNATE_POCSAG_LEDS)
   setPOCSAGInt(false);
+#endif
+#if !defined(USE_ALTERNATE_FM_LEDS)
   setFMInt(false);
+#endif
+  setDStarInt(true);
 
   delayInt(250);
   setDMRInt(true);
@@ -220,7 +233,7 @@ void CIO::start()
 
   m_started = true;
 
-  setMode();
+  setMode(STATE_IDLE);
 }
 
 void CIO::process()
@@ -232,8 +245,7 @@ void CIO::process()
       if (m_modemState == STATE_DSTAR || m_modemState == STATE_DMR || m_modemState == STATE_YSF || m_modemState == STATE_P25 || m_modemState == STATE_NXDN || m_modemState == STATE_POCSAG) {
         if (m_modemState == STATE_DMR && m_tx)
           dmrTX.setStart(false);
-        m_modemState = STATE_IDLE;
-        setMode();
+        setMode(STATE_IDLE);
       }
 
       m_watchdog = 0U;
@@ -516,17 +528,34 @@ void CIO::setADCDetection(bool detect)
   m_detect = detect;
 }
 
-void CIO::setMode()
+void CIO::setMode(MMDVM_STATE state)
 {
+  if (state == m_modemState)
+    return;
+
 #if defined(MODE_LEDS)
-  setDStarInt(m_modemState == STATE_DSTAR);
-  setDMRInt(m_modemState   == STATE_DMR);
-  setYSFInt(m_modemState   == STATE_YSF);
-  setP25Int(m_modemState   == STATE_P25);
-  setNXDNInt(m_modemState  == STATE_NXDN);
-  setPOCSAGInt(m_modemState  == STATE_POCSAG);
-  setFMInt(m_modemState == STATE_FM);
+  switch (m_modemState) {
+    case STATE_DSTAR:  setDStarInt(false);  break;
+    case STATE_DMR:    setDMRInt(false);    break;
+    case STATE_YSF:    setYSFInt(false);    break;
+    case STATE_P25:    setP25Int(false);    break;
+    case STATE_NXDN:   setNXDNInt(false);   break;
+    case STATE_POCSAG: setPOCSAGInt(false); break;
+    case STATE_FM:     setFMInt(false);     break;
+  }
+
+  switch (state) {
+    case STATE_DSTAR:  setDStarInt(true);  break;
+    case STATE_DMR:    setDMRInt(true);    break;
+    case STATE_YSF:    setYSFInt(true);    break;
+    case STATE_P25:    setP25Int(true);    break;
+    case STATE_NXDN:   setNXDNInt(true);   break;
+    case STATE_POCSAG: setPOCSAGInt(true); break;
+    case STATE_FM:     setFMInt(true);     break;
+  }
 #endif
+
+  m_modemState = state;
 }
 
 void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset, bool useCOSAsLockout)

IO.h

@@ -38,7 +38,7 @@ public:
 
   void setDecode(bool dcd);
   void setADCDetection(bool detect);
-  void setMode();
+  void setMode(MMDVM_STATE state);
   
   void interrupt();
 

IOPins.h

@@ -59,9 +59,15 @@
 #elif defined(STM32F4_DVM)
     #include "pins/pins_f4_stm32dvm_v3.h"
 
+#elif defined(STM32F7_DVM)
+    #include "pins/pins_f7_stm32dvm_v5.h"
+
 #elif defined(DRCC_DVM_NQF)
     #include "pins/pins_f4_drcc_nqf.h"
 
+#elif defined(DRCC_DVM_HHP446)
+    #include "pins/pins_f4_drcc_hhp446.h"
+
 #elif defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
     #include "pins/pins_f4_stm32eda.h"
 

Makefile

@@ -133,8 +133,10 @@ DEFS_PI_F722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_PI -DHSE_VAL
 DEFS_F7M=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_F7M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
 # MMDVM_RPT_Hat F0DEI, DB9MAT, DF2ET board:
 DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# STM32F4 DVM board:
+# RB STM32F4_DVM board:
 DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
+# RB STM32F7 DVM board:
+DEFS_DVM722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F7_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
 # MMDVM_RPT_Hat BG4TGO, BG5HHP board:
 DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
 # DRCC_DVM BG7NQF board:
@@ -222,17 +224,29 @@ f767: LDFLAGS+=$(LDFLAGS_F767)
 f767: release_f7
 
 dvm: GitVersion.h
-dvm: CFLAGS+=$(CFLAGS_F4) $(DEFS_DVM)
-dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM)
+dvm: CFLAGS+=$(CFLAGS_F4) $(DEFS_DVM) -DDRCC_DVM_446
+dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM) -DDRCC_DVM_446
 dvm: LDFLAGS+=$(LDFLAGS_F4)
 dvm: release_f4
 
+dvm722: GitVersion.h
+dvm722: CFLAGS+=$(CFLAGS_F7) $(DEFS_DVM722) -DDRCC_DVM_722
+dvm722: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_DVM722) -DDRCC_DVM_722
+dvm722: LDFLAGS+=$(LDFLAGS_F722)
+dvm722: release_f7
+
 drcc_nqf: GitVersion.h
 drcc_nqf: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
 drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
 drcc_nqf: LDFLAGS+=$(LDFLAGS_F4)
 drcc_nqf: release_f4
 
+hhp446: GitVersion.h
+hhp446: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_HHP446
+hhp446: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_HHP446
+hhp446: LDFLAGS+=$(LDFLAGS_F4)
+hhp446: release_f4
+
 eda405: GitVersion.h
 eda405: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_405)
 eda405: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_405)
@@ -354,14 +368,12 @@ endif
 deploy-pi:
 ifneq ($(wildcard /usr/local/bin/stm32flash),)
 	-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	-/usr/local/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F4)
-	/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R -c /dev/ttyAMA0
+	/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R /dev/ttyAMA0
 endif
 
 ifneq ($(wildcard /usr/bin/stm32flash),)
 	-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	-/usr/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F4)
-	/usr/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R -c /dev/ttyAMA0
+	/usr/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R /dev/ttyAMA0
 endif
 
 deploy-f4m: deploy-pi
@@ -372,11 +384,11 @@ deploy-eda446: deploy-pi
 deploy-pi-f7:
 ifneq ($(wildcard /usr/local/bin/stm32flash),)
 	-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
+	/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R /dev/ttyAMA0
 
 else ifneq ($(wildcard /usr/bin/stm32flash),)
 	-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	/usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
+	/usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R /dev/ttyAMA0
 endif
 
 deploy-f7m:   deploy-pi-f7

SerialPort.cpp

@@ -97,13 +97,17 @@ const uint8_t MMDVM_DEBUG5       = 0xF5U;
 
 #if defined(DRCC_DVM_NQF)
 #define	HW_TYPE	"MMDVM DRCC_DVM_NQF"
-#elif defined(STM32F4_RPT_HAT_TGO)
-#define	HW_TYPE	"MMDVM RPT_HAT_TGO"
+#elif defined(DRCC_DVM_HHP446)
+#define	HW_TYPE	"MMDVM DRCC_DVM_HHP(446)"
+#elif defined(DRCC_DVM_722)
+#define HW_TYPE "MMDVM RB_STM32_DVM(722)"
+#elif defined(DRCC_DVM_446)
+#define HW_TYPE "MMDVM RB_STM32_DVM(446)"
 #else
 #define	HW_TYPE	"MMDVM"
 #endif
 
-#define DESCRIPTION "20200714 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
+#define DESCRIPTION "20210101 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
 
 #if defined(GITVERSION)
 #define concat(h, a, b, c) h " " a " " b " GitID #" c ""
@@ -568,9 +572,7 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
 
   cwIdTX.reset();
 
-  m_modemState = modemState;
-
-  io.setMode();
+  io.setMode(modemState);
 }
 
 void CSerialPort::start()
@@ -593,8 +595,7 @@ void CSerialPort::process()
         m_buffer[0U] = c;
         m_ptr = 1U;
         m_len = 0U;
-      }
-      else {
+      } else {
         m_ptr = 0U;
         m_len = 0U;
       }

SerialSTM.cpp

@@ -27,14 +27,14 @@
 Pin definitions:
 
 - Host communication:
-USART1 - TXD PA9  - RXD PA10 (MMDVM-Pi board, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board)
+USART1 - TXD PA9  - RXD PA10 (MMDVM-Pi board, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, STM32F7-DVM board)
 USART2 - TXD PA2  - RXD PA3  (Nucleo64 F446RE board, Morpho or Arduino header, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
 USART3 - TXD PC10 - RXD PC11 (Discovery board)
 USART3 - TXD PD8  - RXD PD9  (Nucleo144 F767ZI board)
 
 - Serial repeater:
 USART1 - TXD PA9  - RXD PA10 (Nucleo with Arduino header)
-UART5  - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
+UART5  - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, STM32F7-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
 */
 
 #if defined(STM32F4XX) || defined(STM32F7XX)
@@ -50,7 +50,7 @@ extern "C" {
 }
 
 /* ************* USART1 ***************** */
-#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
+#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
 
 volatile uint8_t  TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
 volatile uint8_t  RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
@@ -841,7 +841,7 @@ void CSerialPort::beginInt(uint8_t n, int speed)
       case 1U:
          #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
          InitUSART3(speed);
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
          InitUSART1(speed);
          #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          InitUSART2(speed);
@@ -869,7 +869,7 @@ int CSerialPort::availableInt(uint8_t n)
       case 1U:
          #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
          return AvailUSART3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
          return AvailUSART1();
          #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          return AvailUSART2();
@@ -895,7 +895,7 @@ int CSerialPort::availableForWriteInt(uint8_t n)
       case 1U:
          #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
          return AvailForWriteUSART3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
          return AvailForWriteUSART1();
          #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          return AvailForWriteUSART2();
@@ -921,7 +921,7 @@ uint8_t CSerialPort::readInt(uint8_t n)
       case 1U:
          #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
          return ReadUSART3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
          return ReadUSART1();
          #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          return ReadUSART2();
@@ -949,7 +949,7 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
          WriteUSART3(data, length);
          if (flush)
             TXSerialFlush3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
          WriteUSART1(data, length);
          if (flush)
             TXSerialFlush1();

pins/pins_f4_drcc_hhp446.h

@@ -0,0 +1,143 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_DRCC_HHP446_H
+#define _PINS_F4_DRCC_HHP446_H
+
+/*
+Pin definitions for DRCC_DVM BG5HHP F446 board rev1
+
+TX/PTT_LED  PB12   output
+RX/COS_LED  PB5    output
+STATUS_LED  PB10   output
+
+COS_IN      PB13   input
+
+DSTAR       N/A
+DMR         N/A
+YSF         N/A
+P25         N/A
+NXDN        N/A
+POCSAG      N/A
+
+MDMR/BIT0   PB8    output
+MYSF/BIT1   PB9    output
+MDSTAR/BIT2 PB14   output
+MP25/BIT3   PB15   output          Generic Mode Pins
+MNXDN       N/A
+MPOCSAG     N/A
+
+RX          PA0    analog input
+RSSI        PA1    analog input
+TX          PA4    analog output
+
+EXT_CLK     N/A
+
+UART1_TX    PA9    output
+UART1_RX    PA10   output          Host Data Communication
+
+UART2_TX    PA2    output
+UART2_RX    PA3    output          Nextion Data Communication
+
+I2C1_SCL    PB6    output
+I2C1_SDA    PB7    output          OLED Data Communication as master
+
+*/
+
+#define PIN_COS           GPIO_Pin_13
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_12
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_5
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_10
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_TXLED         GPIO_Pin_4
+#define PORT_TXLED        GPIOB
+#define RCC_Per_TXLED     RCC_AHB1Periph_GPIOB
+
+// #define PIN_P25           GPIO_Pin_3
+// #define PORT_P25          GPIOB
+// #define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+// #define PIN_NXDN          GPIO_Pin_10
+// #define PORT_NXDN         GPIOA
+// #define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+// #define PIN_POCSAG        GPIO_Pin_12
+// #define PORT_POCSAG       GPIOB
+// #define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+// #define PIN_DSTAR         GPIO_Pin_10
+// #define PORT_DSTAR        GPIOB
+// #define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+// #define PIN_DMR           GPIO_Pin_4
+// #define PORT_DMR          GPIOB
+// #define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+// #define PIN_YSF           GPIO_Pin_5
+// #define PORT_YSF          GPIOB
+// #define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_15
+#define PORT_MP25         GPIOB
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOB
+
+#define PIN_MDSTAR        GPIO_Pin_9
+#define PORT_MDSTAR       GPIOB
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOB
+
+#define PIN_MDMR          GPIO_Pin_8
+#define PORT_MDMR         GPIOB
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOB
+
+#define PIN_MYSF          GPIO_Pin_14
+#define PORT_MYSF         GPIOB
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOB
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+#define PORT_TX           GPIOA
+#define RCC_Per_TX        RCC_AHB1Periph_GPIOA
+
+#endif

pins/pins_f4_stm32dvm_v3.h

@@ -32,7 +32,7 @@ NXDN     PB9    output
 DSTAR    PB6    output
 DMR      PB5    output
 YSF      PB7    output
-POCSAG   PC10   output
+POCSAG   PC10   output (Not Valid)
 
 RX       PB0    analog input
 RSSI     PB1    analog input
@@ -78,9 +78,15 @@ EXT_CLK  PA15   input
 #define PORT_YSF          GPIOB
 #define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
 
+/*
 #define PIN_POCSAG        GPIO_Pin_10
 #define PORT_POCSAG       GPIOC
 #define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOC
+*/
+
+#define PIN_FM            GPIO_Pin_14
+#define PORT_FM           GPIOB
+#define RCC_Per_FM        RCC_AHB1Periph_GPIOB
 
 #define PIN_EXT_CLK       GPIO_Pin_15
 #define SRC_EXT_CLK       GPIO_PinSource15
@@ -99,4 +105,4 @@ EXT_CLK  PA15   input
 #define PIN_TX            GPIO_Pin_4
 #define PIN_TX_CH         DAC_Channel_1
 
-#endif
+#endif

pins/pins_f7_stm32dvm_v5.h

@@ -0,0 +1,108 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_STM32DVM_V5_H
+#define _PINS_F7_STM32DVM_V5_H
+
+/*
+Pin definitions for STM32F4 STM32-DVM rev 5 Board:
+
+COS      PB13   input
+PTT      PB12   output
+COSLED   PB4    output
+LED      PB3    output
+
+P25      PB8    output
+NXDN     PB9    output
+DSTAR    PB6    output
+DMR      PB5    output
+YSF      PB7    output
+POCSAG   PC10   output (Not Valid)
+
+RX       PB0    analog input
+RSSI     PB1    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_13
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+
+#define PIN_PTT           GPIO_Pin_12
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_4
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_3
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_8
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_9
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_6
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_5
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_7
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+/*
+#define PIN_POCSAG        GPIO_Pin_10
+#define PORT_POCSAG       GPIOC
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOC
+*/
+
+#define PIN_FM            GPIO_Pin_14
+#define PORT_FM           GPIOB
+#define RCC_Per_FM        RCC_AHB1Periph_GPIOB
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_8
+#define PORT_RX           GPIOB
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOB
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_9
+#define PORT_RSSI         GPIOB
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOB
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif