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Author SHA1 Message Date
Jonathan Naylor c2ba5ab273 Merge branch 'boxcar_dstar_correlator' into boxcar_dstar_correlator_48k 2018-01-11 07:29:33 +00:00
Jonathan Naylor 6098ac3e6d Merge branch 'boxcar' into boxcar_dstar_correlator 2018-01-11 07:29:04 +00:00
Jonathan Naylor c1f12705a9 Merge branch 'master' into boxcar 2018-01-11 07:28:42 +00:00
Jonathan Naylor fdc15b355f Merge pull request #139 from juribeparada/master
Reducing the bit error number for the EOT sequence (D-Star)
2018-01-11 07:21:23 +00:00
Andy CA6JAU d99e21f0f9 Reducing the bit error number for the EOT sequence (D-Star) 2018-01-10 20:04:29 -03:00
Jonathan Naylor 84ad5c47fc Merge branch 'boxcar_dstar_correlator' into boxcar_dstar_correlator_48k 2018-01-08 18:24:46 +00:00
Jonathan Naylor 373e1893bc Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-01-08 18:24:16 +00:00
Jonathan Naylor aa52b03bc2 Merge branch 'master' into dstar_correlator 2018-01-08 18:23:55 +00:00
Jonathan Naylor 6192a88b98 Merge branch 'master' into boxcar 2018-01-08 18:23:07 +00:00
Andy CA6JAU b988750e78 Merge remote-tracking branch 'g4klx/master' 2018-01-07 10:28:31 -03:00
Jonathan Naylor 78a51d416d Merge pull request #137 from sfowlr/master
STM32-DVM & MMDVM_POG RSSI bugfix
2018-01-07 13:28:01 +00:00
Jonathan Naylor 3a539e1243 Merge pull request #138 from juribeparada/master
Adding P25 1011 Hz Test Pattern
2018-01-07 13:27:42 +00:00
Andy CA6JAU db133c819e Add comments 2018-01-07 09:48:30 -03:00
Andy CA6JAU 02d5218baa Changing name DMR1KCAL to DMRCAL1K 2018-01-07 00:24:58 -03:00
Andy CA6JAU 394d0cbc6b Merge remote-tracking branch 'g4klx/master' 2018-01-07 00:07:35 -03:00
Andy CA6JAU b4456aed28 Adding P25 1011 Hz Test Pattern 2018-01-07 00:06:41 -03:00
Spencer Fowler 9e56268156 STM32-DVM & MMDVM_POG RSSI bugfix 2018-01-06 18:48:56 -06:00
Jonathan Naylor 94e65ba6cc Merge pull request #136 from juribeparada/master
Adding DMR 1031 Hz Test Pattern
2018-01-06 14:31:02 +00:00
Andy CA6JAU 2ec02e53e3 Fix comment and formatting 2018-01-06 11:05:43 -03:00
Andy CA6JAU c6e9227aee More cleanup and adding comments 2018-01-06 11:00:03 -03:00
Andy CA6JAU e1d1faea82 Code reordering and cleanup 2018-01-04 01:10:33 -03:00
Andy CA6JAU 4871ad1210 Adding DMR 1031 Hz Test Pattern 2018-01-03 00:55:14 -03:00
Jonathan Naylor a784ffeddf Merge branch 'boxcar_dstar_correlator' into boxcar_dstar_correlator_48k 2018-01-01 13:37:21 +00:00
Jonathan Naylor 017df518a6 Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2018-01-01 13:36:34 +00:00
Jonathan Naylor cf849ccf65 Merge branch 'master' into dstar_correlator 2018-01-01 13:36:03 +00:00
Jonathan Naylor 8651e3a77b Merge branch 'master' into boxcar 2018-01-01 13:35:27 +00:00
Jonathan Naylor 7b03336469 Merge pull request #134 from juribeparada/master
Adding 80 Hz square wave test signal support for MMDVMCal
2017-12-31 11:30:55 +00:00
Andy CA6JAU b846e5a7f3 Adding 80 Hz square wave test signal support 2017-12-30 20:47:48 -03:00
Andy CA6JAU ee1d512132 Merge remote-tracking branch 'g4klx/master' 2017-12-30 18:19:16 -03:00
Jonathan Naylor 6ae65ababa Merge branch 'boxcar_dstar_correlator' into boxcar_dstar_correlator_48k 2017-12-16 21:06:31 +00:00
Jonathan Naylor 83dd360062 Merge pull request #128 from F4FXL/dstar_correlator
Fixes erroneous end sync seen on station having QSB
2017-12-16 21:03:53 +00:00
Jonathan Naylor d298a5bde5 Merge pull request #129 from F4FXL/boxcar_dstar_correlator
Fixes erroneous end sync on stations having QSB
2017-12-16 21:03:38 +00:00
F4FXL 925263a216 Fixes erroneous end sync on stations having QSB 2017-12-16 09:04:31 +01:00
F4FXL 551aa3bb20 Fixes erroneous end of frame seen on station having QSB 2017-12-16 09:02:15 +01:00
Jonathan Naylor 151d068b80 Merge branch 'boxcar_dstar_correlator' into boxcar_dstar_correlator_48k 2017-11-06 09:34:22 +00:00
Jonathan Naylor c62a686d30 Merge branch 'master' into boxcar_dstar_correlator 2017-11-06 09:33:59 +00:00
Jonathan Naylor cb78220156 Merge branch 'master' into dstar_correlator 2017-11-06 09:33:44 +00:00
Jonathan Naylor cb00f4aba7 Merge branch 'master' into boxcar 2017-11-06 09:33:22 +00:00
Jonathan Naylor 628665175c Merge pull request #126 from juribeparada/devel
Adding support for MMDVM-Pi with STM32F722
2017-11-06 09:32:28 +00:00
Andy CA6JAU a921df7335 Separating linker script for F722 and F767 2017-11-04 15:28:38 -03:00
Andy CA6JAU 6bbc716e4b Fixing delay loop for all STM32F7 devices 2017-11-04 15:27:32 -03:00
Andy CA6JAU cf448158cb Adding support for MMDVM-Pi with STM32F722 2017-11-02 00:41:26 -03:00
Andy CA6JAU 6a6688ea8d Merge remote-tracking branch 'g4klx/master' 2017-11-01 21:01:30 -03:00
Andy CA6JAU c86ba51523 Merge remote-tracking branch 'g4klx/master' into devel 2017-11-01 21:01:07 -03:00
Jonathan Naylor f7caeea07e Merge branch 'boxcar_dstar_correlator' into boxcar_dstar_correlator_48k 2017-10-30 14:07:29 +00:00
Jonathan Naylor 750ac02b7e Merge branch 'boxcar' into boxcar_dstar_correlator 2017-10-30 14:07:07 +00:00
Jonathan Naylor 22297c613c Merge branch 'master' into dstar_correlator 2017-10-30 14:06:42 +00:00
Jonathan Naylor 91a87f4581 Merge branch 'master' into boxcar 2017-10-30 14:06:06 +00:00
Jonathan Naylor a8eae44209 Merge pull request #125 from juribeparada/devel
Adding pin definitions for MMDVM-F4M Pi-Hat F0DEI board
2017-10-30 14:05:13 +00:00
Jonathan Naylor 417555e515 Merge branch 'boxcar_dstar_correlator' into boxcar_dstar_correlator_48k 2017-10-28 12:47:15 +01:00
Jonathan Naylor 4ccc004de3 Merge branch 'master' into boxcar_dstar_correlator 2017-10-28 12:46:40 +01:00
Jonathan Naylor bf1de4f307 Merge branch 'master' into boxcar 2017-10-28 12:46:19 +01:00
Jonathan Naylor 24741a11c6 Merge branch 'master' into dstar_correlator 2017-10-28 12:45:40 +01:00
Jonathan Naylor efa407a579 Add the optional RX DC Offset. 2017-10-28 12:45:04 +01:00
Jonathan Naylor bca8514060 Update the TODO list, it's now empty. 2017-10-24 22:11:52 +01:00
Andy CA6JAU b54dc34215 Fix mistake in Makefile 2017-10-22 22:55:35 -03:00
Andy CA6JAU 167296200d Adding pin definitions for MMDVM-F4M Pi-Hat F0DEI board 2017-10-22 22:48:16 -03:00
Andy CA6JAU ca6601ca6d Merge remote-tracking branch 'g4klx/master' 2017-10-22 21:00:03 -03:00
Jonathan Naylor 8d7b4ef84d Merge pull request #124 from juribeparada/master
Better way for sampling frequency calculation for MMDVM-Pi
2017-10-16 09:23:58 +01:00
Jonathan Naylor a7aade4d81 Merge pull request #123 from juribeparada/boxcar_dstar_correlator_48k
More changes for 48 kHz
2017-10-16 09:23:47 +01:00
Andy CA6JAU 2279162db5 Better way for sampling frequency calculation for MMDVM-Pi 2017-10-15 17:32:24 -03:00
Andy CA6JAU 942b9365a6 Better way for sampling frequency calculation for MMDVM-Pi 2017-10-15 17:23:21 -03:00
Andy CA6JAU 4ac7d63af9 Adding 48 kHz in description (but shorting string) 2017-10-15 13:30:12 -03:00
Andy CA6JAU c911ec771c Merge branch 'boxcar_dstar_correlator_48k' of https://github.com/g4klx/MMDVM into boxcar_dstar_correlator_48k 2017-10-15 12:27:16 -03:00
Andy CA6JAU b1dceec444 Updating serial port watchdog for 48 kHz 2017-10-15 12:16:19 -03:00
Andy CA6JAU 6192d75c4a Removing 48 kHz string in description 2017-10-15 11:27:45 -03:00
Jonathan Naylor b2567f09dc Merge branch 'boxcar_dstar_correlator' into boxcar_dstar_correlator_48k 2017-10-15 13:22:12 +01:00
Jonathan Naylor 293a5b6912 Merge branch 'master' into dstar_correlator 2017-10-15 13:21:50 +01:00
Jonathan Naylor 442627dc35 Merge branch 'master' into boxcar_dstar_correlator 2017-10-15 13:21:16 +01:00
Jonathan Naylor 5f8a323dde Merge branch 'master' into boxcar 2017-10-15 13:20:52 +01:00
Jonathan Naylor 9cfbdebc7b Merge pull request #122 from juribeparada/master
No external clock needed for MMDVM-Pi
2017-10-15 13:19:59 +01:00
Andy CA6JAU b0f8cb8908 Fix D-Star for 48 kHz 2017-10-14 23:28:25 -03:00
Andy CA6JAU 7583446380 No external clock needed for MMDVM-Pi 2017-10-14 21:26:53 -03:00
Andy CA6JAU 2f766ffeea Increase DMR rssi buffer size 2017-10-14 21:17:55 -03:00
Andy CA6JAU 7ea9e692bb Merge branch 'boxcar_dstar_correlator_48k' of https://github.com/g4klx/MMDVM into boxcar_dstar_correlator_48k 2017-10-14 19:34:10 -03:00
Andy CA6JAU 7f251e1380 Additional changes for 48 kHz 2017-10-14 19:33:41 -03:00
Jonathan Naylor 30212eebad Merge pull request #121 from juribeparada/boxcar_dstar_correlator_48k
TX filter coefficients for 48 kHz
2017-10-14 20:54:01 +01:00
Andy CA6JAU 551eac3140 TX filter coefficients for 48 kHz 2017-10-14 12:18:43 -03:00
Jonathan Naylor e469294348 Change the hardware sample rate and ring buffer sizes. 2017-10-12 13:22:41 +01:00
Jonathan Naylor 4a8d2d5cd1 Begin conversion to 48 kHz sample rate. 2017-10-12 12:38:32 +01:00
Andy CA6JAU 94b4fe3fd6 Merge remote-tracking branch 'g4klx/master' 2017-10-02 14:21:30 -03:00
Jonathan Naylor 11809a6baf Merge branch 'master' into boxcar_dstar_correlator 2017-10-02 16:35:46 +01:00
Jonathan Naylor 7e8d018242 Merge branch 'master' into dstar_correlator 2017-10-02 16:35:30 +01:00
Jonathan Naylor 436ca1d851 Merge branch 'master' into boxcar 2017-10-02 16:35:14 +01:00
Jonathan Naylor d86b10fc1d Merge pull request #117 from juribeparada/master
Fix some comments for STM32F4XX & STM32F7XX
2017-10-02 16:33:22 +01:00
Andy CA6JAU 7996a45125 Fix some comments for STM32FXXX 2017-10-02 12:20:25 -03:00
Jonathan Naylor 1162354c43 Merge branch 'boxcar' into boxcar_dstar_correlator 2017-09-27 09:22:20 +01:00
Jonathan Naylor 3b84cf85c3 Merge branch 'master' into dstar_correlator 2017-09-27 09:21:56 +01:00
Jonathan Naylor ec34eb4a64 Merge branch 'master' into boxcar 2017-09-27 09:21:33 +01:00
Jonathan Naylor 655e7f8218 Merge pull request #115 from juribeparada/master
Separating STM32F4 and STM32F7 compilation in Makefile
2017-09-27 09:19:29 +01:00
Andy CA6JAU c2a3f83a9f Separating STM32F4 and STM32F7 compilation in Makefile 2017-09-24 20:52:05 -03:00
Andy CA6JAU 0505e76422 Removing cstddef include for better toolchain compatibility (F4 & F7 devices). Please update the Lib. 2017-09-23 12:47:43 -03:00
Andy CA6JAU 265828b127 Merge remote-tracking branch 'g4klx/master' 2017-09-23 12:32:53 -03:00
Jonathan Naylor 9a5f932e6a Merge branch 'master' into boxcar_dstar_correlator 2017-09-10 14:41:12 +01:00
Jonathan Naylor ef8f5bb80b Merge branch 'master' into dstar_correlator 2017-09-10 14:40:40 +01:00
Jonathan Naylor b76e95b540 Merge branch 'master' into boxcar 2017-09-10 14:39:51 +01:00
Jonathan Naylor 4134a656b0 Merge pull request #114 from phl0/CreateBinaryOnCompile
Create .bin on compile target instead of upload
2017-09-10 13:30:31 +01:00
phl0 cd0bd6e5c4 Create .bin on compile target instead of upload 2017-09-10 14:04:41 +02:00
Jonathan Naylor 0231ce38d5 Merge branch 'master' into boxcar_dstar_correlator 2017-09-07 09:03:48 +01:00
Jonathan Naylor 037810b23b Merge branch 'master' into dstar_correlator 2017-09-07 09:03:34 +01:00
Jonathan Naylor b017e75787 Merge branch 'master' into boxcar 2017-09-07 09:03:17 +01:00
Jonathan Naylor 418ce895cb Merge pull request #113 from juribeparada/master
Changing service LED pinout for F767
2017-09-07 07:14:44 +01:00
Andy CA6JAU 8a9510b48a Fixing pinout information for Nucleo64 F446 and Nucleo144 F767 2017-09-06 23:23:24 -03:00
Andy CA6JAU b22ada3fa2 Changing service LED pinout for F767 2017-09-06 23:02:02 -03:00
Andy CA6JAU b4ac4838fd Merge remote-tracking branch 'g4klx/master' 2017-09-04 00:18:16 -03:00
Jonathan Naylor 8ff924e376 Merge branch 'master' into boxcar_dstar_correlator 2017-08-31 08:39:53 +01:00
Jonathan Naylor f7de632cd5 Merge branch 'master' into dstar_correlator 2017-08-31 08:39:36 +01:00
Jonathan Naylor 6221386873 Merge branch 'master' into boxcar 2017-08-31 08:39:15 +01:00
Jonathan Naylor 89000729d2 Merge pull request #112 from N4IRS/patch-1
Fix undefined reference
2017-08-31 08:37:52 +01:00
Steve Zingman abea72b4d5 Fix undefined reference
Fix undefined reference to `CIO::delayInt(unsigned int)' for LED test
2017-08-30 21:13:33 -04:00
Jonathan Naylor cc3c676082 Merge branch 'master' into boxcar_dstar_correlator 2017-08-30 09:18:31 +01:00
Jonathan Naylor a554a86202 Merge branch 'master' into dstar_correlator 2017-08-30 09:18:11 +01:00
Jonathan Naylor 3c1b41c03f Merge branch 'master' into boxcar 2017-08-30 09:17:50 +01:00
Jonathan Naylor 76c3e5786c Merge pull request #111 from juribeparada/master
Adding LEDs selftest at start-up
2017-08-29 20:24:57 +01:00
Andy CA6JAU 793407fe16 Merge remote-tracking branch 'g4klx/master' 2017-08-29 14:52:24 -03:00
Andy CA6JAU 990bf2a16a Fix delay function for F767 2017-08-29 14:51:20 -03:00
Andy CA6JAU ea37f67b91 Adding conditional compilation for LED selftest 2017-08-29 14:39:16 -03:00
Andy CA6JAU a805652f48 Change the LED sequence 2017-08-29 08:48:20 -03:00
Jonathan Naylor 4eda2b61f5 Merge pull request #109 from juribeparada/dstar_correlator
Adding support for STM32F767 dstar_correlator branch
2017-08-29 09:17:09 +01:00
Jonathan Naylor f06bd5125b Merge branch 'dstar_correlator' into dstar_correlator 2017-08-29 09:17:01 +01:00
Jonathan Naylor 84df334f52 Merge pull request #110 from juribeparada/boxcar_dstar_correlator
Adding support for STM32F767 boxcar_dstar_correlator branch
2017-08-29 09:15:45 +01:00
Jonathan Naylor b88a3d02bf Merge branch 'boxcar' into boxcar_dstar_correlator 2017-08-29 08:55:12 +01:00
Jonathan Naylor a0afe0e54f Merge branch 'master' into dstar_correlator 2017-08-29 08:50:44 +01:00
Jonathan Naylor 7e85a64a41 Remove compiler warning. 2017-08-29 08:37:48 +01:00
Jonathan Naylor c820b22524 Merge pull request #108 from juribeparada/boxcar
Adding support for STM32F767 boxcar branch
2017-08-29 07:24:25 +01:00
Andy CA6JAU eb4cd221b2 Changing LEDs sequence 2017-08-29 00:57:52 -03:00
Andy CA6JAU 7fae32042f Fix typo 2017-08-28 23:07:30 -03:00
Andy CA6JAU edbf2b3ec0 Fix typo 2017-08-28 23:02:28 -03:00
Andy CA6JAU ac31999d9d Adding support for STM32F767 boxcar_dstar_correlator branch 2017-08-28 22:59:37 -03:00
Andy CA6JAU 2833ed2d2e Adding support for STM32F767 dstar_correlator branch 2017-08-28 22:42:26 -03:00
Andy CA6JAU ebd86df3ef Fix Config.h 2017-08-28 21:25:40 -03:00
Andy CA6JAU 918403c399 Adding support for STM32F767 boxcar branch 2017-08-28 21:18:06 -03:00
Andy CA6JAU 7c243af5da Merge branch 'boxcar' of https://github.com/g4klx/MMDVM into boxcar 2017-08-28 20:54:31 -03:00
Andy CA6JAU a244b86f36 Exclude PTT to avoid trigger the transmitter 2017-08-28 13:49:52 -03:00
Jonathan Naylor 56a12a61c2 Merge pull request #107 from phl0/fixYSF
Refactor variable initialization in YSFRX.h
2017-08-28 08:28:34 +01:00
phl0 595f38b796 Refactor variable initialization in YSFRX.h 2017-08-28 07:48:25 +02:00
Andy CA6JAU d6b7796c25 Merge remote-tracking branch 'g4klx/master' 2017-08-28 00:44:59 -03:00
Andy CA6JAU 70e1fd4264 Adding LEDs selftest at start-up 2017-08-28 00:43:24 -03:00
Jonathan Naylor 00bc8be152 Merge pull request #106 from juribeparada/master
Add support for STM32F767 (Nucleo-144 F767ZI)
2017-08-27 22:47:42 +01:00
Andy CA6JAU cce2cc3cfc Including F767 target into the Makefile 2017-08-27 16:28:08 -03:00
Andy CA6JAU 1f5a4f1ad7 Removing unnecessary “defined(STM32F4)” 2017-08-27 15:20:46 -03:00
Andy CA6JAU a60059bc90 Adding preliminary support for STM32F767 (Nucleo-144 F767ZI) 2017-08-24 22:24:27 -03:00
Andy CA6JAU 6c6b6c19fc Merge remote-tracking branch 'g4klx/master' 2017-08-24 21:22:45 -03:00
Jonathan Naylor 2b502848c1 Adding watchdog to host serial port. 2017-08-20 16:07:28 +01:00
Jonathan Naylor d91a155084 Add watchdog to host serial port. 2017-08-20 15:59:48 +01:00
Jonathan Naylor 7bb042a6ca Adding watchdog to the host serial port. 2017-08-20 15:52:52 +01:00
Jonathan Naylor 5b1075f0f7 Merge pull request #104 from juribeparada/master
Adding watchdog to host serial port
2017-08-20 15:41:04 +01:00
Andy CA6JAU 17007dd1e4 Merge remote-tracking branch 'g4klx/master' 2017-08-20 11:20:52 -03:00
Andy CA6JAU 8f317fd332 Adding watchdog to host serial port 2017-08-20 11:19:58 -03:00
Jonathan Naylor 14ce682210 Add optional TX DC offset. 2017-08-20 12:23:51 +01:00
Jonathan Naylor dc9d83f9f0 Add optional TX DC offset. 2017-08-20 12:19:04 +01:00
Jonathan Naylor fbd9c4d18b Add an optional TX DC offset. 2017-08-20 12:14:58 +01:00
Jonathan Naylor 1cee9e19c0 Add an adjustable transmit DC offset. 2017-08-20 12:07:05 +01:00
Andy CA6JAU 5b313b7cec Replace “GPIO_Speed_50MHz” definition for a better one “GPIO_Fast_Speed” (STM32F4) 2017-08-19 13:54:03 -03:00
Andy CA6JAU 8b52d372eb Merge remote-tracking branch 'g4klx/master' 2017-08-19 10:05:03 -03:00
Jonathan Naylor 76312c7bb9 Re-add the const qualifiers. 2017-08-18 11:04:06 +01:00
Jonathan Naylor 2a5690fd4d Re-add the const qualifiers. 2017-08-18 11:02:33 +01:00
Jonathan Naylor 58966406da Re-add the const qualifiers. 2017-08-18 11:00:25 +01:00
Jonathan Naylor f4637585f6 Re-add the const qualifiers. 2017-08-18 10:57:47 +01:00
Jonathan Naylor 161736925e Optimise the DC offset processing. 2017-08-18 10:55:32 +01:00
Jonathan Naylor 9398d03e0b Optimised the DC offset processing. 2017-08-18 10:48:23 +01:00
Jonathan Naylor 3e03fcff8e Fix the lengths in the DC removal code. 2017-08-18 10:42:41 +01:00
Jonathan Naylor e707391a5e Optimise the DC offset removal. 2017-08-18 10:40:34 +01:00
Jonathan Naylor 74682e7ac0 Optimise the DC offset code. 2017-08-18 10:27:23 +01:00
Andy CA6JAU cff5a58bc7 Merge branch 'boxcar' of https://github.com/g4klx/MMDVM into boxcar 2017-08-13 17:19:50 -03:00
Andy CA6JAU 20cf355e7e Merge remote-tracking branch 'g4klx/master' 2017-08-13 17:17:25 -03:00
Jonathan Naylor 51577efd79 Merge branch 'master' into boxcar 2017-08-13 18:51:41 +01:00
Jonathan Naylor 04ca97e5f8 Add enhancements suggested by IZ1MLT. 2017-08-13 18:51:09 +01:00
Jonathan Naylor 064de9fef7 Merge branch 'dstar_correlator' into boxcar_dstar_correlator 2017-08-13 18:41:41 +01:00
Jonathan Naylor c43616f3c5 Enhancements suggested by IZ1MLT. 2017-08-13 18:40:05 +01:00
Jonathan Naylor e6adc0a296 Forgot the Q31 to Q15 conversion. 2017-08-02 20:38:46 +01:00
Jonathan Naylor 13f340917e Merge branch 'boxcar' into boxcar_dstar_correlator 2017-08-02 20:36:57 +01:00
Jonathan Naylor f195fd6f66 Merge branch 'master' into dstar_correlator 2017-08-02 19:39:15 +01:00
Jonathan Naylor 469be87dc3 Merge branch 'master' into boxcar 2017-07-31 21:58:16 +01:00
Jonathan Naylor 669acb99e8 Remove the DC blocker from DMR. 2017-07-31 21:54:26 +01:00
Jonathan Naylor 7f8a0a71f5 Merge branch 'boxcar' into boxcar_dstar_correlator 2017-07-20 21:44:39 +01:00
Jonathan Naylor 16a43db79a Further optimisation of the calculated values. 2017-07-17 21:26:39 +01:00
Jonathan Naylor a033b2db7b Adjust values slightly. 2017-07-17 21:16:24 +01:00
Jonathan Naylor 88ab312da0 Merge branch 'master' into dstar_correlator 2017-07-16 19:22:56 +01:00
Jonathan Naylor 8ce38eec9a Merge branch 'master' into boxcar 2017-07-16 19:01:54 +01:00
Jonathan Naylor ba81fa7396 Forgot this file. 2017-07-16 18:58:12 +01:00
Jonathan Naylor 8540964097 Remove any DC offset from before any further filtering takes place. 2017-07-16 18:57:15 +01:00
Jonathan Naylor 49383ca921 Get the RSSI working properly and simplify calculations. 2017-07-16 18:46:09 +01:00
Jonathan Naylor ed07175437 Tweak the settings. 2017-07-11 21:10:03 +01:00
Jonathan Naylor c8208ab1df Added extra debugging and updated position calculations. 2017-07-10 19:58:50 +01:00
Jonathan Naylor 68f0fa8132 Merge branch 'master' into boxcar 2017-07-10 19:45:47 +01:00
Jonathan Naylor 9d1ebc0f8f Small refactor. 2017-07-10 19:41:01 +01:00
Andy CA6JAU 786e57d043 Merge remote-tracking branch 'g4klx/master' 2017-07-09 16:57:37 -04:00
Jonathan Naylor 902b079de2 Merge pull request #100 from juribeparada/devel
DC estimator filter for all modes
2017-07-09 21:22:52 +01:00
Andy CA6JAU 54f54ab518 Remove unused variables 2017-07-09 15:02:30 -04:00
Andy CA6JAU 954131f73c Merge branch 'boxcar' of https://github.com/g4klx/MMDVM into boxcar 2017-07-06 19:55:34 -04:00
Andy CA6JAU 06ec4b79a5 Merge remote-tracking branch 'g4klx/master' into boxcar 2017-07-06 19:55:01 -04:00
Jonathan Naylor 90797696dd First compileable version, but untested. 2017-07-06 20:28:20 +01:00
Jonathan Naylor de0aed2d2b Increase amplitude of the boxcar filter. 2017-07-06 20:09:57 +01:00
Andy CA6JAU f8d767913e Adding DC estimator filter for all modes 2017-07-06 00:51:46 -04:00
Jonathan Naylor 266db8bedb Merge pull request #99 from juribeparada/master
Workaround for stm32flash bug and STM32F446 Pi version
2017-07-04 20:03:28 +01:00
Andy CA6JAU 6c4496e034 Updating Coocox project file 2017-07-04 13:42:51 -04:00
Andy CA6JAU 8db83708ca Disabling default enabled SEND_RSSI_DATA and SERIAL_REPEATER for STM32F446 Pi version 2017-07-04 13:39:01 -04:00
Andy CA6JAU 7f45a0da83 Workaround for stm32flash bug and STM32F446 Pi version 2017-07-04 13:35:44 -04:00
Andy CA6JAU ce03ad4ab7 Merge remote-tracking branch 'g4klx/master' 2017-07-04 13:32:17 -04:00
Jonathan Naylor 4b253f888d Increase the boxcar level. 2017-07-03 20:29:52 +01:00
Jonathan Naylor c22f360ed1 More changes to the D-Star RX. 2017-07-03 20:26:24 +01:00
Jonathan Naylor 5d74c2f7bf First changes for correlation of D-Star. 2017-07-02 17:57:17 +01:00
Jonathan Naylor 316085f2a6 Try the boxcar filter on all modes. 2017-07-02 17:08:45 +01:00
Jonathan Naylor ae9e35ccad Merge pull request #98 from phl0/dev
Added some more description on pinouts of STM
2017-06-21 19:15:04 +01:00
phl0 9e5234539e Add pin number for STM32F4 discovery 2017-06-21 12:53:04 +02:00
phl0 dea7c714c0 Add pin numbers for morpho header 2017-06-21 12:44:53 +02:00
phl0 4690186812 Add pin numbers 2017-06-21 12:36:11 +02:00
Andy CA6JAU 399b6e1d85 Merge remote-tracking branch 'g4klx/master' 2017-06-18 10:01:50 -04:00
Jonathan Naylor c2ed9d4ae7 Merge pull request #97 from phl0/fixUpload
Fix Arduino Makefile to include GitVersion on upload
2017-06-06 12:08:31 +01:00
phl0 1dc23a4aa6 Fix Arduino Makefile to include GitVersion on upload 2017-06-06 10:50:53 +02:00
Jonathan Naylor 61b05dd5af Merge pull request #96 from N4IRS/master
Fix USART2 to USART1 after PR 94
2017-06-04 14:40:41 +01:00
Steve N4IRS 00a7f15011 Fix USART2 to USART1 after PR 94 2017-06-04 08:27:12 -04:00
Jonathan Naylor 8a5d5bc286 Merge pull request #93 from wojciechk8/mmdvm_pog_rev1
MMDVM_pog revision 1.0 changes
2017-06-03 17:19:38 +01:00
Jonathan Naylor c80c6a7797 Merge pull request #94 from sq6pog/master
Starting LED animation for MMDVM_pog board
2017-06-01 17:24:40 +01:00
SQ6POG 96c214c359 Added starting LED animation for MMDVM_pog board. 2017-06-01 17:05:29 +02:00
Wojciech Krutnik 6d5f098e41 Move host communication port from USART2 to USART1 2017-05-31 15:05:58 +02:00
Wojciech Krutnik e53aec348e Change port definition for bootloader (BL_PORT) in Makefile.CMSIS 2017-05-31 15:04:00 +02:00
Jonathan Naylor 9722c85585 Normalise the inverse-sinc lowpass filter to unity gain. 2017-05-05 08:10:36 +01:00
Jonathan Naylor 1a9c0d3ee7 Bump the version date. 2017-05-01 09:22:05 +01:00
Jonathan Naylor 7b68017411 Finish reverting to the master branch P25 filtering. 2017-04-29 10:08:38 +01:00
Jonathan Naylor a2cf35629b Revert "Testing low pass filter for P25 RX"
This reverts commit 68dfdf0c21.
2017-04-28 16:56:18 +01:00
Jonathan Naylor 2506690e98 Revert "Fix comments"
This reverts commit 3760404af9.
2017-04-28 16:55:55 +01:00
Jonathan Naylor 7e15d1ac70 Fix the TX FIFO write level calculation. 2017-04-26 08:18:00 +01:00
Jonathan Naylor 0fb75f974e Fix typo USART5 -> UART5 2017-04-25 08:03:10 +01:00
Jonathan Naylor 99ac6146d9 Add a ring buffer to the serial repeater. Uncompiled on the STM32
platform.
2017-04-24 18:02:36 +01:00
Jonathan Naylor 6161d298f7 Merge branch 'master' into c4fmdemod 2017-04-20 20:49:42 +01:00
Jonathan Naylor 7f181133c7 Merge pull request #90 from phl0/fixWindooze
Make Makefile compatible with builds on Windows
2017-04-18 06:09:50 +01:00
phl0 1d6ca99df9 Make Makefile compatible with builds on Windows 2017-04-17 23:01:19 +02:00
Jonathan Naylor baed701a6c Merge branch 'master' into c4fmdemod 2017-04-17 09:26:14 +01:00
Jonathan Naylor 8b31a53e4e Revert the DMR DMO TX changes. 2017-04-17 09:25:38 +01:00
Jonathan Naylor f6f1198873 Merge pull request #89 from juribeparada/master
Adding Pi Hat F446 support for stm32flash utility in Makefile
2017-04-16 19:57:08 +01:00
Andy CA6JAU 4b17bcd991 Changing default Makefile target to “nucleo” and adding “GitVersion.h” rule for all targets 2017-04-16 15:40:34 -03:00
Andy CA6JAU 852785b616 Workaround for Pi Hat F446 and stm32flash 2017-04-16 15:36:10 -03:00
Jonathan Naylor 1034670ac4 Merge pull request #88 from juribeparada/c4fmdemod
Testing low pass filter for P25 RX
2017-04-16 16:32:37 +01:00
Andy CA6JAU ff8bf96abb Adding GPIO sequence to enter serial bootloader mode (F446) 2017-04-16 11:48:41 -03:00
Andy CA6JAU edc53fc347 Adding Pi Hat F446 support for stm32flash utility in Makefile 2017-04-16 10:55:43 -03:00
Andy CA6JAU 3760404af9 Fix comments 2017-04-16 10:28:30 -03:00
Andy CA6JAU 68dfdf0c21 Testing low pass filter for P25 RX 2017-04-16 10:25:34 -03:00
Jonathan Naylor 5bd01645fa Merge pull request #87 from juribeparada/c4fmdemod
Fixing TX inverse SINC filter for P25, and change TX filters for gain=1
2017-04-15 18:18:19 +01:00
Andy CA6JAU f31cceac18 Fixing TX inverse SINC filter for P25, and change TX filters for gain=1 2017-04-15 13:44:00 -03:00
Andy CA6JAU 1b48c4de1c Merge remote-tracking branch 'g4klx/c4fmdemod' into c4fmdemod 2017-04-15 11:27:17 -03:00
Jonathan Naylor a6ed1e9667 Finish committing the last change. 2017-04-15 10:22:56 +01:00
Jonathan Naylor c7eb072d2f Add an extra flter for P25 RX. 2017-04-14 14:47:37 +01:00
Jonathan Naylor caa73c6c4a Remove the optional wide filters for C4FSK modes. 2017-04-14 14:22:47 +01:00
Jonathan Naylor 9386fb2e11 Make modem debugging a run-time parameter, not compile-time. 2017-04-14 14:19:00 +01:00
Jonathan Naylor 9c9b759db5 Merge pull request #86 from phl0/fixArduinoWarning
Remove Arduino compiler warning
2017-04-13 09:19:18 +01:00
phl0 cfb6e31e2f Remove Arduino compiler warning 2017-04-13 09:35:21 +02:00
Jonathan Naylor 4f6f519dc7 Merge pull request #84 from phl0/ArduinoMakefile
Arduino makefile
2017-04-13 05:43:42 +01:00
Jonathan Naylor fe8e8329ad Merge pull request #85 from juribeparada/master
Update the copyright message
2017-04-13 05:41:28 +01:00
Andy CA6JAU 38bcf1f4c4 Update the copyright message 2017-04-12 23:28:43 -03:00
Andy CA6JAU 6a1c06576b Reverting new RX filter for D-Star 2017-04-12 23:26:48 -03:00
Andy CA6JAU 27b3773f00 Update the copyright message 2017-04-12 23:00:54 -03:00
phl0 871c328914 Cleanup Makefile.Arduino 2017-04-12 23:00:39 +02:00
phl0 fa251afdcb Add define for default Makefile 2017-04-12 22:58:35 +02:00
phl0 27618658a9 Force rebuild of GitVersion.h 2017-04-12 22:43:02 +02:00
phl0 bb42bdc422 Add build/ dir for Arduino Makefile to .gitignore 2017-04-12 22:31:59 +02:00
phl0 f15fcc17ec Update Arduino Makefile to latest SAM version 2017-04-12 22:18:25 +02:00
phl0 59a9b3018f Add a define to Makefile 2017-04-12 21:57:32 +02:00
phl0 07b7801821 A little less verbose and add verfiy 2017-04-12 17:39:15 +02:00
phl0 3d430cbe44 Add first working version of Arduino Due Makefile 2017-04-12 17:35:01 +02:00
Andy CA6JAU fd27ffa464 Merge remote-tracking branch 'g4klx/master' 2017-04-12 09:00:36 -03:00
Jonathan Naylor 42517d691e Merge pull request #83 from phl0/GitID
Include Git ID in Modem description
2017-04-12 12:43:01 +01:00
phl0 53f51820fa Include GitID of Modem firmware 2017-04-12 11:51:28 +02:00
phl0 61a86b7f06 Make GITVERSION a macro and make before nucleo 2017-04-12 11:12:50 +02:00
phl0 696964a3a4 Add GitVersion.h to .gitignore 2017-04-12 10:15:47 +02:00
phl0 23228a0027 Add GitVersion.h to clean command 2017-04-12 10:15:05 +02:00
phl0 b4bef6e7c3 Add GitVersion.h to Makefile 2017-04-12 10:13:44 +02:00
Andy CA6JAU d2548f9e84 Merge remote-tracking branch 'g4klx/master' 2017-04-12 00:16:48 -03:00
Andy CA6JAU 4a01e9b3a1 Testing new RX filter for D-Star 2017-04-12 00:15:43 -03:00
Jonathan Naylor 8a245e7313 Update the copyright message. 2017-04-11 14:40:14 +01:00
Andy CA6JAU c132a58d2e Merge remote-tracking branch 'g4klx/master' 2017-04-10 22:05:58 -03:00
Jonathan Naylor 9cf91ddc7f Add a couple of extra CW characters. 2017-04-10 17:52:12 +01:00
Jonathan Naylor 016ed333ec Remove the unused sample dumping code. 2017-04-10 17:51:44 +01:00
Jonathan Naylor 453fb33b76 Revert the DMO sync bytes from MS to BS sourced. 2017-04-10 09:17:06 +01:00
Jonathan Naylor 9c1410eaae Merge pull request #81 from juribeparada/master
Improving DC filter for D-Star
2017-04-10 05:48:27 +01:00
Andy CA6JAU 5d1a54eee5 Improving DC filter for D-Star 2017-04-10 00:30:45 -03:00
Andy CA6JAU 4f516a827f Merge remote-tracking branch 'g4klx/master' 2017-04-09 16:29:15 -03:00
Jonathan Naylor acb2004843 Convert the DMO idle frame to have an MS data sync. 2017-04-09 20:04:16 +01:00
Jonathan Naylor 0f43670066 Small reformatting. 2017-04-09 20:00:00 +01:00
Jonathan Naylor ab3cdbc277 Merge pull request #80 from juribeparada/master
Filter for DC level estimation for D-Star
2017-04-09 19:53:42 +01:00
Andy CA6JAU 9efe38d825 Merge remote-tracking branch 'g4klx/master' into c4fmdemod 2017-04-09 15:02:57 -03:00
Andy CA6JAU 132cde0864 Merge remote-tracking branch 'g4klx/master' 2017-04-09 14:58:35 -03:00
Andy CA6JAU bc969ff5e5 Merge branch 'c4fmdemod' 2017-04-09 14:55:03 -03:00
Andy CA6JAU ee3f2a0e6d Filter for DC level estimation for D-Star 2017-04-09 14:35:08 -03:00
Jonathan Naylor 421031323d Bump the version date. 2017-04-06 18:11:23 +01:00
Jonathan Naylor 6118653053 Revert "Reduce the YSF deviations(s) by 10%."
This reverts commit 06ef230ad5.
2017-04-06 18:08:47 +01:00
Andy CA6JAU 1a5bc9cf8c Merge remote-tracking branch 'g4klx/c4fmdemod' into c4fmdemod 2017-04-05 21:21:09 -03:00
Jonathan Naylor 06ef230ad5 Reduce the YSF deviations(s) by 10%. 2017-04-05 14:24:29 +01:00
Jonathan Naylor 9d4779e4c3 Put idle into the second DMO slot instead of the repeat of the data. MD380/390 bug workaround. 2017-04-05 14:19:25 +01:00
Jonathan Naylor d5531177f2 Merge pull request #76 from juribeparada/c4fmdemod
Adding conditional compilation for Arduino 1.6.7 fix
2017-04-03 05:02:51 +01:00
Andy CA6JAU f2c50083d8 Adding conditional compilation for Arduino 1.6.7 fix 2017-04-02 22:17:09 -03:00
Jonathan Naylor 838d813ab9 Merge pull request #75 from juribeparada/c4fmdemod
New filter for D-Star, BT=0.35
2017-04-02 22:48:06 +01:00
Andy CA6JAU dffc6f0a5a New filter for D-Star, BT=0.35 2017-04-02 18:03:36 -03:00
Andy CA6JAU 7a042c10ad Better fix for Arduino IDE compilation error, now including STM32F4 2017-04-02 18:02:33 -03:00
Jonathan Naylor 0c44b8ca25 Merge pull request #74 from juribeparada/c4fmdemod
Fix for Arduino 1.6 compilation error
2017-04-02 21:14:55 +01:00
Andy CA6JAU 6f29fe62b1 Fix for Arduino 1.6 compilation error 2017-04-02 16:48:50 -03:00
Andy CA6JAU 937c0b8b97 Merge remote-tracking branch 'g4klx/c4fmdemod' into c4fmdemod 2017-04-02 15:40:55 -03:00
Andy CA6JAU 941d77bd51 Merge remote-tracking branch 'g4klx/master' 2017-04-02 14:22:57 -03:00
Jonathan Naylor 6a0fa19c07 Merge pull request #73 from juribeparada/c4fmdemod
New deviation values for YSF and P25
2017-04-02 18:04:00 +01:00
Jonathan Naylor a14ebca9e0 Merge branch 'master' into c4fmdemod 2017-04-02 18:02:17 +01:00
Andy CA6JAU 61b4093aec Merge remote-tracking branch 'g4klx/c4fmdemod' into c4fmdemod 2017-04-02 13:58:15 -03:00
Andy CA6JAU 555197b0a2 New deviation value for YSF 2017-04-02 13:49:39 -03:00
Andy CA6JAU bb6a554919 New deviation values for P25 (not tested) 2017-04-02 13:49:39 -03:00
Jonathan Naylor c0941c4856 Add TX Delay buffer protection. 2017-04-02 13:48:40 +01:00
Jonathan Naylor e93b264d9c Merge pull request #72 from juribeparada/c4fmdemod
Compensate DMR deviation to match old adjustments
2017-04-02 06:20:26 +01:00
Andy CA6JAU fcdbb8cda0 Compensate DMR deviation to match old adjustments (K=0.904) 2017-04-01 21:52:02 -03:00
Jonathan Naylor a4ff8920e5 Merge pull request #71 from juribeparada/c4fmdemod
New serial port buffer size for STM32F4
2017-04-02 00:25:31 +01:00
Andy CA6JAU db1c01f4dc New serial port buffer size for STM32F4 2017-04-01 15:04:05 -03:00
Andy CA6JAU ab50521f74 Testing new serial port buffer size for STM32F4 2017-04-01 11:52:34 -03:00
Jonathan Naylor 5843ca0e3d Merge pull request #70 from juribeparada/c4fmdemod
Using CMSIS FIR interpolator for all modulators
2017-04-01 08:42:07 +01:00
Andy CA6JAU 6b0868b8f2 Merge branch 'c4fmdemod' of https://github.com/juribeparada/MMDVM into c4fmdemod 2017-04-01 01:44:23 -03:00
Andy CA6JAU a49871cd8b Using CMSIS FIR interpolator for all modulators 2017-04-01 01:29:35 -03:00
Andy CA6JAU 78f5d34373 Using CMSIS FIR interpolator for all modulators 2017-04-01 01:16:56 -03:00
Jonathan Naylor 9bcaba0419 Change the start sync sequence. 2017-03-31 08:33:01 +01:00
Jonathan Naylor a25b634366 Merge pull request #68 from wojciechk8/mmdvm_pog
Adding support for STM32F1 MCU and MMDVM_pog board
2017-03-31 08:20:33 +01:00
Jonathan Naylor 4039f576ae Use the DMR changes from Andy in the DMR DMO TX. 2017-03-31 08:16:13 +01:00
Jonathan Naylor 03aa405b41 Merge pull request #69 from juribeparada/c4fmdemod
Fixing symbol generation for all modes (zero padding for FIR interpolation)
2017-03-31 08:14:52 +01:00
Andy CA6JAU 546243eec6 Fixing symbol generation (zero padding for FIR interpolation) 2017-03-31 01:26:07 -03:00
Andy CA6JAU a033ee66fd Restoring original TX filter for YSF, fixing symbol generation (zero padding for FIR interpolation) 2017-03-31 01:25:45 -03:00
Wojciech Krutnik 70dfb0964e Corrected Makefile.CMSIS and IOSTM_CMSIS.cpp to enable compilation
without errors
2017-03-31 01:25:24 +02:00
Wojciech Krutnik ab09848afd Updated .gitignore 2017-03-31 00:52:24 +02:00
Wojciech Krutnik ed7b57d618 Added Makefile for STM32F1 with CMSIS 2017-03-31 00:52:24 +02:00
Wojciech Krutnik e8010137f7 Added STM32F1 startup code 2017-03-31 00:52:24 +02:00
Wojciech Krutnik c2d5c31db1 Added includes and definitions to support STM32F1 2017-03-31 00:52:24 +02:00
Wojciech Krutnik 5f2375e99e Added STM32F1 support to Serial module using CMSIS driver 2017-03-31 00:52:24 +02:00
Wojciech Krutnik fd56870d22 Added STM32F1 and mmdvm_pog board support to IO module using CMSIS driver 2017-03-31 00:51:50 +02:00
Wojciech Krutnik 5bc21fa192 Added mmdvm_pog board definition to Config.h 2017-03-31 00:19:01 +02:00
Jonathan Naylor 33293258f3 Merge pull request #67 from juribeparada/c4fmdemod
New YSF filter for TX
2017-03-30 07:54:46 +01:00
Andy CA6JAU aee9cac546 New YSF filter for TX 2017-03-30 01:09:03 -03:00
Jonathan Naylor c9b553bc2e Follow the ETSI standard for DMO operation. 2017-03-29 20:36:02 +01:00
Jonathan Naylor 12dc9183da Add YSF low deviation mode. 2017-03-23 20:27:23 +00:00
Jonathan Naylor 8c38341c17 Merge branch 'master' into c4fmdemod 2017-03-21 18:31:59 +00:00
Jonathan Naylor 418b63b9ca Update copyright date. 2017-03-20 07:57:25 +00:00
Jonathan Naylor e697a91710 Revert the DMR DMO transmitter changes. 2017-03-19 09:35:46 +00:00
Jonathan Naylor e04057a5b5 Update P25 raised cosine filter coefficients. 2017-03-18 11:35:31 +00:00
Jonathan Naylor e17d771d41 Reduce the number of diffs. 2017-03-18 09:22:55 +00:00
Jonathan Naylor 38516074dd Forgot to set the at variable within the CACH. 2017-03-13 08:24:35 +00:00
Jonathan Naylor 3814d4243c Add extra idle frames at the start of a DMR DMO transmission. 2017-03-12 18:36:41 +00:00
Jonathan Naylor bcbfb66131 Roll back the YSF changes and simplify the P25 code. 2017-03-10 18:18:36 +00:00
Jonathan Naylor 9560c77358 Merge branch 'master' into c4fmdemod 2017-03-10 17:47:50 +00:00
Jonathan Naylor 785cb5584b Merge pull request #66 from m1geo/master
Add compilation timestamp to hardware description varible sent in ::getVersion()
2017-03-10 17:17:31 +00:00
George Smart 917b303a0f Added compilation timestamp to hardware description varible sent in ::getVersion() 2017-03-09 23:32:46 +00:00
George Smart 80d659d7d0 Merge pull request #1 from g4klx/master
Merge with KLX Master Repo
2017-03-09 22:40:38 +00:00
Jonathan Naylor 90111dc43d Use the Raised Cosine filter on YSF TX. 2017-03-07 20:48:39 +00:00
Jonathan Naylor 9110f5404f Add the Raised Cosine filter to P25 RX and change YSF to use the Raised
Cosine filter on RX also.
2017-03-07 20:44:41 +00:00
Jonathan Naylor df1210eaea Remove the OscOffset parameter. 2017-03-07 20:41:54 +00:00
Jonathan Naylor a9b761d1dc Change the P25 TX and RX filters and add a DMR TX data holdoff counter. 2017-03-06 20:42:37 +00:00
Jonathan Naylor 8c970b26db Change size of space in transmit routines. 2017-03-06 20:36:44 +00:00
Jonathan Naylor d89b68ff76 Bump the version date. 2017-03-03 15:00:19 +00:00
Jonathan Naylor 7fafd762d2 Improve frame dumping capabilities. 2017-02-26 12:33:59 +00:00
Jonathan Naylor a6affb765e Remove the sync sample dumping. 2017-02-21 17:51:09 +00:00
Jonathan Naylor 2f9eb3523d Add full frame dumping. 2017-02-20 21:35:23 +00:00
Jonathan Naylor 3b5e1afb54 Merge branch 'master' into c4fmdemod 2017-02-18 11:19:52 +00:00
Jonathan Naylor 8b019d49fd Merge pull request #65 from juribeparada/master
Fixing RSSI raw value position in buffer (YSF and P25)
2017-02-18 06:21:12 +00:00
Andy CA6JAU d92a00ae6e Fixing RSSI raw value position in buffer (YSF and P25) 2017-02-17 20:09:23 -03:00
Andy CA6JAU b83d13fe3a Merge remote-tracking branch 'g4klx/master' 2017-02-16 10:44:39 -03:00
Jonathan Naylor bc6c650973 Improve YSF and P25 receive BER. 2017-02-12 18:44:45 +00:00
Jonathan Naylor 1bb474dfef Add new interpolation for most modes and start positioning for P25 and YSF. 2017-02-06 21:02:45 +00:00
Jonathan Naylor 18ec4bafb6 Merge branch 'master' into c4fmdemod 2017-02-06 20:52:33 +00:00
Jonathan Naylor b2c490e0bd Bump the version date. 2017-02-06 20:52:06 +00:00
Jonathan Naylor 4221ac45b1 Improve the P25 sync positioning. 2017-02-05 19:33:52 +00:00
Jonathan Naylor ec5100bf6f Alter the P25 HDR start pointer calculation. 2017-02-03 12:01:12 +00:00
Jonathan Naylor ac4249bbb1 Add working sync sample dumping for DMR, P25 and YSF. 2017-02-02 20:13:28 +00:00
Jonathan Naylor f3a3132a6c Add sync dumping and improve YSF and P25. 2017-01-31 20:36:31 +00:00
Jonathan Naylor 4bc0f36b49 Begin P25 Header detection. 2017-01-29 19:28:27 +00:00
Jonathan Naylor 9d1fbcfc73 Update P25 to match YSF demodulator, work in progress. 2017-01-29 19:08:44 +00:00
Jonathan Naylor 609c2ead53 Revert the DMR changes. 2017-01-29 18:51:33 +00:00
Jonathan Naylor 37daa04a6c Merge branch 'master' into c4fmdemod 2017-01-28 20:07:00 +00:00
Jonathan Naylor 20a4cf0378 Merge pull request #63 from juribeparada/master
Adding conditional compilation
2017-01-28 13:57:57 +00:00
Andy CA6JAU 693f517aec Adding conditional compilation 2017-01-28 10:18:10 -03:00
Andy CA6JAU 4549027e95 Merge remote-tracking branch 'g4klx/master' 2017-01-28 09:46:53 -03:00
Jonathan Naylor b3a1961279 Merge branch 'master' into c4fmdemod 2017-01-26 20:30:49 +00:00
Jonathan Naylor afae6e552c Merge pull request #62 from phl0/MODEpins
Mode pins
2017-01-22 12:24:24 +00:00
phl0 5ee6a0d6db Correct comments to align with changed pins 2017-01-22 12:22:40 +01:00
phl0 49e0d13967 Redefine Mode pins for D-Star and DMR 2017-01-22 00:46:12 +01:00
Jonathan Naylor 53067d36d0 More averaging of the centre and threshold. 2017-01-21 18:57:39 +00:00
Jonathan Naylor a5568efd51 Merge branch 'master' into c4fmdemod 2017-01-21 18:37:46 +00:00
Jonathan Naylor d4d1f8282b Tweaks to the new YSF demodulator. 2017-01-21 18:37:30 +00:00
phl0 79b0b141a2 Add support for external mode pins on F0DEI board 2017-01-20 17:34:32 +01:00
Jonathan Naylor 850978a954 Merge pull request #61 from phl0/gitignore
Add gitignore to irgnore object files and STM lib
2017-01-20 16:03:57 +00:00
phl0 f97e53f1eb Add gitignore to irgnore object files and STM lib 2017-01-20 16:34:25 +01:00
Jonathan Naylor dfd2a4db38 Merge pull request #60 from phl0/devel
Refactored STM code concerning whitespace
2017-01-20 06:13:59 +00:00
phl0 eab91cca3a Correct typo 2017-01-19 21:54:21 +01:00
phl0 1e7c06de45 Refactor SerialSTM.cpp 2017-01-19 21:50:06 +01:00
Jonathan Naylor b15933bf8a Cleanups but still untested. 2017-01-19 19:59:01 +00:00
phl0 df5ab3de60 Refactor IOSTM.cpp 2017-01-19 14:07:30 +01:00
Jonathan Naylor 9a7b07027a New demodulators for C4FM modes. 2017-01-17 20:05:20 +00:00
Jonathan Naylor 8b13a3c8a6 Merge pull request #59 from juribeparada/master
New pin definitions for STM32F446RE board, enabling Arduino header
2017-01-11 09:11:37 +00:00
Andy CA6JAU 1ce71bcd62 New pin definitions for serial port Nucleo-64 STM32F446RE board, Arduino header 2017-01-11 00:27:27 -03:00
Andy CA6JAU ed13addd3d Merge remote-tracking branch 'g4klx/master' 2017-01-10 23:56:31 -03:00
Jonathan Naylor 3e937a71d9 Average the RSSI value for all modes. 2017-01-10 19:20:16 +00:00
Andy CA6JAU a59da0ebd2 Adding more flexibility for STM32F4 pin definitions 2017-01-10 01:38:56 -03:00
Andy CA6JAU 33f4d35e2b Adding new pin definitions for Nucleo-64 STM32F446RE board 2017-01-10 00:47:45 -03:00
Andy CA6JAU 048888f45b Merge remote-tracking branch 'g4klx/master' 2017-01-08 19:18:26 -03:00
Jonathan Naylor 57fde3afcc Add RSSI reporting for all modes. 2017-01-05 18:59:15 +00:00
Jonathan Naylor 8777c2b29c Update README.md 2017-01-03 16:36:34 +00:00
Jonathan Naylor 8330ed7dcf Merge pull request #56 from g4eml/master
Fix crash in DMR DMO Mode on Teensy
2017-01-01 15:20:47 +00:00
g4eml 9f47e67630 Fix crash in DMR DMO Mode
Modem was crashing on Teensy when running in DMO mode. Crashed as soon as Tx started. Traced to exceeding the bounds of m_poBuffer during the txdelay phase.
 m_poBuffer was dimensioned to 80 but m_txdelay could be 600 to 1200 so a massive overwrite was happening.
Surprisingly this didn't crash on the Due only on the Teensy.
2017-01-01 14:22:49 +00:00
Andy CA6JAU d0f320a862 Merge remote-tracking branch 'g4klx/master' 2016-12-31 12:20:47 -03:00
Jonathan Naylor a05eaee855 Fix RSSI compile. 2016-12-30 13:48:55 +00:00
Jonathan Naylor 4b5f496a0c Bump the version date. 2016-12-30 11:35:39 +00:00
Jonathan Naylor fca53dc67e Small tweaks. 2016-12-30 11:34:31 +00:00
Jonathan Naylor 52fbd4f6ce Merge pull request #53 from juribeparada/master
Adding RSSI samples averaging
2016-12-29 09:32:06 +00:00
Andy CA6JAU d22c86e4d8 Fixing RSSI buffer length 2016-12-29 01:08:31 -03:00
Andy CA6JAU cc1b6d1367 Optimizing RSSI averaging 2016-12-29 00:51:14 -03:00
Andy CA6JAU 2ff955631f Adding #define constants in the RSSI average code 2016-12-29 00:36:45 -03:00
Andy CA6JAU f66e32fbb4 Merge remote-tracking branch 'g4klx/master' 2016-12-28 22:05:06 -03:00
Jonathan Naylor 33527dd3e9 Add the RSSI calibration mode. 2016-12-28 18:07:31 +00:00
Andy CA6JAU 442dbe0b6a Adding RSSI samples averaging 2016-12-27 00:40:14 -03:00
Andy CA6JAU fc200c4cd7 Merge remote-tracking branch 'g4klx/master' 2016-12-26 14:14:02 -03:00
Jonathan Naylor 7266f5c53b Merge pull request #52 from g4eml/master
Change ADC1 to reduce number of interrupts.
2016-12-22 22:58:01 +00:00
g4eml 957d0d8d34 Change ADC1 to reduce number of interrupts.
Disable interrupts for ADC1. 
Every time ADC0 interrupts (24Khz) read the current conversion from ADC1 and software trigger a new one. 
This way there will always be an ADC1 conversion available whenever ADC0 interrupts.
2016-12-22 22:27:10 +00:00
Jonathan Naylor c69c573000 Merge pull request #51 from g4eml/master
Adjust ADC pre-trigger setting for external TCXO
2016-12-22 18:22:16 +00:00
g4eml cb30a8d357 Adjust ADC pre-trigger setting for external TCXO
External TCXO was not working with Pre-Trigger set to B.
This change sets it to A which appears to work.
2016-12-22 16:35:35 +00:00
Jonathan Naylor 38f6d7d9d8 Update DAC reference comment. 2016-12-21 14:01:18 +00:00
Jonathan Naylor 461e7c942e Add RSSI input for the ZUM board also. 2016-12-21 08:46:17 +00:00
Jonathan Naylor 773cda818d Merge pull request #49 from sq6pog/nth_rssi
RSSI readout support for NTH board @Arduino Due
2016-12-21 08:43:00 +00:00
Jonathan Naylor 625a6c1a79 Merge pull request #50 from g4eml/master
Update IOTeensy.cpp
2016-12-21 08:41:13 +00:00
Paweł Gomułka 414f3eb193 typo :/ 2016-12-21 01:57:58 +01:00
Paweł Gomułka bef0d9cfd6 Added missing conditions for preprocessor 2016-12-21 01:55:35 +01:00
Andy CA6JAU 1a270642cd Merge remote-tracking branch 'g4klx/master' 2016-12-20 20:27:16 -03:00
g4eml 75eccb751e Update IOTeensy.cpp
Switch ADCs to External Reference. (3v3 on Teensy)
2016-12-20 20:48:15 +00:00
Paweł Gomułka 2c76d67098 RSSI readout support for NTH board @Arduino Due 2016-12-20 20:32:54 +01:00
Jonathan Naylor 0585d817cb Change Teensy RSSI input pins. 2016-12-20 14:21:36 +00:00
Jonathan Naylor 5d0d2d0bd9 Fix calibration setting. 2016-12-20 08:42:56 +00:00
69 changed files with 6296 additions and 2376 deletions
+6
View File
@@ -0,0 +1,6 @@
*.o
obj/
bin/
STM32F4XX_Lib/
GitVersion.h
build/
+7 -7
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
*
* This program is free software; you can redistribute it and/or modify
@@ -17,19 +17,17 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
// #define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#include "CWIdTX.h"
q15_t TONE[] = {
0, 518, 1000, 1414, 1732, 1932, 2000, 1932, 1732, 1414, 1000, 518, 0, -518, -1000, -1414, -1732, -1932, -2000, -1932, -1732, -1414, -1000, -518};
0, 261, 518, 765, 1000, 1218, 1414, 1587, 1732, 1848, 1932, 1983, 2000, 1983, 1932, 1848, 1732, 1587, 1414, 1218, 1000, 765, 518, 261, 0, -261, -518, -765, -1000, -1218, -1414,
-1587, -1732, -1848, -1932, -1983, -2000, -1983, -1932, -1848, -1732, -1587, -1414, -1218, -1000, -765, -518, -261};
q15_t SILENCE[] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
const uint8_t CYCLE_LENGTH = 24U;
const uint8_t CYCLE_LENGTH = 48U;
const uint8_t DOT_LENGTH = 50U;
@@ -77,6 +75,8 @@ const struct {
{'/', 0xEAE80000U, 16U},
{'?', 0xAEEA0000U, 18U},
{',', 0xEEAEE000U, 22U},
{'-', 0xEAAE0000U, 18U},
{'=', 0xEAB80000U, 16U},
{' ', 0x00000000U, 4U},
{0U, 0x00000000U, 0U}
};
+111 -6
View File
@@ -21,19 +21,121 @@
#include "Globals.h"
#include "CalDMR.h"
// Voice LC Header, CC: 1, srcID: 1, dstID: TG9
const uint8_t VH_1K[] = {0x00U,
0x00U, 0x20U, 0x08U, 0x08U, 0x02U, 0x38U, 0x15U, 0x00U, 0x2CU, 0xA0U, 0x14U,
0x60U, 0x84U, 0x6DU, 0xFFU, 0x57U, 0xD7U, 0x5DU, 0xF5U, 0xDEU, 0x30U, 0x30U,
0x01U, 0x10U, 0x01U, 0x40U, 0x03U, 0xC0U, 0x13U, 0xC1U, 0x1EU, 0x80U, 0x6FU};
// Voice Term with LC, CC: 1, srcID: 1, dstID: TG9
const uint8_t VT_1K[] = {0x00U,
0x00U, 0x4FU, 0x08U, 0xDCU, 0x02U, 0x88U, 0x15U, 0x78U, 0x2CU, 0xD0U, 0x14U,
0xC0U, 0x84U, 0xADU, 0xFFU, 0x57U, 0xD7U, 0x5DU, 0xF5U, 0xD9U, 0x65U, 0x24U,
0x02U, 0x28U, 0x06U, 0x20U, 0x0FU, 0x80U, 0x1BU, 0xC1U, 0x07U, 0x80U, 0x5CU};
// Voice coding data + FEC, 1031 Hz Test Pattern
const uint8_t VOICE_1K[] = {0x00U,
0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU, 0xCEU, 0xA8U,
0xFEU, 0x83U, 0xA0U, 0x00U, 0x00U, 0x00U, 0x00U, 0x00U, 0x0CU, 0xC4U, 0x58U,
0x20U, 0x0AU, 0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU};
// Embedded LC: CC: 1, srcID: 1, dstID: TG9
const uint8_t SYNCEMB_1K[6][7] = {
{0x07U, 0x55U, 0xFDU, 0x7DU, 0xF7U, 0x5FU, 0x70U}, // BS VOICE SYNC (audio seq 0)
{0x01U, 0x30U, 0x00U, 0x00U, 0x90U, 0x09U, 0x10U}, // EMB + Embedded LC1 (audio seq 1)
{0x01U, 0x70U, 0x00U, 0x90U, 0x00U, 0x07U, 0x40U}, // EMB + Embedded LC2 (audio seq 2)
{0x01U, 0x70U, 0x00U, 0x31U, 0x40U, 0x07U, 0x40U}, // EMB + Embedded LC3 (audio seq 3)
{0x01U, 0x50U, 0xA1U, 0x71U, 0xD1U, 0x70U, 0x70U}, // EMB + Embedded LC4 (audio seq 4)
{0x01U, 0x10U, 0x00U, 0x00U, 0x00U, 0x0EU, 0x20U}}; // EMB (audio seq 5)
// Short LC:
// TS1: dstID: 0, ACTIVITY_NONE
// TS2: dstID: TG9, ACTIVITY_VOICE
const uint8_t SHORTLC_1K[] = {0x33U, 0x3AU, 0xA0U, 0x30U, 0x00U, 0x55U, 0xA6U, 0x5FU, 0x50U};
CCalDMR::CCalDMR() :
m_transmit(false)
m_transmit(false),
m_state(DMRCAL1K_IDLE),
m_frame_start(0U),
m_dmr1k(),
m_audioSeq(0)
{
::memcpy(m_dmr1k, VOICE_1K, DMR_FRAME_LENGTH_BYTES + 1U);
}
void CCalDMR::process()
{
if (m_transmit) {
dmrTX.setCal(true);
dmrTX.process();
} else {
dmrTX.setCal(false);
switch (m_modemState) {
case STATE_DMRCAL:
case STATE_LFCAL:
if (m_transmit) {
dmrTX.setCal(true);
dmrTX.process();
} else {
dmrTX.setCal(false);
}
break;
case STATE_DMRCAL1K:
dmr1kcal();
break;
default:
break;
}
}
void CCalDMR::createData1k(uint8_t n)
{
for(uint8_t i = 0; i < 5U; i++)
m_dmr1k[i + 15U] = SYNCEMB_1K[n][i + 1U];
m_dmr1k[14U] &= 0xF0U;
m_dmr1k[20U] &= 0x0FU;
m_dmr1k[14U] |= SYNCEMB_1K[n][0] & 0x0FU;
m_dmr1k[20U] |= SYNCEMB_1K[n][6] & 0xF0U;
}
void CCalDMR::dmr1kcal()
{
dmrTX.process();
uint16_t space = dmrTX.getSpace2();
if (space < 1U)
return;
switch (m_state) {
case DMRCAL1K_VH:
dmrTX.setColorCode(1U);
dmrTX.writeShortLC(SHORTLC_1K, 9U);
dmrTX.writeData2(VH_1K, DMR_FRAME_LENGTH_BYTES + 1U);
dmrTX.setStart(true);
m_state = DMRCAL1K_VOICE;
break;
case DMRCAL1K_VOICE:
createData1k(m_audioSeq);
dmrTX.writeData2(m_dmr1k, DMR_FRAME_LENGTH_BYTES + 1U);
if(m_audioSeq == 5U) {
m_audioSeq = 0U;
if(!m_transmit)
m_state = DMRCAL1K_VT;
} else
m_audioSeq++;
break;
case DMRCAL1K_VT:
dmrTX.writeData2(VT_1K, DMR_FRAME_LENGTH_BYTES + 1U);
m_frame_start = dmrTX.getFrameCount();
m_state = DMRCAL1K_WAIT;
break;
case DMRCAL1K_WAIT:
if (dmrTX.getFrameCount() > (m_frame_start + 30U)) {
dmrTX.setStart(false);
dmrTX.resetFifo2();
m_audioSeq = 0U;
m_state = DMRCAL1K_IDLE;
}
break;
default:
m_state = DMRCAL1K_IDLE;
break;
}
}
@@ -44,6 +146,9 @@ uint8_t CCalDMR::write(const uint8_t* data, uint8_t length)
m_transmit = data[0U] == 1U;
if(m_transmit && m_state == DMRCAL1K_IDLE && m_modemState == STATE_DMRCAL1K)
m_state = DMRCAL1K_VH;
return 0U;
}
+15 -1
View File
@@ -23,16 +23,30 @@
#include "Config.h"
#include "DMRDefines.h"
enum DMRCAL1K {
DMRCAL1K_IDLE,
DMRCAL1K_VH,
DMRCAL1K_VOICE,
DMRCAL1K_VT,
DMRCAL1K_WAIT
};
class CCalDMR {
public:
CCalDMR();
void process();
void dmr1kcal();
void createData1k(uint8_t n);
uint8_t write(const uint8_t* data, uint8_t length);
private:
bool m_transmit;
bool m_transmit;
DMRCAL1K m_state;
uint32_t m_frame_start;
uint8_t m_dmr1k[DMR_FRAME_LENGTH_BYTES + 1U];
uint8_t m_audioSeq;
};
#endif
+1 -1
View File
@@ -24,7 +24,7 @@
const unsigned int BUFFER_LENGTH = 200U;
const uint32_t PLLMAX = 0x10000U;
const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_SYMBOL_LENGTH;
const uint32_t INC = PLLINC / 32U;
// D-Star bit order version of 0x55 0x2D 0x16
+97
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@@ -0,0 +1,97 @@
/*
* Copyright (C) 2018 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "CalP25.h"
// Recommended 1011 Hz test pattern for P25 Phase 1 (ANSI/TIA-102.CAAA)
// NAC: 0x293, srcID: 1, dstID: TG1
unsigned char LDU1_1K[] = {0x00,
0x55, 0x75, 0xF5, 0xFF, 0x77, 0xFF, 0x29, 0x35, 0x54, 0x7B, 0xCB, 0x19, 0x4D, 0x0D, 0xCE, 0x24, 0xA1, 0x24,
0x0D, 0x43, 0x3C, 0x0B, 0xE1, 0xB9, 0x18, 0x44, 0xFC, 0xC1, 0x62, 0x96, 0x27, 0x60, 0xE4, 0xE2, 0x4A, 0x10,
0x90, 0xD4, 0x33, 0xC0, 0xBE, 0x1B, 0x91, 0x84, 0x4C, 0xFC, 0x16, 0x29, 0x62, 0x76, 0x0E, 0xC0, 0x00, 0x00,
0x00, 0x00, 0x03, 0x89, 0x28, 0x49, 0x0D, 0x43, 0x3C, 0x02, 0xF8, 0x6E, 0x46, 0x11, 0x3F, 0xC1, 0x62, 0x94,
0x89, 0xD8, 0x39, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x38, 0x24, 0xA1, 0x24, 0x35, 0x0C, 0xF0, 0x2F, 0x86, 0xE4,
0x18, 0x44, 0xFF, 0x05, 0x8A, 0x58, 0x9D, 0x83, 0xB0, 0x00, 0x00, 0x00, 0x00, 0x70, 0xE2, 0x4A, 0x12, 0x40,
0xD4, 0x33, 0xC0, 0xBE, 0x1B, 0x91, 0x84, 0x4F, 0xF0, 0x16, 0x29, 0x62, 0x76, 0x0E, 0x6D, 0xE5, 0xD5, 0x48,
0xAD, 0xE3, 0x89, 0x28, 0x49, 0x0D, 0x43, 0x3C, 0x08, 0xF8, 0x6E, 0x46, 0x11, 0x3F, 0xC1, 0x62, 0x96, 0x24,
0xD8, 0x3B, 0xA1, 0x41, 0xC2, 0xD2, 0xBA, 0x38, 0x90, 0xA1, 0x24, 0x35, 0x0C, 0xF0, 0x2F, 0x86, 0xE4, 0x60,
0x44, 0xFF, 0x05, 0x8A, 0x58, 0x9D, 0x83, 0x94, 0xC8, 0xFB, 0x02, 0x35, 0xA4, 0xE2, 0x4A, 0x12, 0x43, 0x50,
0x33, 0xC0, 0xBE, 0x1B, 0x91, 0x84, 0x4F, 0xF0, 0x58, 0x29, 0x62, 0x76, 0x0E, 0xC0, 0x00, 0x00, 0x00, 0x0C,
0x89, 0x28, 0x49, 0x0D, 0x43, 0x3C, 0x0B, 0xE1, 0xB8, 0x46, 0x11, 0x3F, 0xC1, 0x62, 0x96, 0x27, 0x60, 0xE4};
unsigned char LDU2_1K[] = {0x00,
0x55, 0x75, 0xF5, 0xFF, 0x77, 0xFF, 0x29, 0x3A, 0xB8, 0xA4, 0xEF, 0xB0, 0x9A, 0x8A, 0xCE, 0x24, 0xA1, 0x24,
0x0D, 0x43, 0x3C, 0x0B, 0xE1, 0xB9, 0x18, 0x44, 0xFC, 0xC1, 0x62, 0x96, 0x27, 0x60, 0xEC, 0xE2, 0x4A, 0x10,
0x90, 0xD4, 0x33, 0xC0, 0xBE, 0x1B, 0x91, 0x84, 0x4C, 0xFC, 0x16, 0x29, 0x62, 0x76, 0x0E, 0x40, 0x00, 0x00,
0x00, 0x00, 0x03, 0x89, 0x28, 0x49, 0x0D, 0x43, 0x3C, 0x02, 0xF8, 0x6E, 0x46, 0x11, 0x3F, 0xC1, 0x62, 0x94,
0x89, 0xD8, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x24, 0xA1, 0x24, 0x35, 0x0C, 0xF0, 0x2F, 0x86, 0xE4,
0x18, 0x44, 0xFF, 0x05, 0x8A, 0x58, 0x9D, 0x83, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE2, 0x4A, 0x12, 0x40,
0xD4, 0x33, 0xC0, 0xBE, 0x1B, 0x91, 0x84, 0x4F, 0xF0, 0x16, 0x29, 0x62, 0x76, 0x0E, 0xE0, 0xE0, 0x00, 0x00,
0x00, 0x03, 0x89, 0x28, 0x49, 0x0D, 0x43, 0x3C, 0x08, 0xF8, 0x6E, 0x46, 0x11, 0x3F, 0xC1, 0x62, 0x96, 0x24,
0xD8, 0x39, 0xAE, 0x8B, 0x48, 0xB6, 0x49, 0x38, 0x90, 0xA1, 0x24, 0x35, 0x0C, 0xF0, 0x2F, 0x86, 0xE4, 0x60,
0x44, 0xFF, 0x05, 0x8A, 0x58, 0x9D, 0x83, 0xB9, 0xA8, 0xF4, 0xF1, 0xFD, 0x60, 0xE2, 0x4A, 0x12, 0x43, 0x50,
0x33, 0xC0, 0xBE, 0x1B, 0x91, 0x84, 0x4F, 0xF0, 0x58, 0x29, 0x62, 0x76, 0x0E, 0x40, 0x00, 0x00, 0x00, 0x0C,
0x89, 0x28, 0x49, 0x0D, 0x43, 0x3C, 0x0B, 0xE1, 0xB8, 0x46, 0x11, 0x3F, 0xC1, 0x62, 0x96, 0x27, 0x60, 0xEC};
CCalP25::CCalP25() :
m_transmit(false),
m_state(P25CAL1K_IDLE)
{
}
void CCalP25::process()
{
p25TX.process();
uint16_t space = p25TX.getSpace();
if (space < 1U)
return;
switch (m_state) {
case P25CAL1K_LDU1:
p25TX.writeData(LDU1_1K, P25_LDU_FRAME_LENGTH_BYTES + 1U);
m_state = P25CAL1K_LDU2;
break;
case P25CAL1K_LDU2:
p25TX.writeData(LDU2_1K, P25_LDU_FRAME_LENGTH_BYTES + 1U);
if(!m_transmit)
m_state = P25CAL1K_IDLE;
else
m_state = P25CAL1K_LDU1;
break;
default:
m_state = P25CAL1K_IDLE;
break;
}
}
uint8_t CCalP25::write(const uint8_t* data, uint8_t length)
{
if (length != 1U)
return 4U;
m_transmit = data[0U] == 1U;
if(m_transmit && m_state == P25CAL1K_IDLE)
m_state = P25CAL1K_LDU1;
return 0U;
}
+45
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@@ -0,0 +1,45 @@
/*
* Copyright (C) 2018 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(CALP25_H)
#define CALP25_H
#include "Config.h"
#include "P25Defines.h"
enum P25CAL1K {
P25CAL1K_IDLE,
P25CAL1K_LDU1,
P25CAL1K_LDU2
};
class CCalP25 {
public:
CCalP25();
void process();
uint8_t write(const uint8_t* data, uint8_t length);
private:
bool m_transmit;
P25CAL1K m_state;
};
#endif
+65
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@@ -0,0 +1,65 @@
/*
* Copyright (C) 2016 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "CalRSSI.h"
#include "Utils.h"
CCalRSSI::CCalRSSI() :
m_count(0U),
m_accum(0U),
m_min(0xFFFFU),
m_max(0x0000U)
{
}
void CCalRSSI::samples(const uint16_t* rssi, uint8_t length)
{
for (uint16_t i = 0U; i < length; i++) {
uint16_t ss = rssi[i];
m_accum += ss;
if (ss > m_max)
m_max = ss;
if (ss < m_min)
m_min = ss;
m_count++;
if (m_count >= 24000U) {
uint16_t ave = m_accum / m_count;
uint8_t buffer[6U];
buffer[0U] = (m_max >> 8) & 0xFFU;
buffer[1U] = (m_max >> 0) & 0xFFU;
buffer[2U] = (m_min >> 8) & 0xFFU;
buffer[3U] = (m_min >> 0) & 0xFFU;
buffer[4U] = (ave >> 8) & 0xFFU;
buffer[5U] = (ave >> 0) & 0xFFU;
serial.writeRSSIData(buffer, 6U);
m_count = 0U;
m_accum = 0U;
m_min = 0xFFFFU;
m_max = 0x0000U;
}
}
}
+38
View File
@@ -0,0 +1,38 @@
/*
* Copyright (C) 2016 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(CALRSSI_H)
#define CALRSSI_H
#include "Config.h"
class CCalRSSI {
public:
CCalRSSI();
void samples(const uint16_t* rssi, uint8_t length);
private:
uint32_t m_count;
uint32_t m_accum;
uint16_t m_min;
uint16_t m_max;
};
#endif
+11 -7
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -27,7 +27,7 @@
// Frequencies such as 10.0 Mhz (48000 * 208.333) or 20 Mhz (48000 * 416.666) are not suitable.
//
// For 12 MHz
// #define EXTERNAL_OSC 12000000
#define EXTERNAL_OSC 12000000
// For 12.288 MHz
// #define EXTERNAL_OSC 12288000
// For 14.4 MHz
@@ -47,13 +47,18 @@
// For the ZUM V1.0 and V1.0.1 boards pin layout
#define ARDUINO_DUE_ZUM_V10
// For the SQ6POG board
// #define STM32F1_POG
// For the SP8NTH board
// #define ARDUINO_DUE_NTH
// To use wider C4FSK filters for DMR, System Fusion and P25 on transmit
// #define WIDE_C4FSK_FILTERS_TX
// To use wider C4FSK filters for DMR, System Fusion and P25 on receive
// #define WIDE_C4FSK_FILTERS_RX
// For ST Nucleo-64 STM32F446RE board
// #define STM32F4_NUCLEO_MORPHO_HEADER
// #define STM32F4_NUCLEO_ARDUINO_HEADER
// Use separate mode pins to switch external filters/bandwidth for example
// #define STM32F4_NUCLEO_MODE_PINS
// Pass RSSI information to the host
// #define SEND_RSSI_DATA
@@ -62,4 +67,3 @@
// #define SERIAL_REPEATER
#endif
+71 -84
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2016 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -16,8 +16,6 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#include "DMRDMORX.h"
@@ -59,8 +57,7 @@ m_colorCode(0U),
m_state(DMORXS_NONE),
m_n(0U),
m_type(0U),
m_rssiCount(0U),
m_rssi(0U)
m_rssi()
{
}
@@ -73,7 +70,6 @@ void CDMRDMORX::reset()
m_state = DMORXS_NONE;
m_startPtr = 0U;
m_endPtr = NOENDPTR;
m_rssiCount = 0U;
}
void CDMRDMORX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t length)
@@ -89,6 +85,7 @@ void CDMRDMORX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t leng
bool CDMRDMORX::processSample(q15_t sample, uint16_t rssi)
{
m_buffer[m_dataPtr] = sample;
m_rssi[m_dataPtr] = rssi;
m_bitBuffer[m_bitPtr] <<= 1;
if (sample < 0)
@@ -97,9 +94,6 @@ bool CDMRDMORX::processSample(q15_t sample, uint16_t rssi)
if (m_state == DMORXS_NONE) {
correlateSync(true);
} else {
// Grab the RSSI data during the frame
if (m_state == DMORXS_VOICE && m_dataPtr == m_syncPtr)
m_rssi = rssi;
uint16_t min = m_syncPtr + DMO_BUFFER_LENGTH_SAMPLES - 1U;
uint16_t max = m_syncPtr + 1U;
@@ -148,7 +142,7 @@ bool CDMRDMORX::processSample(q15_t sample, uint16_t rssi)
switch (dataType) {
case DT_DATA_HEADER:
DEBUG4("DMRDMORX: data header found pos/centre/threshold", m_syncPtr, centre, threshold);
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
m_state = DMORXS_DATA;
m_type = 0x00U;
break;
@@ -157,32 +151,32 @@ bool CDMRDMORX::processSample(q15_t sample, uint16_t rssi)
case DT_RATE_1_DATA:
if (m_state == DMORXS_DATA) {
DEBUG4("DMRDMORX: data payload found pos/centre/threshold", m_syncPtr, centre, threshold);
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
m_type = dataType;
}
break;
case DT_VOICE_LC_HEADER:
DEBUG4("DMRDMORX: voice header found pos/centre/threshold", m_syncPtr, centre, threshold);
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
m_state = DMORXS_VOICE;
break;
case DT_VOICE_PI_HEADER:
if (m_state == DMORXS_VOICE) {
DEBUG4("DMRDMORX: voice pi header found pos/centre/threshold", m_syncPtr, centre, threshold);
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
}
m_state = DMORXS_VOICE;
break;
case DT_TERMINATOR_WITH_LC:
if (m_state == DMORXS_VOICE) {
DEBUG4("DMRDMORX: voice terminator found pos/centre/threshold", m_syncPtr, centre, threshold);
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
reset();
}
break;
default: // DT_CSBK
DEBUG4("DMRDMORX: csbk found pos/centre/threshold", m_syncPtr, centre, threshold);
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
reset();
break;
}
@@ -190,22 +184,7 @@ bool CDMRDMORX::processSample(q15_t sample, uint16_t rssi)
} else if (m_control == CONTROL_VOICE) {
// Voice sync
DEBUG4("DMRDMORX: voice sync found pos/centre/threshold", m_syncPtr, centre, threshold);
#if defined(SEND_RSSI_DATA)
// Send RSSI data approximately every second
if (m_rssiCount == 2U) {
frame[34U] = (m_rssi >> 8) & 0xFFU;
frame[35U] = (m_rssi >> 0) & 0xFFU;
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 3U);
} else {
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 1U);
}
m_rssiCount++;
if (m_rssiCount >= 16U)
m_rssiCount = 0U;
#else
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 1U);
#endif
writeRSSIData(frame);
m_state = DMORXS_VOICE;
m_syncCount = 0U;
m_n = 0U;
@@ -225,26 +204,12 @@ bool CDMRDMORX::processSample(q15_t sample, uint16_t rssi)
} else {
frame[0U] = ++m_n;
}
#if defined(SEND_RSSI_DATA)
// Send RSSI data approximately every second
if (m_rssiCount == 2U) {
frame[34U] = (m_rssi >> 8) & 0xFFU;
frame[35U] = (m_rssi >> 0) & 0xFFU;
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 3U);
} else {
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 1U);
}
m_rssiCount++;
if (m_rssiCount >= 16U)
m_rssiCount = 0U;
#else
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 1U);
#endif
} else if (m_state == DMORXS_DATA) {
if (m_type != 0x00U) {
frame[0U] = CONTROL_DATA | m_type;
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
}
}
}
@@ -267,16 +232,13 @@ bool CDMRDMORX::processSample(q15_t sample, uint16_t rssi)
void CDMRDMORX::correlateSync(bool first)
{
uint8_t errs1 = countBits32((m_bitBuffer[m_bitPtr] & DMR_SYNC_SYMBOLS_MASK) ^ DMR_S2_DATA_SYNC_SYMBOLS);
uint8_t errs2 = countBits32((m_bitBuffer[m_bitPtr] & DMR_SYNC_SYMBOLS_MASK) ^ DMR_MS_DATA_SYNC_SYMBOLS);
uint8_t errs = countBits32((m_bitBuffer[m_bitPtr] & DMR_SYNC_SYMBOLS_MASK) ^ DMR_MS_DATA_SYNC_SYMBOLS);
// The voice sync is the complement of the data sync
bool data1 = (errs1 <= MAX_SYNC_SYMBOLS_ERRS);
bool data2 = (errs2 <= MAX_SYNC_SYMBOLS_ERRS);
bool voice1 = (errs1 >= (DMR_SYNC_LENGTH_SYMBOLS - MAX_SYNC_SYMBOLS_ERRS));
bool voice2 = (errs2 >= (DMR_SYNC_LENGTH_SYMBOLS - MAX_SYNC_SYMBOLS_ERRS));
bool data = (errs <= MAX_SYNC_SYMBOLS_ERRS);
bool voice = (errs >= (DMR_SYNC_LENGTH_SYMBOLS - MAX_SYNC_SYMBOLS_ERRS));
if (data1 || data2 || voice1 || voice2) {
if (data || voice) {
uint16_t ptr = m_dataPtr + DMO_BUFFER_LENGTH_SAMPLES - DMR_SYNC_LENGTH_SAMPLES + DMR_RADIO_SYMBOL_LENGTH;
if (ptr >= DMO_BUFFER_LENGTH_SAMPLES)
ptr -= DMO_BUFFER_LENGTH_SAMPLES;
@@ -285,23 +247,34 @@ void CDMRDMORX::correlateSync(bool first)
q15_t min = 16000;
q15_t max = -16000;
uint32_t mask = 0x00800000U;
for (uint8_t i = 0U; i < DMR_SYNC_LENGTH_SYMBOLS; i++, mask >>= 1) {
bool b;
if (data1 || voice1)
b = (DMR_S2_DATA_SYNC_SYMBOLS & mask) == mask;
for (uint8_t i = 0U; i < DMR_SYNC_LENGTH_SYMBOLS; i++) {
q15_t val = m_buffer[ptr];
if (val > max)
max = val;
if (val < min)
min = val;
int8_t corrVal;
if (data)
corrVal = DMR_MS_DATA_SYNC_SYMBOLS_VALUES[i];
else
b = (DMR_MS_DATA_SYNC_SYMBOLS & mask) == mask;
corrVal = DMR_MS_VOICE_SYNC_SYMBOLS_VALUES[i];
if (m_buffer[ptr] > max)
max = m_buffer[ptr];
if (m_buffer[ptr] < min)
min = m_buffer[ptr];
if (data1 || data2)
corr += b ? -m_buffer[ptr] : m_buffer[ptr];
else // if (voice)
corr += b ? m_buffer[ptr] : -m_buffer[ptr];
switch (corrVal) {
case +3:
corr -= (val + val + val);
break;
case +1:
corr -= val;
break;
case -1:
corr += val;
break;
default: // -3
corr += (val + val + val);
break;
}
ptr += DMR_RADIO_SYMBOL_LENGTH;
if (ptr >= DMO_BUFFER_LENGTH_SAMPLES)
@@ -321,21 +294,16 @@ void CDMRDMORX::correlateSync(bool first)
samplesToBits(ptr, DMR_SYNC_LENGTH_SYMBOLS, sync, 4U, centre, threshold);
if (data1 || data2) {
if (data) {
uint8_t errs = 0U;
for (uint8_t i = 0U; i < DMR_SYNC_BYTES_LENGTH; i++) {
if (data1)
errs += countBits8((sync[i] & DMR_SYNC_BYTES_MASK[i]) ^ DMR_S2_DATA_SYNC_BYTES[i]);
else
errs += countBits8((sync[i] & DMR_SYNC_BYTES_MASK[i]) ^ DMR_MS_DATA_SYNC_BYTES[i]);
}
for (uint8_t i = 0U; i < DMR_SYNC_BYTES_LENGTH; i++)
errs += countBits8((sync[i] & DMR_SYNC_BYTES_MASK[i]) ^ DMR_MS_DATA_SYNC_BYTES[i]);
if (errs <= MAX_SYNC_BYTES_ERRS) {
if (first) {
m_threshold[0U] = m_threshold[1U] = m_threshold[2U] = m_threshold[3U] = threshold;
m_centre[0U] = m_centre[1U] = m_centre[2U] = m_centre[3U] = centre;
m_averagePtr = 0U;
m_rssiCount = 0U;
} else {
m_threshold[m_averagePtr] = threshold;
m_centre[m_averagePtr] = centre;
@@ -359,19 +327,14 @@ void CDMRDMORX::correlateSync(bool first)
}
} else { // if (voice1 || voice2)
uint8_t errs = 0U;
for (uint8_t i = 0U; i < DMR_SYNC_BYTES_LENGTH; i++) {
if (voice1)
errs += countBits8((sync[i] & DMR_SYNC_BYTES_MASK[i]) ^ DMR_S2_VOICE_SYNC_BYTES[i]);
else
errs += countBits8((sync[i] & DMR_SYNC_BYTES_MASK[i]) ^ DMR_MS_VOICE_SYNC_BYTES[i]);
}
for (uint8_t i = 0U; i < DMR_SYNC_BYTES_LENGTH; i++)
errs += countBits8((sync[i] & DMR_SYNC_BYTES_MASK[i]) ^ DMR_MS_VOICE_SYNC_BYTES[i]);
if (errs <= MAX_SYNC_BYTES_ERRS) {
if (first) {
m_threshold[0U] = m_threshold[1U] = m_threshold[2U] = m_threshold[3U] = threshold;
m_centre[0U] = m_centre[1U] = m_centre[2U] = m_centre[3U] = centre;
m_averagePtr = 0U;
m_rssiCount = 0U;
} else {
m_threshold[m_averagePtr] = threshold;
m_centre[m_averagePtr] = centre;
@@ -436,3 +399,27 @@ void CDMRDMORX::setColorCode(uint8_t colorCode)
m_colorCode = colorCode;
}
void CDMRDMORX::writeRSSIData(uint8_t* frame)
{
#if defined(SEND_RSSI_DATA)
// Calculate RSSI average over a burst period. We don't take into account 2.5 ms at the beginning and 2.5 ms at the end
uint16_t start = m_startPtr + DMR_SYNC_LENGTH_SAMPLES / 2U;
uint32_t accum = 0U;
for (uint16_t i = 0U; i < (DMR_FRAME_LENGTH_SAMPLES - DMR_SYNC_LENGTH_SAMPLES); i++) {
accum += m_rssi[start];
start++;
if (start >= DMO_BUFFER_LENGTH_SAMPLES)
start -= DMO_BUFFER_LENGTH_SAMPLES;
}
uint16_t avg = accum / (DMR_FRAME_LENGTH_SAMPLES - DMR_SYNC_LENGTH_SAMPLES);
frame[34U] = (avg >> 8) & 0xFFU;
frame[35U] = (avg >> 0) & 0xFFU;
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 3U);
#else
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 1U);
#endif
}
+5 -6
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -22,7 +22,7 @@
#include "Config.h"
#include "DMRDefines.h"
const uint16_t DMO_BUFFER_LENGTH_SAMPLES = 1440U; // 60ms at 24 kHz
const uint16_t DMO_BUFFER_LENGTH_SAMPLES = 2880U; // 60ms at 48 kHz
enum DMORX_STATE {
DMORXS_NONE,
@@ -58,13 +58,12 @@ private:
DMORX_STATE m_state;
uint8_t m_n;
uint8_t m_type;
uint16_t m_rssiCount;
uint16_t m_rssi;
uint16_t m_rssi[DMO_BUFFER_LENGTH_SAMPLES];
bool processSample(q15_t sample, uint16_t rssi);
void correlateSync(bool first);
void samplesToBits(uint16_t start, uint8_t count, uint8_t* buffer, uint16_t offset, q15_t centre, q15_t threshold);
void writeRSSIData(uint8_t* frame);
};
#endif
+49 -57
View File
@@ -1,6 +1,7 @@
/*
* Copyright (C) 2009-2016 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -17,30 +18,33 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
// #define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#include "DMRSlotType.h"
#if defined(WIDE_C4FSK_FILTERS_TX)
// Generated using rcosdesign(0.2, 4, 5, 'sqrt') in MATLAB
static q15_t DMR_C4FSK_FILTER[] = {688, -680, -2158, -3060, -2724, -775, 2684, 7041, 11310, 14425, 15565, 14425,
11310, 7041, 2684, -775, -2724, -3060, -2158, -680, 688, 0};
const uint16_t DMR_C4FSK_FILTER_LEN = 22U;
#else
// Generated using rcosdesign(0.2, 8, 5, 'sqrt') in MATLAB
static q15_t DMR_C4FSK_FILTER[] = {401, 104, -340, -731, -847, -553, 112, 909, 1472, 1450, 683, -675, -2144, -3040, -2706, -770, 2667, 6995,
11237, 14331, 15464, 14331, 11237, 6995, 2667, -770, -2706, -3040, -2144, -675, 683, 1450, 1472, 909, 112,
-553, -847, -731, -340, 104, 401, 0};
const uint16_t DMR_C4FSK_FILTER_LEN = 42U;
#endif
// Generated using rcosdesign(0.2, 8, 10, 'sqrt') in MATLAB
static q15_t RRC_0_2_FILTER[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 850, 592, 219, -234, -720, -1179,
-1548, -1769, -1795, -1597, -1172, -544, 237, 1092, 1927, 2637,
3120, 3286, 3073, 2454, 1447, 116, -1431, -3043, -4544, -5739,
-6442, -6483, -5735, -4121, -1633, 1669, 5651, 10118, 14822,
19484, 23810, 27520, 30367, 32156, 32767, 32156, 30367, 27520,
23810, 19484, 14822, 10118, 5651, 1669, -1633, -4121, -5735,
-6483, -6442, -5739, -4544, -3043, -1431, 116, 1447, 2454,
3073, 3286, 3120, 2637, 1927, 1092, 237, -544, -1172, -1597,
-1795, -1769, -1548, -1179, -720, -234, 219, 592, 850}; // numTaps = 90, L = 10
const uint16_t RRC_0_2_FILTER_PHASE_LEN = 9U; // phaseLength = numTaps/L
const q15_t DMR_LEVELA[] = { 640, 640 , 640, 640, 640};
const q15_t DMR_LEVELB[] = { 213, 213, 213, 213, 213};
const q15_t DMR_LEVELC[] = {-213, -213, -213, -213, -213};
const q15_t DMR_LEVELD[] = {-640, -640, -640, -640, -640};
const q15_t DMR_LEVELA = 1362;
const q15_t DMR_LEVELB = 454;
const q15_t DMR_LEVELC = -454;
const q15_t DMR_LEVELD = -1362;
const uint8_t BIT_MASK_TABLE[] = {0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U};
#define WRITE_BIT1(p,i,b) p[(i)>>3] = (b) ? (p[(i)>>3] | BIT_MASK_TABLE[(i)&7]) : (p[(i)>>3] & ~BIT_MASK_TABLE[(i)&7])
#define READ_BIT1(p,i) (p[(i)>>3] & BIT_MASK_TABLE[(i)&7])
const uint8_t DMR_SYNC = 0x5FU;
CDMRDMOTX::CDMRDMOTX() :
m_fifo(),
@@ -49,14 +53,14 @@ m_modState(),
m_poBuffer(),
m_poLen(0U),
m_poPtr(0U),
m_txDelay(240U), // 200ms
m_count(0U)
m_txDelay(240U) // 200ms
{
::memset(m_modState, 0x00U, 70U * sizeof(q15_t));
::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
m_modFilter.numTaps = DMR_C4FSK_FILTER_LEN;
m_modFilter.pState = m_modState;
m_modFilter.pCoeffs = DMR_C4FSK_FILTER;
m_modFilter.L = DMR_RADIO_SYMBOL_LENGTH;
m_modFilter.phaseLength = RRC_0_2_FILTER_PHASE_LEN;
m_modFilter.pCoeffs = RRC_0_2_FILTER;
m_modFilter.pState = m_modState;
}
void CDMRDMOTX::process()
@@ -64,13 +68,17 @@ void CDMRDMOTX::process()
if (m_poLen == 0U && m_fifo.getData() > 0U) {
if (!m_tx) {
for (uint16_t i = 0U; i < m_txDelay; i++)
m_poBuffer[m_poLen++] = 0x00U;
m_poBuffer[i] = DMR_SYNC;
m_poLen = m_txDelay;
} else {
for (unsigned int i = 0U; i < 72U; i++)
m_poBuffer[m_poLen++] = 0x00U;
m_poBuffer[i] = DMR_SYNC;
for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++)
m_poBuffer[i] = m_fifo.get();
m_poBuffer[i + 39U] = m_fifo.get();
m_poLen = 72U;
}
m_poPtr = 0U;
@@ -112,53 +120,34 @@ uint8_t CDMRDMOTX::writeData(const uint8_t* data, uint8_t length)
void CDMRDMOTX::writeByte(uint8_t c)
{
q15_t inBuffer[DMR_RADIO_SYMBOL_LENGTH * 4U + 1U];
q15_t outBuffer[DMR_RADIO_SYMBOL_LENGTH * 4U + 1U];
q15_t inBuffer[4U];
q15_t outBuffer[DMR_RADIO_SYMBOL_LENGTH * 4U];
const uint8_t MASK = 0xC0U;
q15_t* p = inBuffer;
for (uint8_t i = 0U; i < 4U; i++, c <<= 2, p += DMR_RADIO_SYMBOL_LENGTH) {
for (uint8_t i = 0U; i < 4U; i++, c <<= 2) {
switch (c & MASK) {
case 0xC0U:
::memcpy(p, DMR_LEVELA, DMR_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = DMR_LEVELA;
break;
case 0x80U:
::memcpy(p, DMR_LEVELB, DMR_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = DMR_LEVELB;
break;
case 0x00U:
::memcpy(p, DMR_LEVELC, DMR_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = DMR_LEVELC;
break;
default:
::memcpy(p, DMR_LEVELD, DMR_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = DMR_LEVELD;
break;
}
}
uint16_t blockSize = DMR_RADIO_SYMBOL_LENGTH * 4U;
::arm_fir_interpolate_q15(&m_modFilter, inBuffer, outBuffer, 4U);
// Handle the case of the oscillator not being accurate enough
if (m_sampleCount > 0U) {
m_count += DMR_RADIO_SYMBOL_LENGTH * 4U;
if (m_count >= m_sampleCount) {
if (m_sampleInsert) {
inBuffer[DMR_RADIO_SYMBOL_LENGTH * 4U] = inBuffer[DMR_RADIO_SYMBOL_LENGTH * 4U - 1U];
blockSize++;
} else {
blockSize--;
}
m_count -= m_sampleCount;
}
}
::arm_fir_fast_q15(&m_modFilter, inBuffer, outBuffer, blockSize);
io.write(STATE_DMR, outBuffer, blockSize);
io.write(STATE_DMR, outBuffer, DMR_RADIO_SYMBOL_LENGTH * 4U);
}
uint16_t CDMRDMOTX::getSpace() const
uint8_t CDMRDMOTX::getSpace() const
{
return m_fifo.getSpace() / (DMR_FRAME_LENGTH_BYTES + 2U);
}
@@ -166,5 +155,8 @@ uint16_t CDMRDMOTX::getSpace() const
void CDMRDMOTX::setTXDelay(uint8_t delay)
{
m_txDelay = 600U + uint16_t(delay) * 12U; // 500ms + tx delay
if (m_txDelay > 1200U)
m_txDelay = 1200U;
}
+9 -10
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
*
* This program is free software; you can redistribute it and/or modify
@@ -35,17 +35,16 @@ public:
void setTXDelay(uint8_t delay);
uint16_t getSpace() const;
uint8_t getSpace() const;
private:
CSerialRB m_fifo;
arm_fir_instance_q15 m_modFilter;
q15_t m_modState[70U]; // NoTaps + BlockSize - 1, 42 + 20 - 1 plus some spare
uint8_t m_poBuffer[80U];
uint16_t m_poLen;
uint16_t m_poPtr;
uint16_t m_txDelay;
uint32_t m_count;
CSerialRB m_fifo;
arm_fir_interpolate_instance_q15 m_modFilter;
q15_t m_modState[16U]; // blockSize + phaseLength - 1, 4 + 9 - 1 plus some spare
uint8_t m_poBuffer[1200U];
uint16_t m_poLen;
uint16_t m_poPtr;
uint32_t m_txDelay;
void writeByte(uint8_t c);
};
+14 -14
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2016 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,7 +19,7 @@
#if !defined(DMRDEFINES_H)
#define DMRDEFINES_H
const unsigned int DMR_RADIO_SYMBOL_LENGTH = 5U; // At 24 kHz sample rate
const unsigned int DMR_RADIO_SYMBOL_LENGTH = 10U; // At 48 kHz sample rate
const unsigned int DMR_FRAME_LENGTH_BYTES = 33U;
const unsigned int DMR_FRAME_LENGTH_BITS = DMR_FRAME_LENGTH_BYTES * 8U;
@@ -61,32 +61,32 @@ const uint8_t DMR_MS_DATA_SYNC_BYTES[] = {0x0DU, 0x5DU, 0x7FU, 0x77U, 0xFDU, 0
const uint8_t DMR_MS_VOICE_SYNC_BYTES[] = {0x07U, 0xF7U, 0xD5U, 0xDDU, 0x57U, 0xDFU, 0xD0U};
const uint8_t DMR_BS_DATA_SYNC_BYTES[] = {0x0DU, 0xFFU, 0x57U, 0xD7U, 0x5DU, 0xF5U, 0xD0U};
const uint8_t DMR_BS_VOICE_SYNC_BYTES[] = {0x07U, 0x55U, 0xFDU, 0x7DU, 0xF7U, 0x5FU, 0x70U};
const uint8_t DMR_S1_DATA_SYNC_BYTES[] = {0x0FU, 0x7FU, 0xDDU, 0x5DU, 0xDFU, 0xD5U, 0x50U};
const uint8_t DMR_S1_VOICE_SYNC_BYTES[] = {0x05U, 0xD5U, 0x77U, 0xF7U, 0x75U, 0x7FU, 0xF0U};
const uint8_t DMR_S2_DATA_SYNC_BYTES[] = {0x0DU, 0x75U, 0x57U, 0xF5U, 0xFFU, 0x7FU, 0x50U};
const uint8_t DMR_S2_VOICE_SYNC_BYTES[] = {0x07U, 0xDFU, 0xFDU, 0x5FU, 0x55U, 0xD5U, 0xF0U};
const uint8_t DMR_SYNC_BYTES_MASK[] = {0x0FU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xFFU, 0xF0U};
const uint64_t DMR_MS_DATA_SYNC_BITS = 0x0000D5D7F77FD757U;
const uint64_t DMR_MS_VOICE_SYNC_BITS = 0x00007F7D5DD57DFDU;
const uint64_t DMR_BS_DATA_SYNC_BITS = 0x0000DFF57D75DF5DU;
const uint64_t DMR_BS_VOICE_SYNC_BITS = 0x0000755FD7DF75F7U;
const uint64_t DMR_S1_DATA_SYNC_BITS = 0x0000F7FDD5DDFD55U;
const uint64_t DMR_S1_VOICE_SYNC_BITS = 0x00005D577F7757FFU;
const uint64_t DMR_S2_DATA_SYNC_BITS = 0x0000D7557F5FF7F5U;
const uint64_t DMR_S2_VOICE_SYNC_BITS = 0x00007DFFD5F55D5FU;
const uint64_t DMR_SYNC_BITS_MASK = 0x0000FFFFFFFFFFFFU;
const uint32_t DMR_MS_DATA_SYNC_SYMBOLS = 0x0076286EU;
const uint32_t DMR_MS_VOICE_SYNC_SYMBOLS = 0x0089D791U;
const uint32_t DMR_BS_DATA_SYNC_SYMBOLS = 0x00439B4DU;
const uint32_t DMR_BS_VOICE_SYNC_SYMBOLS = 0x00BC64B2U;
const uint32_t DMR_S1_DATA_SYNC_SYMBOLS = 0x0021751FU;
const uint32_t DMR_S1_VOICE_SYNC_SYMBOLS = 0x00DE8AE0U;
const uint32_t DMR_S2_DATA_SYNC_SYMBOLS = 0x006F8C23U;
const uint32_t DMR_S2_VOICE_SYNC_SYMBOLS = 0x009073DCU;
const uint32_t DMR_SYNC_SYMBOLS_MASK = 0x00FFFFFFU;
// D 5 D 7 F 7 7 F D 7 5 7
// 11 01 01 01 11 01 01 11 11 11 01 11 01 11 11 11 11 01 01 11 01 01 01 11
// -3 +3 +3 +3 -3 +3 +3 -3 -3 -3 +3 -3 +3 -3 -3 -3 -3 +3 +3 -3 +3 +3 +3 -3
const int8_t DMR_MS_DATA_SYNC_SYMBOLS_VALUES[] = {-3, +3, +3, +3, -3, +3, +3, -3, -3, -3, +3, -3, +3, -3, -3, -3, -3, +3, +3, -3, +3, +3, +3, -3};
// 7 F 7 D 5 D D 5 7 D F D
// 01 11 11 11 01 11 11 01 01 01 11 01 11 01 01 01 01 11 11 01 11 11 11 01
// +3 -3 -3 -3 +3 -3 -3 +3 +3 +3 -3 +3 -3 +3 +3 +3 +3 -3 -3 +3 -3 -3 -3 +3
const int8_t DMR_MS_VOICE_SYNC_SYMBOLS_VALUES[] = {+3, -3, -3, -3, +3, -3, -3, +3, +3, +3, -3, +3, -3, +3, +3, +3, +3, -3, -3, +3, -3, -3, -3, +3};
const uint8_t DT_VOICE_PI_HEADER = 0U;
const uint8_t DT_VOICE_LC_HEADER = 1U;
const uint8_t DT_TERMINATOR_WITH_LC = 2U;
+22 -13
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2016 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -16,8 +16,6 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#include "DMRIdleRX.h"
@@ -84,16 +82,28 @@ void CDMRIdleRX::processSample(q15_t sample)
q15_t max = -16000;
q15_t min = 16000;
uint32_t mask = 0x00800000U;
for (uint8_t i = 0U; i < DMR_SYNC_LENGTH_SYMBOLS; i++, mask >>= 1) {
bool b = (DMR_MS_DATA_SYNC_SYMBOLS & mask) == mask;
for (uint8_t i = 0U; i < DMR_SYNC_LENGTH_SYMBOLS; i++) {
q15_t val = m_buffer[ptr];
if (m_buffer[ptr] > max)
max = m_buffer[ptr];
if (m_buffer[ptr] < min)
min = m_buffer[ptr];
if (val > max)
max = val;
if (val < min)
min = val;
corr += b ? -m_buffer[ptr] : m_buffer[ptr];
switch (DMR_MS_DATA_SYNC_SYMBOLS_VALUES[i]) {
case +3:
corr -= (val + val + val);
break;
case +1:
corr -= val;
break;
case -1:
corr += val;
break;
default: // -3
corr += (val + val + val);
break;
}
ptr += DMR_RADIO_SYMBOL_LENGTH;
if (ptr >= DMR_FRAME_LENGTH_SAMPLES)
@@ -150,7 +160,7 @@ void CDMRIdleRX::processSample(q15_t sample)
}
m_endPtr = NOENDPTR;
m_maxCorr = 0U;
m_maxCorr = 0;
}
m_dataPtr++;
@@ -199,4 +209,3 @@ void CDMRIdleRX::setColorCode(uint8_t colorCode)
{
m_colorCode = colorCode;
}
+2 -2
View File
@@ -43,8 +43,8 @@ private:
q15_t m_threshold;
uint8_t m_colorCode;
void processSample(q15_t sample);
void samplesToBits(uint16_t start, uint8_t count, uint8_t* buffer, uint16_t offset, q15_t centre, q15_t threshold);
void processSample(q15_t sample);
void samplesToBits(uint16_t start, uint8_t count, uint8_t* buffer, uint16_t offset, q15_t centre, q15_t threshold);
};
#endif
+59 -62
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2016 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -16,16 +16,14 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#include "DMRSlotRX.h"
#include "DMRSlotType.h"
#include "Utils.h"
const uint16_t SCAN_START = 400U;
const uint16_t SCAN_END = 490U;
const uint16_t SCAN_START = 790U;
const uint16_t SCAN_END = 920U;
const q15_t SCALING_FACTOR = 19505; // Q15(0.60)
@@ -65,8 +63,7 @@ m_delay(0U),
m_state(DMRRXS_NONE),
m_n(0U),
m_type(0U),
m_rssiCount(0U),
m_rssi(0U)
m_rssi()
{
}
@@ -91,7 +88,6 @@ void CDMRSlotRX::reset()
m_state = DMRRXS_NONE;
m_startPtr = 0U;
m_endPtr = NOENDPTR;
m_rssiCount = 0U;
}
bool CDMRSlotRX::processSample(q15_t sample, uint16_t rssi)
@@ -101,11 +97,12 @@ bool CDMRSlotRX::processSample(q15_t sample, uint16_t rssi)
return m_state != DMRRXS_NONE;
// Ensure that the buffer doesn't overflow
if (m_dataPtr > m_endPtr || m_dataPtr >= 900U)
if (m_dataPtr > m_endPtr || m_dataPtr >= 1900U)
return m_state != DMRRXS_NONE;
m_buffer[m_dataPtr] = sample;
m_rssi[m_dataPtr] = rssi;
m_bitBuffer[m_bitPtr] <<= 1;
if (sample < 0)
m_bitBuffer[m_bitPtr] |= 0x01U;
@@ -114,9 +111,6 @@ bool CDMRSlotRX::processSample(q15_t sample, uint16_t rssi)
if (m_dataPtr >= SCAN_START && m_dataPtr <= SCAN_END)
correlateSync(true);
} else {
// Grab the RSSI data during the frame
if (m_state == DMRRXS_VOICE && m_dataPtr == m_syncPtr)
m_rssi = rssi;
uint16_t min = m_syncPtr - 1U;
uint16_t max = m_syncPtr + 1U;
@@ -151,7 +145,7 @@ bool CDMRSlotRX::processSample(q15_t sample, uint16_t rssi)
switch (dataType) {
case DT_DATA_HEADER:
DEBUG5("DMRSlotRX: data header found slot/pos/centre/threshold", m_slot ? 2U : 1U, m_syncPtr, centre, threshold);
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
m_state = DMRRXS_DATA;
m_type = 0x00U;
break;
@@ -160,33 +154,33 @@ bool CDMRSlotRX::processSample(q15_t sample, uint16_t rssi)
case DT_RATE_1_DATA:
if (m_state == DMRRXS_DATA) {
DEBUG5("DMRSlotRX: data payload found slot/pos/centre/threshold", m_slot ? 2U : 1U, m_syncPtr, centre, threshold);
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
m_type = dataType;
}
break;
case DT_VOICE_LC_HEADER:
DEBUG5("DMRSlotRX: voice header found slot/pos/centre/threshold", m_slot ? 2U : 1U, m_syncPtr, centre, threshold);
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
m_state = DMRRXS_VOICE;
break;
case DT_VOICE_PI_HEADER:
if (m_state == DMRRXS_VOICE) {
DEBUG5("DMRSlotRX: voice pi header found slot/pos/centre/threshold", m_slot ? 2U : 1U, m_syncPtr, centre, threshold);
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
}
m_state = DMRRXS_VOICE;
break;
case DT_TERMINATOR_WITH_LC:
if (m_state == DMRRXS_VOICE) {
DEBUG5("DMRSlotRX: voice terminator found slot/pos/centre/threshold", m_slot ? 2U : 1U, m_syncPtr, centre, threshold);
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
m_state = DMRRXS_NONE;
m_endPtr = NOENDPTR;
}
break;
default: // DT_CSBK
DEBUG5("DMRSlotRX: csbk found slot/pos/centre/threshold", m_slot ? 2U : 1U, m_syncPtr, centre, threshold);
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
m_state = DMRRXS_NONE;
m_endPtr = NOENDPTR;
break;
@@ -195,22 +189,7 @@ bool CDMRSlotRX::processSample(q15_t sample, uint16_t rssi)
} else if (m_control == CONTROL_VOICE) {
// Voice sync
DEBUG5("DMRSlotRX: voice sync found slot/pos/centre/threshold", m_slot ? 2U : 1U, m_syncPtr, centre, threshold);
#if defined(SEND_RSSI_DATA)
// Send RSSI data approximately every second
if (m_rssiCount == 2U) {
frame[34U] = (m_rssi >> 8) & 0xFFU;
frame[35U] = (m_rssi >> 0) & 0xFFU;
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 3U);
} else {
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 1U);
}
m_rssiCount++;
if (m_rssiCount >= 16U)
m_rssiCount = 0U;
#else
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 1U);
#endif
writeRSSIData(frame);
m_state = DMRRXS_VOICE;
m_syncCount = 0U;
m_n = 0U;
@@ -231,26 +210,12 @@ bool CDMRSlotRX::processSample(q15_t sample, uint16_t rssi)
} else {
frame[0U] = ++m_n;
}
#if defined(SEND_RSSI_DATA)
// Send RSSI data approximately every second
if (m_rssiCount == 2U) {
frame[34U] = (m_rssi >> 8) & 0xFFU;
frame[35U] = (m_rssi >> 0) & 0xFFU;
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 3U);
} else {
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 1U);
}
m_rssiCount++;
if (m_rssiCount >= 16U)
m_rssiCount = 0U;
#else
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 1U);
#endif
} else if (m_state == DMRRXS_DATA) {
if (m_type != 0x00U) {
frame[0U] = CONTROL_DATA | m_type;
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 1U);
writeRSSIData(frame);
}
}
}
@@ -280,19 +245,34 @@ void CDMRSlotRX::correlateSync(bool first)
q15_t min = 16000;
q15_t max = -16000;
uint32_t mask = 0x00800000U;
for (uint8_t i = 0U; i < DMR_SYNC_LENGTH_SYMBOLS; i++, mask >>= 1) {
bool b = (DMR_MS_DATA_SYNC_SYMBOLS & mask) == mask;
for (uint8_t i = 0U; i < DMR_SYNC_LENGTH_SYMBOLS; i++) {
q15_t val = m_buffer[ptr];
if (m_buffer[ptr] > max)
max = m_buffer[ptr];
if (m_buffer[ptr] < min)
min = m_buffer[ptr];
if (val > max)
max = val;
if (val < min)
min = val;
int8_t corrVal;
if (data)
corr += b ? -m_buffer[ptr] : m_buffer[ptr];
else // if (voice)
corr += b ? m_buffer[ptr] : -m_buffer[ptr];
corrVal = DMR_MS_DATA_SYNC_SYMBOLS_VALUES[i];
else
corrVal = DMR_MS_VOICE_SYNC_SYMBOLS_VALUES[i];
switch (corrVal) {
case +3:
corr -= (val + val + val);
break;
case +1:
corr -= val;
break;
case -1:
corr += val;
break;
default: // -3
corr += (val + val + val);
break;
}
ptr += DMR_RADIO_SYMBOL_LENGTH;
}
@@ -317,7 +297,6 @@ void CDMRSlotRX::correlateSync(bool first)
m_threshold[0U] = m_threshold[1U] = m_threshold[2U] = m_threshold[3U] = threshold;
m_centre[0U] = m_centre[1U] = m_centre[2U] = m_centre[3U] = centre;
m_averagePtr = 0U;
m_rssiCount = 0U;
} else {
m_threshold[m_averagePtr] = threshold;
m_centre[m_averagePtr] = centre;
@@ -343,7 +322,6 @@ void CDMRSlotRX::correlateSync(bool first)
m_threshold[0U] = m_threshold[1U] = m_threshold[2U] = m_threshold[3U] = threshold;
m_centre[0U] = m_centre[1U] = m_centre[2U] = m_centre[3U] = centre;
m_averagePtr = 0U;
m_rssiCount = 0U;
} else {
m_threshold[m_averagePtr] = threshold;
m_centre[m_averagePtr] = centre;
@@ -403,3 +381,22 @@ void CDMRSlotRX::setDelay(uint8_t delay)
m_delay = delay;
}
void CDMRSlotRX::writeRSSIData(uint8_t* frame)
{
#if defined(SEND_RSSI_DATA)
// Calculate RSSI average over a burst period. We don't take into account 2.5 ms at the beginning and 2.5 ms at the end
uint16_t start = m_startPtr + DMR_SYNC_LENGTH_SAMPLES / 2U;
uint32_t accum = 0U;
for (uint16_t i = 0U; i < (DMR_FRAME_LENGTH_SAMPLES - DMR_SYNC_LENGTH_SAMPLES); i++)
accum += m_rssi[start++];
uint16_t avg = accum / (DMR_FRAME_LENGTH_SAMPLES - DMR_SYNC_LENGTH_SAMPLES);
frame[34U] = (avg >> 8) & 0xFFU;
frame[35U] = (avg >> 0) & 0xFFU;
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 3U);
#else
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 1U);
#endif
}
+4 -5
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -44,7 +44,7 @@ public:
private:
bool m_slot;
uint32_t m_bitBuffer[DMR_RADIO_SYMBOL_LENGTH];
q15_t m_buffer[900U];
q15_t m_buffer[1900U];
uint16_t m_bitPtr;
uint16_t m_dataPtr;
uint16_t m_syncPtr;
@@ -62,12 +62,11 @@ private:
DMRRX_STATE m_state;
uint8_t m_n;
uint8_t m_type;
uint16_t m_rssiCount;
uint16_t m_rssi;
uint16_t m_rssi[1900U];
void correlateSync(bool first);
void samplesToBits(uint16_t start, uint8_t count, uint8_t* buffer, uint16_t offset, q15_t centre, q15_t threshold);
void writeRSSIData(uint8_t* frame);
};
#endif
+84 -70
View File
@@ -1,6 +1,7 @@
/*
* Copyright (C) 2009-2016 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -17,31 +18,28 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
// #define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#include "DMRSlotType.h"
#if defined(WIDE_C4FSK_FILTERS_TX)
// Generated using rcosdesign(0.2, 4, 5, 'sqrt') in MATLAB
static q15_t DMR_C4FSK_FILTER[] = {688, -680, -2158, -3060, -2724, -775, 2684, 7041, 11310, 14425, 15565, 14425,
11310, 7041, 2684, -775, -2724, -3060, -2158, -680, 688, 0};
const uint16_t DMR_C4FSK_FILTER_LEN = 22U;
#else
// Generated using rcosdesign(0.2, 8, 5, 'sqrt') in MATLAB
static q15_t DMR_C4FSK_FILTER[] = {401, 104, -340, -731, -847, -553, 112, 909, 1472, 1450, 683, -675, -2144, -3040, -2706, -770, 2667, 6995,
11237, 14331, 15464, 14331, 11237, 6995, 2667, -770, -2706, -3040, -2144, -675, 683, 1450, 1472, 909, 112,
-553, -847, -731, -340, 104, 401, 0};
const uint16_t DMR_C4FSK_FILTER_LEN = 42U;
#endif
// Generated using rcosdesign(0.2, 8, 10, 'sqrt') in MATLAB
static q15_t RRC_0_2_FILTER[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 850, 592, 219, -234, -720, -1179,
-1548, -1769, -1795, -1597, -1172, -544, 237, 1092, 1927, 2637,
3120, 3286, 3073, 2454, 1447, 116, -1431, -3043, -4544, -5739,
-6442, -6483, -5735, -4121, -1633, 1669, 5651, 10118, 14822,
19484, 23810, 27520, 30367, 32156, 32767, 32156, 30367, 27520,
23810, 19484, 14822, 10118, 5651, 1669, -1633, -4121, -5735,
-6483, -6442, -5739, -4544, -3043, -1431, 116, 1447, 2454,
3073, 3286, 3120, 2637, 1927, 1092, 237, -544, -1172, -1597,
-1795, -1769, -1548, -1179, -720, -234, 219, 592, 850}; // numTaps = 90, L = 10
const uint16_t RRC_0_2_FILTER_PHASE_LEN = 9U; // phaseLength = numTaps/L
const q15_t DMR_LEVELA[] = { 640, 640 , 640, 640, 640};
const q15_t DMR_LEVELB[] = { 213, 213, 213, 213, 213};
const q15_t DMR_LEVELC[] = {-213, -213, -213, -213, -213};
const q15_t DMR_LEVELD[] = {-640, -640, -640, -640, -640};
const q15_t DMR_LEVELA = 1362;
const q15_t DMR_LEVELB = 454;
const q15_t DMR_LEVELC = -454;
const q15_t DMR_LEVELD = -1362;
// The PR FILL and Data Sync pattern.
// The PR FILL and BS Data Sync pattern.
const uint8_t IDLE_DATA[] =
{0x53U, 0xC2U, 0x5EU, 0xABU, 0xA8U, 0x67U, 0x1DU, 0xC7U, 0x38U, 0x3BU, 0xD9U,
0x36U, 0x00U, 0x0DU, 0xFFU, 0x57U, 0xD7U, 0x5DU, 0xF5U, 0xD0U, 0x03U, 0xF6U,
@@ -61,6 +59,8 @@ const uint8_t BIT_MASK_TABLE[] = {0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02
#define WRITE_BIT1(p,i,b) p[(i)>>3] = (b) ? (p[(i)>>3] | BIT_MASK_TABLE[(i)&7]) : (p[(i)>>3] & ~BIT_MASK_TABLE[(i)&7])
#define READ_BIT1(p,i) (p[(i)>>3] & BIT_MASK_TABLE[(i)&7])
const uint32_t STARTUP_COUNT = 20U;
CDMRTX::CDMRTX() :
m_fifo(),
m_modFilter(),
@@ -74,14 +74,15 @@ m_markBuffer(),
m_poBuffer(),
m_poLen(0U),
m_poPtr(0U),
m_count(0U),
m_frameCount(0U),
m_abort()
{
::memset(m_modState, 0x00U, 70U * sizeof(q15_t));
::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
m_modFilter.numTaps = DMR_C4FSK_FILTER_LEN;
m_modFilter.pState = m_modState;
m_modFilter.pCoeffs = DMR_C4FSK_FILTER;
m_modFilter.L = DMR_RADIO_SYMBOL_LENGTH;
m_modFilter.phaseLength = RRC_0_2_FILTER_PHASE_LEN;
m_modFilter.pCoeffs = RRC_0_2_FILTER;
m_modFilter.pState = m_modState;
::memcpy(m_newShortLC, EMPTY_SHORT_LC, 12U);
::memcpy(m_shortLC, EMPTY_SHORT_LC, 12U);
@@ -231,7 +232,7 @@ void CDMRTX::setStart(bool start)
{
m_state = start ? DMRTXSTATE_SLOT1 : DMRTXSTATE_IDLE;
m_count = 0U;
m_frameCount = 0U;
m_abort[0U] = false;
m_abort[1U] = false;
@@ -240,80 +241,54 @@ void CDMRTX::setStart(bool start)
void CDMRTX::setCal(bool start)
{
m_state = start ? DMRTXSTATE_CAL : DMRTXSTATE_IDLE;
m_count = 0U;
}
void CDMRTX::writeByte(uint8_t c, uint8_t control)
{
q15_t inBuffer[DMR_RADIO_SYMBOL_LENGTH * 4U + 1U];
q15_t outBuffer[DMR_RADIO_SYMBOL_LENGTH * 4U + 1U];
q15_t inBuffer[4U];
q15_t outBuffer[DMR_RADIO_SYMBOL_LENGTH * 4U];
const uint8_t MASK = 0xC0U;
q15_t* p = inBuffer;
for (uint8_t i = 0U; i < 4U; i++, c <<= 2, p += DMR_RADIO_SYMBOL_LENGTH) {
for (uint8_t i = 0U; i < 4U; i++, c <<= 2) {
switch (c & MASK) {
case 0xC0U:
::memcpy(p, DMR_LEVELA, DMR_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = DMR_LEVELA;
break;
case 0x80U:
::memcpy(p, DMR_LEVELB, DMR_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = DMR_LEVELB;
break;
case 0x00U:
::memcpy(p, DMR_LEVELC, DMR_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = DMR_LEVELC;
break;
default:
::memcpy(p, DMR_LEVELD, DMR_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = DMR_LEVELD;
break;
}
}
uint16_t blockSize = DMR_RADIO_SYMBOL_LENGTH * 4U;
uint8_t controlBuffer[DMR_RADIO_SYMBOL_LENGTH * 4U + 1U];
uint8_t controlBuffer[DMR_RADIO_SYMBOL_LENGTH * 4U];
::memset(controlBuffer, MARK_NONE, DMR_RADIO_SYMBOL_LENGTH * 4U * sizeof(uint8_t));
controlBuffer[DMR_RADIO_SYMBOL_LENGTH * 2U] = control;
// Handle the case of the oscillator not being accurate enough
if (m_sampleCount > 0U) {
m_count += DMR_RADIO_SYMBOL_LENGTH * 4U;
::arm_fir_interpolate_q15(&m_modFilter, inBuffer, outBuffer, 4U);
if (m_count >= m_sampleCount) {
if (m_sampleInsert) {
inBuffer[DMR_RADIO_SYMBOL_LENGTH * 4U] = inBuffer[DMR_RADIO_SYMBOL_LENGTH * 4U - 1U];
for (int8_t i = DMR_RADIO_SYMBOL_LENGTH * 4U - 1; i >= 0; i--)
controlBuffer[i + 1] = controlBuffer[i];
blockSize++;
} else {
controlBuffer[DMR_RADIO_SYMBOL_LENGTH * 2U - 1U] = control;
for (uint8_t i = 0U; i < (DMR_RADIO_SYMBOL_LENGTH * 4U - 1U); i++)
controlBuffer[i] = controlBuffer[i + 1U];
blockSize--;
}
m_count -= m_sampleCount;
}
}
::arm_fir_fast_q15(&m_modFilter, inBuffer, outBuffer, blockSize);
io.write(STATE_DMR, outBuffer, blockSize, controlBuffer);
io.write(STATE_DMR, outBuffer, DMR_RADIO_SYMBOL_LENGTH * 4U, controlBuffer);
}
uint16_t CDMRTX::getSpace1() const
uint8_t CDMRTX::getSpace1() const
{
return m_fifo[0U].getSpace() / (DMR_FRAME_LENGTH_BYTES + 2U);
}
uint16_t CDMRTX::getSpace2() const
uint8_t CDMRTX::getSpace2() const
{
return m_fifo[1U].getSpace() / (DMR_FRAME_LENGTH_BYTES + 2U);
}
void CDMRTX::createData(uint8_t slotIndex)
{
if (m_fifo[slotIndex].getData()> 0U) {
if (m_fifo[slotIndex].getData() > 0U && m_frameCount >= STARTUP_COUNT) {
for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++) {
m_poBuffer[i] = m_fifo[slotIndex].get();
m_markBuffer[i] = MARK_NONE;
@@ -333,17 +308,40 @@ void CDMRTX::createData(uint8_t slotIndex)
void CDMRTX::createCal()
{
for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++) {
m_poBuffer[i] = 0x5FU; // +3, +3, -3, -3 pattern for deviation cal.
m_markBuffer[i] = MARK_NONE;
// 1.2 kHz sine wave generation
if (m_modemState == STATE_DMRCAL) {
for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++) {
m_poBuffer[i] = 0x5FU; // +3, +3, -3, -3 pattern for deviation cal.
m_markBuffer[i] = MARK_NONE;
}
m_poLen = DMR_FRAME_LENGTH_BYTES;
}
// 80 Hz square wave generation
if (m_modemState == STATE_LFCAL) {
for (unsigned int i = 0U; i < 7U; i++) {
m_poBuffer[i] = 0x55U; // +3, +3, ... pattern
m_markBuffer[i] = MARK_NONE;
}
m_poBuffer[7U] = 0x5FU; // +3, +3, -3, -3 pattern
for (unsigned int i = 8U; i < 15U; i++) {
m_poBuffer[i] = 0xFFU; // -3, -3, ... pattern
m_markBuffer[i] = MARK_NONE;
}
m_poLen = 15U;
}
m_poLen = DMR_FRAME_LENGTH_BYTES;
m_poPtr = 0U;
}
void CDMRTX::createCACH(uint8_t txSlotIndex, uint8_t rxSlotIndex)
{
m_frameCount++;
if (m_cachPtr >= 12U)
m_cachPtr = 0U;
@@ -359,7 +357,9 @@ void CDMRTX::createCACH(uint8_t txSlotIndex, uint8_t rxSlotIndex)
m_markBuffer[1U] = MARK_NONE;
m_markBuffer[2U] = rxSlotIndex == 1U ? MARK_SLOT1 : MARK_SLOT2;
bool at = m_fifo[rxSlotIndex].getData() > 0U;
bool at = false;
if (m_frameCount >= STARTUP_COUNT)
at = m_fifo[rxSlotIndex].getData() > 0U;
bool tc = txSlotIndex == 1U;
bool ls0 = true; // For 1 and 2
bool ls1 = true;
@@ -395,3 +395,17 @@ void CDMRTX::setColorCode(uint8_t colorCode)
slotType.encode(colorCode, DT_IDLE, m_idle);
}
void CDMRTX::resetFifo1()
{
m_fifo[0U].reset();
}
void CDMRTX::resetFifo2()
{
m_fifo[1U].reset();
}
uint32_t CDMRTX::getFrameCount()
{
return m_frameCount;
}
+22 -18
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
*
* This program is free software; you can redistribute it and/or modify
@@ -48,27 +48,31 @@ public:
void setCal(bool start);
void process();
uint16_t getSpace1() const;
uint16_t getSpace2() const;
void resetFifo1();
void resetFifo2();
uint32_t getFrameCount();
uint8_t getSpace1() const;
uint8_t getSpace2() const;
void setColorCode(uint8_t colorCode);
private:
CSerialRB m_fifo[2U];
arm_fir_instance_q15 m_modFilter;
q15_t m_modState[70U]; // NoTaps + BlockSize - 1, 42 + 20 - 1 plus some spare
DMRTXSTATE m_state;
uint8_t m_idle[DMR_FRAME_LENGTH_BYTES];
uint8_t m_cachPtr;
uint8_t m_shortLC[12U];
uint8_t m_newShortLC[12U];
uint8_t m_markBuffer[40U];
uint8_t m_poBuffer[40U];
uint16_t m_poLen;
uint16_t m_poPtr;
uint32_t m_count;
bool m_abort[2U];
CSerialRB m_fifo[2U];
arm_fir_interpolate_instance_q15 m_modFilter;
q15_t m_modState[16U]; // blockSize + phaseLength - 1, 4 + 9 - 1 plus some spare
DMRTXSTATE m_state;
uint8_t m_idle[DMR_FRAME_LENGTH_BYTES];
uint8_t m_cachPtr;
uint8_t m_shortLC[12U];
uint8_t m_newShortLC[12U];
uint8_t m_markBuffer[40U];
uint8_t m_poBuffer[40U];
uint16_t m_poLen;
uint16_t m_poPtr;
uint32_t m_frameCount;
bool m_abort[2U];
void createData(uint8_t slotIndex);
void createCACH(uint8_t txSlotIndex, uint8_t rxSlotIndex);
+37 -17
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2015,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,30 +19,50 @@
#if !defined(DSTARDEFINES_H)
#define DSTARDEFINES_H
const unsigned int DSTAR_RADIO_BIT_LENGTH = 5U; // At 24 kHz sample rate
const unsigned int DSTAR_RADIO_SYMBOL_LENGTH = 10U; // At 48 kHz sample rate
const unsigned int DSTAR_HEADER_LENGTH_BYTES = 41U;
const unsigned int DSTAR_HEADER_LENGTH_BITS = DSTAR_HEADER_LENGTH_BYTES * 8U;
const unsigned int DSTAR_HEADER_LENGTH_BYTES = 41U;
const unsigned int DSTAR_FEC_SECTION_LENGTH_BYTES = 83U;
const unsigned int DSTAR_FEC_SECTION_LENGTH_BITS = 660U;
const unsigned int DSTAR_FEC_SECTION_LENGTH_BYTES = 83U;
const unsigned int DSTAR_FEC_SECTION_LENGTH_SYMBOLS = 660U;
const unsigned int DSTAR_FEC_SECTION_LENGTH_SAMPLES = DSTAR_FEC_SECTION_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
const unsigned int DSTAR_DATA_LENGTH_BYTES = 12U;
const unsigned int DSTAR_DATA_LENGTH_BITS = DSTAR_DATA_LENGTH_BYTES * 8U;
const unsigned int DSTAR_DATA_LENGTH_BYTES = 12U;
const unsigned int DSTAR_DATA_LENGTH_SYMBOLS = DSTAR_DATA_LENGTH_BYTES * 8U;
const unsigned int DSTAR_DATA_LENGTH_SAMPLES = DSTAR_DATA_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
const uint8_t DSTAR_EOT_BYTES[] = {0x55, 0x55, 0x55, 0x55, 0xC8, 0x7A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
const unsigned int DSTAR_EOT_LENGTH_BYTES = 6U;
const unsigned int DSTAR_EOT_LENGTH_BITS = DSTAR_EOT_LENGTH_BYTES * 8U;
const unsigned int DSTAR_END_SYNC_LENGTH_BYTES = 6U;
const unsigned int DSTAR_END_SYNC_LENGTH_BITS = DSTAR_END_SYNC_LENGTH_BYTES * 8U;
const uint8_t DSTAR_DATA_SYNC_LENGTH_BYTES = 3U;
const uint8_t DSTAR_DATA_SYNC_LENGTH_BITS = DSTAR_DATA_SYNC_LENGTH_BYTES * 8U;
const unsigned int DSTAR_FRAME_SYNC_LENGTH_BYTES = 3U;
const unsigned int DSTAR_FRAME_SYNC_LENGTH_SYMBOLS = DSTAR_FRAME_SYNC_LENGTH_BYTES * 8U;
const unsigned int DSTAR_FRAME_SYNC_LENGTH_SAMPLES = DSTAR_FRAME_SYNC_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
const uint8_t DSTAR_DATA_SYNC_BYTES[] = {0x9E, 0x8D, 0x32, 0x88, 0x26, 0x1A, 0x3F, 0x61, 0xE8, 0x55, 0x2D, 0x16};
const unsigned int DSTAR_DATA_SYNC_LENGTH_BYTES = 3U;
const unsigned int DSTAR_DATA_SYNC_LENGTH_SYMBOLS = DSTAR_DATA_SYNC_LENGTH_BYTES * 8U;
const unsigned int DSTAR_DATA_SYNC_LENGTH_SAMPLES = DSTAR_DATA_SYNC_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
const uint8_t DSTAR_SLOW_DATA_TYPE_TEXT = 0x40U;
const uint8_t DSTAR_SLOW_DATA_TYPE_HEADER = 0x50U;
const uint8_t DSTAR_DATA_SYNC_BYTES[] = {0x9E, 0x8D, 0x32, 0x88, 0x26, 0x1A, 0x3F, 0x61, 0xE8, 0x55, 0x2D, 0x16};
const uint8_t DSTAR_SCRAMBLER_BYTES[] = {0x70U, 0x4FU, 0x93U};
// D-Star bit order version of 0x55 0x6E 0x0A
const uint32_t DSTAR_FRAME_SYNC_DATA = 0x00557650U;
const uint32_t DSTAR_FRAME_SYNC_MASK = 0x00FFFFFFU;
const bool DSTAR_FRAME_SYNC_SYMBOLS[] = {false, true, false, true, false, true, false, true, false, true, true, true, false, true, true, false, false, true, false, true, false, false, false, false};
// D-Star bit order version of 0x55 0x2D 0x16
const uint32_t DSTAR_DATA_SYNC_DATA = 0x00AAB468U;
const uint32_t DSTAR_DATA_SYNC_MASK = 0x00FFFFFFU;
const bool DSTAR_DATA_SYNC_SYMBOLS[] = {true, false, true, false, true, false, true, false, true, false, true, true, false, true, false, false, false, true, true, false, true, false, false, false};
// D-Star bit order version of 0x55 0x55 0xC8 0x7A
const uint32_t DSTAR_END_SYNC_DATA = 0xAAAA135EU;
const uint32_t DSTAR_END_SYNC_MASK = 0xFFFFFFFFU;
const uint8_t DSTAR_END_SYNC_BYTES[] = {0x55, 0x55, 0x55, 0x55, 0xC8, 0x7A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
const uint8_t DSTAR_SLOW_DATA_TYPE_TEXT = 0x40U;
const uint8_t DSTAR_SLOW_DATA_TYPE_HEADER = 0x50U;
const uint8_t DSTAR_SCRAMBLER_BYTES[] = {0x70U, 0x4FU, 0x93U};
#endif
+288 -155
View File
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2009-2016 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -16,31 +17,17 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
// #define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#include "DStarRX.h"
#include "Utils.h"
const unsigned int BUFFER_LENGTH = 200U;
const uint32_t PLLMAX = 0x10000U;
const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
const uint32_t INC = PLLINC / 32U;
const unsigned int MAX_SYNC_BITS = 50U * DSTAR_DATA_LENGTH_BITS;
const unsigned int SYNC_POS = 21U * DSTAR_DATA_LENGTH_BITS;
const unsigned int SYNC_SCAN_START = SYNC_POS - 3U;
const unsigned int SYNC_SCAN_END = SYNC_POS + 3U;
const q15_t THRESHOLD = 0;
const unsigned int MAX_FRAMES = 150U;
// D-Star bit order version of 0x55 0x55 0x6E 0x0A
const uint32_t FRAME_SYNC_DATA = 0x00557650U;
const uint32_t FRAME_SYNC_MASK = 0x00FFFFFFU;
const uint8_t FRAME_SYNC_ERRS = 2U;
const uint8_t FRAME_SYNC_ERRS = 1U;
// D-Star bit order version of 0x55 0x2D 0x16
const uint32_t DATA_SYNC_DATA = 0x00AAB468U;
@@ -50,7 +37,7 @@ const uint8_t DATA_SYNC_ERRS = 2U;
// D-Star bit order version of 0x55 0x55 0xC8 0x7A
const uint32_t END_SYNC_DATA = 0xAAAA135EU;
const uint32_t END_SYNC_MASK = 0xFFFFFFFFU;
const uint8_t END_SYNC_ERRS = 3U;
const uint8_t END_SYNC_ERRS = 1U;
const uint8_t BIT_MASK_TABLE0[] = {0x7FU, 0xBFU, 0xDFU, 0xEFU, 0xF7U, 0xFBU, 0xFDU, 0xFEU};
const uint8_t BIT_MASK_TABLE1[] = {0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U};
@@ -244,14 +231,24 @@ const uint16_t CCITT_TABLE[] = {
0xf78fU, 0xe606U, 0xd49dU, 0xc514U, 0xb1abU, 0xa022U, 0x92b9U, 0x8330U,
0x7bc7U, 0x6a4eU, 0x58d5U, 0x495cU, 0x3de3U, 0x2c6aU, 0x1ef1U, 0x0f78U};
const uint16_t NOENDPTR = 9999U;
CDStarRX::CDStarRX() :
m_pll(0U),
m_prev(false),
m_rxState(DSRXS_NONE),
m_patternBuffer(0x00U),
m_rxBuffer(),
m_rxBufferBits(0U),
m_dataBits(0U),
m_bitBuffer(),
m_headerBuffer(),
m_dataBuffer(),
m_bitPtr(0U),
m_headerPtr(0U),
m_dataPtr(0U),
m_startPtr(NOENDPTR),
m_syncPtr(NOENDPTR),
m_minSyncPtr(NOENDPTR),
m_maxSyncPtr(NOENDPTR),
m_maxFrameCorr(0),
m_maxDataCorr(0),
m_frameCount(0U),
m_countdown(0U),
m_mar(0U),
m_pathMetric(),
m_pathMemory0(),
@@ -259,142 +256,146 @@ m_pathMemory1(),
m_pathMemory2(),
m_pathMemory3(),
m_fecOutput(),
m_samples(),
m_samplesPtr(0U)
m_rssiAccum(0U),
m_rssiCount(0U)
{
}
void CDStarRX::reset()
{
m_pll = 0U;
m_prev = false;
m_rxState = DSRXS_NONE;
m_patternBuffer = 0x00U;
m_rxBufferBits = 0U;
m_dataBits = 0U;
m_samplesPtr = 0U;
m_rxState = DSRXS_NONE;
m_headerPtr = 0U;
m_dataPtr = 0U;
m_bitPtr = 0U;
m_maxFrameCorr = 0;
m_maxDataCorr = 0;
m_startPtr = NOENDPTR;
m_syncPtr = NOENDPTR;
m_minSyncPtr = NOENDPTR;
m_maxSyncPtr = NOENDPTR;
m_frameCount = 0U;
m_countdown = 0U;
m_rssiAccum = 0U;
m_rssiCount = 0U;
}
void CDStarRX::samples(const q15_t* samples, uint8_t length)
void CDStarRX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t length)
{
for (uint16_t i = 0U; i < length; i++) {
m_samples[m_samplesPtr] = samples[i];
m_rssiAccum += rssi[i];
m_rssiCount++;
bool bit = samples[i] < THRESHOLD;
q15_t sample = samples[i];
if (bit != m_prev) {
if (m_pll < (PLLMAX / 2U))
m_pll += INC;
else
m_pll -= INC;
m_bitBuffer[m_bitPtr] <<= 1;
if (sample < 0)
m_bitBuffer[m_bitPtr] |= 0x01U;
m_dataBuffer[m_dataPtr] = sample;
switch (m_rxState) {
case DSRXS_HEADER:
processHeader(sample);
break;
case DSRXS_DATA:
processData();
break;
default:
processNone(sample);
break;
}
m_prev = bit;
m_dataPtr++;
if (m_dataPtr >= DSTAR_DATA_LENGTH_SAMPLES)
m_dataPtr = 0U;
m_pll += PLLINC;
if (m_pll >= PLLMAX) {
m_pll -= PLLMAX;
switch (m_rxState) {
case DSRXS_NONE:
processNone(bit);
break;
case DSRXS_HEADER:
processHeader(bit);
break;
case DSRXS_DATA:
processData(bit);
break;
default:
break;
}
}
m_samplesPtr++;
if (m_samplesPtr >= DSTAR_DATA_SYNC_LENGTH_BITS)
m_samplesPtr = 0U;
m_bitPtr++;
if (m_bitPtr >= DSTAR_RADIO_SYMBOL_LENGTH)
m_bitPtr = 0U;
}
}
void CDStarRX::processNone(bool bit)
void CDStarRX::processNone(q15_t sample)
{
m_patternBuffer <<= 1;
if (bit)
m_patternBuffer |= 0x01U;
// Fuzzy matching of the frame sync sequence
if (countBits32((m_patternBuffer & FRAME_SYNC_MASK) ^ FRAME_SYNC_DATA) <= FRAME_SYNC_ERRS) {
DEBUG1("DStarRX: found frame sync in None");
bool ret = correlateFrameSync();
if (ret) {
m_countdown = 5U;
m_headerBuffer[m_headerPtr] = sample;
m_headerPtr++;
::memset(m_rxBuffer, 0x00U, DSTAR_FEC_SECTION_LENGTH_BYTES);
m_rxBufferBits = 0U;
m_rssiAccum = 0U;
m_rssiCount = 0U;
m_rxState = DSRXS_HEADER;
return;
}
// Exact matching of the data sync bit sequence
if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) == 0U) {
// Fuzzy matching of the data sync bit sequence
ret = correlateDataSync();
if (ret) {
DEBUG1("DStarRX: found data sync in None");
io.setDecode(true);
io.setADCDetection(true);
serial.writeDStarData(DSTAR_DATA_SYNC_BYTES, DSTAR_DATA_LENGTH_BYTES);
::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
m_rxBufferBits = 0U;
m_dataBits = 0U;
m_rxState = DSRXS_DATA;
return;
m_rxState = DSRXS_DATA;
}
}
void CDStarRX::processHeader(bool bit)
void CDStarRX::processHeader(q15_t sample)
{
m_patternBuffer <<= 1;
if (bit)
m_patternBuffer |= 0x01U;
if (m_countdown > 0U) {
correlateFrameSync();
m_countdown--;
}
WRITE_BIT2(m_rxBuffer, m_rxBufferBits, bit);
m_rxBufferBits++;
m_headerBuffer[m_headerPtr] = sample;
m_headerPtr++;
// A full FEC header
if (m_rxBufferBits == DSTAR_FEC_SECTION_LENGTH_BITS) {
// Process the scrambling, interleaving and FEC, then return if the chcksum was correct
unsigned char header[DSTAR_HEADER_LENGTH_BYTES];
bool ok = rxHeader(m_rxBuffer, header);
if (ok) {
if (m_headerPtr == (DSTAR_FEC_SECTION_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH)) {
uint8_t buffer[DSTAR_FEC_SECTION_LENGTH_BYTES];
samplesToBits(m_headerBuffer, DSTAR_RADIO_SYMBOL_LENGTH, DSTAR_FEC_SECTION_LENGTH_SYMBOLS, buffer, DSTAR_FEC_SECTION_LENGTH_SAMPLES);
// Process the scrambling, interleaving and FEC, then return true if the chcksum was correct
uint8_t header[DSTAR_HEADER_LENGTH_BYTES];
bool ok = rxHeader(buffer, header);
if (!ok) {
// The checksum failed, return to looking for syncs
m_rxState = DSRXS_NONE;
m_maxFrameCorr = 0;
m_maxDataCorr = 0;
} else {
io.setDecode(true);
io.setADCDetection(true);
serial.writeDStarHeader(header, DSTAR_HEADER_LENGTH_BYTES);
::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
m_rxBufferBits = 0U;
m_rxState = DSRXS_DATA;
m_dataBits = SYNC_POS - DSTAR_DATA_LENGTH_BITS + 1U;
} else {
// The checksum failed, return to looking for syncs
m_rxState = DSRXS_NONE;
writeRSSIHeader(header);
}
}
// Ready to start the first data section
if (m_headerPtr == (DSTAR_FEC_SECTION_LENGTH_SAMPLES + 2U * DSTAR_RADIO_SYMBOL_LENGTH)) {
m_frameCount = 0U;
m_dataPtr = 0U;
m_startPtr = 952U;
m_syncPtr = 942U;
m_maxSyncPtr = 944U;
m_minSyncPtr = 940U;
DEBUG5("DStarRX: calc start/sync/max/min", m_startPtr, m_syncPtr, m_maxSyncPtr, m_minSyncPtr);
m_rxState = DSRXS_DATA;
}
}
void CDStarRX::processData(bool bit)
void CDStarRX::processData()
{
m_patternBuffer <<= 1;
if (bit)
m_patternBuffer |= 0x01U;
WRITE_BIT2(m_rxBuffer, m_rxBufferBits, bit);
m_rxBufferBits++;
// Fuzzy matching of the end frame sequences
if (countBits32((m_patternBuffer & END_SYNC_MASK) ^ END_SYNC_DATA) <= END_SYNC_ERRS) {
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_END_SYNC_MASK) ^ DSTAR_END_SYNC_DATA) <= END_SYNC_ERRS) {
DEBUG1("DStarRX: Found end sync in Data");
io.setDecode(false);
@@ -402,44 +403,24 @@ void CDStarRX::processData(bool bit)
serial.writeDStarEOT();
m_maxFrameCorr = 0;
m_maxDataCorr = 0;
m_rxState = DSRXS_NONE;
return;
}
// Fuzzy matching of the data sync bit sequence
bool syncSeen = false;
if (m_dataBits >= SYNC_SCAN_START && m_dataBits <= (SYNC_POS + 1U)) {
if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) <= DATA_SYNC_ERRS) {
#if defined(WANT_DEBUG)
if (m_dataBits < SYNC_POS)
DEBUG2("DStarRX: found data sync in Data, early", SYNC_POS - m_dataBits);
else
DEBUG1("DStarRX: found data sync in Data");
#endif
m_rxBufferBits = DSTAR_DATA_LENGTH_BITS;
m_dataBits = 0U;
syncSeen = true;
}
if (m_minSyncPtr < m_maxSyncPtr) {
if (m_dataPtr >= m_minSyncPtr && m_dataPtr <= m_maxSyncPtr)
correlateDataSync();
} else {
if (m_dataPtr >= m_minSyncPtr || m_dataPtr <= m_maxSyncPtr)
correlateDataSync();
}
// Check to see if the sync is arriving late
if (m_dataBits == SYNC_POS) {
for (uint8_t i = 1U; i <= 3U; i++) {
uint32_t syncMask = DATA_SYNC_MASK >> i;
uint32_t syncData = DATA_SYNC_DATA >> i;
if (countBits32((m_patternBuffer & syncMask) ^ syncData) <= DATA_SYNC_ERRS) {
DEBUG2("DStarRX: found data sync in Data, late", i);
m_rxBufferBits -= i;
m_dataBits -= i;
break;
}
}
}
m_dataBits++;
// We've not seen a data sync for too long, signal RXLOST and change to RX_NONE
if (m_dataBits >= MAX_SYNC_BITS) {
if (m_frameCount >= MAX_FRAMES) {
DEBUG1("DStarRX: data sync timed out, lost lock");
io.setDecode(false);
@@ -447,23 +428,176 @@ void CDStarRX::processData(bool bit)
serial.writeDStarLost();
m_maxFrameCorr = 0;
m_maxDataCorr = 0;
m_rxState = DSRXS_NONE;
return;
}
// Send a data frame to the host if the required number of bits have been received, or if a data sync has been seen
if (m_rxBufferBits == DSTAR_DATA_LENGTH_BITS) {
if (syncSeen) {
m_rxBuffer[9U] = DSTAR_DATA_SYNC_BYTES[9U];
m_rxBuffer[10U] = DSTAR_DATA_SYNC_BYTES[10U];
m_rxBuffer[11U] = DSTAR_DATA_SYNC_BYTES[11U];
// Send a data frame to the host if the required number of bits have been received
if (m_dataPtr == m_maxSyncPtr) {
uint8_t buffer[DSTAR_DATA_LENGTH_BYTES + 2U];
samplesToBits(m_dataBuffer, m_startPtr, DSTAR_DATA_LENGTH_SYMBOLS, buffer, DSTAR_DATA_LENGTH_SAMPLES);
if ((m_frameCount % 21U) == 0U) {
if (m_frameCount == 0U) {
buffer[9U] = DSTAR_DATA_SYNC_BYTES[9U];
buffer[10U] = DSTAR_DATA_SYNC_BYTES[10U];
buffer[11U] = DSTAR_DATA_SYNC_BYTES[11U];
DEBUG5("DStarRX: found start/sync/max/min", m_startPtr, m_syncPtr, m_maxSyncPtr, m_minSyncPtr);
}
writeRSSIData(buffer);
} else {
serial.writeDStarData(buffer, DSTAR_DATA_LENGTH_BYTES);
}
serial.writeDStarData(m_rxBuffer, DSTAR_DATA_LENGTH_BYTES);
m_frameCount++;
// Start the next frame
::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
m_rxBufferBits = 0U;
m_maxFrameCorr = 0;
m_maxDataCorr = 0;
}
}
void CDStarRX::writeRSSIHeader(unsigned char* header)
{
#if defined(SEND_RSSI_DATA)
if (m_rssiCount > 0U) {
uint16_t rssi = m_rssiAccum / m_rssiCount;
header[41U] = (rssi >> 8) & 0xFFU;
header[42U] = (rssi >> 0) & 0xFFU;
serial.writeDStarHeader(header, DSTAR_HEADER_LENGTH_BYTES + 2U);
} else {
serial.writeDStarHeader(header, DSTAR_HEADER_LENGTH_BYTES + 0U);
}
#else
serial.writeDStarHeader(header, DSTAR_HEADER_LENGTH_BYTES + 0U);
#endif
m_rssiAccum = 0U;
m_rssiCount = 0U;
}
void CDStarRX::writeRSSIData(unsigned char* data)
{
#if defined(SEND_RSSI_DATA)
if (m_rssiCount > 0U) {
uint16_t rssi = m_rssiAccum / m_rssiCount;
data[12U] = (rssi >> 8) & 0xFFU;
data[13U] = (rssi >> 0) & 0xFFU;
serial.writeDStarData(data, DSTAR_DATA_LENGTH_BYTES + 2U);
} else {
serial.writeDStarData(data, DSTAR_DATA_LENGTH_BYTES + 0U);
}
#else
serial.writeDStarData(data, DSTAR_DATA_LENGTH_BYTES + 0U);
#endif
m_rssiAccum = 0U;
m_rssiCount = 0U;
}
bool CDStarRX::correlateFrameSync()
{
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_FRAME_SYNC_MASK) ^ DSTAR_FRAME_SYNC_DATA) <= FRAME_SYNC_ERRS) {
uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_FRAME_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
ptr -= DSTAR_DATA_LENGTH_SAMPLES;
q31_t corr = 0;
for (uint8_t i = 0U; i < DSTAR_FRAME_SYNC_LENGTH_SYMBOLS; i++) {
q15_t val = m_dataBuffer[ptr];
if (DSTAR_FRAME_SYNC_SYMBOLS[i])
corr -= val;
else
corr += val;
ptr += DSTAR_RADIO_SYMBOL_LENGTH;
if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
ptr -= DSTAR_DATA_LENGTH_SAMPLES;
}
if (corr > m_maxFrameCorr) {
m_maxFrameCorr = corr;
m_headerPtr = 0U;
return true;
}
}
return false;
}
bool CDStarRX::correlateDataSync()
{
uint8_t maxErrs = 0U;
if (m_rxState == DSRXS_DATA)
maxErrs = DATA_SYNC_ERRS;
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_DATA_SYNC_MASK) ^ DSTAR_DATA_SYNC_DATA) <= maxErrs) {
uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_DATA_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
ptr -= DSTAR_DATA_LENGTH_SAMPLES;
q31_t corr = 0;
for (uint8_t i = 0U; i < DSTAR_DATA_SYNC_LENGTH_SYMBOLS; i++) {
q15_t val = m_dataBuffer[ptr];
if (DSTAR_DATA_SYNC_SYMBOLS[i])
corr -= val;
else
corr += val;
ptr += DSTAR_RADIO_SYMBOL_LENGTH;
if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
ptr -= DSTAR_DATA_LENGTH_SAMPLES;
}
if (corr > m_maxDataCorr) {
m_maxDataCorr = corr;
m_frameCount = 0U;
m_syncPtr = m_dataPtr;
m_startPtr = m_dataPtr + DSTAR_RADIO_SYMBOL_LENGTH;
if (m_startPtr >= DSTAR_DATA_LENGTH_SAMPLES)
m_startPtr -= DSTAR_DATA_LENGTH_SAMPLES;
m_maxSyncPtr = m_syncPtr + 1U;
if (m_maxSyncPtr >= DSTAR_DATA_LENGTH_SAMPLES)
m_maxSyncPtr -= DSTAR_DATA_LENGTH_SAMPLES;
m_minSyncPtr = m_syncPtr + DSTAR_DATA_LENGTH_SAMPLES - 1U;
if (m_minSyncPtr >= DSTAR_DATA_LENGTH_SAMPLES)
m_minSyncPtr -= DSTAR_DATA_LENGTH_SAMPLES;
return true;
}
}
return false;
}
void CDStarRX::samplesToBits(const q15_t* inBuffer, uint16_t start, uint16_t count, uint8_t* outBuffer, uint16_t limit)
{
for (uint16_t i = 0U; i < count; i++) {
q15_t sample = inBuffer[start];
if (sample < 0)
WRITE_BIT2(outBuffer, i, true);
else
WRITE_BIT2(outBuffer, i, false);
start += DSTAR_RADIO_SYMBOL_LENGTH;
if (start >= limit)
start -= limit;
}
}
@@ -682,4 +816,3 @@ bool CDStarRX::checksum(const uint8_t* header) const
return crc8[0U] == header[DSTAR_HEADER_LENGTH_BYTES - 2U] && crc8[1U] == header[DSTAR_HEADER_LENGTH_BYTES - 1U];
}
+27 -14
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -32,18 +32,26 @@ class CDStarRX {
public:
CDStarRX();
void samples(const q15_t* samples, uint8_t length);
void samples(const q15_t* samples, const uint16_t* rssi, uint8_t length);
void reset();
private:
uint32_t m_pll;
bool m_prev;
DSRX_STATE m_rxState;
uint32_t m_patternBuffer;
uint8_t m_rxBuffer[100U];
unsigned int m_rxBufferBits;
unsigned int m_dataBits;
uint32_t m_bitBuffer[DSTAR_RADIO_SYMBOL_LENGTH];
q15_t m_headerBuffer[DSTAR_FEC_SECTION_LENGTH_SAMPLES + 2U * DSTAR_RADIO_SYMBOL_LENGTH];
q15_t m_dataBuffer[DSTAR_DATA_LENGTH_SAMPLES];
uint16_t m_bitPtr;
uint16_t m_headerPtr;
uint16_t m_dataPtr;
uint16_t m_startPtr;
uint16_t m_syncPtr;
uint16_t m_minSyncPtr;
uint16_t m_maxSyncPtr;
q31_t m_maxFrameCorr;
q31_t m_maxDataCorr;
uint16_t m_frameCount;
uint8_t m_countdown;
unsigned int m_mar;
int m_pathMetric[4U];
unsigned int m_pathMemory0[42U];
@@ -51,12 +59,17 @@ private:
unsigned int m_pathMemory2[42U];
unsigned int m_pathMemory3[42U];
uint8_t m_fecOutput[42U];
q15_t m_samples[DSTAR_DATA_SYNC_LENGTH_BITS];
uint8_t m_samplesPtr;
void processNone(bool bit);
void processHeader(bool bit);
void processData(bool bit);
uint32_t m_rssiAccum;
uint16_t m_rssiCount;
void processNone(q15_t sample);
void processHeader(q15_t sample);
void processData();
bool correlateFrameSync();
bool correlateDataSync();
void samplesToBits(const q15_t* inBuffer, uint16_t start, uint16_t count, uint8_t* outBuffer, uint16_t limit);
void writeRSSIHeader(unsigned char* header);
void writeRSSIData(unsigned char* data);
bool rxHeader(uint8_t* in, uint8_t* out);
void acs(int* metric);
void viterbiDecode(int* data);
+32 -52
View File
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2009-2016 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -16,8 +17,6 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#include "DStarTX.h"
@@ -28,12 +27,14 @@ const uint8_t BIT_SYNC = 0xAAU;
const uint8_t FRAME_SYNC[] = {0xEAU, 0xA6U, 0x00U};
// Generated using gaussfir(0.5, 4, 5) in MATLAB
static q15_t DSTAR_GMSK_FILTER[] = {8, 104, 760, 3158, 7421, 9866, 7421, 3158, 760, 104, 8, 0};
const uint16_t DSTAR_GMSK_FILTER_LEN = 12U;
// Generated using gaussfir(0.35, 1, 10) in MATLAB
static q15_t GAUSSIAN_0_35_FILTER[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 1001, 1942, 3514, 5930,
9333, 13699, 18751, 23938, 28499, 31644, 32767, 31644,
28499, 23938, 18751, 13699, 9333, 5930, 3514, 1942, 1001}; // numTaps = 30, L = 10
const uint16_t GAUSSIAN_0_35_FILTER_PHASE_LEN = 3U; // phaseLength = numTaps/L
const q15_t DSTAR_LEVEL0[] = {-800, -800, -800, -800, -800};
const q15_t DSTAR_LEVEL1[] = { 800, 800, 800, 800, 800};
const q15_t DSTAR_LEVEL0 = -841;
const q15_t DSTAR_LEVEL1 = 841;
const uint8_t BIT_MASK_TABLE[] = {0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U};
@@ -195,14 +196,14 @@ m_modState(),
m_poBuffer(),
m_poLen(0U),
m_poPtr(0U),
m_txDelay(60U), // 100ms
m_count(0U)
m_txDelay(60U) // 100ms
{
::memset(m_modState, 0x00U, 60U * sizeof(q15_t));
::memset(m_modState, 0x00U, 15U * sizeof(q15_t));
m_modFilter.numTaps = DSTAR_GMSK_FILTER_LEN;
m_modFilter.pState = m_modState;
m_modFilter.pCoeffs = DSTAR_GMSK_FILTER;
m_modFilter.L = DSTAR_RADIO_SYMBOL_LENGTH;
m_modFilter.phaseLength = GAUSSIAN_0_35_FILTER_PHASE_LEN;
m_modFilter.pCoeffs = GAUSSIAN_0_35_FILTER;
m_modFilter.pState = m_modState;
}
void CDStarTX::process()
@@ -214,8 +215,6 @@ void CDStarTX::process()
if (type == DSTAR_HEADER && m_poLen == 0U) {
if (!m_tx) {
m_count = 0U;
for (uint16_t i = 0U; i < m_txDelay; i++)
m_poBuffer[m_poLen++] = BIT_SYNC;
} else {
@@ -241,9 +240,6 @@ void CDStarTX::process()
}
if (type == DSTAR_DATA && m_poLen == 0U) {
if (!m_tx)
m_count = 0U;
// Pop the type byte off
m_buffer.get();
@@ -258,8 +254,8 @@ void CDStarTX::process()
m_buffer.get();
for (uint8_t j = 0U; j < 3U; j++) {
for (uint8_t i = 0U; i < DSTAR_EOT_LENGTH_BYTES; i++)
m_poBuffer[m_poLen++] = DSTAR_EOT_BYTES[i];
for (uint8_t i = 0U; i < DSTAR_END_SYNC_LENGTH_BYTES; i++)
m_poBuffer[m_poLen++] = DSTAR_END_SYNC_BYTES[i];
}
m_poPtr = 0U;
@@ -268,11 +264,11 @@ void CDStarTX::process()
if (m_poLen > 0U) {
uint16_t space = io.getSpace();
while (space > (8U * DSTAR_RADIO_BIT_LENGTH)) {
while (space > (8U * DSTAR_RADIO_SYMBOL_LENGTH)) {
uint8_t c = m_poBuffer[m_poPtr++];
writeByte(c);
space -= 8U * DSTAR_RADIO_BIT_LENGTH;
space -= 8U * DSTAR_RADIO_SYMBOL_LENGTH;
if (m_poPtr >= m_poLen) {
m_poPtr = 0U;
@@ -417,50 +413,34 @@ void CDStarTX::txHeader(const uint8_t* in, uint8_t* out) const
void CDStarTX::writeByte(uint8_t c)
{
q15_t inBuffer[DSTAR_RADIO_BIT_LENGTH * 8U + 1U];
q15_t outBuffer[DSTAR_RADIO_BIT_LENGTH * 8U + 1U];
q15_t inBuffer[8U];
q15_t outBuffer[DSTAR_RADIO_SYMBOL_LENGTH * 8U];
uint8_t mask = 0x01U;
q15_t* p = inBuffer;
for (uint8_t i = 0U; i < 8U; i++, p += DSTAR_RADIO_BIT_LENGTH) {
for (uint8_t i = 0U; i < 8U; i++) {
if ((c & mask) == mask)
::memcpy(p, DSTAR_LEVEL0, DSTAR_RADIO_BIT_LENGTH * sizeof(q15_t));
inBuffer[i] = DSTAR_LEVEL0;
else
::memcpy(p, DSTAR_LEVEL1, DSTAR_RADIO_BIT_LENGTH * sizeof(q15_t));
inBuffer[i] = DSTAR_LEVEL1;
mask <<= 1;
}
uint16_t blockSize = DSTAR_RADIO_BIT_LENGTH * 8U;
// Handle the case of the oscillator not being accurate enough
if (m_sampleCount > 0U) {
m_count += DSTAR_RADIO_BIT_LENGTH * 8U;
if (m_count >= m_sampleCount) {
if (m_sampleInsert) {
inBuffer[DSTAR_RADIO_BIT_LENGTH * 8U] = inBuffer[DSTAR_RADIO_BIT_LENGTH * 8U - 1U];
blockSize++;
} else {
blockSize--;
}
m_count -= m_sampleCount;
}
}
::arm_fir_fast_q15(&m_modFilter, inBuffer, outBuffer, blockSize);
io.write(STATE_DSTAR, outBuffer, blockSize);
::arm_fir_interpolate_q15(&m_modFilter, inBuffer, outBuffer, 8U);
io.write(STATE_DSTAR, outBuffer, DSTAR_RADIO_SYMBOL_LENGTH * 8U);
}
void CDStarTX::setTXDelay(uint8_t delay)
{
m_txDelay = 150U + uint16_t(delay) * 6U; // 250ms + tx delay
m_txDelay = 300U + uint16_t(delay) * 6U; // 250ms + tx delay
if (m_txDelay > 600U)
m_txDelay = 600U;
}
uint16_t CDStarTX::getSpace() const
uint8_t CDStarTX::getSpace() const
{
return m_buffer.getSpace() / (DSTAR_DATA_LENGTH_BYTES + 1U);
}
+9 -10
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -35,17 +35,16 @@ public:
void setTXDelay(uint8_t delay);
uint16_t getSpace() const;
uint8_t getSpace() const;
private:
CSerialRB m_buffer;
arm_fir_instance_q15 m_modFilter;
q15_t m_modState[60U]; // NoTaps + BlockSize - 1, 12 + 40 - 1 plus some spare
uint8_t m_poBuffer[500U];
uint16_t m_poLen;
uint16_t m_poPtr;
uint16_t m_txDelay; // In bytes
uint32_t m_count;
CSerialRB m_buffer;
arm_fir_interpolate_instance_q15 m_modFilter;
q15_t m_modState[15U]; // blockSize + phaseLength - 1, 8 + 3 - 1 plus some spare
uint8_t m_poBuffer[600U];
uint16_t m_poLen;
uint16_t m_poPtr;
uint16_t m_txDelay; // In bytes
void txHeader(const uint8_t* in, uint8_t* out) const;
void writeByte(uint8_t c);
+1 -16
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -20,9 +20,6 @@
#define DEBUG_H
#include "Config.h"
#if defined(WANT_DEBUG)
#include "Globals.h"
#define DEBUG1(a) serial.writeDebug((a))
@@ -30,18 +27,6 @@
#define DEBUG3(a,b,c) serial.writeDebug((a),(b),(c))
#define DEBUG4(a,b,c,d) serial.writeDebug((a),(b),(c),(d))
#define DEBUG5(a,b,c,d,e) serial.writeDebug((a),(b),(c),(d),(e))
#define ASSERT(a) serial.writeAssert((a),#a,__FILE__,__LINE__)
#else
#define DEBUG1(a)
#define DEBUG2(a,b)
#define DEBUG3(a,b,c)
#define DEBUG4(a,b,c,d)
#define DEBUG5(a,b,c,d,e)
#define ASSERT(a)
#endif
#endif
+21 -9
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,15 +19,22 @@
#if !defined(GLOBALS_H)
#define GLOBALS_H
#if defined(STM32F4XX) || defined(STM32F4)
#if defined(STM32F4XX)
#include "stm32f4xx.h"
#elif defined(STM32F7XX)
#include "stm32f7xx.h"
#elif defined(STM32F105xC)
#include "stm32f1xx.h"
#include "STM32Utils.h"
#else
#include <Arduino.h>
#endif
#if defined(__SAM3X8E__)
#if defined(__SAM3X8E__) || defined(STM32F105xC)
#define ARM_MATH_CM3
#elif defined(STM32F4XX) || defined(STM32F4) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
#elif defined(STM32F7XX)
#define ARM_MATH_CM7
#elif defined(STM32F4XX) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
#define ARM_MATH_CM4
#else
#error "Unknown processor type"
@@ -43,6 +50,10 @@ enum MMDVM_STATE {
STATE_P25 = 4,
// Dummy states start at 90
STATE_P25CAL1K = 93,
STATE_DMRCAL1K = 94,
STATE_LFCAL = 95,
STATE_RSSICAL = 96,
STATE_CWID = 97,
STATE_DMRCAL = 98,
STATE_DSTARCAL = 99
@@ -63,6 +74,8 @@ enum MMDVM_STATE {
#include "CalDStarRX.h"
#include "CalDStarTX.h"
#include "CalDMR.h"
#include "CalP25.h"
#include "CalRSSI.h"
#include "CWIdTX.h"
#include "Debug.h"
#include "IO.h"
@@ -73,8 +86,8 @@ const uint8_t MARK_NONE = 0x00U;
const uint16_t RX_BLOCK_SIZE = 2U;
const uint16_t TX_RINGBUFFER_SIZE = 500U;
const uint16_t RX_RINGBUFFER_SIZE = 600U;
const uint16_t TX_RINGBUFFER_SIZE = 1000U;
const uint16_t RX_RINGBUFFER_SIZE = 1200U;
extern MMDVM_STATE m_modemState;
@@ -88,9 +101,6 @@ extern bool m_duplex;
extern bool m_tx;
extern bool m_dcd;
extern uint32_t m_sampleCount;
extern bool m_sampleInsert;
extern CSerialPort serial;
extern CIO io;
@@ -113,6 +123,8 @@ extern CP25TX p25TX;
extern CCalDStarRX calDStarRX;
extern CCalDStarTX calDStarTX;
extern CCalDMR calDMR;
extern CCalP25 calP25;
extern CCalRSSI calRSSI;
extern CCWIdTX cwIdTX;
+162 -118
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2015 by Jim Mclaughlin KI6ZUM
* Copyright (C) 2016 by Colin Durbridge G4EML
*
@@ -18,28 +18,17 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
// #define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#include "IO.h"
#if defined(WIDE_C4FSK_FILTERS_RX)
// Generated using rcosdesign(0.2, 4, 5, 'sqrt') in MATLAB
static q15_t C4FSK_FILTER[] = {688, -680, -2158, -3060, -2724, -775, 2684, 7041, 11310, 14425, 15565, 14425,
11310, 7041, 2684, -775, -2724, -3060, -2158, -680, 688, 0};
const uint16_t C4FSK_FILTER_LEN = 22U;
#else
// Generated using rcosdesign(0.2, 8, 5, 'sqrt') in MATLAB
static q15_t C4FSK_FILTER[] = {401, 104, -340, -731, -847, -553, 112, 909, 1472, 1450, 683, -675, -2144, -3040, -2706, -770, 2667, 6995,
11237, 14331, 15464, 14331, 11237, 6995, 2667, -770, -2706, -3040, -2144, -675, 683, 1450, 1472, 909, 112,
-553, -847, -731, -340, 104, 401, 0};
const uint16_t C4FSK_FILTER_LEN = 42U;
#endif
// Generated using [b, a] = butter(1, 0.001) in MATLAB
static q31_t DC_FILTER[] = {1685306, 0, 1685306, 0, 2144113034, 0}; // {b0, 0, b1, b2, -a1, -a2}
const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
// Generated using gaussfir(0.5, 4, 5) in MATLAB
static q15_t GMSK_FILTER[] = {8, 104, 760, 3158, 7421, 9866, 7421, 3158, 760, 104, 8, 0};
const uint16_t GMSK_FILTER_LEN = 12U;
// One symbol boxcar filter
static q15_t BOXCAR_FILTER[] = {6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000, 0, 0};
const uint16_t BOXCAR_FILTER_LEN = 12U;
const uint16_t DC_OFFSET = 2048U;
@@ -48,10 +37,10 @@ m_started(false),
m_rxBuffer(RX_RINGBUFFER_SIZE),
m_txBuffer(TX_RINGBUFFER_SIZE),
m_rssiBuffer(RX_RINGBUFFER_SIZE),
m_C4FSKFilter(),
m_GMSKFilter(),
m_C4FSKState(),
m_GMSKState(),
m_dcFilter(),
m_dcState(),
m_boxcarFilter(),
m_boxcarState(),
m_pttInvert(false),
m_rxLevel(128 * 128),
m_cwIdTXLevel(128 * 128),
@@ -59,27 +48,107 @@ m_dstarTXLevel(128 * 128),
m_dmrTXLevel(128 * 128),
m_ysfTXLevel(128 * 128),
m_p25TXLevel(128 * 128),
m_rxDCOffset(DC_OFFSET),
m_txDCOffset(DC_OFFSET),
m_ledCount(0U),
m_ledValue(true),
m_detect(false),
m_adcOverflow(0U),
m_dacOverflow(0U),
m_count(0U),
m_watchdog(0U),
m_lockout(false)
{
::memset(m_C4FSKState, 0x00U, 70U * sizeof(q15_t));
::memset(m_GMSKState, 0x00U, 40U * sizeof(q15_t));
::memset(m_boxcarState, 0x00U, 30U * sizeof(q15_t));
::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
m_C4FSKFilter.numTaps = C4FSK_FILTER_LEN;
m_C4FSKFilter.pState = m_C4FSKState;
m_C4FSKFilter.pCoeffs = C4FSK_FILTER;
m_GMSKFilter.numTaps = GMSK_FILTER_LEN;
m_GMSKFilter.pState = m_GMSKState;
m_GMSKFilter.pCoeffs = GMSK_FILTER;
m_dcFilter.numStages = DC_FILTER_STAGES;
m_dcFilter.pState = m_dcState;
m_dcFilter.pCoeffs = DC_FILTER;
m_dcFilter.postShift = 0;
m_boxcarFilter.numTaps = BOXCAR_FILTER_LEN;
m_boxcarFilter.pState = m_boxcarState;
m_boxcarFilter.pCoeffs = BOXCAR_FILTER;
initInt();
selfTest();
}
void CIO::selfTest()
{
bool ledValue = false;
for (uint8_t i = 0; i < 6; i++) {
ledValue = !ledValue;
// We exclude PTT to avoid trigger the transmitter
setLEDInt(ledValue);
setCOSInt(ledValue);
#if defined(ARDUINO_MODE_PINS)
setDStarInt(ledValue);
setDMRInt(ledValue);
setYSFInt(ledValue);
setP25Int(ledValue);
#endif
delayInt(250);
}
#if defined(ARDUINO_MODE_PINS)
setDStarInt(true);
setDMRInt(false);
setYSFInt(false);
setP25Int(false);
delayInt(250);
setDStarInt(true);
setDMRInt(true);
setYSFInt(false);
setP25Int(false);
delayInt(250);
setDStarInt(true);
setDMRInt(true);
setYSFInt(true);
setP25Int(false);
delayInt(250);
setDStarInt(true);
setDMRInt(true);
setYSFInt(true);
setP25Int(true);
delayInt(250);
setDStarInt(true);
setDMRInt(true);
setYSFInt(true);
setP25Int(false);
delayInt(250);
setDStarInt(true);
setDMRInt(true);
setYSFInt(false);
setP25Int(false);
delayInt(250);
setDStarInt(true);
setDMRInt(false);
setYSFInt(false);
setP25Int(false);
delayInt(250);
setDStarInt(false);
setDMRInt(false);
setYSFInt(false);
setP25Int(false);
#endif
}
void CIO::start()
@@ -89,7 +158,6 @@ void CIO::start()
startInt();
m_count = 0U;
m_started = true;
setMode();
@@ -100,7 +168,7 @@ void CIO::process()
m_ledCount++;
if (m_started) {
// Two seconds timeout
if (m_watchdog >= 48000U) {
if (m_watchdog >= 96000U) {
if (m_modemState == STATE_DSTAR || m_modemState == STATE_DMR || m_modemState == STATE_YSF) {
if (m_modemState == STATE_DMR && m_tx)
dmrTX.setStart(false);
@@ -111,13 +179,13 @@ void CIO::process()
m_watchdog = 0U;
}
if (m_ledCount >= 24000U) {
if (m_ledCount >= 48000U) {
m_ledCount = 0U;
m_ledValue = !m_ledValue;
setLEDInt(m_ledValue);
}
} else {
if (m_ledCount >= 240000U) {
if (m_ledCount >= 480000U) {
m_ledCount = 0U;
m_ledValue = !m_ledValue;
setLEDInt(m_ledValue);
@@ -136,11 +204,9 @@ void CIO::process()
}
if (m_rxBuffer.getData() >= RX_BLOCK_SIZE) {
q15_t samples[RX_BLOCK_SIZE + 1U];
uint8_t control[RX_BLOCK_SIZE + 1U];
uint16_t rssi[RX_BLOCK_SIZE + 1U];
uint8_t blockSize = RX_BLOCK_SIZE;
q15_t samples[RX_BLOCK_SIZE];
uint8_t control[RX_BLOCK_SIZE];
uint16_t rssi[RX_BLOCK_SIZE];
for (uint16_t i = 0U; i < RX_BLOCK_SIZE; i++) {
uint16_t sample;
@@ -151,100 +217,75 @@ void CIO::process()
if (m_detect && (sample == 0U || sample == 4095U))
m_adcOverflow++;
q15_t res1 = q15_t(sample) - DC_OFFSET;
q15_t res1 = q15_t(sample) - m_rxDCOffset;
q31_t res2 = res1 * m_rxLevel;
samples[i] = q15_t(__SSAT((res2 >> 15), 16));
}
// Handle the case of the oscillator not being accurate enough
if (m_sampleCount > 0U) {
m_count += RX_BLOCK_SIZE;
if (m_count >= m_sampleCount) {
if (m_sampleInsert) {
blockSize++;
samples[RX_BLOCK_SIZE] = 0;
for (int8_t i = RX_BLOCK_SIZE - 1; i >= 0; i--)
control[i + 1] = control[i];
} else {
blockSize--;
for (uint8_t i = 0U; i < (RX_BLOCK_SIZE - 1U); i++)
control[i] = control[i + 1U];
}
m_count -= m_sampleCount;
}
}
if (m_lockout)
return;
q15_t vals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_boxcarFilter, samples, vals, RX_BLOCK_SIZE);
q31_t dcLevel = 0;
q31_t dcValues[RX_BLOCK_SIZE];
q31_t q31Vals[RX_BLOCK_SIZE];
::arm_q15_to_q31(vals, q31Vals, RX_BLOCK_SIZE);
::arm_biquad_cascade_df1_q31(&m_dcFilter, q31Vals, dcValues, RX_BLOCK_SIZE);
for (uint8_t i = 0U; i < RX_BLOCK_SIZE; i++)
dcLevel += dcValues[i];
dcLevel /= RX_BLOCK_SIZE;
q15_t offset = q15_t(__SSAT((dcLevel >> 16), 16));;
q15_t dcVals[RX_BLOCK_SIZE];
for (uint8_t i = 0U; i < RX_BLOCK_SIZE; i++)
dcVals[i] = vals[i] - offset;
if (m_modemState == STATE_IDLE) {
if (m_dstarEnable) {
q15_t GMSKVals[RX_BLOCK_SIZE + 1U];
::arm_fir_fast_q15(&m_GMSKFilter, samples, GMSKVals, blockSize);
if (m_dstarEnable)
dstarRX.samples(dcVals, rssi, RX_BLOCK_SIZE);
dstarRX.samples(GMSKVals, blockSize);
if (m_p25Enable)
p25RX.samples(dcVals, rssi, RX_BLOCK_SIZE);
if (m_dmrEnable) {
if (m_duplex)
dmrIdleRX.samples(vals, RX_BLOCK_SIZE);
else
dmrDMORX.samples(vals, rssi, RX_BLOCK_SIZE);
}
if (m_dmrEnable || m_ysfEnable || m_p25Enable) {
q15_t C4FSKVals[RX_BLOCK_SIZE + 1U];
::arm_fir_fast_q15(&m_C4FSKFilter, samples, C4FSKVals, blockSize);
if (m_dmrEnable) {
if (m_duplex)
dmrIdleRX.samples(C4FSKVals, blockSize);
else
dmrDMORX.samples(C4FSKVals, rssi, blockSize);
}
if (m_ysfEnable)
ysfRX.samples(C4FSKVals, blockSize);
if (m_p25Enable)
p25RX.samples(C4FSKVals, blockSize);
}
if (m_ysfEnable)
ysfRX.samples(dcVals, rssi, RX_BLOCK_SIZE);
} else if (m_modemState == STATE_DSTAR) {
if (m_dstarEnable) {
q15_t GMSKVals[RX_BLOCK_SIZE + 1U];
::arm_fir_fast_q15(&m_GMSKFilter, samples, GMSKVals, blockSize);
dstarRX.samples(GMSKVals, blockSize);
}
if (m_dstarEnable)
dstarRX.samples(dcVals, rssi, RX_BLOCK_SIZE);
} else if (m_modemState == STATE_DMR) {
if (m_dmrEnable) {
q15_t C4FSKVals[RX_BLOCK_SIZE + 1U];
::arm_fir_fast_q15(&m_C4FSKFilter, samples, C4FSKVals, blockSize);
if (m_duplex) {
// If the transmitter isn't on, use the DMR idle RX to detect the wakeup CSBKs
if (m_tx)
dmrRX.samples(C4FSKVals, rssi, control, blockSize);
dmrRX.samples(vals, rssi, control, RX_BLOCK_SIZE);
else
dmrIdleRX.samples(C4FSKVals, blockSize);
dmrIdleRX.samples(vals, RX_BLOCK_SIZE);
} else {
dmrDMORX.samples(C4FSKVals, rssi, blockSize);
dmrDMORX.samples(vals, rssi, RX_BLOCK_SIZE);
}
}
} else if (m_modemState == STATE_YSF) {
if (m_ysfEnable) {
q15_t C4FSKVals[RX_BLOCK_SIZE + 1U];
::arm_fir_fast_q15(&m_C4FSKFilter, samples, C4FSKVals, blockSize);
ysfRX.samples(C4FSKVals, blockSize);
}
if (m_ysfEnable)
ysfRX.samples(dcVals, rssi, RX_BLOCK_SIZE);
} else if (m_modemState == STATE_P25) {
if (m_p25Enable) {
q15_t C4FSKVals[RX_BLOCK_SIZE + 1U];
::arm_fir_fast_q15(&m_C4FSKFilter, samples, C4FSKVals, blockSize);
p25RX.samples(C4FSKVals, blockSize);
}
if (m_p25Enable)
p25RX.samples(dcVals, rssi, RX_BLOCK_SIZE);
} else if (m_modemState == STATE_DSTARCAL) {
q15_t GMSKVals[RX_BLOCK_SIZE + 1U];
::arm_fir_fast_q15(&m_GMSKFilter, samples, GMSKVals, blockSize);
calDStarRX.samples(GMSKVals, blockSize);
calDStarRX.samples(vals, RX_BLOCK_SIZE);
} else if (m_modemState == STATE_RSSICAL) {
calRSSI.samples(rssi, RX_BLOCK_SIZE);
}
}
}
@@ -285,7 +326,7 @@ void CIO::write(MMDVM_STATE mode, q15_t* samples, uint16_t length, const uint8_t
for (uint16_t i = 0U; i < length; i++) {
q31_t res1 = samples[i] * txLevel;
q15_t res2 = q15_t(__SSAT((res1 >> 15), 16));
uint16_t res3 = uint16_t(res2 + DC_OFFSET);
uint16_t res3 = uint16_t(res2 + m_txDCOffset);
// Detect DAC overflow
if (res3 > 4095U)
@@ -326,7 +367,7 @@ void CIO::setMode()
#endif
}
void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel)
void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, int16_t txDCOffset, int16_t rxDCOffset)
{
m_pttInvert = pttInvert;
@@ -336,6 +377,9 @@ void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rx
m_dmrTXLevel = q15_t(dmrTXLevel * 128);
m_ysfTXLevel = q15_t(ysfTXLevel * 128);
m_p25TXLevel = q15_t(p25TXLevel * 128);
m_rxDCOffset = DC_OFFSET + rxDCOffset;
m_txDCOffset = DC_OFFSET + txDCOffset;
if (rxInvert)
m_rxLevel = -m_rxLevel;
@@ -353,11 +397,6 @@ void CIO::getOverflow(bool& adcOverflow, bool& dacOverflow)
adcOverflow = m_adcOverflow > 0U;
dacOverflow = m_dacOverflow > 0U;
#if defined(WANT_DEBUG)
if (m_adcOverflow > 0U || m_dacOverflow > 0U)
DEBUG3("IO: adc/dac", m_adcOverflow, m_dacOverflow);
#endif
m_adcOverflow = 0U;
m_dacOverflow = 0U;
}
@@ -377,6 +416,11 @@ void CIO::resetWatchdog()
m_watchdog = 0U;
}
uint32_t CIO::getWatchdog()
{
return m_watchdog;
}
bool CIO::hasLockout() const
{
return m_lockout;
+16 -9
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -40,9 +40,9 @@ public:
void setADCDetection(bool detect);
void setMode();
void interrupt(uint8_t source);
void interrupt();
void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel);
void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, int16_t txDCOffset, int16_t rxDCOffset);
void getOverflow(bool& adcOverflow, bool& dacOverflow);
@@ -52,6 +52,9 @@ public:
bool hasLockout() const;
void resetWatchdog();
uint32_t getWatchdog();
void selfTest();
private:
bool m_started;
@@ -60,10 +63,11 @@ private:
CSampleRB m_txBuffer;
CRSSIRB m_rssiBuffer;
arm_fir_instance_q15 m_C4FSKFilter;
arm_fir_instance_q15 m_GMSKFilter;
q15_t m_C4FSKState[70U]; // NoTaps + BlockSize - 1, 42 + 20 - 1 plus some spare
q15_t m_GMSKState[40U]; // NoTaps + BlockSize - 1, 12 + 20 - 1 plus some spare
arm_biquad_casd_df1_inst_q31 m_dcFilter;
q31_t m_dcState[4];
arm_fir_instance_q15 m_boxcarFilter;
q15_t m_boxcarState[30U]; // NoTaps + BlockSize - 1, 6 + 20 - 1 plus some spare
bool m_pttInvert;
q15_t m_rxLevel;
@@ -73,6 +77,9 @@ private:
q15_t m_ysfTXLevel;
q15_t m_p25TXLevel;
uint16_t m_rxDCOffset;
uint16_t m_txDCOffset;
uint32_t m_ledCount;
bool m_ledValue;
@@ -81,8 +88,6 @@ private:
uint16_t m_adcOverflow;
uint16_t m_dacOverflow;
uint32_t m_count;
volatile uint32_t m_watchdog;
bool m_lockout;
@@ -101,6 +106,8 @@ private:
void setDMRInt(bool on);
void setYSFInt(bool on);
void setP25Int(bool on);
void delayInt(unsigned int dly);
};
#endif
+27 -12
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2015 by Jim Mclaughlin KI6ZUM
* Copyright (C) 2016 by Colin Durbridge G4EML
*
@@ -51,6 +51,8 @@
#define ADC_CDR_Chan 13
#define DACC_MR_USER_SEL_Chan DACC_MR_USER_SEL_CHANNEL1 // DAC on Due DAC1
#define DACC_CHER_Chan DACC_CHER_CH1
#define RSSI_CHER_Chan (1<<1) // ADC on Due pin A6 - Due AD1 - (1 << 1)
#define RSSI_CDR_Chan 1
#elif defined(ARDUINO_DUE_NTH)
#define PIN_COS A7
#define PIN_PTT A8
@@ -64,6 +66,8 @@
#define ADC_CDR_Chan 7
#define DACC_MR_USER_SEL_Chan DACC_MR_USER_SEL_CHANNEL0 // DAC on Due DAC0
#define DACC_CHER_Chan DACC_CHER_CH0
#define RSSI_CHER_Chan (1<<1) // ADC on Due pin A6 - Due AD1 - (1 << 1)
#define RSSI_CDR_Chan 1
#else
#error "Either ARDUINO_DUE_PAPA, ARDUINO_DUE_ZUM_V10, or ARDUINO_DUE_NTH need to be defined"
#endif
@@ -73,7 +77,7 @@ const uint16_t DC_OFFSET = 2048U;
extern "C" {
void ADC_Handler()
{
io.interrupt(0U);
io.interrupt();
}
}
@@ -97,14 +101,17 @@ void CIO::initInt()
void CIO::startInt()
{
if (ADC->ADC_ISR & ADC_ISR_EOC_Chan) // Ensure there was an End-of-Conversion and we read the ISR reg
io.interrupt(0U);
io.interrupt();
// Set up the ADC
NVIC_EnableIRQ(ADC_IRQn); // Enable ADC interrupt vector
ADC->ADC_IDR = 0xFFFFFFFF; // Disable interrupts
ADC->ADC_IER = ADC_CHER_Chan; // Enable End-Of-Conv interrupt
ADC->ADC_CHDR = 0xFFFF; // Disable all channels
ADC->ADC_CHER = ADC_CHER_Chan; // Enable just one channel
ADC->ADC_CHER = ADC_CHER_Chan; // Enable rx input channel
#if defined(SEND_RSSI_DATA)
ADC->ADC_CHER |= RSSI_CHER_Chan; // and RSSI input
#endif
ADC->ADC_CGR = 0x15555555; // All gains set to x1
ADC->ADC_COR = 0x00000000; // All offsets off
ADC->ADC_MR = (ADC->ADC_MR & 0xFFFFFFF0) | (1 << 1) | ADC_MR_TRGEN; // 1 = trig source TIO from TC0
@@ -133,11 +140,11 @@ void CIO::startInt()
TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_CLEAR |
TC_CMR_BCPB_CLEAR | TC_CMR_BCPC_CLEAR;
#if defined(EXTERNAL_OSC)
t->TC_RC = EXTERNAL_OSC / 24000; // Counter resets on RC, so sets period in terms of the external clock
t->TC_RA = EXTERNAL_OSC / 48000; // Roughly square wave
t->TC_RC = EXTERNAL_OSC / 48000; // Counter resets on RC, so sets period in terms of the external clock
t->TC_RA = EXTERNAL_OSC / 96000; // Roughly square wave
#else
t->TC_RC = 1750; // Counter resets on RC, so sets period in terms of 42MHz internal clock
t->TC_RA = 880; // Roughly square wave
t->TC_RC = 875; // Counter resets on RC, so sets period in terms of 42MHz internal clock
t->TC_RA = 438; // Roughly square wave
#endif
t->TC_CMR = (t->TC_CMR & 0xFFF0FFFF) | TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_SET; // Set clear and set from RA and RC compares
t->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG; // re-enable local clocking and switch to hardware trigger source.
@@ -157,7 +164,7 @@ void CIO::startInt()
digitalWrite(PIN_LED, HIGH);
}
void CIO::interrupt(uint8_t source)
void CIO::interrupt()
{
if ((ADC->ADC_ISR & ADC_ISR_EOC_Chan) == ADC_ISR_EOC_Chan) { // Ensure there was an End-of-Conversion and we read the ISR reg
uint8_t control = MARK_NONE;
@@ -169,7 +176,11 @@ void CIO::interrupt(uint8_t source)
sample = ADC->ADC_CDR[ADC_CDR_Chan];
m_rxBuffer.put(sample, control);
#if defined(SEND_RSSI_DATA)
m_rssiBuffer.put(ADC->ADC_CDR[RSSI_CDR_Chan]);
#else
m_rssiBuffer.put(0U);
#endif
m_watchdog++;
}
@@ -200,7 +211,7 @@ void CIO::setDStarInt(bool on)
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
}
void CIO::setDMRInt(bool on)
void CIO::setDMRInt(bool on)
{
digitalWrite(PIN_DMR, on ? HIGH : LOW);
}
@@ -210,10 +221,14 @@ void CIO::setYSFInt(bool on)
digitalWrite(PIN_YSF, on ? HIGH : LOW);
}
void CIO::setP25Int(bool on)
void CIO::setP25Int(bool on)
{
digitalWrite(PIN_P25, on ? HIGH : LOW);
}
#endif
void CIO::delayInt(unsigned int dly)
{
delay(dly);
}
#endif
+776 -339
View File
File diff suppressed because it is too large Load Diff
+432
View File
@@ -0,0 +1,432 @@
/*
* Copyright (C) 2016 by Jim McLaughlin KI6ZUM
* Copyright (C) 2016, 2017 by Andy Uribe CA6JAU
* Copyright (C) 2017 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Wojciech Krutnik N0CALL
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "IO.h"
#if defined(STM32F1)
#if defined(STM32F1_POG)
/*
Pin definitions for STM32F1 POG Board:
PTT PB12 output
COSLED PB5 output
LED PB4 output
COS PB13 input/PD
DSTAR PB7 output
DMR PB6 output
YSF PB8 output
P25 PB9 output
RX PB0 analog input (ADC1_8)
RSSI PB1 analog input (ADC2_9)
TX PA4 analog output (DAC_OUT1)
EXT_CLK PA15 input (AF: TIM2_CH1_ETR)
USART1_TXD PA9 output (AF)
USART1_RXD PA10 input (AF)
*/
#define PIN_PTT 12
#define PORT_PTT GPIOB
#define BB_PTT *((bitband_t)BITBAND_PERIPH(&PORT_PTT->ODR, PIN_PTT))
#define PIN_COSLED 5
#define PORT_COSLED GPIOB
#define BB_COSLED *((bitband_t)BITBAND_PERIPH(&PORT_COSLED->ODR, PIN_COSLED))
#define PIN_LED 4
#define PORT_LED GPIOB
#define BB_LED *((bitband_t)BITBAND_PERIPH(&PORT_LED->ODR, PIN_LED))
#define PIN_COS 13
#define PORT_COS GPIOB
#define BB_COS *((bitband_t)BITBAND_PERIPH(&PORT_COS->IDR, PIN_COS))
#define PIN_DSTAR 7
#define PORT_DSTAR GPIOB
#define BB_DSTAR *((bitband_t)BITBAND_PERIPH(&PORT_DSTAR->ODR, PIN_DSTAR))
#define PIN_DMR 6
#define PORT_DMR GPIOB
#define BB_DMR *((bitband_t)BITBAND_PERIPH(&PORT_DMR->ODR, PIN_DMR))
#define PIN_YSF 8
#define PORT_YSF GPIOB
#define BB_YSF *((bitband_t)BITBAND_PERIPH(&PORT_YSF->ODR, PIN_YSF))
#define PIN_P25 9
#define PORT_P25 GPIOB
#define BB_P25 *((bitband_t)BITBAND_PERIPH(&PORT_P25->ODR, PIN_P25))
#define PIN_RX 0
#define PIN_RX_ADC_CH 8
#define PORT_RX GPIOB
#define PIN_RSSI 1
#define PIN_RSSI_ADC_CH 9
#define PORT_RSSI GPIOB
#define PIN_TX 4
#define PIN_TX_DAC_CH 1
#define PORT_TX GPIOA
#define PIN_EXT_CLK 15
#define SRC_EXT_CLK 15
#define PORT_EXT_CLK GPIOA
#define PIN_USART1_TXD 9
#define PORT_USART1_TXD GPIOA
#define PIN_USART1_RXD 10
#define PORT_USART1_RXD GPIOA
#else // defined(STM32F1_POG)
#error "Either STM32F1_POG, or sth need to be defined"
#endif // defined(STM32F1_POG)
const uint16_t DC_OFFSET = 2048U;
// Sampling frequency
#define SAMP_FREQ 48000
extern "C" {
void TIM2_IRQHandler() {
if ((TIM2->SR & TIM_SR_UIF) == TIM_SR_UIF) {
TIM2->SR = ~TIM_SR_UIF; // clear UI flag
io.interrupt();
}
}
}
void delay(uint32_t cnt)
{
while(cnt--)
asm("nop");
}
// source: http://www.freddiechopin.info/
void GPIOConfigPin(GPIO_TypeDef *port_ptr, uint32_t pin, uint32_t mode_cnf_value)
{
volatile uint32_t *cr_ptr;
uint32_t cr_value;
cr_ptr = &port_ptr->CRL; // configuration of pins [0,7] is in CRL
if (pin >= 8) // is pin in [8; 15]?
{ // configuration of pins [8,15] is in CRH
cr_ptr++; // advance to next struct element CRL -> CRH
pin -= 8; // crop the pin number
}
cr_value = *cr_ptr; // localize the CRL / CRH value
cr_value &= ~(0xF << (pin * 4)); // clear the MODE and CNF fields (now that pin is an analog input)
cr_value |= (mode_cnf_value << (pin * 4)); // save new MODE and CNF value for desired pin
*cr_ptr = cr_value; // save localized value to CRL / CRL
}
#if defined(STM32F1_POG)
void FancyLEDEffect()
{
bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25};
for(int i=0; i<7; i++){
*foo[i] = 0x01;
}
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1);
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
delay(SystemCoreClock/1000*100);
for(int i=0; i<7; i++){
*foo[i] = 0x00;
}
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
delay(SystemCoreClock/1000*20);
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
delay(SystemCoreClock/1000*10);
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
*foo[0] = 0x01;
for(int i=1; i<7; i++){
delay(SystemCoreClock/1000*10);
*foo[i-1] = 0x00;
*foo[i] = 0x01;
}
for(int i=5; i>=0; i--){
delay(SystemCoreClock/1000*10);
*foo[i+1] = 0x00;
*foo[i] = 0x01;
}
delay(SystemCoreClock/1000*10);
*foo[5+1-6] = 0x00;
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
delay(SystemCoreClock/1000*10);
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1|GPIO_CRL_CNF0_1);
delay(SystemCoreClock/1000*50);
}
#endif
static inline void GPIOInit()
{
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN
| RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN
| RCC_APB2ENR_AFIOEN; // enable all GPIOs
// set all ports to input with pull-down
GPIOA->CRL = 0x88888888;
GPIOA->CRH = 0x88888888;
GPIOA->ODR = 0;
GPIOB->CRL = 0x88888888;
GPIOB->CRH = 0x88888888;
GPIOB->ODR = 0;
GPIOC->CRL = 0x88888888;
GPIOC->CRH = 0x88888888;
GPIOC->ODR = 0;
GPIOD->CRL = 0x88888888;
GPIOD->CRH = 0x88888888;
GPIOD->ODR = 0;
// configure ports
GPIOConfigPin(PORT_PTT, PIN_PTT, GPIO_CRL_MODE0_1);
GPIOConfigPin(PORT_COSLED, PIN_COSLED, GPIO_CRL_MODE0_1);
GPIOConfigPin(PORT_LED, PIN_LED, GPIO_CRL_MODE0_1);
GPIOConfigPin(PORT_COS, PIN_COS, GPIO_CRL_CNF0_1);
GPIOConfigPin(PORT_DSTAR, PIN_DSTAR, GPIO_CRL_MODE0_1);
GPIOConfigPin(PORT_DMR, PIN_DMR, GPIO_CRL_MODE0_1);
GPIOConfigPin(PORT_YSF, PIN_YSF, GPIO_CRL_MODE0_1);
GPIOConfigPin(PORT_P25, PIN_P25, GPIO_CRL_MODE0_1);
GPIOConfigPin(PORT_RX, PIN_RX, 0);
#if defined(SEND_RSSI_DATA)
GPIOConfigPin(PORT_RSSI, PIN_RSSI, 0);
#endif
GPIOConfigPin(PORT_TX, PIN_TX, 0);
#if defined(EXTERNAL_OSC)
#if defined(STM32F1_POG)
GPIOConfigPin(PORT_EXT_CLK, PIN_EXT_CLK, GPIO_CRL_CNF0_0);
AFIO->MAPR = (AFIO->MAPR & ~AFIO_MAPR_TIM2_REMAP) | AFIO_MAPR_TIM2_REMAP_0;
#endif
#endif
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1|GPIO_CRL_CNF0_1);
GPIOConfigPin(PORT_USART1_RXD, PIN_USART1_RXD, GPIO_CRL_CNF0_0);
AFIO->MAPR = (AFIO->MAPR & ~AFIO_MAPR_SWJ_CFG) | AFIO_MAPR_SWJ_CFG_1;
}
static inline void ADCInit()
{
RCC->CFGR = (RCC->CFGR & ~RCC_CFGR_ADCPRE_Msk)
| RCC_CFGR_ADCPRE_DIV6; // ADC clock divided by 6 (72MHz/6 = 12MHz)
RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
#if defined(SEND_RSSI_DATA)
RCC->APB2ENR |= RCC_APB2ENR_ADC2EN;
#endif
// Init ADCs in dual mode (RSSI)
#if defined(SEND_RSSI_DATA)
ADC1->CR1 = ADC_CR1_DUALMOD_1|ADC_CR1_DUALMOD_2; // Regular simultaneous mode
#endif
// Set sampling time to 7.5 cycles
if (PIN_RX_ADC_CH < 10) {
ADC1->SMPR2 = ADC_SMPR2_SMP0_0 << (3*PIN_RX_ADC_CH);
} else {
ADC1->SMPR1 = ADC_SMPR1_SMP10_0 << (3*PIN_RX_ADC_CH);
}
#if defined(SEND_RSSI_DATA)
if (PIN_RSSI_ADC_CH < 10) {
ADC2->SMPR2 = ADC_SMPR2_SMP0_0 << (3*PIN_RSSI_ADC_CH);
} else {
ADC2->SMPR1 = ADC_SMPR1_SMP10_0 << (3*PIN_RSSI_ADC_CH);
}
#endif
// Set conversion channel (single conversion)
ADC1->SQR3 = PIN_RX_ADC_CH;
#if defined(SEND_RSSI_DATA)
ADC2->SQR3 = PIN_RSSI_ADC_CH;
#endif
// Enable ADC
ADC1->CR2 |= ADC_CR2_ADON;
#if defined(SEND_RSSI_DATA)
// Enable ADC2
ADC2->CR2 |= ADC_CR2_ADON;
#endif
// Start calibration
delay(6*2);
ADC1->CR2 |= ADC_CR2_CAL;
while((ADC1->CR2 & ADC_CR2_CAL) == ADC_CR2_CAL)
;
#if defined(SEND_RSSI_DATA)
ADC2->CR2 |= ADC_CR2_CAL;
while((ADC2->CR2 & ADC_CR2_CAL) == ADC_CR2_CAL)
;
#endif
// Trigger first conversion
ADC1->CR2 |= ADC_CR2_ADON;
#if defined(SEND_RSSI_DATA)
ADC2->CR2 |= ADC_CR2_ADON;
#endif
}
static inline void DACInit()
{
RCC->APB1ENR |= RCC_APB1ENR_DACEN;
DAC->CR = DAC_CR_EN1;
}
static inline void TimerInit()
{
RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
#if defined(EXTERNAL_OSC)
// Enable external clock, prescaler /4
TIM2->SMCR = TIM_SMCR_ECE | TIM_SMCR_ETPS_1;
#endif
// TIM2 output frequency
TIM2->PSC = 0;
#if defined(EXTERNAL_OSC)
// TimerCount = ExternalOsc
// /4 (external clock prescaler)
// /SAMP_FREQ
TIM2->ARR = (uint16_t) ((EXTERNAL_OSC/(4*SAMP_FREQ)) - 1);
#else
TIM2->ARR = (uint16_t) ((SystemCoreClock/(SAMP_FREQ)) - 1);
#endif
// Enable TIse 1%-tolerance comM2 interrupt
TIM2->DIER = TIM_DIER_UIE;
NVIC_EnableIRQ(TIM2_IRQn);
// Enable TIM2
TIM2->CR1 |= TIM_CR1_CEN;
}
void CIO::initInt()
{
GPIOInit();
ADCInit();
DACInit();
#if defined(STM32F1_POG)
FancyLEDEffect();
#endif
}
void CIO::startInt()
{
TimerInit();
BB_COSLED = 0;
BB_LED = 1;
}
void CIO::interrupt()
{
uint8_t control = MARK_NONE;
uint16_t sample = DC_OFFSET;
uint16_t rawRSSI = 0U;
bitband_t eoc = (bitband_t)BITBAND_PERIPH(&ADC1->SR, ADC_SR_EOS_Pos);
bitband_t adon = (bitband_t)BITBAND_PERIPH(&ADC1->CR2, ADC_CR2_ADON_Pos);
#if defined(SEND_RSSI_DATA)
bitband_t rssi_adon = (bitband_t)BITBAND_PERIPH(&ADC2->CR2, ADC_CR2_ADON_Pos);
#endif
if (*eoc) {
// trigger next conversion
*adon = 1;
#if defined(SEND_RSSI_DATA)
*rssi_adon = 1;
#endif
m_txBuffer.get(sample, control);
DAC->DHR12R1 = sample; // Send the value to the DAC
// Read value from ADC1 and ADC2
sample = ADC1->DR; // read conversion result; EOC is cleared by this read
m_rxBuffer.put(sample, control);
#if defined(SEND_RSSI_DATA)
rawRSSI = ADC2->DR;
m_rssiBuffer.put(rawRSSI);
#endif
m_watchdog++;
}
}
bool CIO::getCOSInt()
{
return BB_COS;
}
void CIO::setLEDInt(bool on)
{
BB_LED = !!on;
}
void CIO::setPTTInt(bool on)
{
BB_PTT = !!on;
}
void CIO::setCOSInt(bool on)
{
BB_COSLED = !!on;
}
void CIO::setDStarInt(bool on)
{
BB_DSTAR = !!on;
}
void CIO::setDMRInt(bool on)
{
BB_DMR = !!on;
}
void CIO::setYSFInt(bool on)
{
BB_YSF = !!on;
}
void CIO::setP25Int(bool on)
{
BB_P25 = !!on;
}
void CIO::delayInt(unsigned int dly)
{
delay(dly);
}
#endif
+38 -47
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2016 by Jonathan Naylor G4KLX
* Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -34,8 +34,8 @@
#define PIN_DMR 10
#define PIN_YSF 11
#define PIN_P25 12
#define PIN_ADC 5 // A0, Pin 14
#define PIN_RSSI 8 // A2, Pin 16
#define PIN_ADC 5 // A0, Pin 14
#define PIN_RSSI 4 // Teensy 3.5/3.6, A16, Pin 35. Teensy 3.1/3.2, A17, Pin 28
#define PDB_CHnC1_TOS 0x0100
#define PDB_CHnC1_EN 0x0001
@@ -45,15 +45,8 @@ const uint16_t DC_OFFSET = 2048U;
extern "C" {
void adc0_isr()
{
io.interrupt(0U);
io.interrupt();
}
#if defined(SEND_RSSI_DATA)
void adc1_isr()
{
io.interrupt(1U);
}
#endif
}
void CIO::initInt()
@@ -77,17 +70,17 @@ void CIO::startInt()
{
// Initialise the DAC
SIM_SCGC2 |= SIM_SCGC2_DAC0;
DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 1.2V VDDA is DACREF_2
DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 3.3V VDDA is DACREF_2
// Initialise ADC0
SIM_SCGC6 |= SIM_SCGC6_ADC0;
ADC0_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
ADC0_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
ADC0_SC2 = ADC_SC2_REFSEL(1) | ADC_SC2_ADTRG; // Voltage ref internal, hardware trigger
ADC0_SC2 = ADC_SC2_REFSEL(0) | ADC_SC2_ADTRG; // Voltage ref external, hardware trigger
ADC0_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
ADC0_SC3 = ADC_SC3_CAL;
ADC0_SC3 |= ADC_SC3_CAL;
while (ADC0_SC3 & ADC_SC3_CAL) // Wait for calibration
;
@@ -105,10 +98,10 @@ void CIO::startInt()
ADC1_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
ADC1_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
ADC1_SC2 = ADC_SC2_REFSEL(1); // Voltage ref internal, software trigger
ADC1_SC2 = ADC_SC2_REFSEL(0); // Voltage ref external, software trigger
ADC1_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
ADC1_SC3 = ADC_SC3_CAL;
ADC1_SC3 |= ADC_SC3_CAL;
while (ADC1_SC3 & ADC_SC3_CAL) // Wait for calibration
;
@@ -116,14 +109,11 @@ void CIO::startInt()
ADC1_CLP2 + ADC1_CLP1 + ADC1_CLP0;
sum1 = (sum1 / 2U) | 0x8000U;
ADC1_PG = sum1;
NVIC_ENABLE_IRQ(IRQ_ADC1);
#endif
#if defined(EXTERNAL_OSC)
// Set ADC0 to trigger from the LPTMR at 24 kHz
// Set ADC0 to trigger from the LPTMR at 48 kHz
SIM_SOPT7 = SIM_SOPT7_ADC0ALTTRGEN | // Enable ADC0 alternate trigger
SIM_SOPT7_ADC0PRETRGSEL | // Enable ADC0 pre-trigger
SIM_SOPT7_ADC0TRGSEL(14); // Trigger ADC0 by LPTMR0
CORE_PIN13_CONFIG = PORT_PCR_MUX(3);
@@ -131,14 +121,14 @@ void CIO::startInt()
SIM_SCGC5 |= SIM_SCGC5_LPTIMER; // Enable Low Power Timer Access
LPTMR0_CSR = 0; // Disable
LPTMR0_PSR = LPTMR_PSR_PBYP; // Bypass prescaler/filter
LPTMR0_CMR = (EXTERNAL_OSC / 24000) - 1; // Frequency divided by CMR + 1
LPTMR0_CMR = (EXTERNAL_OSC / 48000) - 1; // Frequency divided by CMR + 1
LPTMR0_CSR = LPTMR_CSR_TPS(2) | // Pin: 0=CMP0, 1=xtal, 2=pin13
LPTMR_CSR_TMS; // Mode Select, 0=timer, 1=counter
LPTMR0_CSR |= LPTMR_CSR_TEN; // Enable
#else
// Setup PDB for ADC0 at 24 kHz
// Setup PDB for ADC0 at 48 kHz
SIM_SCGC6 |= SIM_SCGC6_PDB; // Enable PDB clock
PDB0_MOD = (F_BUS / 24000) - 1; // Timer period - 1
PDB0_MOD = (F_BUS / 48000) - 1; // Timer period - 1
PDB0_IDLY = 0; // Interrupt delay
PDB0_CH0C1 = PDB_CHnC1_TOS | PDB_CHnC1_EN; // Enable pre-trigger for ADC0
PDB0_SC = PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | // SW trigger, enable interrupts, continuous mode
@@ -151,37 +141,33 @@ void CIO::startInt()
digitalWrite(PIN_LED, HIGH);
}
void CIO::interrupt(uint8_t source)
void CIO::interrupt()
{
if (source == 0U) { // ADC0
uint8_t control = MARK_NONE;
uint16_t sample = DC_OFFSET;
uint8_t control = MARK_NONE;
uint16_t sample = DC_OFFSET;
m_txBuffer.get(sample, control);
*(int16_t *)&(DAC0_DAT0L) = sample;
if ((ADC0_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
sample = ADC0_RA;
m_rxBuffer.put(sample, control);
m_txBuffer.get(sample, control);
*(int16_t *)&(DAC0_DAT0L) = sample;
if ((ADC0_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
sample = ADC0_RA;
m_rxBuffer.put(sample, control);
}
#if defined(SEND_RSSI_DATA)
ADC1_SC1A = ADC_SC1_AIEN | PIN_RSSI;
if ((ADC1_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
uint16_t rssi = ADC1_RA;
m_rssiBuffer.put(rssi);
} else {
m_rssiBuffer.put(0U);
}
ADC1_SC1A = PIN_RSSI; // Start the next RSSI conversion
#else
m_rssiBuffer.put(0U);
m_rssiBuffer.put(0U);
#endif
}
m_watchdog++;
}
#if defined(SEND_RSSI_DATA)
if (source == 1U) { // ADC1
if ((ADC1_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
uint16_t rssi = ADC1_RA;
m_rssiBuffer.put(rssi);
}
}
#endif
m_watchdog++;
}
bool CIO::getCOSInt()
@@ -224,4 +210,9 @@ void CIO::setP25Int(bool on)
digitalWrite(PIN_P25, on ? HIGH : LOW);
}
void CIO::delayInt(unsigned int dly)
{
delay(dly);
}
#endif
+10 -8
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Mathis Schmieder DB9MAT
* Copyright (C) 2016 by Colin Durbridge G4EML
*
@@ -18,7 +18,7 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if defined(STM32F4XX) || defined(STM32F4)
#if defined(STM32F4XX) || defined(STM32F7XX) || defined(STM32F105xC)
#include "Config.h"
#include "Globals.h"
@@ -36,9 +36,6 @@ bool m_duplex = true;
bool m_tx = false;
bool m_dcd = false;
uint32_t m_sampleCount = 0U;
bool m_sampleInsert = false;
CDStarRX dstarRX;
CDStarTX dstarTX;
@@ -58,6 +55,8 @@ CP25TX p25TX;
CCalDStarRX calDStarRX;
CCalDStarTX calDStarTX;
CCalDMR calDMR;
CCalP25 calP25;
CCalRSSI calRSSI;
CCWIdTX cwIdTX;
@@ -95,11 +94,14 @@ void loop()
if (m_modemState == STATE_DSTARCAL)
calDStarTX.process();
if (m_modemState == STATE_DMRCAL)
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K)
calDMR.process();
if (m_modemState == STATE_IDLE)
cwIdTX.process();
if (m_modemState == STATE_P25CAL1K)
calP25.process();
if (m_modemState == STATE_IDLE)
cwIdTX.process();
}
int main()
+7 -5
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
*
* This program is free software; you can redistribute it and/or modify
@@ -33,9 +33,6 @@ bool m_duplex = true;
bool m_tx = false;
bool m_dcd = false;
uint32_t m_sampleCount = 0U;
bool m_sampleInsert = false;
CDStarRX dstarRX;
CDStarTX dstarTX;
@@ -55,6 +52,8 @@ CP25TX p25TX;
CCalDStarRX calDStarRX;
CCalDStarTX calDStarTX;
CCalDMR calDMR;
CCalP25 calP25;
CCalRSSI calRSSI;
CCWIdTX cwIdTX;
@@ -92,9 +91,12 @@ void loop()
if (m_modemState == STATE_DSTARCAL)
calDStarTX.process();
if (m_modemState == STATE_DMRCAL)
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K)
calDMR.process();
if (m_modemState == STATE_P25CAL1K)
calP25.process();
if (m_modemState == STATE_IDLE)
cwIdTX.process();
}
+2 -2
View File
@@ -98,8 +98,6 @@
<Define name="HSE_VALUE=12000000"/>
<Define name="STM32F4_PI"/>
<Define name="ARDUINO_MODE_PINS"/>
<Define name="SEND_RSSI_DATA"/>
<Define name="SERIAL_REPEATER"/>
</DefinedSymbols>
</Compile>
<Link useDefault="0">
@@ -239,6 +237,7 @@
<File name="DMRDMOTX.cpp" path="DMRDMOTX.cpp" type="1"/>
<File name="DMRRX.cpp" path="DMRRX.cpp" type="1"/>
<File name="YSFRX.cpp" path="YSFRX.cpp" type="1"/>
<File name="CalRSSI.cpp" path="CalRSSI.cpp" type="1"/>
<File name="STM32F4XX_Lib/Device/stm32f4xx.h" path="STM32F4XX_Lib/Device/stm32f4xx.h" type="1"/>
<File name="SampleRB.cpp" path="SampleRB.cpp" type="1"/>
<File name="CalDStarTX.h" path="CalDStarTX.h" type="1"/>
@@ -261,6 +260,7 @@
<File name="SampleRB.h" path="SampleRB.h" type="1"/>
<File name="YSFTX.h" path="YSFTX.h" type="1"/>
<File name="DMRRX.h" path="DMRRX.h" type="1"/>
<File name="CalRSSI.h" path="CalRSSI.h" type="1"/>
<File name="IOTeensy.cpp" path="IOTeensy.cpp" type="1"/>
<File name="MMDVM.cpp" path="MMDVM.cpp" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Include/core_cmSimd.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmSimd.h" type="1"/>
+250 -89
View File
@@ -1,4 +1,4 @@
# Copyright (C) 2016 by Andy Uribe CA6JAU
# Copyright (C) 2016,2017 by Andy Uribe CA6JAU
# Copyright (C) 2016 by Jim McLaughlin KI6ZUM
# This program is free software; you can redistribute it and/or modify
@@ -15,6 +15,54 @@
# along with this program; if not, write to the Free Software
# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
# MMDVM source files
MMDVM_PATH=.
# STM32 library paths
F4_LIB_PATH=./STM32F4XX_Lib
F7_LIB_PATH=./STM32F7XX_Lib
# MCU external clock frequency (Hz)
CLK_MMDVM_PI=12000000
CLK_NUCLEO=8000000
# Directory Structure
BINDIR=bin
OBJDIR_F4=obj_f4
OBJDIR_F7=obj_f7
# Output files
BINELF_F4=mmdvm_f4.elf
BINHEX_F4=mmdvm_f4.hex
BINBIN_F4=mmdvm_f4.bin
BINELF_F7=mmdvm_f7.elf
BINHEX_F7=mmdvm_f7.hex
BINBIN_F7=mmdvm_f7.bin
# Header directories
INC_F4= . $(F4_LIB_PATH)/CMSIS/Include/ $(F4_LIB_PATH)/Device/ $(F4_LIB_PATH)/STM32F4xx_StdPeriph_Driver/include/
INCLUDES_F4=$(INC_F4:%=-I%)
INC_F7= . $(F7_LIB_PATH)/CMSIS/Include/ $(F7_LIB_PATH)/Device/ $(F7_LIB_PATH)/STM32F7xx_StdPeriph_Driver/inc/
INCLUDES_F7=$(INC_F7:%=-I%)
# CMSIS libraries
INCLUDES_LIBS_F4=$(F4_LIB_PATH)/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a
INCLUDES_LIBS_F7=$(F7_LIB_PATH)/CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a
# STM32F4 Standard Peripheral Libraries source path
STD_LIB_F4=$(F4_LIB_PATH)/STM32F4xx_StdPeriph_Driver/source
# STM32F7 Standard Peripheral Libraries source path
STD_LIB_F7=$(F7_LIB_PATH)/STM32F7xx_StdPeriph_Driver/src
# STM32F4 system source path
SYS_DIR_F4=$(F4_LIB_PATH)/Device
STARTUP_DIR_F4=$(F4_LIB_PATH)/Device/startup
# STM32F7 system source path
SYS_DIR_F7=$(F7_LIB_PATH)/Device
STARTUP_DIR_F7=$(F7_LIB_PATH)/Device/startup
# GNU ARM Embedded Toolchain
CC=arm-none-eabi-gcc
CXX=arm-none-eabi-g++
@@ -27,147 +75,260 @@ NM=arm-none-eabi-nm
SIZE=arm-none-eabi-size
A2L=arm-none-eabi-addr2line
# Directory Structure
BINDIR=bin
# Find source files
# "SystemRoot" is only defined in Windows
ifdef SYSTEMROOT
ASOURCES=$(shell dir /S /B *.s)
CSOURCES=$(shell dir /S /B *.c)
CXXSOURCES=$(shell dir /S /B *.cpp)
CLEANCMD=del /S *.o *.hex *.bin *.elf
MDBIN=md $@
CLEANCMD=del /S *.o *.hex *.bin *.elf GitVersion.h
MDDIRS=md $@
else ifdef SystemRoot
ASOURCES=$(shell dir /S /B *.s)
CSOURCES=$(shell dir /S /B *.c)
CXXSOURCES=$(shell dir /S /B *.cpp)
CLEANCMD=del /S *.o *.hex *.bin *.elf
MDBIN=md $@
CLEANCMD=del /S *.o *.hex *.bin *.elf GitVersion.h
MDDIRS=md $@
else
ASOURCES=$(shell find . -name '*.s')
CSOURCES=$(shell find . -name '*.c')
CXXSOURCES=$(shell find . -name '*.cpp')
CLEANCMD=rm -f $(OBJECTS) $(BINDIR)/$(BINELF) $(BINDIR)/$(BINHEX) $(BINDIR)/$(BINBIN)
MDBIN=mkdir $@
CLEANCMD=rm -f $(OBJ_F4) $(OBJ_F7) $(BINDIR)/*.hex $(BINDIR)/*.bin $(BINDIR)/*.elf GitVersion.h
MDDIRS=mkdir $@
endif
# Default reference oscillator frequencies
ifndef $(OSC)
ifeq ($(MAKECMDGOALS),pi)
OSC=12000000
OSC=$(CLK_MMDVM_PI)
else ifeq ($(MAKECMDGOALS),pi-f722)
OSC=$(CLK_MMDVM_PI)
else
OSC=8000000
OSC=$(CLK_NUCLEO)
endif
endif
# Find header directories
INC= . STM32F4XX_Lib/CMSIS/Include/ STM32F4XX_Lib/Device/ STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/
INCLUDES=$(INC:%=-I%)
# Build object lists
CXXSRC=$(wildcard $(MMDVM_PATH)/*.cpp)
CSRC_STD_F4=$(wildcard $(STD_LIB_F4)/*.c)
SYS_F4=$(wildcard $(SYS_DIR_F4)/*.c)
STARTUP_F4=$(wildcard $(STARTUP_DIR_F4)/*.c)
CSRC_STD_F7=$(wildcard $(STD_LIB_F7)/*.c)
SYS_F7=$(wildcard $(SYS_DIR_F7)/*.c)
STARTUP_F7=$(wildcard $(STARTUP_DIR_F7)/*.c)
OBJ_F4=$(CXXSRC:$(MMDVM_PATH)/%.cpp=$(OBJDIR_F4)/%.o) $(CSRC_STD_F4:$(STD_LIB_F4)/%.c=$(OBJDIR_F4)/%.o) $(SYS_F4:$(SYS_DIR_F4)/%.c=$(OBJDIR_F4)/%.o) $(STARTUP_F4:$(STARTUP_DIR_F4)/%.c=$(OBJDIR_F4)/%.o)
OBJ_F7=$(CXXSRC:$(MMDVM_PATH)/%.cpp=$(OBJDIR_F7)/%.o) $(CSRC_STD_F7:$(STD_LIB_F7)/%.c=$(OBJDIR_F7)/%.o) $(SYS_F7:$(SYS_DIR_F7)/%.c=$(OBJDIR_F7)/%.o) $(STARTUP_F7:$(STARTUP_DIR_F7)/%.c=$(OBJDIR_F7)/%.o)
# Find libraries
INCLUDES_LIBS=STM32F4XX_Lib/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a
LINK_LIBS=
# MCU flags
MCFLAGS_F4=-mcpu=cortex-m4 -mthumb -mlittle-endian -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb-interwork
MCFLAGS_F7=-mcpu=cortex-m7 -mthumb -mlittle-endian -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb-interwork
# Create object list
OBJECTS=$(ASOURCES:%.s=%.o)
OBJECTS+=$(CSOURCES:%.c=%.o)
OBJECTS+=$(CXXSOURCES:%.cpp=%.o)
# Define output files ELF & IHEX
BINELF=outp.elf
BINHEX=outp.hex
BINBIN=outp.bin
# MCU FLAGS
MCFLAGS=-mcpu=cortex-m4 -mthumb -mlittle-endian \
-mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb-interwork
# COMPILE FLAGS
# Compile flags
# STM32F4 Discovery board:
DEFS_DIS=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_DISCOVERY -DHSE_VALUE=$(OSC)
# Pi board:
DEFS_PI=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_PI -DARDUINO_MODE_PINS -DSEND_RSSI_DATA -DSERIAL_REPEATER -DHSE_VALUE=$(OSC)
# STM32F4 Nucleo 446 board:
DEFS_NUCLEO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_NUCLEO -DHSE_VALUE=$(OSC)
DEFS_DIS=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_DISCOVERY -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# MMDVM-Pi board:
DEFS_PI=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_PI -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# MMDVM-F4M F0DEI board:
DEFS_F4M=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_F4M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# STM32F4 Nucleo-64 F446RE board:
DEFS_NUCLEO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_NUCLEO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# STM32F7 Nucleo-144 F767ZI board:
DEFS_NUCLEO_F767=-DUSE_HAL_DRIVER -DSTM32F767xx -DSTM32F7XX -DSTM32F7_NUCLEO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# MMDVM-Pi F722 board:
DEFS_PI_F722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_PI -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
CFLAGS=-c $(MCFLAGS) $(INCLUDES)
CXXFLAGS=-c $(MCFLAGS) $(INCLUDES)
# Build compiler flags
CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
CXXFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
CFLAGS_F7=-c $(MCFLAGS_F7) $(INCLUDES_F7)
CXXFLAGS_F7=-c $(MCFLAGS_F7) $(INCLUDES_F7)
# LINKER FLAGS
LDSCRIPT=stm32f4xx_link.ld
LDFLAGS =-T $(LDSCRIPT) $(MCFLAGS) --specs=nosys.specs $(INCLUDES_LIBS) $(LINK_LIBS)
# Linker flags
LDFLAGS_F4 =-T stm32f4xx_link.ld $(MCFLAGS_F4) --specs=nosys.specs $(INCLUDES_LIBS_F4)
LDFLAGS_F767 =-T stm32f767_link.ld $(MCFLAGS_F7) --specs=nosys.specs $(INCLUDES_LIBS_F7)
LDFLAGS_F722 =-T stm32f722_link.ld $(MCFLAGS_F7) --specs=nosys.specs $(INCLUDES_LIBS_F7)
# Common flags
CFLAGS=-Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
LDFLAGS=-Os --specs=nano.specs
# Build Rules
.PHONY: all release dis pi nucleo debug clean
.PHONY: all release dis pi pi_f722 f4m nucleo f767 clean
# Default target: STM32F4 Discovery board
all: dis
# Default target: Nucleo-64 F446RE board
all: nucleo
pi: CFLAGS+=$(DEFS_PI) -Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
pi: CXXFLAGS+=$(DEFS_PI) -Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
pi: LDFLAGS+=-Os --specs=nano.specs
pi: release
pi: GitVersion.h
pi: CFLAGS+=$(CFLAGS_F4) $(DEFS_PI)
pi: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_PI)
pi: LDFLAGS+=$(LDFLAGS_F4)
pi: release_f4
nucleo: CFLAGS+=$(DEFS_NUCLEO) -Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
nucleo: CXXFLAGS+=$(DEFS_NUCLEO) -Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
nucleo: LDFLAGS+=-Os --specs=nano.specs
nucleo: release
pi-f722: GitVersion.h
pi-f722: CFLAGS+=$(CFLAGS_F7) $(DEFS_PI_F722)
pi-f722: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_PI_F722)
pi-f722: LDFLAGS+=$(LDFLAGS_F722)
pi-f722: release_f7
dis: CFLAGS+=$(DEFS_DIS) -Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
dis: CXXFLAGS+=$(DEFS_DIS) -Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
dis: LDFLAGS+=-Os --specs=nano.specs
dis: release
f4m: GitVersion.h
f4m: CFLAGS+=$(CFLAGS_F4) $(DEFS_F4M)
f4m: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_F4M)
f4m: LDFLAGS+=$(LDFLAGS_F4)
f4m: release_f4
debug: CFLAGS+=-g
debug: CXXFLAGS+=-g
debug: LDFLAGS+=-g
debug: release
nucleo: GitVersion.h
nucleo: CFLAGS+=$(CFLAGS_F4) $(DEFS_NUCLEO)
nucleo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_NUCLEO)
nucleo: LDFLAGS+=$(LDFLAGS_F4)
nucleo: release_f4
release: $(BINDIR)
release: $(BINDIR)/$(BINHEX)
release: $(BINDIR)/$(BINBIN)
dis: GitVersion.h
dis: CFLAGS+=$(CFLAGS_F4) $(DEFS_DIS)
dis: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DIS)
dis: LDFLAGS+=$(LDFLAGS_F4)
dis: release_f4
f767: GitVersion.h
f767: CFLAGS+=$(CFLAGS_F7) $(DEFS_NUCLEO_F767)
f767: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_NUCLEO_F767)
f767: LDFLAGS+=$(LDFLAGS_F767)
f767: release_f7
release_f4: $(BINDIR)
release_f4: $(OBJDIR_F4)
release_f4: $(BINDIR)/$(BINHEX_F4)
release_f4: $(BINDIR)/$(BINBIN_F4)
release_f7: $(BINDIR)
release_f7: $(OBJDIR_F7)
release_f7: $(BINDIR)/$(BINHEX_F7)
release_f7: $(BINDIR)/$(BINBIN_F7)
$(BINDIR):
$(MDBIN)
$(MDDIRS)
$(BINDIR)/$(BINHEX): $(BINDIR)/$(BINELF)
$(OBJDIR_F4):
$(MDDIRS)
$(OBJDIR_F7):
$(MDDIRS)
$(BINDIR)/$(BINHEX_F4): $(BINDIR)/$(BINELF_F4)
$(CP) -O ihex $< $@
@echo "Objcopy from ELF to IHEX complete!\n"
$(BINDIR)/$(BINBIN): $(BINDIR)/$(BINELF)
$(BINDIR)/$(BINBIN_F4): $(BINDIR)/$(BINELF_F4)
$(CP) -O binary $< $@
@echo "Objcopy from ELF to BINARY complete!\n"
$(BINDIR)/$(BINELF): $(OBJECTS)
$(CXX) $(OBJECTS) $(LDFLAGS) -o $@
$(BINDIR)/$(BINELF_F4): $(OBJ_F4)
$(CXX) $(OBJ_F4) $(LDFLAGS) -o $@
@echo "Linking complete!\n"
$(SIZE) $(BINDIR)/$(BINELF)
$(SIZE) $(BINDIR)/$(BINELF_F4)
%.o: %.cpp
$(BINDIR)/$(BINHEX_F7): $(BINDIR)/$(BINELF_F7)
$(CP) -O ihex $< $@
@echo "Objcopy from ELF to IHEX complete!\n"
$(BINDIR)/$(BINBIN_F7): $(BINDIR)/$(BINELF_F7)
$(CP) -O binary $< $@
@echo "Objcopy from ELF to BINARY complete!\n"
$(BINDIR)/$(BINELF_F7): $(OBJ_F7)
$(CXX) $(OBJ_F7) $(LDFLAGS) -o $@
@echo "Linking complete!\n"
$(SIZE) $(BINDIR)/$(BINELF_F7)
$(OBJDIR_F4)/%.o: $(MMDVM_PATH)/%.cpp
$(CXX) $(CXXFLAGS) $< -o $@
@echo "Compiled "$<"!\n"
%.o: %.c
$(OBJDIR_F7)/%.o: $(MMDVM_PATH)/%.cpp
$(CXX) $(CXXFLAGS) $< -o $@
@echo "Compiled "$<"!\n"
$(OBJDIR_F4)/%.o: $(STD_LIB_F4)/%.c
$(CC) $(CFLAGS) $< -o $@
@echo "Compiled "$<"!\n"
%.o: %.s
$(OBJDIR_F7)/%.o: $(STD_LIB_F7)/%.c
$(CC) $(CFLAGS) $< -o $@
@echo "Assambled "$<"!\n"
@echo "Compiled "$<"!\n"
$(OBJDIR_F4)/%.o: $(SYS_DIR_F4)/%.c
$(CC) $(CFLAGS) $< -o $@
@echo "Compiled "$<"!\n"
$(OBJDIR_F4)/%.o: $(STARTUP_DIR_F4)/%.c
$(CC) $(CFLAGS) $< -o $@
@echo "Compiled "$<"!\n"
$(OBJDIR_F7)/%.o: $(SYS_DIR_F7)/%.c
$(CC) $(CFLAGS) $< -o $@
@echo "Compiled "$<"!\n"
$(OBJDIR_F7)/%.o: $(STARTUP_DIR_F7)/%.c
$(CC) $(CFLAGS) $< -o $@
@echo "Compiled "$<"!\n"
clean:
$(CLEANCMD)
deploy:
ifneq ($(wildcard /usr/bin/openocd),)
/usr/bin/openocd -f /usr/share/openocd/scripts/board/stm32f4discovery.cfg -c "program bin/$(BINELF) verify reset exit"
/usr/bin/openocd -f /usr/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/share/openocd/scripts/target/stm32f4x.cfg -c "program bin/$(BINELF_F4) verify reset exit"
endif
ifneq ($(wildcard /usr/local/bin/openocd),)
/usr/local/bin/openocd -f /usr/local/share/openocd/scripts/board/stm32f4discovery.cfg -c "program bin/$(BINELF) verify reset exit"
/usr/local/bin/openocd -f /usr/local/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/local/share/openocd/scripts/target/stm32f4x.cfg -c "program bin/$(BINELF_F4) verify reset exit"
endif
ifneq ($(wildcard /opt/openocd/bin/openocd),)
/opt/openocd/bin/openocd -f /opt/openocd/share/openocd/scripts/board/stm32f4discovery.cfg -c "program bin/$(BINELF) verify reset exit"
/opt/openocd/bin/openocd -f /opt/openocd/share/openocd/scripts/interface/stlink-v2-1.cfg -f /opt/openocd/share/openocd/scripts/target/stm32f4x.cfg -c "program bin/$(BINELF_F4) verify reset exit"
endif
deploy-f7:
ifneq ($(wildcard /usr/bin/openocd),)
/usr/bin/openocd -f /usr/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/share/openocd/scripts/target/stm32f7x.cfg -c "program bin/$(BINELF_F7) verify reset exit"
endif
ifneq ($(wildcard /usr/local/bin/openocd),)
/usr/local/bin/openocd -f /usr/local/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/local/share/openocd/scripts/target/stm32f7x.cfg -c "program bin/$(BINELF_F7) verify reset exit"
endif
ifneq ($(wildcard /opt/openocd/bin/openocd),)
/opt/openocd/bin/openocd -f /opt/openocd/share/openocd/scripts/interface/stlink-v2-1.cfg -f /opt/openocd/share/openocd/scripts/target/stm32f7x.cfg -c "program bin/$(BINELF_F7) verify reset exit"
endif
deploy-pi:
ifneq ($(wildcard /usr/local/bin/stm32flash),)
-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-/usr/local/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F4)
/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R -c /dev/ttyAMA0
endif
ifneq ($(wildcard /usr/bin/stm32flash),)
-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-/usr/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F4)
/usr/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R -c /dev/ttyAMA0
endif
deploy-f4m: deploy-pi
deploy-pi-f7:
ifneq ($(wildcard /usr/local/bin/stm32flash),)
-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-/usr/local/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F7)
/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
endif
ifneq ($(wildcard /usr/bin/stm32flash),)
-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-/usr/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F7)
/usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
endif
# Export the current git version if the index file exists, else 000...
GitVersion.h:
ifdef SYSTEMROOT
echo #define GITVERSION "0000000" > $@
else ifdef SystemRoot
echo #define GITVERSION "0000000" > $@
else
ifneq ("$(wildcard .git/index)","")
echo "#define GITVERSION \"$(shell git rev-parse --short HEAD)\"" > $@
else
echo "#define GITVERSION \"0000000\"" > $@
endif
endif
+189
View File
@@ -0,0 +1,189 @@
#!/usr/bin/make
# makefile for the arduino due (works with arduino IDE 1.6.11)
#
# The original file can be found at https://github.com/pauldreik/arduino-due-makefile
#
# USAGE: put this file in the same dir as your .ino file is.
# configure the PORT variable and ADIR at the top of the file
# to match your local configuration.
# Type make upload to compile and upload.
#
#user specific settings:
#where to find the IDE
ADIR:=$(HOME)/.arduino15
#which serial port to use (add a file with SUBSYSTEMS=="usb",
#ATTRS{product}=="Arduino Due Prog. Port", ATTRS{idProduct}=="003d",
#ATTRS{idVendor}=="2341", SYMLINK+="arduino_due" in /etc/udev/rules.d/
#to get this working). Do not prefix the port with /dev/, just take
#the basename.
PORT:=ttyACM0
#if you want to verify the bossac upload, define this to -v
VERIFY:=-v
#end of user configuration.
#then some general settings. They should not be necessary to modify.
#CXX:=$(ADIR)/tools/g++_arm_none_eabi/bin/arm-none-eabi-g++
CXX:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-g++
#CC:=$(ADIR)/tools/g++_arm_none_eabi/bin/arm-none-eabi-gcc
CC:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-gcc
OBJCOPY:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-objcopy
C:=$(CC)
#SAM:=arduino/sam/
SAM:=$(ADIR)/packages/arduino/hardware/sam/1.6.11
#CMSIS:=arduino/sam/system/CMSIS/
#LIBSAM:=arduino/sam/system/libsam
TMPDIR:=$(PWD)/build
AR:=$(ADIR)/tools/g++_arm_none_eabi/bin/arm-none-eabi-ar
AR:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-ar
#all these values are hard coded and should maybe be configured somehow else,
#like olikraus does in his makefile.
DEFINES:=-Dprintf=iprintf -DF_CPU=84000000 -DARDUINO=10611 -D__SAM3X8E__ -DUSB_PID=0x003e -DUSB_VID=0x2341 -DUSBCON \
-DARDUINO_SAM_DUE -DARDUINO_ARCH_SAM '-DUSB_MANUFACTURER="Arduino LLC"' '-DUSB_PRODUCT="Arduino Due"' \
-DMADEBYMAKEFILE
INCLUDES:=-I$(SAM)/system/libsam -I$(SAM)/system/CMSIS/CMSIS/Include/ \
-I$(SAM)/system/CMSIS/Device/ATMEL/ -I$(SAM)/cores/arduino \
-I$(SAM)/variants/arduino_due_x
#also include the current dir for convenience
INCLUDES += -I.
#compilation flags common to both c and c++
COMMON_FLAGS:=-g -Os -w -ffunction-sections -fdata-sections -nostdlib \
--param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb \
-fno-threadsafe-statics
#for compiling c (do not warn, this is not our code)
CFLAGS:=$(COMMON_FLAGS) -std=gnu11
#for compiling c++
CXXFLAGS:=$(COMMON_FLAGS) -fno-rtti -fno-exceptions -std=gnu++11 -Wall -Wextra
#let the results be named after the project
PROJNAME:=$(shell basename *.ino .ino)
#we will make a new mainfile from the ino file.
NEWMAINFILE:=$(TMPDIR)/$(PROJNAME).ino.cpp
#our own sourcefiles is the (converted) ino file and any local cpp files
MYSRCFILES:=$(NEWMAINFILE) $(shell ls *.cpp 2>/dev/null)
MYOBJFILES:=$(addsuffix .o,$(addprefix $(TMPDIR)/,$(notdir $(MYSRCFILES))))
#These source files are the ones forming core.a
CORESRCXX:=$(shell ls ${SAM}/cores/arduino/*.cpp ${SAM}/cores/arduino/USB/*.cpp ${SAM}/variants/arduino_due_x/variant.cpp)
CORESRC:=$(shell ls ${SAM}/cores/arduino/*.c)
#hey this one is needed too: $(SAM)/cores/arduino/wiring_pulse_asm.S" add -x assembler-with-cpp
#and this one: /1.6.11/cores/arduino/avr/dtostrf.c but it seems to work
#anyway, probably because I do not use that functionality.
#convert the core source files to object files. assume no clashes.
COREOBJSXX:=$(addprefix $(TMPDIR)/core/,$(notdir $(CORESRCXX)) )
COREOBJSXX:=$(addsuffix .o,$(COREOBJSXX))
COREOBJS:=$(addprefix $(TMPDIR)/core/,$(notdir $(CORESRC)) )
COREOBJS:=$(addsuffix .o,$(COREOBJS))
default:
@echo default rule, does nothing. Try make compile or make upload.
#This rule is good to just make sure stuff compiles, without having to wait
#for bossac.
compile: GitVersion.h $(TMPDIR)/$(PROJNAME).elf $(TMPDIR)/$(PROJNAME).bin
#This is a make rule template to create object files from the source files.
# arg 1=src file
# arg 2=object file
# arg 3= XX if c++, empty if c
define OBJ_template
$(2): $(1)
$(C$(3)) -MD -c $(C$(3)FLAGS) $(DEFINES) $(INCLUDES) $(1) -o $(2)
endef
#now invoke the template both for c++ sources
$(foreach src,$(CORESRCXX), $(eval $(call OBJ_template,$(src),$(addsuffix .o,$(addprefix $(TMPDIR)/core/,$(notdir $(src)))),XX) ) )
#...and for c sources:
$(foreach src,$(CORESRC), $(eval $(call OBJ_template,$(src),$(addsuffix .o,$(addprefix $(TMPDIR)/core/,$(notdir $(src)))),) ) )
#and our own c++ sources
$(foreach src,$(MYSRCFILES), $(eval $(call OBJ_template,$(src),$(addsuffix .o,$(addprefix $(TMPDIR)/,$(notdir $(src)))),XX) ) )
clean:
test ! -d $(TMPDIR) || rm -rf $(TMPDIR)
$(RM) GitVersion.h
.PHONY: .FORCE upload default
$(TMPDIR):
mkdir -p $(TMPDIR)
$(TMPDIR)/core:
mkdir -p $(TMPDIR)/core
#creates the cpp file from the .ino file
$(NEWMAINFILE): $(PROJNAME).ino
cat $(SAM)/cores/arduino/main.cpp > $(NEWMAINFILE)
cat $(PROJNAME).ino >> $(NEWMAINFILE)
echo 'extern "C" void __cxa_pure_virtual() {while (true);}' >> $(NEWMAINFILE)
#include the dependencies for our own files
-include $(MYOBJFILES:.o=.d)
#create the core library from the core objects. Do this EXACTLY as the
#arduino IDE does it, seems *really* picky about this.
#Sorry for the hard coding.
$(TMPDIR)/core.a: $(TMPDIR)/core $(COREOBJS) $(COREOBJSXX)
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_shift.c.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_analog.c.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/itoa.c.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/cortex_handlers.c.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/hooks.c.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring.c.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/WInterrupts.c.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/syscalls_sam3.c.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/iar_calls_sam3.c.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_digital.c.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/Print.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/USARTClass.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/WString.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/PluggableUSB.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/USBCore.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/CDC.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_pulse.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/UARTClass.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/main.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/new.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/watchdog.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/Stream.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/RingBuffer.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/IPAddress.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/Reset.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/WMath.cpp.o
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/variant.cpp.o
#link our own object files with core to form the elf file
$(TMPDIR)/$(PROJNAME).elf: $(TMPDIR)/core.a $(TMPDIR)/core/syscalls_sam3.c.o $(MYOBJFILES)
$(CC) -mcpu=cortex-m3 -mthumb -Os -Wl,--gc-sections -T$(SAM)/variants/arduino_due_x/linker_scripts/gcc/flash.ld -Wl,-Map,$(NEWMAINFILE).map -o $@ -L$(TMPDIR) -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group -u _sbrk -u link -u _close -u _fstat -u _isatty -u _lseek -u _read -u _write -u _exit -u kill -u _getpid $(MYOBJFILES) $(TMPDIR)/core/variant.cpp.o $(SAM)/variants/arduino_due_x/libsam_sam3x8e_gcc_rel.a $(SAM)/system/CMSIS/CMSIS/Lib/GCC/libarm_cortexM3l_math.a $(TMPDIR)/core.a -Wl,--end-group -lm -gcc
#copy from the hex to our bin file (why?)
$(TMPDIR)/$(PROJNAME).bin: $(TMPDIR)/$(PROJNAME).elf
$(OBJCOPY) -O binary $< $@
#upload to the arduino by first resetting it (stty) and the running bossac
upload: compile
stty -F /dev/$(PORT) cs8 1200 hupcl
$(ADIR)/packages/arduino/tools/bossac/1.6.1-arduino/bossac -i --port=$(PORT) -U false -e -w $(VERIFY) -b $(TMPDIR)/$(PROJNAME).bin -R
# Export the current git version if the index file exists, else 000...
GitVersion.h: .FORCE
ifneq ("$(wildcard .git/index)","")
echo "#define GITVERSION \"$(shell git rev-parse --short HEAD)\"" > $@
else
echo "#define GITVERSION \"0000000\"" > $@
endif
.FORCE:
+151
View File
@@ -0,0 +1,151 @@
# The name for the project
TARGET:=mmdvm
# The CPU architecture (will be used for -mcpu)
MCPU:=cortex-m3
MCU:=STM32F105xC
# The source files of the project
CSRC:=
CXXSRC:=$(wildcard *.cpp)
# Include directory for the system include files and system source file
SYSDIR:=system_stm32f1xx
SYSSRC:=$(SYSDIR)/system_stm32f1xx.c
# Other include directories
INCDIR:=
# Definitions
CDEFS:=
CXXDEFS:=
# The name of the startup file which matches to the architecture (MCPU)
STARTUP:=$(SYSDIR)/startup_stm32f105xc.S
STARTUP_DEFS=
# Include directory for CMSIS
CMSISDIR:=/opt/STM32Cube_FW_F1_V1.4.0/Drivers/CMSIS
# Libraries
LIBDIR:=
LIBS:=-larm_cortexM3l_math
# Name of the linker script
LDSCRIPT:=$(SYSDIR)/gcc.ld
# Target objects and binaries directory
OBJDIR:=obj
BINDIR:=bin
# Port definition for programming via bootloader (using stm32flash)
BL_PORT:=ttyUSB0
# Internal Variables
ELF:=$(BINDIR)/$(TARGET).elf
HEX:=$(BINDIR)/$(TARGET).hex
DIS:=$(BINDIR)/$(TARGET).dis
MAP:=$(BINDIR)/$(TARGET).map
OBJ:=$(CSRC:%.c=$(OBJDIR)/%.o) $(CXXSRC:%.cpp=$(OBJDIR)/%.o)
OBJ+=$(SYSSRC:$(SYSDIR)/%.c=$(OBJDIR)/%.o) $(STARTUP:$(SYSDIR)/%.S=$(OBJDIR)/%.o)
# Replace standard build tools by arm tools
CC:=arm-none-eabi-gcc
CXX:=arm-none-eabi-g++
AS:=arm-none-eabi-gcc
LD:=arm-none-eabi-g++
OBJCOPY:=arm-none-eabi-objcopy
OBJDUMP:=arm-none-eabi-objdump
SIZE:=arm-none-eabi-size
# Common flags
COMMON_FLAGS =-mthumb -mlittle-endian -mcpu=$(MCPU)
COMMON_FLAGS+= -Wall
COMMON_FLAGS+= -I. -I$(CMSISDIR)/Include -I$(CMSISDIR)/Device/ST/STM32F1xx/Include -I$(SYSDIR)
COMMON_FLAGS+= $(addprefix -I,$(INCDIR))
COMMON_FLAGS+= -D$(MCU)
COMMON_FLAGS+= -Os -flto -ffunction-sections -fdata-sections
COMMON_FLAGS+= -g
# Assembler flags
ASFLAGS:=$(COMMON_FLAGS)
# C flags
CFLAGS:=$(COMMON_FLAGS) $(addprefix -D,$(CDEFS))
CFLAGS+= -std=gnu11 -nostdlib
# CXX flags
CXXFLAGS:=$(COMMON_FLAGS) $(addprefix -D,$(CXXDEFS))
CXXFLAGS+= -nostdlib -fno-exceptions -fno-rtti
# LD flags
LDFLAGS:=$(COMMON_FLAGS) -Wl,--gc-sections -Wl,-Map=$(MAP) -Wl,--no-wchar-size-warning
LDFLAGS+= --specs=nosys.specs --specs=nano.specs
LDFLAGS+= -L$(CMSISDIR)/Lib/GCC/ $(addprefix -L,$(LIBDIR))
LDLIBS:=-T$(LDSCRIPT) $(LIBS)
# Dependecies
DEPENDS:=$(CSRC:%.c=$(OBJDIR)/%.d) $(CXXSRC:%.cpp=$(OBJDIR)/%.d)
# Additional Suffixes
.SUFFIXES: .elf .hex
# Targets
.PHONY: all
all: $(DIS) $(HEX)
$(SIZE) $(ELF)
.PHONY: program
program: $(HEX) $(ELF)
openocd -f openocd.cfg \
-c "program $(HEX) verify reset exit"
$(SIZE) $(ELF)
.PHONY: program_bl
program_bl: $(HEX) $(ELF)
stm32flash -w $(HEX) -v /dev/$(BL_PORT)
$(SIZE) $(ELF)
.PHONY: run
run: $(HEX) $(ELF)
openocd -f openocd.cfg \
-c "init" -c "reset" -c "exit"
.PHONY: debug
debug: $(ELF)
./debug.sh $(ELF)
.PHONY: clean
clean:
$(RM) $(OBJ) $(HEX) $(ELF) $(DIS) $(MAP) $(DEPENDS)
# implicit rules
.elf.hex:
$(OBJCOPY) -O ihex $< $@
$(OBJDIR)/%.o: %.c
$(CC) -MMD $(CFLAGS) -c $< -o $@
$(OBJDIR)/%.o: %.cpp
$(CXX) -MMD $(CXXFLAGS) -c $< -o $@
$(OBJDIR)/%.o: $(SYSDIR)/%.c
$(CC) $(CFLAGS) -c $< -o $@
$(OBJDIR)/%.o: $(SYSDIR)/%.S
$(AS) $(ASFLAGS) -c $< -o $@
# explicit rules
$(OBJDIR):
mkdir -p $(OBJDIR)
$(BINDIR):
mkdir -p $(BINDIR)
$(ELF): $(OBJDIR) $(BINDIR) $(OBJ)
$(LD) $(OBJ) $(LDFLAGS) $(LDLIBS) -o $@
$(DIS): $(ELF)
$(OBJDUMP) -S $< > $@
# include dependecies
-include $(DEPENDS)
+12 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2016 by Jonathan Naylor G4KLX
* Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,30 +19,36 @@
#if !defined(P25DEFINES_H)
#define P25DEFINES_H
const unsigned int P25_RADIO_SYMBOL_LENGTH = 5U; // At 24 kHz sample rate
const unsigned int P25_RADIO_SYMBOL_LENGTH = 10U; // At 48 kHz sample rate
const unsigned int P25_HDR_FRAME_LENGTH_BYTES = 99U;
const unsigned int P25_HDR_FRAME_LENGTH_BITS = P25_HDR_FRAME_LENGTH_BYTES * 8U;
const unsigned int P25_HDR_FRAME_LENGTH_SYMBOLS = P25_HDR_FRAME_LENGTH_BYTES * 4U;
const unsigned int P25_HDR_FRAME_LENGTH_SAMPLES = P25_HDR_FRAME_LENGTH_SYMBOLS * P25_RADIO_SYMBOL_LENGTH;
const unsigned int P25_LDU_FRAME_LENGTH_BYTES = 216U;
const unsigned int P25_LDU_FRAME_LENGTH_BITS = P25_LDU_FRAME_LENGTH_BYTES * 8U;
const unsigned int P25_LDU_FRAME_LENGTH_SYMBOLS = P25_LDU_FRAME_LENGTH_BYTES * 4U;
const unsigned int P25_LDU_FRAME_LENGTH_SAMPLES = P25_LDU_FRAME_LENGTH_SYMBOLS * P25_RADIO_SYMBOL_LENGTH;
const unsigned int P25_TERMLC_FRAME_LENGTH_BYTES = 54U;
const unsigned int P25_TERMLC_FRAME_LENGTH_BITS = P25_TERMLC_FRAME_LENGTH_BYTES * 8U;
const unsigned int P25_TERMLC_FRAME_LENGTH_SYMBOLS = P25_TERMLC_FRAME_LENGTH_BYTES * 4U;
const unsigned int P25_TERMLC_FRAME_LENGTH_SAMPLES = P25_TERMLC_FRAME_LENGTH_SYMBOLS * P25_RADIO_SYMBOL_LENGTH;
const unsigned int P25_TERM_FRAME_LENGTH_BYTES = 18U;
const unsigned int P25_TERM_FRAME_LENGTH_BITS = P25_TERM_FRAME_LENGTH_BYTES * 8U;
const unsigned int P25_TERM_FRAME_LENGTH_SYMBOLS = P25_TERM_FRAME_LENGTH_BYTES * 4U;
const unsigned int P25_TERM_FRAME_LENGTH_SAMPLES = P25_TERM_FRAME_LENGTH_SYMBOLS * P25_RADIO_SYMBOL_LENGTH;
const unsigned int P25_SYNC_LENGTH_BYTES = 6U;
const unsigned int P25_SYNC_LENGTH_BITS = P25_SYNC_LENGTH_BYTES * 8U;
const unsigned int P25_SYNC_LENGTH_SYMBOLS = P25_SYNC_LENGTH_BYTES * 4U;
const unsigned int P25_SYNC_LENGTH_SAMPLES = P25_SYNC_LENGTH_SYMBOLS * P25_RADIO_SYMBOL_LENGTH;
const unsigned int P25_NID_LENGTH_BITS = 64U;
const unsigned int P25_NID_LENGTH_SYMBOLS = 32U;
const unsigned int P25_NID_LENGTH_BITS = 64U;
const unsigned int P25_NID_LENGTH_SYMBOLS = 32U;
const unsigned int P25_NID_LENGTH_SAMPLESS = P25_NID_LENGTH_SYMBOLS * P25_RADIO_SYMBOL_LENGTH;
const uint8_t P25_SYNC_BYTES[] = {0x55U, 0x75U, 0xF5U, 0xFFU, 0x77U, 0xFFU};
const uint8_t P25_SYNC_BYTES_LENGTH = 6U;
@@ -54,6 +60,8 @@ const uint64_t P25_SYNC_BITS_MASK = 0x0000FFFFFFFFFFFFU;
// 01 01 01 01 01 11 01 01 11 11 01 01 11 11 11 11 01 11 01 11 11 11 11 11
// +3 +3 +3 +3 +3 -3 +3 +3 -3 -3 +3 +3 -3 -3 -3 -3 +3 -3 +3 -3 -3 -3 -3 -3
const int8_t P25_SYNC_SYMBOLS_VALUES[] = {+3, +3, +3, +3, +3, -3, +3, +3, -3, -3, +3, +3, -3, -3, -3, -3, +3, -3, +3, -3, -3, -3, -3, -3};
const uint32_t P25_SYNC_SYMBOLS = 0x00FB30A0U;
const uint32_t P25_SYNC_SYMBOLS_MASK = 0x00FFFFFFU;
+384 -180
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2016 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -16,227 +16,213 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
// #define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#include "P25RX.h"
#include "Utils.h"
const unsigned int BUFFER_LENGTH = 200U;
const q15_t SCALING_FACTOR = 18750; // Q15(0.57)
const q15_t SCALING_FACTOR = 18750; // Q15(0.55)
const uint8_t MAX_SYNC_BIT_START_ERRS = 2U;
const uint8_t MAX_SYNC_BIT_RUN_ERRS = 4U;
const uint32_t PLLMAX = 0x10000U;
const uint32_t PLLINC = PLLMAX / P25_RADIO_SYMBOL_LENGTH;
const uint32_t INC = PLLINC / 32U;
const uint8_t MAX_SYNC_SYMBOLS_ERRS = 2U;
const uint8_t SYNC_SYMBOL_ERRS = 0U;
const uint8_t SYNC_BIT_START_ERRS = 2U;
const uint8_t SYNC_BIT_RUN_ERRS = 4U;
const unsigned int MAX_SYNC_FRAMES = 3U + 1U;
const uint8_t BIT_MASK_TABLE[] = {0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U};
const uint8_t BIT_MASK_TABLE[] = { 0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U };
#define WRITE_BIT1(p,i,b) p[(i)>>3] = (b) ? (p[(i)>>3] | BIT_MASK_TABLE[(i)&7]) : (p[(i)>>3] & ~BIT_MASK_TABLE[(i)&7])
#define READ_BIT1(p,i) (p[(i)>>3] & BIT_MASK_TABLE[(i)&7])
const uint8_t NOAVEPTR = 99U;
const uint16_t NOENDPTR = 9999U;
const unsigned int MAX_SYNC_FRAMES = 4U + 1U;
CP25RX::CP25RX() :
m_pll(0U),
m_prev(false),
m_state(P25RXS_NONE),
m_bitBuffer(0x00U),
m_symbols(),
m_outBuffer(),
m_buffer(NULL),
m_bufferPtr(0U),
m_symbolPtr(0U),
m_bitBuffer(),
m_buffer(),
m_bitPtr(0U),
m_dataPtr(0U),
m_hdrStartPtr(NOENDPTR),
m_lduStartPtr(NOENDPTR),
m_lduEndPtr(NOENDPTR),
m_minSyncPtr(NOENDPTR),
m_maxSyncPtr(NOENDPTR),
m_hdrSyncPtr(NOENDPTR),
m_lduSyncPtr(NOENDPTR),
m_maxCorr(0),
m_lostCount(0U),
m_centre(0),
m_threshold(0)
m_countdown(0U),
m_centre(),
m_centreVal(0),
m_threshold(),
m_thresholdVal(0),
m_averagePtr(NOAVEPTR),
m_rssiAccum(0U),
m_rssiCount(0U)
{
m_buffer = m_outBuffer + 1U;
}
void CP25RX::reset()
{
m_pll = 0U;
m_prev = false;
m_state = P25RXS_NONE;
m_bitBuffer = 0x00U;
m_bufferPtr = 0U;
m_symbolPtr = 0U;
m_lostCount = 0U;
m_centre = 0;
m_threshold = 0;
m_state = P25RXS_NONE;
m_dataPtr = 0U;
m_bitPtr = 0U;
m_maxCorr = 0;
m_averagePtr = NOAVEPTR;
m_hdrStartPtr = NOENDPTR;
m_lduStartPtr = NOENDPTR;
m_lduEndPtr = NOENDPTR;
m_hdrSyncPtr = NOENDPTR;
m_lduSyncPtr = NOENDPTR;
m_minSyncPtr = NOENDPTR;
m_maxSyncPtr = NOENDPTR;
m_centreVal = 0;
m_thresholdVal = 0;
m_lostCount = 0U;
m_countdown = 0U;
m_rssiAccum = 0U;
m_rssiCount = 0U;
}
void CP25RX::samples(const q15_t* samples, uint8_t length)
void CP25RX::samples(const q15_t* samples, uint16_t* rssi, uint8_t length)
{
for (uint16_t i = 0U; i < length; i++) {
bool bit = samples[i] < 0;
for (uint8_t i = 0U; i < length; i++) {
q15_t sample = samples[i];
if (bit != m_prev) {
if (m_pll < (PLLMAX / 2U))
m_pll += INC;
else
m_pll -= INC;
m_rssiAccum += rssi[i];
m_rssiCount++;
m_bitBuffer[m_bitPtr] <<= 1;
if (sample < 0)
m_bitBuffer[m_bitPtr] |= 0x01U;
m_buffer[m_dataPtr] = sample;
switch (m_state) {
case P25RXS_HDR:
processHdr(sample);
break;
case P25RXS_LDU:
processLdu(sample);
break;
default:
processNone(sample);
break;
}
m_prev = bit;
m_dataPtr++;
if (m_dataPtr >= P25_LDU_FRAME_LENGTH_SAMPLES)
m_dataPtr = 0U;
m_pll += PLLINC;
if (m_pll >= PLLMAX) {
m_pll -= PLLMAX;
if (m_state == P25RXS_NONE)
processNone(samples[i]);
else
processData(samples[i]);
}
m_bitPtr++;
if (m_bitPtr >= P25_RADIO_SYMBOL_LENGTH)
m_bitPtr = 0U;
}
}
void CP25RX::processNone(q15_t sample)
{
m_symbolBuffer <<= 1;
if (sample < 0)
m_symbolBuffer |= 0x01U;
m_symbols[m_symbolPtr] = sample;
// Fuzzy matching of the data sync bit sequence
if (countBits32((m_symbolBuffer & P25_SYNC_SYMBOLS_MASK) ^ P25_SYNC_SYMBOLS) <= SYNC_SYMBOL_ERRS) {
q15_t max = -16000;
q15_t min = 16000;
for (uint8_t i = 0U; i < P25_SYNC_LENGTH_SYMBOLS; i++) {
q15_t val = m_symbols[i];
if (val > max)
max = val;
if (val < min)
min = val;
}
q15_t centre = (max + min) >> 1;
q31_t v1 = (max - centre) * SCALING_FACTOR;
q15_t threshold = q15_t(v1 >> 15);
uint16_t ptr = m_symbolPtr + 1U;
if (ptr >= P25_SYNC_LENGTH_SYMBOLS)
ptr = 0U;
for (uint8_t i = 0U; i < P25_SYNC_LENGTH_SYMBOLS; i++) {
q15_t sample = m_symbols[ptr] - centre;
if (sample < -threshold) {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x01U;
} else if (sample < 0) {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x00U;
} else if (sample < threshold) {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x02U;
} else {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x03U;
}
ptr++;
if (ptr >= P25_SYNC_LENGTH_SYMBOLS)
ptr = 0U;
}
// Fuzzy matching of the data sync bit sequence
if (countBits64((m_bitBuffer & P25_SYNC_BITS_MASK) ^ P25_SYNC_BITS) <= SYNC_BIT_START_ERRS) {
DEBUG5("P25RX: sync found in None min/max/centre/threshold", min, max, centre, threshold);
for (uint8_t i = 0U; i < P25_SYNC_LENGTH_BYTES; i++)
m_buffer[i] = P25_SYNC_BYTES[i];
m_centre = centre;
m_threshold = threshold;
m_lostCount = MAX_SYNC_FRAMES;
m_bufferPtr = P25_SYNC_LENGTH_BITS;
m_state = P25RXS_DATA;
bool ret = correlateSync();
if (ret) {
// On the first sync, start the countdown to the state change
if (m_countdown == 0U) {
m_rssiAccum = 0U;
m_rssiCount = 0U;
io.setDecode(true);
io.setADCDetection(true);
m_averagePtr = NOAVEPTR;
m_countdown = 5U;
}
}
m_symbolPtr++;
if (m_symbolPtr >= P25_SYNC_LENGTH_SYMBOLS)
m_symbolPtr = 0U;
if (m_countdown > 0U)
m_countdown--;
if (m_countdown == 1U) {
// These are the sync positions for the following LDU after a HDR
m_minSyncPtr = m_hdrSyncPtr + P25_HDR_FRAME_LENGTH_SAMPLES - 1U;
if (m_minSyncPtr >= P25_LDU_FRAME_LENGTH_SAMPLES)
m_minSyncPtr -= P25_LDU_FRAME_LENGTH_SAMPLES;
m_maxSyncPtr = m_hdrSyncPtr + P25_HDR_FRAME_LENGTH_SAMPLES + 1U;
if (m_maxSyncPtr >= P25_LDU_FRAME_LENGTH_SAMPLES)
m_maxSyncPtr -= P25_LDU_FRAME_LENGTH_SAMPLES;
m_state = P25RXS_HDR;
m_countdown = 0U;
}
}
void CP25RX::processData(q15_t sample)
void CP25RX::processHdr(q15_t sample)
{
sample -= m_centre;
if (sample < -m_threshold) {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x01U;
WRITE_BIT1(m_buffer, m_bufferPtr, false);
m_bufferPtr++;
WRITE_BIT1(m_buffer, m_bufferPtr, true);
m_bufferPtr++;
} else if (sample < 0) {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x00U;
WRITE_BIT1(m_buffer, m_bufferPtr, false);
m_bufferPtr++;
WRITE_BIT1(m_buffer, m_bufferPtr, false);
m_bufferPtr++;
} else if (sample < m_threshold) {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x02U;
WRITE_BIT1(m_buffer, m_bufferPtr, true);
m_bufferPtr++;
WRITE_BIT1(m_buffer, m_bufferPtr, false);
m_bufferPtr++;
if (m_minSyncPtr < m_maxSyncPtr) {
if (m_dataPtr >= m_minSyncPtr && m_dataPtr <= m_maxSyncPtr)
correlateSync();
} else {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x03U;
WRITE_BIT1(m_buffer, m_bufferPtr, true);
m_bufferPtr++;
WRITE_BIT1(m_buffer, m_bufferPtr, true);
m_bufferPtr++;
if (m_dataPtr >= m_minSyncPtr || m_dataPtr <= m_maxSyncPtr)
correlateSync();
}
// Search for an early sync to indicate an LDU following a header
if (m_bufferPtr >= (P25_HDR_FRAME_LENGTH_BITS + P25_SYNC_LENGTH_BITS - 1U) && m_bufferPtr <= (P25_HDR_FRAME_LENGTH_BITS + P25_SYNC_LENGTH_BITS + 1U)) {
// Fuzzy matching of the data sync bit sequence
if (countBits64((m_bitBuffer & P25_SYNC_BITS_MASK) ^ P25_SYNC_BITS) <= SYNC_BIT_RUN_ERRS) {
DEBUG2("P25RX: found LDU sync in Data, pos", m_bufferPtr - P25_SYNC_LENGTH_BITS);
if (m_dataPtr == m_maxSyncPtr) {
if (m_hdrSyncPtr != m_lduSyncPtr) {
calculateLevels(m_hdrStartPtr, P25_HDR_FRAME_LENGTH_SYMBOLS);
m_outBuffer[0U] = 0x01U;
serial.writeP25Hdr(m_outBuffer, P25_HDR_FRAME_LENGTH_BYTES + 1U);
DEBUG4("P25RX: sync found in Hdr pos/centre/threshold", m_hdrSyncPtr, m_centreVal, m_thresholdVal);
// Restore the sync that's now in the wrong place
for (uint8_t i = 0U; i < P25_SYNC_LENGTH_BYTES; i++)
m_buffer[i] = P25_SYNC_BYTES[i];
uint8_t frame[P25_HDR_FRAME_LENGTH_BYTES + 1U];
samplesToBits(m_hdrStartPtr, P25_HDR_FRAME_LENGTH_SYMBOLS, frame, 8U, m_centreVal, m_thresholdVal);
m_lostCount = MAX_SYNC_FRAMES;
m_bufferPtr = P25_SYNC_LENGTH_BITS;
frame[0U] = 0x01U;
serial.writeP25Hdr(frame, P25_HDR_FRAME_LENGTH_BYTES + 1U);
}
m_minSyncPtr = m_lduSyncPtr + P25_LDU_FRAME_LENGTH_SAMPLES - 1U;
if (m_minSyncPtr >= P25_LDU_FRAME_LENGTH_SAMPLES)
m_minSyncPtr -= P25_LDU_FRAME_LENGTH_SAMPLES;
m_maxSyncPtr = m_lduSyncPtr + 1U;
if (m_maxSyncPtr >= P25_LDU_FRAME_LENGTH_SAMPLES)
m_maxSyncPtr -= P25_LDU_FRAME_LENGTH_SAMPLES;
m_state = P25RXS_LDU;
m_maxCorr = 0;
}
}
void CP25RX::processLdu(q15_t sample)
{
if (m_minSyncPtr < m_maxSyncPtr) {
if (m_dataPtr >= m_minSyncPtr && m_dataPtr <= m_maxSyncPtr)
correlateSync();
} else {
if (m_dataPtr >= m_minSyncPtr || m_dataPtr <= m_maxSyncPtr)
correlateSync();
}
// Only search for a sync in the right place +-2 symbols
if (m_bufferPtr >= (P25_SYNC_LENGTH_BITS - 2U) && m_bufferPtr <= (P25_SYNC_LENGTH_BITS + 2U)) {
// Fuzzy matching of the data sync bit sequence
if (countBits64((m_bitBuffer & P25_SYNC_BITS_MASK) ^ P25_SYNC_BITS) <= SYNC_BIT_RUN_ERRS) {
DEBUG2("P25RX: found sync in Data, pos", m_bufferPtr - P25_SYNC_LENGTH_BITS);
m_lostCount = MAX_SYNC_FRAMES;
m_bufferPtr = P25_SYNC_LENGTH_BITS;
if (m_dataPtr == m_lduEndPtr) {
// Only update the centre and threshold if they are from a good sync
if (m_lostCount == MAX_SYNC_FRAMES) {
m_minSyncPtr = m_lduSyncPtr + P25_LDU_FRAME_LENGTH_SAMPLES - 1U;
if (m_minSyncPtr >= P25_LDU_FRAME_LENGTH_SAMPLES)
m_minSyncPtr -= P25_LDU_FRAME_LENGTH_SAMPLES;
m_maxSyncPtr = m_lduSyncPtr + 1U;
if (m_maxSyncPtr >= P25_LDU_FRAME_LENGTH_SAMPLES)
m_maxSyncPtr -= P25_LDU_FRAME_LENGTH_SAMPLES;
}
}
// Send a data frame to the host if the required number of bits have been received
if (m_bufferPtr == P25_LDU_FRAME_LENGTH_BITS) {
calculateLevels(m_lduStartPtr, P25_LDU_FRAME_LENGTH_SYMBOLS);
DEBUG4("P25RX: sync found in Ldu pos/centre/threshold", m_lduSyncPtr, m_centreVal, m_thresholdVal);
uint8_t frame[P25_LDU_FRAME_LENGTH_BYTES + 3U];
samplesToBits(m_lduStartPtr, P25_LDU_FRAME_LENGTH_SYMBOLS, frame, 8U, m_centreVal, m_thresholdVal);
// We've not seen a data sync for too long, signal RXLOST and change to RX_NONE
m_lostCount--;
if (m_lostCount == 0U) {
@@ -247,16 +233,234 @@ void CP25RX::processData(q15_t sample)
serial.writeP25Lost();
m_state = P25RXS_NONE;
} else {
m_outBuffer[0U] = m_lostCount == (MAX_SYNC_FRAMES - 1U) ? 0x01U : 0x00U;
serial.writeP25Ldu(m_outBuffer, P25_LDU_FRAME_LENGTH_BYTES + 1U);
// Start the next frame
::memset(m_outBuffer, 0x00U, P25_LDU_FRAME_LENGTH_BYTES + 3U);
m_bufferPtr = 0U;
m_state = P25RXS_NONE;
m_lduEndPtr = NOENDPTR;
m_averagePtr = NOAVEPTR;
m_countdown = 0U;
m_maxCorr = 0;
} else {
frame[0U] = m_lostCount == (MAX_SYNC_FRAMES - 1U) ? 0x01U : 0x00U;
writeRSSILdu(frame);
m_maxCorr = 0;
}
}
}
bool CP25RX::correlateSync()
{
if (countBits32((m_bitBuffer[m_bitPtr] & P25_SYNC_SYMBOLS_MASK) ^ P25_SYNC_SYMBOLS) <= MAX_SYNC_SYMBOLS_ERRS) {
uint16_t ptr = m_dataPtr + P25_LDU_FRAME_LENGTH_SAMPLES - P25_SYNC_LENGTH_SAMPLES + P25_RADIO_SYMBOL_LENGTH;
if (ptr >= P25_LDU_FRAME_LENGTH_SAMPLES)
ptr -= P25_LDU_FRAME_LENGTH_SAMPLES;
q31_t corr = 0;
q15_t min = 16000;
q15_t max = -16000;
for (uint8_t i = 0U; i < P25_SYNC_LENGTH_SYMBOLS; i++) {
q15_t val = m_buffer[ptr];
if (val > max)
max = val;
if (val < min)
min = val;
switch (P25_SYNC_SYMBOLS_VALUES[i]) {
case +3:
corr -= (val + val + val);
break;
case +1:
corr -= val;
break;
case -1:
corr += val;
break;
default: // -3
corr += (val + val + val);
break;
}
ptr += P25_RADIO_SYMBOL_LENGTH;
if (ptr >= P25_LDU_FRAME_LENGTH_SAMPLES)
ptr -= P25_LDU_FRAME_LENGTH_SAMPLES;
}
if (corr > m_maxCorr) {
if (m_averagePtr == NOAVEPTR) {
m_centreVal = (max + min) >> 1;
q31_t v1 = (max - m_centreVal) * SCALING_FACTOR;
m_thresholdVal = q15_t(v1 >> 15);
}
uint16_t startPtr = m_dataPtr + P25_LDU_FRAME_LENGTH_SAMPLES - P25_SYNC_LENGTH_SAMPLES + P25_RADIO_SYMBOL_LENGTH;
if (startPtr >= P25_LDU_FRAME_LENGTH_SAMPLES)
startPtr -= P25_LDU_FRAME_LENGTH_SAMPLES;
uint8_t sync[P25_SYNC_BYTES_LENGTH];
samplesToBits(startPtr, P25_SYNC_LENGTH_SYMBOLS, sync, 0U, m_centreVal, m_thresholdVal);
uint8_t maxErrs;
if (m_state == P25RXS_NONE)
maxErrs = MAX_SYNC_BIT_START_ERRS;
else
maxErrs = MAX_SYNC_BIT_RUN_ERRS;
uint8_t errs = 0U;
for (uint8_t i = 0U; i < P25_SYNC_BYTES_LENGTH; i++)
errs += countBits8(sync[i] ^ P25_SYNC_BYTES[i]);
if (errs <= maxErrs) {
m_maxCorr = corr;
m_lostCount = MAX_SYNC_FRAMES;
m_lduSyncPtr = m_dataPtr;
// These are the positions of the start and end of an LDU
m_lduStartPtr = startPtr;
m_lduEndPtr = m_dataPtr + P25_LDU_FRAME_LENGTH_SAMPLES - P25_SYNC_LENGTH_SAMPLES - 1U;
if (m_lduEndPtr >= P25_LDU_FRAME_LENGTH_SAMPLES)
m_lduEndPtr -= P25_LDU_FRAME_LENGTH_SAMPLES;
if (m_state == P25RXS_NONE) {
m_hdrSyncPtr = m_dataPtr;
// This is the position of the start of a HDR
m_hdrStartPtr = startPtr;
// These are the range of positions for a sync for an LDU following a HDR
m_minSyncPtr = m_dataPtr + P25_HDR_FRAME_LENGTH_SAMPLES - 1U;
if (m_minSyncPtr >= P25_LDU_FRAME_LENGTH_SAMPLES)
m_minSyncPtr -= P25_LDU_FRAME_LENGTH_SAMPLES;
m_maxSyncPtr = m_dataPtr + P25_HDR_FRAME_LENGTH_SAMPLES + 1U;
if (m_maxSyncPtr >= P25_LDU_FRAME_LENGTH_SAMPLES)
m_maxSyncPtr -= P25_LDU_FRAME_LENGTH_SAMPLES;
}
return true;
}
}
}
return false;
}
void CP25RX::calculateLevels(uint16_t start, uint16_t count)
{
q15_t maxPos = -16000;
q15_t minPos = 16000;
q15_t maxNeg = 16000;
q15_t minNeg = -16000;
for (uint16_t i = 0U; i < count; i++) {
q15_t sample = m_buffer[start];
if (sample > 0) {
if (sample > maxPos)
maxPos = sample;
if (sample < minPos)
minPos = sample;
} else {
if (sample < maxNeg)
maxNeg = sample;
if (sample > minNeg)
minNeg = sample;
}
start += P25_RADIO_SYMBOL_LENGTH;
if (start >= P25_LDU_FRAME_LENGTH_SAMPLES)
start -= P25_LDU_FRAME_LENGTH_SAMPLES;
}
q15_t posThresh = (maxPos + minPos) >> 1;
q15_t negThresh = (maxNeg + minNeg) >> 1;
q15_t centre = (posThresh + negThresh) >> 1;
q15_t threshold = posThresh - centre;
DEBUG5("P25RX: pos/neg/centre/threshold", posThresh, negThresh, centre, threshold);
if (m_averagePtr == NOAVEPTR) {
for (uint8_t i = 0U; i < 16U; i++) {
m_centre[i] = centre;
m_threshold[i] = threshold;
}
m_averagePtr = 0U;
} else {
m_centre[m_averagePtr] = centre;
m_threshold[m_averagePtr] = threshold;
m_averagePtr++;
if (m_averagePtr >= 16U)
m_averagePtr = 0U;
}
m_centreVal = 0;
m_thresholdVal = 0;
for (uint8_t i = 0U; i < 16U; i++) {
m_centreVal += m_centre[i];
m_thresholdVal += m_threshold[i];
}
m_centreVal >>= 4;
m_thresholdVal >>= 4;
}
void CP25RX::samplesToBits(uint16_t start, uint16_t count, uint8_t* buffer, uint16_t offset, q15_t centre, q15_t threshold)
{
for (uint16_t i = 0U; i < count; i++) {
q15_t sample = m_buffer[start] - centre;
if (sample < -threshold) {
WRITE_BIT1(buffer, offset, false);
offset++;
WRITE_BIT1(buffer, offset, true);
offset++;
} else if (sample < 0) {
WRITE_BIT1(buffer, offset, false);
offset++;
WRITE_BIT1(buffer, offset, false);
offset++;
} else if (sample < threshold) {
WRITE_BIT1(buffer, offset, true);
offset++;
WRITE_BIT1(buffer, offset, false);
offset++;
} else {
WRITE_BIT1(buffer, offset, true);
offset++;
WRITE_BIT1(buffer, offset, true);
offset++;
}
start += P25_RADIO_SYMBOL_LENGTH;
if (start >= P25_LDU_FRAME_LENGTH_SAMPLES)
start -= P25_LDU_FRAME_LENGTH_SAMPLES;
}
}
void CP25RX::writeRSSILdu(uint8_t* ldu)
{
#if defined(SEND_RSSI_DATA)
if (m_rssiCount > 0U) {
uint16_t rssi = m_rssiAccum / m_rssiCount;
ldu[217U] = (rssi >> 8) & 0xFFU;
ldu[218U] = (rssi >> 0) & 0xFFU;
serial.writeP25Ldu(ldu, P25_LDU_FRAME_LENGTH_BYTES + 3U);
} else {
serial.writeP25Ldu(ldu, P25_LDU_FRAME_LENGTH_BYTES + 1U);
}
#else
serial.writeP25Ldu(ldu, P25_LDU_FRAME_LENGTH_BYTES + 1U);
#endif
m_rssiAccum = 0U;
m_rssiCount = 0U;
}
+30 -16
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -24,35 +24,49 @@
enum P25RX_STATE {
P25RXS_NONE,
P25RXS_DATA
P25RXS_HDR,
P25RXS_LDU
};
class CP25RX {
public:
CP25RX();
void samples(const q15_t* samples, uint8_t length);
void samples(const q15_t* samples, uint16_t* rssi, uint8_t length);
void reset();
private:
uint32_t m_pll;
bool m_prev;
P25RX_STATE m_state;
uint32_t m_symbolBuffer;
uint64_t m_bitBuffer;
q15_t m_symbols[P25_SYNC_LENGTH_SYMBOLS];
uint8_t m_outBuffer[P25_LDU_FRAME_LENGTH_BYTES + 3U];
uint8_t* m_buffer;
uint16_t m_bufferPtr;
uint16_t m_symbolPtr;
uint32_t m_bitBuffer[P25_RADIO_SYMBOL_LENGTH];
q15_t m_buffer[P25_LDU_FRAME_LENGTH_SAMPLES];
uint16_t m_bitPtr;
uint16_t m_dataPtr;
uint16_t m_hdrStartPtr;
uint16_t m_lduStartPtr;
uint16_t m_lduEndPtr;
uint16_t m_minSyncPtr;
uint16_t m_maxSyncPtr;
uint16_t m_hdrSyncPtr;
uint16_t m_lduSyncPtr;
q31_t m_maxCorr;
uint16_t m_lostCount;
q15_t m_centre;
q15_t m_threshold;
uint8_t m_countdown;
q15_t m_centre[16U];
q15_t m_centreVal;
q15_t m_threshold[16U];
q15_t m_thresholdVal;
uint8_t m_averagePtr;
uint32_t m_rssiAccum;
uint16_t m_rssiCount;
void processNone(q15_t sample);
void processData(q15_t sample);
void processHdr(q15_t sample);
void processLdu(q15_t sample);
bool correlateSync();
void calculateLevels(uint16_t start, uint16_t count);
void samplesToBits(uint16_t start, uint16_t count, uint8_t* buffer, uint16_t offset, q15_t centre, q15_t threshold);
void writeRSSILdu(uint8_t* ldu);
};
#endif
+42 -65
View File
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2016 by Jonathan Naylor G4KLX
* Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -16,40 +17,34 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
// #define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#include "P25TX.h"
#include "P25Defines.h"
#if defined(WIDE_C4FSK_FILTERS_TX)
// Generated using rcosdesign(0.2, 4, 5, 'sqrt') in MATLAB
static q15_t P25_C4FSK_FILTER[] = {688, -680, -2158, -3060, -2724, -775, 2684, 7041, 11310, 14425, 15565, 14425,
11310, 7041, 2684, -775, -2724, -3060, -2158, -680, 688, 0};
const uint16_t P25_C4FSK_FILTER_LEN = 22U;
#else
// Generated using rcosdesign(0.2, 8, 5, 'sqrt') in MATLAB
static q15_t P25_C4FSK_FILTER[] = {401, 104, -340, -731, -847, -553, 112, 909, 1472, 1450, 683, -675, -2144, -3040, -2706, -770, 2667, 6995,
11237, 14331, 15464, 14331, 11237, 6995, 2667, -770, -2706, -3040, -2144, -675, 683, 1450, 1472, 909, 112,
-553, -847, -731, -340, 104, 401, 0};
const uint16_t P25_C4FSK_FILTER_LEN = 42U;
#endif
// Generated using rcosdesign(0.2, 8, 10, 'normal') in MATLAB
static q15_t RC_0_2_FILTER[] = {-444, -897, -1311, -1636, -1825, -1840, -1659, -1278, -712, 0,
800, 1613, 2354, 2936, 3277, 3310, 2994, 2315, 1296, 0, -1478,
-3011, -4448, -5627, -6386, -6580, -6090, -4839, -2800, 0, 3474,
7482, 11835, 16311, 20666, 24651, 28032, 30607, 32219, 32767,
32219, 30607, 28032, 24651, 20666, 16311, 11835, 7482, 3474, 0,
-2800, -4839, -6090, -6580, -6386, -5627, -4448, -3011, -1478,
0, 1296, 2315, 2994, 3310, 3277, 2936, 2354, 1613, 800, 0, -712,
-1278, -1659, -1840, -1825, -1636, -1311, -897, -444, 0}; // numTaps = 80, L = 10
const uint16_t RC_0_2_FILTER_PHASE_LEN = 8U; // phaseLength = numTaps/L
// Generated in MATLAB using the following commands, and then normalised for unity gain
// shape2 = 'Inverse-sinc Lowpass';
// d2 = fdesign.interpolator(2, shape2);
// d2 = fdesign.interpolator(1, shape2);
// h2 = design(d2, 'SystemObject', true);
static q15_t P25_LP_FILTER[] = {170, 401, 340, -203, -715, -478, 281, 419, -440, -1002, -103, 1114, 528, -1389, -1520, 1108, 2674, -388, -4662,
-2132, 9168, 20241, 20241, 9168, -2132, -4662, -388, 2674, 1108, -1520, -1389, 528, 1114, -103, -1002, -440, 419,
281, -478, -715, -203, 340, 401, 170};
const uint16_t P25_LP_FILTER_LEN = 44U;
static q15_t LOWPASS_FILTER[] = {1294, -2251, 4312, -8402, 20999, 20999, -8402, 4312, -2251, 1294};
const uint16_t LOWPASS_FILTER_LEN = 10U;
const q15_t P25_LEVELA[] = { 495, 495, 495, 495, 495};
const q15_t P25_LEVELB[] = { 165, 165, 165, 165, 165};
const q15_t P25_LEVELC[] = {-165, -165, -165, -165, -165};
const q15_t P25_LEVELD[] = {-495, -495, -495, -495, -495};
const q15_t P25_LEVELA = 1260;
const q15_t P25_LEVELB = 420;
const q15_t P25_LEVELC = -420;
const q15_t P25_LEVELD = -1260;
const uint8_t P25_START_SYNC = 0x77U;
@@ -62,19 +57,19 @@ m_lpState(),
m_poBuffer(),
m_poLen(0U),
m_poPtr(0U),
m_txDelay(240U), // 200ms
m_count(0U)
m_txDelay(240U) // 200ms
{
::memset(m_modState, 0x00U, 70U * sizeof(q15_t));
::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
::memset(m_lpState, 0x00U, 70U * sizeof(q15_t));
m_modFilter.numTaps = P25_C4FSK_FILTER_LEN;
m_modFilter.pState = m_modState;
m_modFilter.pCoeffs = P25_C4FSK_FILTER;
m_modFilter.L = P25_RADIO_SYMBOL_LENGTH;
m_modFilter.phaseLength = RC_0_2_FILTER_PHASE_LEN;
m_modFilter.pCoeffs = RC_0_2_FILTER;
m_modFilter.pState = m_modState;
m_lpFilter.numTaps = P25_LP_FILTER_LEN;
m_lpFilter.numTaps = LOWPASS_FILTER_LEN;
m_lpFilter.pState = m_lpState;
m_lpFilter.pCoeffs = P25_LP_FILTER;
m_lpFilter.pCoeffs = LOWPASS_FILTER;
}
void CP25TX::process()
@@ -84,8 +79,6 @@ void CP25TX::process()
if (m_poLen == 0U) {
if (!m_tx) {
m_count = 0U;
for (uint16_t i = 0U; i < m_txDelay; i++)
m_poBuffer[m_poLen++] = P25_START_SYNC;
} else {
@@ -135,61 +128,45 @@ uint8_t CP25TX::writeData(const uint8_t* data, uint8_t length)
void CP25TX::writeByte(uint8_t c)
{
q15_t inBuffer[P25_RADIO_SYMBOL_LENGTH * 4U + 1U];
q15_t intBuffer[P25_RADIO_SYMBOL_LENGTH * 4U + 1U];
q15_t outBuffer[P25_RADIO_SYMBOL_LENGTH * 4U + 1U];
q15_t inBuffer[4U];
q15_t intBuffer[P25_RADIO_SYMBOL_LENGTH * 4U];
q15_t outBuffer[P25_RADIO_SYMBOL_LENGTH * 4U];
const uint8_t MASK = 0xC0U;
q15_t* p = inBuffer;
for (uint8_t i = 0U; i < 4U; i++, c <<= 2, p += P25_RADIO_SYMBOL_LENGTH) {
for (uint8_t i = 0U; i < 4U; i++, c <<= 2) {
switch (c & MASK) {
case 0xC0U:
::memcpy(p, P25_LEVELA, P25_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = P25_LEVELA;
break;
case 0x80U:
::memcpy(p, P25_LEVELB, P25_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = P25_LEVELB;
break;
case 0x00U:
::memcpy(p, P25_LEVELC, P25_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = P25_LEVELC;
break;
default:
::memcpy(p, P25_LEVELD, P25_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = P25_LEVELD;
break;
}
}
uint16_t blockSize = P25_RADIO_SYMBOL_LENGTH * 4U;
::arm_fir_interpolate_q15(&m_modFilter, inBuffer, intBuffer, 4U);
// Handle the case of the oscillator not being accurate enough
if (m_sampleCount > 0U) {
m_count += P25_RADIO_SYMBOL_LENGTH * 4U;
::arm_fir_fast_q15(&m_lpFilter, intBuffer, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
if (m_count >= m_sampleCount) {
if (m_sampleInsert) {
inBuffer[P25_RADIO_SYMBOL_LENGTH * 4U] = inBuffer[P25_RADIO_SYMBOL_LENGTH * 4U - 1U];
blockSize++;
} else {
blockSize--;
}
m_count -= m_sampleCount;
}
}
::arm_fir_fast_q15(&m_modFilter, inBuffer, intBuffer, blockSize);
::arm_fir_fast_q15(&m_lpFilter, intBuffer, outBuffer, blockSize);
io.write(STATE_P25, outBuffer, blockSize);
io.write(STATE_P25, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
}
void CP25TX::setTXDelay(uint8_t delay)
{
m_txDelay = 600U + uint16_t(delay) * 12U; // 500ms + tx delay
if (m_txDelay > 1200U)
m_txDelay = 1200U;
}
uint16_t CP25TX::getSpace() const
uint8_t CP25TX::getSpace() const
{
return m_buffer.getSpace() / P25_LDU_FRAME_LENGTH_BYTES;
}
+11 -12
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2016 by Jonathan Naylor G4KLX
* Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -33,19 +33,18 @@ public:
void setTXDelay(uint8_t delay);
uint16_t getSpace() const;
uint8_t getSpace() const;
private:
CSerialRB m_buffer;
arm_fir_instance_q15 m_modFilter;
arm_fir_instance_q15 m_lpFilter;
q15_t m_modState[70U]; // NoTaps + BlockSize - 1, 42 + 20 - 1 plus some spare
q15_t m_lpState[70U]; // NoTaps + BlockSize - 1, 44 + 20 - 1 plus some spare
uint8_t m_poBuffer[920U];
uint16_t m_poLen;
uint16_t m_poPtr;
uint16_t m_txDelay;
uint32_t m_count;
CSerialRB m_buffer;
arm_fir_interpolate_instance_q15 m_modFilter;
arm_fir_instance_q15 m_lpFilter;
q15_t m_modState[16U]; // blockSize + phaseLength - 1, 4 + 9 - 1 plus some spare
q15_t m_lpState[70U]; // NoTaps + BlockSize - 1, 44 + 20 - 1 plus some spare
uint8_t m_poBuffer[1200U];
uint16_t m_poLen;
uint16_t m_poPtr;
uint16_t m_txDelay;
void writeByte(uint8_t c);
};
+2 -2
View File
@@ -1,6 +1,6 @@
This is the source code of the MMDVM firmware that supports D-Star, DMR, System Fusion and P25.
This is the source code of the MMDVM firmware that supports D-Star, DMR, System Fusion and P25 modes.
It runs on the Arduino Due and the ST-Micro STM32F4xx platforms. Support for the Teensy (3.1/3.2 and 3.5/3.6) is being added.
It runs on the Arduino Due, the ST-Micro STM32F407-DISCO and STM32F446-NUCLEO, as well as the Teensy 3.1/3.2/3.5/3.6. What these platforms have in common is the use of an ARM Cortex-M3 or M4 processor with a clock speed greater than 70 MHz, and access to at least one analogue to digital converter and one digital to analogue converter. A Cortex-M7 processor is also probably adequate.
In order to build this software for the Arduino Due, you will need to edit a file within the Arduino GUI and that is detailed in the BUILD.txt file. The STM32 support is being supplied via the Coocox IDE with ARM GCC. The Teensy support is via the latest beta of Teensyduino.
+5 -1
View File
@@ -21,8 +21,12 @@ Boston, MA 02110-1301, USA.
#if !defined(RSSIRB_H)
#define RSSIRB_H
#if defined(STM32F4XX) || defined(STM32F4)
#if defined(STM32F4XX)
#include "stm32f4xx.h"
#elif defined(STM32F7XX)
#include "stm32f7xx.h"
#elif defined(STM32F105xC)
#include "stm32f1xx.h"
#include <cstddef>
#else
#include <Arduino.h>
+47
View File
@@ -0,0 +1,47 @@
/*
* Copyright (C) 2017 Wojciech Krutnik N0CALL
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* FIFO ring buffer
* source:
* http://stackoverflow.com/questions/6822548/correct-way-of-implementing-a-uart-receive-buffer-in-a-small-arm-microcontroller
* (modified)
*
*/
#if !defined(RINGBUFF_H)
#define RINGBUFF_H
#define RINGBUFF_SIZE(ringBuff) (ringBuff.size) /* serial buffer in bytes (power 2) */
#define RINGBUFF_MASK(ringBuff) (ringBuff.size-1U) /* buffer size mask */
/* Buffer read / write macros */
#define RINGBUFF_RESET(ringBuff) (ringBuff).rdIdx = ringBuff.wrIdx = 0
#define RINGBUFF_WRITE(ringBuff, dataIn) (ringBuff).data[RINGBUFF_MASK(ringBuff) & ringBuff.wrIdx++] = (dataIn)
#define RINGBUFF_READ(ringBuff) ((ringBuff).data[RINGBUFF_MASK(ringBuff) & ((ringBuff).rdIdx++)])
#define RINGBUFF_EMPTY(ringBuff) ((ringBuff).rdIdx == (ringBuff).wrIdx)
#define RINGBUFF_FULL(ringBuff) ((RINGBUFF_MASK(ringBuff) & ringFifo.rdIdx) == (RINGBUFF_MASK(ringBuff) & ringFifo.wrIdx))
#define RINGBUFF_COUNT(ringBuff) (RINGBUFF_MASK(ringBuff) & ((ringBuff).wrIdx - (ringBuff).rdIdx))
/* Buffer type */
#define DECLARE_RINGBUFFER_TYPE(name, _size) \
typedef struct{ \
uint32_t size; \
uint32_t wrIdx; \
uint32_t rdIdx; \
uint8_t data[_size]; \
}name##_t
#endif
+50
View File
@@ -0,0 +1,50 @@
/*
* source: http://mightydevices.com/?p=144
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(STM32UTILS_H)
#define STM32UTILS_H
#include <stdint.h>
/* ram function */
#define RAMFUNC __attribute__ ((long_call, section (".data")))
/* eeprom data */
/* for placing variables in eeprom memory */
#define EEMEM __attribute__((section(".eeprom")))
/* bitband type */
typedef volatile uint32_t * const bitband_t;
/* base address for bit banding */
#define BITBAND_SRAM_REF (0x20000000)
/* base address for bit banding */
#define BITBAND_SRAM_BASE (0x22000000)
/* base address for bit banding */
#define BITBAND_PERIPH_REF (0x40000000)
/* base address for bit banding */
#define BITBAND_PERIPH_BASE (0x42000000)
/* sram bit band */
#define BITBAND_SRAM(address, bit) ((void*)(BITBAND_SRAM_BASE + \
(((uint32_t)address) - BITBAND_SRAM_REF) * 32 + (bit) * 4))
/* periph bit band */
#define BITBAND_PERIPH(address, bit) ((void *)(BITBAND_PERIPH_BASE + \
(((uint32_t)address) - BITBAND_PERIPH_REF) * 32 + (bit) * 4))
#endif
+5 -1
View File
@@ -21,8 +21,12 @@ Boston, MA 02110-1301, USA.
#if !defined(SAMPLERB_H)
#define SAMPLERB_H
#if defined(STM32F4XX) || defined(STM32F4)
#if defined(STM32F4XX)
#include "stm32f4xx.h"
#elif defined(STM32F7XX)
#include "stm32f7xx.h"
#elif defined(STM32F105xC)
#include "stm32f1xx.h"
#include <cstddef>
#else
#include <Arduino.h>
+15 -1
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2016 by Jonathan Naylor G4KLX
* Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -54,6 +54,20 @@ int CSerialPort::availableInt(uint8_t n)
}
}
int CSerialPort::availableForWriteInt(uint8_t n)
{
switch (n) {
case 1U:
return Serial.availableForWrite();
case 2U:
return Serial2.availableForWrite();
case 3U:
return Serial3.availableForWrite();
default:
return false;
}
}
uint8_t CSerialPort::readInt(uint8_t n)
{
switch (n) {
+137 -55
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2013,2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2013,2015,2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
*
* This program is free software; you can redistribute it and/or modify
@@ -17,11 +17,14 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
// #define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#if defined(MADEBYMAKEFILE)
#include "GitVersion.h"
#endif
#include "SerialPort.h"
const uint8_t MMDVM_FRAME_START = 0xE0U;
@@ -33,6 +36,7 @@ const uint8_t MMDVM_SET_MODE = 0x03U;
const uint8_t MMDVM_SET_FREQ = 0x04U;
const uint8_t MMDVM_CAL_DATA = 0x08U;
const uint8_t MMDVM_RSSI_DATA = 0x09U;
const uint8_t MMDVM_SEND_CWID = 0x0AU;
@@ -67,10 +71,19 @@ const uint8_t MMDVM_DEBUG3 = 0xF3U;
const uint8_t MMDVM_DEBUG4 = 0xF4U;
const uint8_t MMDVM_DEBUG5 = 0xF5U;
#if defined(EXTERNAL_OSC)
const uint8_t HARDWARE[] = "MMDVM 20161124 TCXO (D-Star/DMR/System Fusion/P25/CW Id)";
#define DESCRIPTION "MMDVM 20170501 TCXO 48kHz (D-Star/DMR/YSF/P25/RSSI/CW Id)"
#else
const uint8_t HARDWARE[] = "MMDVM 20161124 (D-Star/DMR/System Fusion/P25/CW Id)";
#define DESCRIPTION "MMDVM 20170501 48kHz (D-Star/DMR/YSF/P25/RSSI/CW Id)"
#endif
#if defined(GITVERSION)
#define concat(a, b) a " GitID #" b ""
const char HARDWARE[] = concat(DESCRIPTION, GITVERSION);
#else
#define concat(a, b, c) a " (Build: " b " " c ")"
const char HARDWARE[] = concat(DESCRIPTION, __TIME__, __DATE__);
#endif
const uint8_t PROTOCOL_VERSION = 1U;
@@ -79,7 +92,9 @@ const uint8_t PROTOCOL_VERSION = 1U;
CSerialPort::CSerialPort() :
m_buffer(),
m_ptr(0U),
m_len(0U)
m_len(0U),
m_debug(false),
m_repeat()
{
}
@@ -206,14 +221,17 @@ void CSerialPort::getVersion()
uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
{
if (length < 13U)
if (length < 15U)
return 4U;
bool rxInvert = (data[0U] & 0x01U) == 0x01U;
bool txInvert = (data[0U] & 0x02U) == 0x02U;
bool pttInvert = (data[0U] & 0x04U) == 0x04U;
bool ysfLoDev = (data[0U] & 0x08U) == 0x08U;
bool simplex = (data[0U] & 0x80U) == 0x80U;
m_debug = (data[0U] & 0x10U) == 0x10U;
bool dstarEnable = (data[1U] & 0x01U) == 0x01U;
bool dmrEnable = (data[1U] & 0x02U) == 0x02U;
bool ysfEnable = (data[1U] & 0x04U) == 0x04U;
@@ -225,7 +243,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
MMDVM_STATE modemState = MMDVM_STATE(data[3U]);
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL)
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K)
return 4U;
if (modemState == STATE_DSTAR && !dstarEnable)
return 4U;
@@ -244,24 +262,15 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
uint8_t dmrDelay = data[7U];
int8_t oscOffset = int8_t(data[8U]) - 128;
if (oscOffset < 0) {
m_sampleCount = 1000000U / uint32_t(-oscOffset);
m_sampleInsert = false;
} else if (oscOffset > 0) {
m_sampleCount = 1000000U / uint32_t(oscOffset);
m_sampleInsert = true;
} else {
m_sampleCount = 0U;
m_sampleInsert = false;
}
uint8_t cwIdTXLevel = data[5U];
uint8_t dstarTXLevel = data[9U];
uint8_t dmrTXLevel = data[10U];
uint8_t ysfTXLevel = data[11U];
uint8_t p25TXLevel = data[12U];
int16_t txDCOffset = int16_t(data[13U]) - 128;
int16_t rxDCOffset = int16_t(data[14U]) - 128;
m_modemState = modemState;
m_dstarEnable = dstarEnable;
@@ -281,7 +290,9 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
dmrDMORX.setColorCode(colorCode);
dmrIdleRX.setColorCode(colorCode);
io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel);
ysfTX.setLoDev(ysfLoDev);
io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, txDCOffset, rxDCOffset);
io.start();
@@ -298,7 +309,7 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
if (modemState == m_modemState)
return 0U;
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL)
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K)
return 4U;
if (modemState == STATE_DSTAR && !m_dstarEnable)
return 4U;
@@ -371,6 +382,46 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
p25RX.reset();
cwIdTX.reset();
break;
case STATE_RSSICAL:
DEBUG1("Mode set to RSSI Calibrate");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
cwIdTX.reset();
break;
case STATE_LFCAL:
DEBUG1("Mode set to 80 Hz Calibrate");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
cwIdTX.reset();
break;
case STATE_DMRCAL1K:
DEBUG1("Mode set to DMR 1031 Hz Calibrate");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
cwIdTX.reset();
break;
case STATE_P25CAL1K:
DEBUG1("Mode set to P25 1011 Hz Calibrate");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
cwIdTX.reset();
break;
default:
DEBUG1("Mode set to Idle");
// STATE_IDLE
@@ -402,6 +453,9 @@ void CSerialPort::process()
m_buffer[0U] = c;
m_ptr = 1U;
m_len = 0U;
} else {
m_ptr = 0U;
m_len = 0U;
}
} else if (m_ptr == 1U) {
// Handle the frame length
@@ -448,8 +502,10 @@ void CSerialPort::process()
case MMDVM_CAL_DATA:
if (m_modemState == STATE_DSTARCAL)
err = calDStarTX.write(m_buffer + 3U, m_len - 3U);
if (m_modemState == STATE_DMRCAL)
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K)
err = calDMR.write(m_buffer + 3U, m_len - 3U);
if (m_modemState == STATE_P25CAL1K)
err = calP25.write(m_buffer + 3U, m_len - 3U);
if (err == 0U) {
sendACK();
} else {
@@ -626,8 +682,10 @@ void CSerialPort::process()
break;
#if defined(SERIAL_REPEATER)
case MMDVM_SERIAL:
writeInt(3U, m_buffer + 3U, m_len - 3U);
case MMDVM_SERIAL: {
for (uint8_t i = 3U; i < m_len; i++)
m_repeat.put(m_buffer[i]);
}
break;
#endif
@@ -643,8 +701,26 @@ void CSerialPort::process()
}
}
if (io.getWatchdog() >= 96000U) {
m_ptr = 0U;
m_len = 0U;
}
#if defined(SERIAL_REPEATER)
// Drain any incoming serial data
// Write any outgoing serial data
uint16_t space = m_repeat.getData();
if (space > 0U) {
int avail = availableForWriteInt(3U);
if (avail < space)
space = avail;
for (uint16_t i = 0U; i < space; i++) {
uint8_t c = m_repeat.get();
writeInt(3U, &c, 1U);
}
}
// Read any incoming serial data
while (availableInt(3U))
readInt(3U);
#endif
@@ -892,8 +968,31 @@ void CSerialPort::writeCalData(const uint8_t* data, uint8_t length)
writeInt(1U, reply, count);
}
void CSerialPort::writeRSSIData(const uint8_t* data, uint8_t length)
{
if (m_modemState != STATE_RSSICAL)
return;
uint8_t reply[30U];
reply[0U] = MMDVM_FRAME_START;
reply[1U] = 0U;
reply[2U] = MMDVM_RSSI_DATA;
uint8_t count = 3U;
for (uint8_t i = 0U; i < length; i++, count++)
reply[count] = data[i];
reply[1U] = count;
writeInt(1U, reply, count);
}
void CSerialPort::writeDebug(const char* text)
{
if (!m_debug)
return;
uint8_t reply[130U];
reply[0U] = MMDVM_FRAME_START;
@@ -911,6 +1010,9 @@ void CSerialPort::writeDebug(const char* text)
void CSerialPort::writeDebug(const char* text, int16_t n1)
{
if (!m_debug)
return;
uint8_t reply[130U];
reply[0U] = MMDVM_FRAME_START;
@@ -931,6 +1033,9 @@ void CSerialPort::writeDebug(const char* text, int16_t n1)
void CSerialPort::writeDebug(const char* text, int16_t n1, int16_t n2)
{
if (!m_debug)
return;
uint8_t reply[130U];
reply[0U] = MMDVM_FRAME_START;
@@ -954,6 +1059,9 @@ void CSerialPort::writeDebug(const char* text, int16_t n1, int16_t n2)
void CSerialPort::writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n3)
{
if (!m_debug)
return;
uint8_t reply[130U];
reply[0U] = MMDVM_FRAME_START;
@@ -980,6 +1088,9 @@ void CSerialPort::writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n
void CSerialPort::writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n3, int16_t n4)
{
if (!m_debug)
return;
uint8_t reply[130U];
reply[0U] = MMDVM_FRAME_START;
@@ -1006,32 +1117,3 @@ void CSerialPort::writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n
writeInt(1U, reply, count, true);
}
void CSerialPort::writeAssert(bool cond, const char* text, const char* file, long line)
{
if (cond)
return;
uint8_t reply[200U];
reply[0U] = MMDVM_FRAME_START;
reply[1U] = 0U;
reply[2U] = MMDVM_DEBUG2;
uint8_t count = 3U;
for (uint8_t i = 0U; text[i] != '\0'; i++, count++)
reply[count] = text[i];
reply[count++] = ' ';
for (uint8_t i = 0U; file[i] != '\0'; i++, count++)
reply[count] = file[i];
reply[count++] = (line >> 8) & 0xFF;
reply[count++] = (line >> 0) & 0xFF;
reply[1U] = count;
writeInt(1U, reply, count, true);
}
+9 -7
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,6 +21,7 @@
#include "Config.h"
#include "Globals.h"
#include "SerialRB.h"
class CSerialPort {
@@ -47,6 +48,7 @@ public:
void writeP25Lost();
void writeCalData(const uint8_t* data, uint8_t length);
void writeRSSIData(const uint8_t* data, uint8_t length);
void writeDebug(const char* text);
void writeDebug(const char* text, int16_t n1);
@@ -54,12 +56,12 @@ public:
void writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n3);
void writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n3, int16_t n4);
void writeAssert(bool cond, const char* text, const char* file, long line);
private:
uint8_t m_buffer[256U];
uint8_t m_ptr;
uint8_t m_len;
uint8_t m_buffer[256U];
uint8_t m_ptr;
uint8_t m_len;
bool m_debug;
CSerialRB m_repeat;
void sendACK();
void sendNAK(uint8_t err);
@@ -72,9 +74,9 @@ private:
// Hardware versions
void beginInt(uint8_t n, int speed);
int availableInt(uint8_t n);
int availableForWriteInt(uint8_t n);
uint8_t readInt(uint8_t n);
void writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush = false);
};
#endif
+5 -1
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@@ -21,8 +21,12 @@ Boston, MA 02110-1301, USA.
#if !defined(SERIALRB_H)
#define SERIALRB_H
#if defined(STM32F4XX) || defined(STM32F4)
#if defined(STM32F4XX)
#include "stm32f4xx.h"
#elif defined(STM32F7XX)
#include "stm32f7xx.h"
#elif defined(STM32F105xC)
#include "stm32f1xx.h"
#include <cstddef>
#else
#include <Arduino.h>
+593 -521
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+160
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@@ -0,0 +1,160 @@
/*
* Copyright (C) 2017 by Wojciech Krutnik N0CALL
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "RingBuff.h"
#include "SerialPort.h"
/*
Pin definitions (configuration in IOSTM_CMSIS.c):
- Host communication:
USART1 - TXD PA9 - RXD PA10
*/
#if defined(STM32F1)
// BaudRate calculator macro
// source: STM32 HAL Library (stm32f1xx_hal_usart.h)
#define USART_DIV(__PCLK__, __BAUD__) (((__PCLK__)*25)/(4*(__BAUD__)))
#define USART_DIVMANT(__PCLK__, __BAUD__) (USART_DIV((__PCLK__), (__BAUD__))/100)
#define USART_DIVFRAQ(__PCLK__, __BAUD__) (((USART_DIV((__PCLK__), (__BAUD__)) - (USART_DIVMANT((__PCLK__), (__BAUD__)) * 100)) * 16 + 50) / 100)
#define USART_BRR(__PCLK__, __BAUD__) ((USART_DIVMANT((__PCLK__), (__BAUD__)) << 4)|(USART_DIVFRAQ((__PCLK__), (__BAUD__)) & 0x0F))
#define USART_BUFFER_SIZE 256U
DECLARE_RINGBUFFER_TYPE(USARTBuffer, USART_BUFFER_SIZE);
/* ************* USART1 ***************** */
static volatile USARTBuffer_t txBuffer1={.size=USART_BUFFER_SIZE};
static volatile USARTBuffer_t rxBuffer1={.size=USART_BUFFER_SIZE};
extern "C" {
bitband_t txe = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_TXE_Pos);
bitband_t rxne = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_RXNE_Pos);
bitband_t txeie = (bitband_t)BITBAND_PERIPH(&USART1->CR1, USART_CR1_TXEIE_Pos);
RAMFUNC void USART1_IRQHandler()
{
/* Transmitting data */
if(*txe){
if(!(RINGBUFF_EMPTY(txBuffer1))){
USART1->DR = RINGBUFF_READ(txBuffer1);
}else{ /* Buffer empty */
*txeie = 0; /* Don't send further data */
}
}
/* Receiving data */
if(*rxne){
RINGBUFF_WRITE(rxBuffer1, USART1->DR);
}
}
}
void USART1Init(int speed)
{
RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
USART1->BRR = USART_BRR(72000000UL, speed);
USART1->CR1 = USART_CR1_UE | USART_CR1_TE |
USART_CR1_RE | USART_CR1_RXNEIE; // Enable USART and RX interrupt
NVIC_EnableIRQ(USART1_IRQn);
}
RAMFUNC void USART1TxData(const uint8_t* data, uint16_t length)
{
NVIC_DisableIRQ(USART1_IRQn);
/* Check remaining space in buffer */
if(RINGBUFF_COUNT(txBuffer1) + length > RINGBUFF_SIZE(txBuffer1)){
NVIC_EnableIRQ(USART1_IRQn);
return;
}
/* Append data to buffer */
while(length--){
RINGBUFF_WRITE(txBuffer1, *(data++));
}
/* Start sending data */
USART1->CR1 |= USART_CR1_TXEIE;
NVIC_EnableIRQ(USART1_IRQn);
}
/////////////////////////////////////////////////////////////////
void CSerialPort::beginInt(uint8_t n, int speed)
{
switch (n) {
case 1U:
USART1Init(speed);
break;
default:
break;
}
}
int CSerialPort::availableInt(uint8_t n)
{
switch (n) {
case 1U:
return !RINGBUFF_EMPTY(rxBuffer1);
default:
return false;
}
}
uint8_t CSerialPort::readInt(uint8_t n)
{
switch (n) {
case 1U:
return RINGBUFF_READ(rxBuffer1);
default:
return 0U;
}
}
void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
{
bitband_t tc = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_TC_Pos);
switch (n) {
case 1U:
USART1TxData(data, length);
*tc = 0;
if (flush) {
while (!RINGBUFF_EMPTY(txBuffer1) || !tc)
;
}
break;
default:
break;
}
}
#endif
+41
View File
@@ -0,0 +1,41 @@
Jobs To Do
----------
Jobs Done
---------
1. Boxcar coefficients
2. Symbols lengths for:
D-Star
DMR
YSF
P25
3. Sample ring buffer sizing
RX
TX
4. Hardware sample rates:
Due
STM32
Teensy
5. DC Offset coefficients
6. TX Filters:
D-Star
DMR
YSF
P25
7. TX Filter workspaces and clearing:
D-Star
DMR
YSF
P25
8. CW Id sine wave, silence and construction
9. RX Filters
10. RX Filter workspaces and clearing:
D-Star
DMR
YSF
P25
11. TX symbols.
12. DC Offset workspace and clearing.
13. DMR magic numbers.
14. Watchdog values.
+5 -1
View File
@@ -19,8 +19,12 @@
#if !defined(UTILS_H)
#define UTILS_H
#if defined(STM32F4XX) || defined(STM32F4)
#if defined(STM32F4XX)
#include "stm32f4xx.h"
#elif defined(STM32F7XX)
#include "stm32f7xx.h"
#elif defined(STM32F105xC)
#include "stm32f1xx.h"
#include <cstddef>
#else
#include <Arduino.h>
+8 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
* Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -19,18 +19,21 @@
#if !defined(YSFDEFINES_H)
#define YSFDEFINES_H
const unsigned int YSF_RADIO_SYMBOL_LENGTH = 5U; // At 24 kHz sample rate
const unsigned int YSF_RADIO_SYMBOL_LENGTH = 10U; // At 48 kHz sample rate
const unsigned int YSF_FRAME_LENGTH_BYTES = 120U;
const unsigned int YSF_FRAME_LENGTH_BITS = YSF_FRAME_LENGTH_BYTES * 8U;
const unsigned int YSF_FRAME_LENGTH_SYMBOLS = YSF_FRAME_LENGTH_BYTES * 4U;
const unsigned int YSF_FRAME_LENGTH_SAMPLES = YSF_FRAME_LENGTH_SYMBOLS * YSF_RADIO_SYMBOL_LENGTH;
const unsigned int YSF_SYNC_LENGTH_BYTES = 5U;
const unsigned int YSF_SYNC_LENGTH_BITS = YSF_SYNC_LENGTH_BYTES * 8U;
const unsigned int YSF_SYNC_LENGTH_SYMBOLS = YSF_SYNC_LENGTH_BYTES * 4U;
const unsigned int YSF_SYNC_LENGTH_SAMPLES = YSF_SYNC_LENGTH_SYMBOLS * YSF_RADIO_SYMBOL_LENGTH;
const unsigned int YSF_FICH_LENGTH_BITS = 200U;
const unsigned int YSF_FICH_LENGTH_SYMBOLS = 100U;
const unsigned int YSF_FICH_LENGTH_SAMPLES = YSF_FICH_LENGTH_SYMBOLS * YSF_RADIO_SYMBOL_LENGTH;
const uint8_t YSF_SYNC_BYTES[] = {0xD4U, 0x71U, 0xC9U, 0x63U, 0x4DU};
const uint8_t YSF_SYNC_BYTES_LENGTH = 5U;
@@ -41,6 +44,9 @@ const uint64_t YSF_SYNC_BITS_MASK = 0x000000FFFFFFFFFFU;
// D 4 7 1 C 9 6 3 4 D
// 11 01 01 00 01 11 00 01 11 00 10 01 01 10 00 11 01 00 11 01
// -3 +3 +3 +1 +3 -3 +1 +3 -3 +1 -1 +3 +3 -1 +3 -3 +3 +1 -3 +3
const int8_t YSF_SYNC_SYMBOLS_VALUES[] = {-3, +3, +3, +1, +3, -3, +1, +3, -3, +1, -1, +3, +3, -1, +3, -3, +3, +1, -3, +3};
const uint32_t YSF_SYNC_SYMBOLS = 0x0007B5ADU;
const uint32_t YSF_SYNC_SYMBOLS_MASK = 0x000FFFFFU;
+324 -164
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2016 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -16,209 +16,169 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
// #define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#include "YSFRX.h"
#include "Utils.h"
const unsigned int BUFFER_LENGTH = 200U;
const q15_t SCALING_FACTOR = 18750; // Q15(0.55)
const uint32_t PLLMAX = 0x10000U;
const uint32_t PLLINC = PLLMAX / YSF_RADIO_SYMBOL_LENGTH;
const uint32_t INC = PLLINC / 32U;
const uint8_t MAX_SYNC_BIT_START_ERRS = 2U;
const uint8_t MAX_SYNC_BIT_RUN_ERRS = 4U;
const uint8_t SYNC_SYMBOL_ERRS = 0U;
const uint8_t SYNC_BIT_START_ERRS = 2U;
const uint8_t SYNC_BIT_RUN_ERRS = 4U;
const unsigned int MAX_SYNC_FRAMES = 4U + 1U;
const uint8_t MAX_SYNC_SYMBOLS_ERRS = 3U;
const uint8_t BIT_MASK_TABLE[] = {0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U};
#define WRITE_BIT1(p,i,b) p[(i)>>3] = (b) ? (p[(i)>>3] | BIT_MASK_TABLE[(i)&7]) : (p[(i)>>3] & ~BIT_MASK_TABLE[(i)&7])
#define READ_BIT1(p,i) (p[(i)>>3] & BIT_MASK_TABLE[(i)&7])
const uint8_t NOAVEPTR = 99U;
const uint16_t NOENDPTR = 9999U;
const unsigned int MAX_SYNC_FRAMES = 4U + 1U;
CYSFRX::CYSFRX() :
m_pll(0U),
m_prev(false),
m_state(YSFRXS_NONE),
m_bitBuffer(0x00U),
m_symbols(),
m_outBuffer(),
m_buffer(NULL),
m_bufferPtr(0U),
m_symbolPtr(0U),
m_bitBuffer(),
m_buffer(),
m_bitPtr(0U),
m_dataPtr(0U),
m_startPtr(NOENDPTR),
m_endPtr(NOENDPTR),
m_syncPtr(NOENDPTR),
m_minSyncPtr(NOENDPTR),
m_maxSyncPtr(NOENDPTR),
m_maxCorr(0),
m_lostCount(0U),
m_centre(0),
m_threshold(0)
m_countdown(0U),
m_centre(),
m_centreVal(0),
m_threshold(),
m_thresholdVal(0),
m_averagePtr(NOAVEPTR),
m_rssiAccum(0U),
m_rssiCount(0U)
{
m_buffer = m_outBuffer + 1U;
}
void CYSFRX::reset()
{
m_pll = 0U;
m_prev = false;
m_state = YSFRXS_NONE;
m_bitBuffer = 0x00U;
m_bufferPtr = 0U;
m_symbolPtr = 0U;
m_lostCount = 0U;
m_centre = 0;
m_threshold = 0;
m_state = YSFRXS_NONE;
m_dataPtr = 0U;
m_bitPtr = 0U;
m_maxCorr = 0;
m_averagePtr = NOAVEPTR;
m_startPtr = NOENDPTR;
m_endPtr = NOENDPTR;
m_syncPtr = NOENDPTR;
m_minSyncPtr = NOENDPTR;
m_maxSyncPtr = NOENDPTR;
m_centreVal = 0;
m_thresholdVal = 0;
m_lostCount = 0U;
m_countdown = 0U;
m_rssiAccum = 0U;
m_rssiCount = 0U;
}
void CYSFRX::samples(const q15_t* samples, uint8_t length)
void CYSFRX::samples(const q15_t* samples, uint16_t* rssi, uint8_t length)
{
for (uint16_t i = 0U; i < length; i++) {
bool bit = samples[i] < 0;
for (uint8_t i = 0U; i < length; i++) {
q15_t sample = samples[i];
if (bit != m_prev) {
if (m_pll < (PLLMAX / 2U))
m_pll += INC;
else
m_pll -= INC;
m_rssiAccum += rssi[i];
m_rssiCount++;
m_bitBuffer[m_bitPtr] <<= 1;
if (sample < 0)
m_bitBuffer[m_bitPtr] |= 0x01U;
m_buffer[m_dataPtr] = sample;
switch (m_state) {
case YSFRXS_DATA:
processData(sample);
break;
default:
processNone(sample);
break;
}
m_prev = bit;
m_dataPtr++;
if (m_dataPtr >= YSF_FRAME_LENGTH_SAMPLES)
m_dataPtr = 0U;
m_pll += PLLINC;
if (m_pll >= PLLMAX) {
m_pll -= PLLMAX;
if (m_state == YSFRXS_NONE)
processNone(samples[i]);
else
processData(samples[i]);
}
m_bitPtr++;
if (m_bitPtr >= YSF_RADIO_SYMBOL_LENGTH)
m_bitPtr = 0U;
}
}
void CYSFRX::processNone(q15_t sample)
{
m_symbolBuffer <<= 1;
if (sample < 0)
m_symbolBuffer |= 0x01U;
m_symbols[m_symbolPtr] = sample;
// Fuzzy matching of the data sync bit sequence
if (countBits32((m_symbolBuffer & YSF_SYNC_SYMBOLS_MASK) ^ YSF_SYNC_SYMBOLS) <= SYNC_SYMBOL_ERRS) {
q15_t max = -16000;
q15_t min = 16000;
for (uint8_t i = 0U; i < YSF_SYNC_LENGTH_SYMBOLS; i++) {
q15_t val = m_symbols[i];
if (val > max)
max = val;
if (val < min)
min = val;
}
q15_t centre = (max + min) >> 1;
q31_t v1 = (max - centre) * SCALING_FACTOR;
q15_t threshold = q15_t(v1 >> 15);
uint16_t ptr = m_symbolPtr + 1U;
if (ptr >= YSF_SYNC_LENGTH_SYMBOLS)
ptr = 0U;
for (uint8_t i = 0U; i < YSF_SYNC_LENGTH_SYMBOLS; i++) {
q15_t sample = m_symbols[ptr] - centre;
if (sample < -threshold) {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x01U;
} else if (sample < 0) {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x00U;
} else if (sample < threshold) {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x02U;
} else {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x03U;
}
ptr++;
if (ptr >= YSF_SYNC_LENGTH_SYMBOLS)
ptr = 0U;
}
// Fuzzy matching of the data sync bit sequence
if (countBits64((m_bitBuffer & YSF_SYNC_BITS_MASK) ^ YSF_SYNC_BITS) <= SYNC_BIT_START_ERRS) {
DEBUG5("YSFRX: sync found in None min/max/centre/threshold", min, max, centre, threshold);
for (uint8_t i = 0U; i < YSF_SYNC_LENGTH_BYTES; i++)
m_buffer[i] = YSF_SYNC_BYTES[i];
m_centre = centre;
m_threshold = threshold;
m_lostCount = MAX_SYNC_FRAMES;
m_bufferPtr = YSF_SYNC_LENGTH_BITS;
m_state = YSFRXS_DATA;
bool ret = correlateSync();
if (ret) {
// On the first sync, start the countdown to the state change
if (m_countdown == 0U) {
m_rssiAccum = 0U;
m_rssiCount = 0U;
io.setDecode(true);
io.setADCDetection(true);
m_averagePtr = NOAVEPTR;
m_countdown = 5U;
}
}
m_symbolPtr++;
if (m_symbolPtr >= YSF_SYNC_LENGTH_SYMBOLS)
m_symbolPtr = 0U;
if (m_countdown > 0U)
m_countdown--;
if (m_countdown == 1U) {
m_minSyncPtr = m_syncPtr + YSF_FRAME_LENGTH_SAMPLES - 1U;
if (m_minSyncPtr >= YSF_FRAME_LENGTH_SAMPLES)
m_minSyncPtr -= YSF_FRAME_LENGTH_SAMPLES;
m_maxSyncPtr = m_syncPtr + 1U;
if (m_maxSyncPtr >= YSF_FRAME_LENGTH_SAMPLES)
m_maxSyncPtr -= YSF_FRAME_LENGTH_SAMPLES;
m_state = YSFRXS_DATA;
m_countdown = 0U;
}
}
void CYSFRX::processData(q15_t sample)
{
sample -= m_centre;
if (sample < -m_threshold) {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x01U;
WRITE_BIT1(m_buffer, m_bufferPtr, false);
m_bufferPtr++;
WRITE_BIT1(m_buffer, m_bufferPtr, true);
m_bufferPtr++;
} else if (sample < 0) {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x00U;
WRITE_BIT1(m_buffer, m_bufferPtr, false);
m_bufferPtr++;
WRITE_BIT1(m_buffer, m_bufferPtr, false);
m_bufferPtr++;
} else if (sample < m_threshold) {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x02U;
WRITE_BIT1(m_buffer, m_bufferPtr, true);
m_bufferPtr++;
WRITE_BIT1(m_buffer, m_bufferPtr, false);
m_bufferPtr++;
if (m_minSyncPtr < m_maxSyncPtr) {
if (m_dataPtr >= m_minSyncPtr && m_dataPtr <= m_maxSyncPtr)
correlateSync();
} else {
m_bitBuffer <<= 2;
m_bitBuffer |= 0x03U;
WRITE_BIT1(m_buffer, m_bufferPtr, true);
m_bufferPtr++;
WRITE_BIT1(m_buffer, m_bufferPtr, true);
m_bufferPtr++;
if (m_dataPtr >= m_minSyncPtr || m_dataPtr <= m_maxSyncPtr)
correlateSync();
}
// Only search for a sync in the right place +-2 symbols
if (m_bufferPtr >= (YSF_SYNC_LENGTH_BITS - 2U) && m_bufferPtr <= (YSF_SYNC_LENGTH_BITS + 2U)) {
// Fuzzy matching of the data sync bit sequence
if (countBits64((m_bitBuffer & YSF_SYNC_BITS_MASK) ^ YSF_SYNC_BITS) <= SYNC_BIT_RUN_ERRS) {
DEBUG2("YSFRX: found sync in Data, pos", m_bufferPtr - YSF_SYNC_LENGTH_BITS);
m_lostCount = MAX_SYNC_FRAMES;
m_bufferPtr = YSF_SYNC_LENGTH_BITS;
if (m_dataPtr == m_endPtr) {
// Only update the centre and threshold if they are from a good sync
if (m_lostCount == MAX_SYNC_FRAMES) {
m_minSyncPtr = m_syncPtr + YSF_FRAME_LENGTH_SAMPLES - 1U;
if (m_minSyncPtr >= YSF_FRAME_LENGTH_SAMPLES)
m_minSyncPtr -= YSF_FRAME_LENGTH_SAMPLES;
m_maxSyncPtr = m_syncPtr + 1U;
if (m_maxSyncPtr >= YSF_FRAME_LENGTH_SAMPLES)
m_maxSyncPtr -= YSF_FRAME_LENGTH_SAMPLES;
}
}
// Send a data frame to the host if the required number of bits have been received
if (m_bufferPtr == YSF_FRAME_LENGTH_BITS) {
calculateLevels(m_startPtr, YSF_FRAME_LENGTH_SYMBOLS);
DEBUG4("YSFRX: sync found pos/centre/threshold", m_syncPtr, m_centreVal, m_thresholdVal);
uint8_t frame[YSF_FRAME_LENGTH_BYTES + 3U];
samplesToBits(m_startPtr, YSF_FRAME_LENGTH_SYMBOLS, frame, 8U, m_centreVal, m_thresholdVal);
// We've not seen a data sync for too long, signal RXLOST and change to RX_NONE
m_lostCount--;
if (m_lostCount == 0U) {
@@ -229,16 +189,216 @@ void CYSFRX::processData(q15_t sample)
serial.writeYSFLost();
m_state = YSFRXS_NONE;
m_state = YSFRXS_NONE;
m_endPtr = NOENDPTR;
m_averagePtr = NOAVEPTR;
m_countdown = 0U;
m_maxCorr = 0;
} else {
m_outBuffer[0U] = m_lostCount == (MAX_SYNC_FRAMES - 1U) ? 0x01U : 0x00U;
serial.writeYSFData(m_outBuffer, YSF_FRAME_LENGTH_BYTES + 1U);
// Start the next frame
::memset(m_outBuffer, 0x00U, YSF_FRAME_LENGTH_BYTES + 3U);
m_bufferPtr = 0U;
frame[0U] = m_lostCount == (MAX_SYNC_FRAMES - 1U) ? 0x01U : 0x00U;
writeRSSIData(frame);
m_maxCorr = 0;
}
}
}
bool CYSFRX::correlateSync()
{
if (countBits32((m_bitBuffer[m_bitPtr] & YSF_SYNC_SYMBOLS_MASK) ^ YSF_SYNC_SYMBOLS) <= MAX_SYNC_SYMBOLS_ERRS) {
uint16_t ptr = m_dataPtr + YSF_FRAME_LENGTH_SAMPLES - YSF_SYNC_LENGTH_SAMPLES + YSF_RADIO_SYMBOL_LENGTH;
if (ptr >= YSF_FRAME_LENGTH_SAMPLES)
ptr -= YSF_FRAME_LENGTH_SAMPLES;
q31_t corr = 0;
q15_t min = 16000;
q15_t max = -16000;
for (uint8_t i = 0U; i < YSF_SYNC_LENGTH_SYMBOLS; i++) {
q15_t val = m_buffer[ptr];
if (val > max)
max = val;
if (val < min)
min = val;
switch (YSF_SYNC_SYMBOLS_VALUES[i]) {
case +3:
corr -= (val + val + val);
break;
case +1:
corr -= val;
break;
case -1:
corr += val;
break;
default: // -3
corr += (val + val + val);
break;
}
ptr += YSF_RADIO_SYMBOL_LENGTH;
if (ptr >= YSF_FRAME_LENGTH_SAMPLES)
ptr -= YSF_FRAME_LENGTH_SAMPLES;
}
if (corr > m_maxCorr) {
if (m_averagePtr == NOAVEPTR) {
m_centreVal = (max + min) >> 1;
q31_t v1 = (max - m_centreVal) * SCALING_FACTOR;
m_thresholdVal = q15_t(v1 >> 15);
}
uint16_t startPtr = m_dataPtr + YSF_FRAME_LENGTH_SAMPLES - YSF_SYNC_LENGTH_SAMPLES + YSF_RADIO_SYMBOL_LENGTH;
if (startPtr >= YSF_FRAME_LENGTH_SAMPLES)
startPtr -= YSF_FRAME_LENGTH_SAMPLES;
uint8_t sync[YSF_SYNC_BYTES_LENGTH];
samplesToBits(startPtr, YSF_SYNC_LENGTH_SYMBOLS, sync, 0U, m_centreVal, m_thresholdVal);
uint8_t maxErrs;
if (m_state == YSFRXS_NONE)
maxErrs = MAX_SYNC_BIT_START_ERRS;
else
maxErrs = MAX_SYNC_BIT_RUN_ERRS;
uint8_t errs = 0U;
for (uint8_t i = 0U; i < YSF_SYNC_BYTES_LENGTH; i++)
errs += countBits8(sync[i] ^ YSF_SYNC_BYTES[i]);
if (errs <= maxErrs) {
m_maxCorr = corr;
m_lostCount = MAX_SYNC_FRAMES;
m_syncPtr = m_dataPtr;
m_startPtr = startPtr;
m_endPtr = m_dataPtr + YSF_FRAME_LENGTH_SAMPLES - YSF_SYNC_LENGTH_SAMPLES - 1U;
if (m_endPtr >= YSF_FRAME_LENGTH_SAMPLES)
m_endPtr -= YSF_FRAME_LENGTH_SAMPLES;
return true;
}
}
}
return false;
}
void CYSFRX::calculateLevels(uint16_t start, uint16_t count)
{
q15_t maxPos = -16000;
q15_t minPos = 16000;
q15_t maxNeg = 16000;
q15_t minNeg = -16000;
for (uint16_t i = 0U; i < count; i++) {
q15_t sample = m_buffer[start];
if (sample > 0) {
if (sample > maxPos)
maxPos = sample;
if (sample < minPos)
minPos = sample;
} else {
if (sample < maxNeg)
maxNeg = sample;
if (sample > minNeg)
minNeg = sample;
}
start += YSF_RADIO_SYMBOL_LENGTH;
if (start >= YSF_FRAME_LENGTH_SAMPLES)
start -= YSF_FRAME_LENGTH_SAMPLES;
}
q15_t posThresh = (maxPos + minPos) >> 1;
q15_t negThresh = (maxNeg + minNeg) >> 1;
q15_t centre = (posThresh + negThresh) >> 1;
q15_t threshold = posThresh - centre;
DEBUG5("YSFRX: pos/neg/centre/threshold", posThresh, negThresh, centre, threshold);
if (m_averagePtr == NOAVEPTR) {
for (uint8_t i = 0U; i < 16U; i++) {
m_centre[i] = centre;
m_threshold[i] = threshold;
}
m_averagePtr = 0U;
} else {
m_centre[m_averagePtr] = centre;
m_threshold[m_averagePtr] = threshold;
m_averagePtr++;
if (m_averagePtr >= 16U)
m_averagePtr = 0U;
}
m_centreVal = 0;
m_thresholdVal = 0;
for (uint8_t i = 0U; i < 16U; i++) {
m_centreVal += m_centre[i];
m_thresholdVal += m_threshold[i];
}
m_centreVal >>= 4;
m_thresholdVal >>= 4;
}
void CYSFRX::samplesToBits(uint16_t start, uint16_t count, uint8_t* buffer, uint16_t offset, q15_t centre, q15_t threshold)
{
for (uint16_t i = 0U; i < count; i++) {
q15_t sample = m_buffer[start] - centre;
if (sample < -threshold) {
WRITE_BIT1(buffer, offset, false);
offset++;
WRITE_BIT1(buffer, offset, true);
offset++;
} else if (sample < 0) {
WRITE_BIT1(buffer, offset, false);
offset++;
WRITE_BIT1(buffer, offset, false);
offset++;
} else if (sample < threshold) {
WRITE_BIT1(buffer, offset, true);
offset++;
WRITE_BIT1(buffer, offset, false);
offset++;
} else {
WRITE_BIT1(buffer, offset, true);
offset++;
WRITE_BIT1(buffer, offset, true);
offset++;
}
start += YSF_RADIO_SYMBOL_LENGTH;
if (start >= YSF_FRAME_LENGTH_SAMPLES)
start -= YSF_FRAME_LENGTH_SAMPLES;
}
}
void CYSFRX::writeRSSIData(uint8_t* data)
{
#if defined(SEND_RSSI_DATA)
if (m_rssiCount > 0U) {
uint16_t rssi = m_rssiAccum / m_rssiCount;
data[121U] = (rssi >> 8) & 0xFFU;
data[122U] = (rssi >> 0) & 0xFFU;
serial.writeYSFData(data, YSF_FRAME_LENGTH_BYTES + 3U);
} else {
serial.writeYSFData(data, YSF_FRAME_LENGTH_BYTES + 1U);
}
#else
serial.writeYSFData(data, YSF_FRAME_LENGTH_BYTES + 1U);
#endif
m_rssiAccum = 0U;
m_rssiCount = 0U;
}
+24 -13
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -31,27 +31,38 @@ class CYSFRX {
public:
CYSFRX();
void samples(const q15_t* samples, uint8_t length);
void samples(const q15_t* samples, uint16_t* rssi, uint8_t length);
void reset();
private:
uint32_t m_pll;
bool m_prev;
YSFRX_STATE m_state;
uint32_t m_symbolBuffer;
uint64_t m_bitBuffer;
q15_t m_symbols[YSF_SYNC_LENGTH_SYMBOLS];
uint8_t m_outBuffer[YSF_FRAME_LENGTH_BYTES + 3U];
uint8_t* m_buffer;
uint16_t m_bufferPtr;
uint16_t m_symbolPtr;
uint32_t m_bitBuffer[YSF_RADIO_SYMBOL_LENGTH];
q15_t m_buffer[YSF_FRAME_LENGTH_SAMPLES];
uint16_t m_bitPtr;
uint16_t m_dataPtr;
uint16_t m_startPtr;
uint16_t m_endPtr;
uint16_t m_syncPtr;
uint16_t m_minSyncPtr;
uint16_t m_maxSyncPtr;
q31_t m_maxCorr;
uint16_t m_lostCount;
q15_t m_centre;
q15_t m_threshold;
uint8_t m_countdown;
q15_t m_centre[16U];
q15_t m_centreVal;
q15_t m_threshold[16U];
q15_t m_thresholdVal;
uint8_t m_averagePtr;
uint32_t m_rssiAccum;
uint16_t m_rssiCount;
void processNone(q15_t sample);
void processData(q15_t sample);
bool correlateSync();
void calculateLevels(uint16_t start, uint16_t count);
void samplesToBits(uint16_t start, uint16_t count, uint8_t* buffer, uint16_t offset, q15_t centre, q15_t threshold);
void writeRSSIData(uint8_t* data);
};
#endif
+46 -55
View File
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2009-2016 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -16,31 +17,33 @@
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
// #define WANT_DEBUG
#include "Config.h"
#include "Globals.h"
#include "YSFTX.h"
#include "YSFDefines.h"
#if defined(WIDE_C4FSK_FILTERS_TX)
// Generated using rcosdesign(0.2, 4, 5, 'sqrt') in MATLAB
static q15_t YSF_C4FSK_FILTER[] = {688, -680, -2158, -3060, -2724, -775, 2684, 7041, 11310, 14425, 15565, 14425,
11310, 7041, 2684, -775, -2724, -3060, -2158, -680, 688, 0};
const uint16_t YSF_C4FSK_FILTER_LEN = 22U;
#else
// Generated using rcosdesign(0.2, 8, 5, 'sqrt') in MATLAB
static q15_t YSF_C4FSK_FILTER[] = {401, 104, -340, -731, -847, -553, 112, 909, 1472, 1450, 683, -675, -2144, -3040, -2706, -770, 2667, 6995,
11237, 14331, 15464, 14331, 11237, 6995, 2667, -770, -2706, -3040, -2144, -675, 683, 1450, 1472, 909, 112,
-553, -847, -731, -340, 104, 401, 0};
const uint16_t YSF_C4FSK_FILTER_LEN = 42U;
#endif
// Generated using rcosdesign(0.2, 8, 10, 'sqrt') in MATLAB
static q15_t RRC_0_2_FILTER[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 850, 592, 219, -234, -720, -1179,
-1548, -1769, -1795, -1597, -1172, -544, 237, 1092, 1927, 2637,
3120, 3286, 3073, 2454, 1447, 116, -1431, -3043, -4544, -5739,
-6442, -6483, -5735, -4121, -1633, 1669, 5651, 10118, 14822,
19484, 23810, 27520, 30367, 32156, 32767, 32156, 30367, 27520,
23810, 19484, 14822, 10118, 5651, 1669, -1633, -4121, -5735,
-6483, -6442, -5739, -4544, -3043, -1431, 116, 1447, 2454,
3073, 3286, 3120, 2637, 1927, 1092, 237, -544, -1172, -1597,
-1795, -1769, -1548, -1179, -720, -234, 219, 592, 850}; // numTaps = 90, L = 10
const uint16_t RRC_0_2_FILTER_PHASE_LEN = 9U; // phaseLength = numTaps/L
const q15_t YSF_LEVELA[] = { 809, 809, 809, 809, 809};
const q15_t YSF_LEVELB[] = { 269, 269, 269, 269, 269};
const q15_t YSF_LEVELC[] = {-269, -269, -269, -269, -269};
const q15_t YSF_LEVELD[] = {-809, -809, -809, -809, -809};
const q15_t YSF_LEVELA_HI = 1893;
const q15_t YSF_LEVELB_HI = 631;
const q15_t YSF_LEVELC_HI = -631;
const q15_t YSF_LEVELD_HI = -1893;
const q15_t YSF_LEVELA_LO = 948;
const q15_t YSF_LEVELB_LO = 316;
const q15_t YSF_LEVELC_LO = -316;
const q15_t YSF_LEVELD_LO = -948;
const uint8_t YSF_START_SYNC = 0x77U;
const uint8_t YSF_END_SYNC = 0xFFU;
@@ -53,13 +56,14 @@ m_poBuffer(),
m_poLen(0U),
m_poPtr(0U),
m_txDelay(240U), // 200ms
m_count(0U)
m_loDev(false)
{
::memset(m_modState, 0x00U, 70U * sizeof(q15_t));
::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
m_modFilter.numTaps = YSF_C4FSK_FILTER_LEN;
m_modFilter.pState = m_modState;
m_modFilter.pCoeffs = YSF_C4FSK_FILTER;
m_modFilter.L = YSF_RADIO_SYMBOL_LENGTH;
m_modFilter.phaseLength = RRC_0_2_FILTER_PHASE_LEN;
m_modFilter.pCoeffs = RRC_0_2_FILTER;
m_modFilter.pState = m_modState;
}
void CYSFTX::process()
@@ -69,8 +73,6 @@ void CYSFTX::process()
if (m_poLen == 0U) {
if (!m_tx) {
m_count = 0U;
for (uint16_t i = 0U; i < m_txDelay; i++)
m_poBuffer[m_poLen++] = YSF_START_SYNC;
} else {
@@ -118,59 +120,48 @@ uint8_t CYSFTX::writeData(const uint8_t* data, uint8_t length)
void CYSFTX::writeByte(uint8_t c)
{
q15_t inBuffer[YSF_RADIO_SYMBOL_LENGTH * 4U + 1U];
q15_t outBuffer[YSF_RADIO_SYMBOL_LENGTH * 4U + 1U];
q15_t inBuffer[4U];
q15_t outBuffer[YSF_RADIO_SYMBOL_LENGTH * 4U];
const uint8_t MASK = 0xC0U;
q15_t* p = inBuffer;
for (uint8_t i = 0U; i < 4U; i++, c <<= 2, p += YSF_RADIO_SYMBOL_LENGTH) {
for (uint8_t i = 0U; i < 4U; i++, c <<= 2) {
switch (c & MASK) {
case 0xC0U:
::memcpy(p, YSF_LEVELA, YSF_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = m_loDev ? YSF_LEVELA_LO : YSF_LEVELA_HI;
break;
case 0x80U:
::memcpy(p, YSF_LEVELB, YSF_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = m_loDev ? YSF_LEVELB_LO : YSF_LEVELB_HI;
break;
case 0x00U:
::memcpy(p, YSF_LEVELC, YSF_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = m_loDev ? YSF_LEVELC_LO : YSF_LEVELC_HI;
break;
default:
::memcpy(p, YSF_LEVELD, YSF_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
inBuffer[i] = m_loDev ? YSF_LEVELD_LO : YSF_LEVELD_HI;
break;
}
}
uint16_t blockSize = YSF_RADIO_SYMBOL_LENGTH * 4U;
::arm_fir_interpolate_q15(&m_modFilter, inBuffer, outBuffer, 4U);
// Handle the case of the oscillator not being accurate enough
if (m_sampleCount > 0U) {
m_count += YSF_RADIO_SYMBOL_LENGTH * 4U;
if (m_count >= m_sampleCount) {
if (m_sampleInsert) {
inBuffer[YSF_RADIO_SYMBOL_LENGTH * 4U] = inBuffer[YSF_RADIO_SYMBOL_LENGTH * 4U - 1U];
blockSize++;
} else {
blockSize--;
}
m_count -= m_sampleCount;
}
}
::arm_fir_fast_q15(&m_modFilter, inBuffer, outBuffer, blockSize);
io.write(STATE_YSF, outBuffer, blockSize);
io.write(STATE_YSF, outBuffer, YSF_RADIO_SYMBOL_LENGTH * 4U);
}
void CYSFTX::setTXDelay(uint8_t delay)
{
m_txDelay = 600U + uint16_t(delay) * 12U; // 500ms + tx delay
if (m_txDelay > 1200U)
m_txDelay = 1200U;
}
uint16_t CYSFTX::getSpace() const
uint8_t CYSFTX::getSpace() const
{
return m_buffer.getSpace() / YSF_FRAME_LENGTH_BYTES;
}
void CYSFTX::setLoDev(bool on)
{
m_loDev = on;
}
+12 -10
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -33,17 +33,19 @@ public:
void setTXDelay(uint8_t delay);
uint16_t getSpace() const;
uint8_t getSpace() const;
void setLoDev(bool on);
private:
CSerialRB m_buffer;
arm_fir_instance_q15 m_modFilter;
q15_t m_modState[70U]; // NoTaps + BlockSize - 1, 42 + 20 - 1 plus some spare
uint8_t m_poBuffer[920U];
uint16_t m_poLen;
uint16_t m_poPtr;
uint16_t m_txDelay;
uint32_t m_count;
CSerialRB m_buffer;
arm_fir_interpolate_instance_q15 m_modFilter;
q15_t m_modState[16U]; // blockSize + phaseLength - 1, 4 + 9 - 1 plus some spare
uint8_t m_poBuffer[1200U];
uint16_t m_poLen;
uint16_t m_poPtr;
uint16_t m_txDelay;
bool m_loDev;
void writeByte(uint8_t c);
};
+2
View File
@@ -0,0 +1,2 @@
source [find interface/stlink-v2.cfg]
source [find target/stm32f1x.cfg]
+137
View File
@@ -0,0 +1,137 @@
/*
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/* Required amount of heap and stack */
_min_heap_size = 0x1000;
_min_stack_size = 0x0800;
/* The entry point in the interrupt vector table */
ENTRY(Reset_Handler)
/* Memory areas */
MEMORY
{
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* FLASH */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K /* Main RAM */
}
/* Stack start address (end of 256K RAM) */
_estack = ORIGIN(RAM) + LENGTH(RAM);
SECTIONS
{
.text :
{
/* The interrupt vector table */
. = ALIGN(4);
KEEP(*(.isr_vector .isr_vector.*))
/* The program code */
. = ALIGN(4);
*(.text .text*)
*(.rodata .rodata*)
/* ARM-Thumb code */
*(.glue_7) *(.glue_7t)
. = ALIGN(4);
KEEP(*(.init))
KEEP(*(.fini))
/* EABI C++ global constructors support */
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
/* EABI C++ global constructors support */
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
/* EABI C++ global constructors support */
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
} > ROM
/* ARM sections containing exception unwinding information */
.ARM.extab : {
__extab_start = .;
*(.ARM.extab* .gnu.linkonce.armextab.*)
__extab_end = .;
} > ROM
/* ARM index entries for section unwinding */
.ARM.exidx : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} > ROM
/* Start address for the initialization values of the .data section */
_sidata = .;
/* The .data section (initialized data) */
.data : AT ( _sidata )
{
. = ALIGN(4);
_sdata = . ; /* Start address for the .data section */
*(.data .data*)
. = ALIGN(4);
_edata = . ; /* End address for the .data section */
} > RAM
/* The .bss section (uninitialized data) */
.bss :
{
. = ALIGN(4);
_sbss = .; /* Start address for the .bss section */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = . ; /* End address for the .bss section */
__bss_end__ = _ebss;
} > RAM
/* Space for heap and stack */
.heap_stack :
{
end = . ; /* 'end' symbol defines heap location */
_end = end ;
. = . + _min_heap_size; /* Additional space for heap and stack */
. = . + _min_stack_size;
} > RAM
/* Remove information from the standard libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
}
+137
View File
@@ -0,0 +1,137 @@
/*
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
/* Required amount of heap and stack */
_min_heap_size = 0x1000;
_min_stack_size = 0x0800;
/* The entry point in the interrupt vector table */
ENTRY(Reset_Handler)
/* Memory areas */
MEMORY
{
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* FLASH */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K /* Main RAM */
}
/* Stack start address (end of 512K RAM) */
_estack = ORIGIN(RAM) + LENGTH(RAM);
SECTIONS
{
.text :
{
/* The interrupt vector table */
. = ALIGN(4);
KEEP(*(.isr_vector .isr_vector.*))
/* The program code */
. = ALIGN(4);
*(.text .text*)
*(.rodata .rodata*)
/* ARM-Thumb code */
*(.glue_7) *(.glue_7t)
. = ALIGN(4);
KEEP(*(.init))
KEEP(*(.fini))
/* EABI C++ global constructors support */
. = ALIGN(4);
__preinit_array_start = .;
KEEP (*(.preinit_array))
__preinit_array_end = .;
/* EABI C++ global constructors support */
. = ALIGN(4);
__init_array_start = .;
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = .;
/* EABI C++ global constructors support */
. = ALIGN(4);
__fini_array_start = .;
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
__fini_array_end = .;
} > ROM
/* ARM sections containing exception unwinding information */
.ARM.extab : {
__extab_start = .;
*(.ARM.extab* .gnu.linkonce.armextab.*)
__extab_end = .;
} > ROM
/* ARM index entries for section unwinding */
.ARM.exidx : {
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} > ROM
/* Start address for the initialization values of the .data section */
_sidata = .;
/* The .data section (initialized data) */
.data : AT ( _sidata )
{
. = ALIGN(4);
_sdata = . ; /* Start address for the .data section */
*(.data .data*)
. = ALIGN(4);
_edata = . ; /* End address for the .data section */
} > RAM
/* The .bss section (uninitialized data) */
.bss :
{
. = ALIGN(4);
_sbss = .; /* Start address for the .bss section */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = . ; /* End address for the .bss section */
__bss_end__ = _ebss;
} > RAM
/* Space for heap and stack */
.heap_stack :
{
end = . ; /* 'end' symbol defines heap location */
_end = end ;
. = . + _min_heap_size; /* Additional space for heap and stack */
. = . + _min_stack_size;
} > RAM
/* Remove information from the standard libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
}
+187
View File
@@ -0,0 +1,187 @@
/* Linker script to configure memory regions.
* STM32F105RB
*/
MEMORY
{
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
}
/* Linker script to place sections and symbol values. Should be used together
* with other linker script that defines memory regions FLASH and RAM.
* It references following symbols, which must be defined in code:
* Reset_Handler : Entry of reset handler
*
* It defines following symbols, which code can use without definition:
* __exidx_start
* __exidx_end
* __copy_table_start__
* __copy_table_end__
* __zero_table_start__
* __zero_table_end__
* __etext
* __data_start__
* __preinit_array_start
* __preinit_array_end
* __init_array_start
* __init_array_end
* __fini_array_start
* __fini_array_end
* __data_end__
* __bss_start__
* __bss_end__
* __end__
* end
* __HeapLimit
* __StackLimit
* __StackTop
* __stack
*/
ENTRY(Reset_Handler)
SECTIONS
{
.text :
{
KEEP(*(.isr_vector))
*(.text*)
KEEP(*(.init))
KEEP(*(.fini))
/* .ctors */
*crtbegin.o(.ctors)
*crtbegin?.o(.ctors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
*(SORT(.ctors.*))
*(.ctors)
/* .dtors */
*crtbegin.o(.dtors)
*crtbegin?.o(.dtors)
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
*(SORT(.dtors.*))
*(.dtors)
*(.rodata*)
KEEP(*(.eh_frame*))
} > FLASH
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > FLASH
__exidx_start = .;
.ARM.exidx :
{
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
} > FLASH
__exidx_end = .;
/* To copy multiple ROM to RAM sections,
* uncomment .copy.table section and,
* define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
/*
.copy.table :
{
. = ALIGN(4);
__copy_table_start__ = .;
LONG (__etext)
LONG (__data_start__)
LONG (__data_end__ - __data_start__)
LONG (__etext2)
LONG (__data2_start__)
LONG (__data2_end__ - __data2_start__)
__copy_table_end__ = .;
} > FLASH
*/
/* To clear multiple BSS sections,
* uncomment .zero.table section and,
* define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
/*
.zero.table :
{
. = ALIGN(4);
__zero_table_start__ = .;
LONG (__bss_start__)
LONG (__bss_end__ - __bss_start__)
LONG (__bss2_start__)
LONG (__bss2_end__ - __bss2_start__)
__zero_table_end__ = .;
} > FLASH
*/
__etext = .;
.data : AT (__etext)
{
__data_start__ = .;
*(vtable)
*(.data*)
. = ALIGN(4);
/* preinit data */
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP(*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
/* init data */
PROVIDE_HIDDEN (__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
/* finit data */
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array))
PROVIDE_HIDDEN (__fini_array_end = .);
KEEP(*(.jcr*))
. = ALIGN(4);
/* All data end */
__data_end__ = .;
} > RAM
.bss :
{
. = ALIGN(4);
__bss_start__ = .;
*(.bss*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
} > RAM
.heap (COPY):
{
__end__ = .;
PROVIDE(end = .);
*(.heap*)
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy (COPY):
{
*(.stack*)
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
}
+427
View File
@@ -0,0 +1,427 @@
/* File: startup_ARMCM3.S
* Purpose: startup file for Cortex-M3 devices. Should use with
* GCC for ARM Embedded Processors
* Version: V2.0
* Date: 16 August 2013
*/
/* Copyright (c) 2011 - 2013 ARM LIMITED
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
- Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
- Neither the name of ARM nor the names of its contributors may be used
to endorse or promote products derived from this software without
specific prior written permission.
*
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
POSSIBILITY OF SUCH DAMAGE.
---------------------------------------------------------------------------*/
#if defined(STM32F105xC)
.syntax unified
.arch armv7-m
.section .stack
.align 3
#ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 0xc00
#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
.space Stack_Size
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
#ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE
#else
.equ Heap_Size, 0
#endif
.globl __HeapBase
.globl __HeapLimit
__HeapBase:
.if Heap_Size
.space Heap_Size
.endif
.size __HeapBase, . - __HeapBase
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.equ BootRAM, 0xF1E0F85F
.section .isr_vector
.align 2
.globl __isr_vector
__isr_vector:
.long __StackTop /* Top of Stack */
.long Reset_Handler /* Reset Handler */
.long NMI_Handler /* NMI Handler */
.long HardFault_Handler /* Hard Fault Handler */
.long MemManage_Handler /* MPU Fault Handler */
.long BusFault_Handler /* Bus Fault Handler */
.long UsageFault_Handler /* Usage Fault Handler */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long 0 /* Reserved */
.long SVC_Handler /* SVCall Handler */
.long DebugMon_Handler /* Debug Monitor Handler */
.long 0 /* Reserved */
.long PendSV_Handler /* PendSV Handler */
.long SysTick_Handler /* SysTick Handler */
/* External interrupts */
.long WWDG_IRQHandler
.long PVD_IRQHandler
.long TAMPER_IRQHandler
.long RTC_IRQHandler
.long FLASH_IRQHandler
.long RCC_IRQHandler
.long EXTI0_IRQHandler
.long EXTI1_IRQHandler
.long EXTI2_IRQHandler
.long EXTI3_IRQHandler
.long EXTI4_IRQHandler
.long DMA1_Channel1_IRQHandler
.long DMA1_Channel2_IRQHandler
.long DMA1_Channel3_IRQHandler
.long DMA1_Channel4_IRQHandler
.long DMA1_Channel5_IRQHandler
.long DMA1_Channel6_IRQHandler
.long DMA1_Channel7_IRQHandler
.long ADC1_2_IRQHandler
.long CAN1_TX_IRQHandler
.long CAN1_RX0_IRQHandler
.long CAN1_RX1_IRQHandler
.long CAN1_SCE_IRQHandler
.long EXTI9_5_IRQHandler
.long TIM1_BRK_IRQHandler
.long TIM1_UP_IRQHandler
.long TIM1_TRG_COM_IRQHandler
.long TIM1_CC_IRQHandler
.long TIM2_IRQHandler
.long TIM3_IRQHandler
.long TIM4_IRQHandler
.long I2C1_EV_IRQHandler
.long I2C1_ER_IRQHandler
.long I2C2_EV_IRQHandler
.long I2C2_ER_IRQHandler
.long SPI1_IRQHandler
.long SPI2_IRQHandler
.long USART1_IRQHandler
.long USART2_IRQHandler
.long USART3_IRQHandler
.long EXTI15_10_IRQHandler
.long RTC_Alarm_IRQHandler
.long OTG_FS_WKUP_IRQHandler
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long TIM5_IRQHandler
.long SPI3_IRQHandler
.long UART4_IRQHandler
.long UART5_IRQHandler
.long TIM6_IRQHandler
.long TIM7_IRQHandler
.long DMA2_Channel1_IRQHandler
.long DMA2_Channel2_IRQHandler
.long DMA2_Channel3_IRQHandler
.long DMA2_Channel4_IRQHandler
.long DMA2_Channel5_IRQHandler
.long 0
.long 0
.long CAN2_TX_IRQHandler
.long CAN2_RX0_IRQHandler
.long CAN2_RX1_IRQHandler
.long CAN2_SCE_IRQHandler
.long OTG_FS_IRQHandler
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long 0
.long BootRAM /* @0x1E0. This is for boot in RAM mode for
STM32F10x Connectivity line Devices. */
.size __isr_vector, . - __isr_vector
.text
.thumb
.thumb_func
.align 2
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Firstly it copies data from read only memory to RAM. There are two schemes
* to copy. One can copy more than one sections. Another can only copy
* one section. The former scheme needs more instructions and read-only
* data to implement than the latter.
* Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */
#ifdef __STARTUP_COPY_MULTIPLE
/* Multiple sections scheme.
*
* Between symbol address __copy_table_start__ and __copy_table_end__,
* there are array of triplets, each of which specify:
* offset 0: LMA of start of a section to copy from
* offset 4: VMA of start of a section to copy to
* offset 8: size of the section to copy. Must be multiply of 4
*
* All addresses must be aligned to 4 bytes boundary.
*/
ldr r4, =__copy_table_start__
ldr r5, =__copy_table_end__
.L_loop0:
cmp r4, r5
bge .L_loop0_done
ldr r1, [r4]
ldr r2, [r4, #4]
ldr r3, [r4, #8]
.L_loop0_0:
subs r3, #4
ittt ge
ldrge r0, [r1, r3]
strge r0, [r2, r3]
bge .L_loop0_0
adds r4, #12
b .L_loop0
.L_loop0_done:
#else
/* Single section scheme.
*
* The ranges of copy from/to are specified by following symbols
* __etext: LMA of start of the section to copy from. Usually end of text
* __data_start__: VMA of start of the section to copy to
* __data_end__: VMA of end of the section to copy to
*
* All addresses must be aligned to 4 bytes boundary.
*/
ldr r1, =__etext
ldr r2, =__data_start__
ldr r3, =__data_end__
.L_loop1:
cmp r2, r3
ittt lt
ldrlt r0, [r1], #4
strlt r0, [r2], #4
blt .L_loop1
#endif /*__STARTUP_COPY_MULTIPLE */
/* This part of work usually is done in C library startup code. Otherwise,
* define this macro to enable it in this startup.
*
* There are two schemes too. One can clear multiple BSS sections. Another
* can only clear one section. The former is more size expensive than the
* latter.
*
* Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
* Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
*/
#ifdef __STARTUP_CLEAR_BSS_MULTIPLE
/* Multiple sections scheme.
*
* Between symbol address __copy_table_start__ and __copy_table_end__,
* there are array of tuples specifying:
* offset 0: Start of a BSS section
* offset 4: Size of this BSS section. Must be multiply of 4
*/
ldr r3, =__zero_table_start__
ldr r4, =__zero_table_end__
.L_loop2:
cmp r3, r4
bge .L_loop2_done
ldr r1, [r3]
ldr r2, [r3, #4]
movs r0, 0
.L_loop2_0:
subs r2, #4
itt ge
strge r0, [r1, r2]
bge .L_loop2_0
adds r3, #8
b .L_loop2
.L_loop2_done:
#elif defined (__STARTUP_CLEAR_BSS)
/* Single BSS section scheme.
*
* The BSS section is specified by following symbols
* __bss_start__: start of the BSS section.
* __bss_end__: end of the BSS section.
*
* Both addresses must be aligned to 4 bytes boundary.
*/
ldr r1, =__bss_start__
ldr r2, =__bss_end__
movs r0, 0
.L_loop3:
cmp r1, r2
itt lt
strlt r0, [r1], #4
blt .L_loop3
#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
#ifndef __NO_SYSTEM_INIT
bl SystemInit
#endif
#ifndef __START
#define __START _start
#endif
bl __START
.pool
.size Reset_Handler, . - Reset_Handler
.align 1
.thumb_func
.weak Default_Handler
.type Default_Handler, %function
Default_Handler:
b .
.size Default_Handler, . - Default_Handler
/* Macro to define default handlers. Default handler
* will be weak symbol and just dead loops. They can be
* overwritten by other handlers */
.macro def_irq_handler handler_name
.weak \handler_name
.set \handler_name, Default_Handler
.endm
def_irq_handler NMI_Handler
def_irq_handler HardFault_Handler
def_irq_handler MemManage_Handler
def_irq_handler BusFault_Handler
def_irq_handler UsageFault_Handler
def_irq_handler SVC_Handler
def_irq_handler DebugMon_Handler
def_irq_handler PendSV_Handler
def_irq_handler SysTick_Handler
def_irq_handler WWDG_IRQHandler
def_irq_handler PVD_IRQHandler
def_irq_handler TAMPER_IRQHandler
def_irq_handler RTC_IRQHandler
def_irq_handler FLASH_IRQHandler
def_irq_handler RCC_IRQHandler
def_irq_handler EXTI0_IRQHandler
def_irq_handler EXTI1_IRQHandler
def_irq_handler EXTI2_IRQHandler
def_irq_handler EXTI3_IRQHandler
def_irq_handler EXTI4_IRQHandler
def_irq_handler DMA1_Channel1_IRQHandler
def_irq_handler DMA1_Channel2_IRQHandler
def_irq_handler DMA1_Channel3_IRQHandler
def_irq_handler DMA1_Channel4_IRQHandler
def_irq_handler DMA1_Channel5_IRQHandler
def_irq_handler DMA1_Channel6_IRQHandler
def_irq_handler DMA1_Channel7_IRQHandler
def_irq_handler ADC1_2_IRQHandler
def_irq_handler CAN1_TX_IRQHandler
def_irq_handler CAN1_RX0_IRQHandler
def_irq_handler CAN1_RX1_IRQHandler
def_irq_handler CAN1_SCE_IRQHandler
def_irq_handler EXTI9_5_IRQHandler
def_irq_handler TIM1_BRK_IRQHandler
def_irq_handler TIM1_UP_IRQHandler
def_irq_handler TIM1_TRG_COM_IRQHandler
def_irq_handler TIM1_CC_IRQHandler
def_irq_handler TIM2_IRQHandler
def_irq_handler TIM3_IRQHandler
def_irq_handler TIM4_IRQHandler
def_irq_handler I2C1_EV_IRQHandler
def_irq_handler I2C1_ER_IRQHandler
def_irq_handler I2C2_EV_IRQHandler
def_irq_handler I2C2_ER_IRQHandler
def_irq_handler SPI1_IRQHandler
def_irq_handler SPI2_IRQHandler
def_irq_handler USART1_IRQHandler
def_irq_handler USART2_IRQHandler
def_irq_handler USART3_IRQHandler
def_irq_handler EXTI15_10_IRQHandler
def_irq_handler RTC_Alarm_IRQHandler
def_irq_handler OTG_FS_WKUP_IRQHandler
def_irq_handler TIM5_IRQHandler
def_irq_handler SPI3_IRQHandler
def_irq_handler UART4_IRQHandler
def_irq_handler UART5_IRQHandler
def_irq_handler TIM6_IRQHandler
def_irq_handler TIM7_IRQHandler
def_irq_handler DMA2_Channel1_IRQHandler
def_irq_handler DMA2_Channel2_IRQHandler
def_irq_handler DMA2_Channel3_IRQHandler
def_irq_handler DMA2_Channel4_IRQHandler
def_irq_handler DMA2_Channel5_IRQHandler
def_irq_handler CAN2_TX_IRQHandler
def_irq_handler CAN2_RX0_IRQHandler
def_irq_handler CAN2_RX1_IRQHandler
def_irq_handler CAN2_SCE_IRQHandler
def_irq_handler OTG_FS_IRQHandler
.end
#endif
+227
View File
@@ -0,0 +1,227 @@
/**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team, Wojciech Krutnik
* @version V2.2.2
* @date 26-June-2015
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx.s" file, to
* configure the system clock before to branch to main program.
*
* 3. This file configures the system clock and flash as follows:
*=============================================================================
* Supported STM32F1xx device
*-----------------------------------------------------------------------------
* System Clock source | PLL
*-----------------------------------------------------------------------------
* SYSCLK | 72MHz
*-----------------------------------------------------------------------------
* HCLK | 72Mhz
*-----------------------------------------------------------------------------
* PCLK1 | 36MHz
*-----------------------------------------------------------------------------
* PCLK2 | 72MHz
*-----------------------------------------------------------------------------
* AHB Prescaler | 1
*-----------------------------------------------------------------------------
* APB1 Prescaler | 2
*-----------------------------------------------------------------------------
* APB2 Prescaler | 1
*-----------------------------------------------------------------------------
* PLLSRC | HSE/1
*-----------------------------------------------------------------------------
* PLLMUL | 9
*-----------------------------------------------------------------------------
* HSE | 8MHz
*-----------------------------------------------------------------------------
* Flash Latency(WS) | 2
*-----------------------------------------------------------------------------
* Prefetch Buffer | ON
*-----------------------------------------------------------------------------
*=============================================================================
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
#if defined(STM32F105xC)
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/**
* @}
*/
/** @addtogroup STM32f1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
uint32_t SystemCoreClock = 48000000;
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
static void SetSysClock(void);
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system.
* Initialize the default HSI clock source, vector table location and the PLL configuration is reset.
* @param None
* @retval None
*/
void SystemInit(void)
{
/* Enable Prefetch Buffer, 2 wait states */
FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY_1;
/* Configure the System clock frequency, AHB/APBx prescalers */
SetSysClock();
}
/**
* @brief Configures the System clock frequency and AHB/APBx prescalers
* settings.
* @param None
* @retval None
*/
static void SetSysClock(void)
{
/* Enable HSE and Clock Security System */
RCC->CR |= RCC_CR_CSSON | RCC_CR_HSEON;
/* Wait for HSE startup */
while((RCC->CR & RCC_CR_HSERDY) == 0)
;
/* Enable PLL with 9x multiplier and HSE clock source
* APB1 prescaler /2 */
RCC->CFGR = (RCC->CFGR & (~RCC_CFGR_PLLMULL)) | RCC_CFGR_PLLMULL9
| RCC_CFGR_PLLSRC;
RCC->CR |= RCC_CR_PLLON;
while((RCC->CR & RCC_CR_PLLRDY) == 0)
;
/* HCLK = SYSCLK */
RCC->CFGR = (RCC->CFGR & ~RCC_CFGR_HPRE) | RCC_CFGR_HPRE_DIV1;
/* PCLK1 = HCLK/2; PCLK2 = HCLK */
RCC->CFGR = (RCC->CFGR & ~(RCC_CFGR_PPRE1|RCC_CFGR_PPRE2))
| RCC_CFGR_PPRE1_DIV2;
/* Switch SYSCLK to PLL */
RCC->CFGR |= RCC_CFGR_SW_PLL;
while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL)
;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/