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+4
-4
@@ -22,12 +22,12 @@
|
||||
#include "CWIdTX.h"
|
||||
|
||||
q15_t TONE[] = {
|
||||
0, 518, 1000, 1414, 1732, 1932, 2000, 1932, 1732, 1414, 1000, 518, 0, -518, -1000, -1414, -1732, -1932, -2000, -1932, -1732, -1414, -1000, -518};
|
||||
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||||
0, 261, 518, 765, 1000, 1218, 1414, 1587, 1732, 1848, 1932, 1983, 2000, 1983, 1932, 1848, 1732, 1587, 1414, 1218, 1000, 765, 518, 261, 0, -261, -518, -765, -1000, -1218, -1414,
|
||||
-1587, -1732, -1848, -1932, -1983, -2000, -1983, -1932, -1848, -1732, -1587, -1414, -1218, -1000, -765, -518, -261};
|
||||
q15_t SILENCE[] = {
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
|
||||
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
|
||||
|
||||
const uint8_t CYCLE_LENGTH = 24U;
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||||
const uint8_t CYCLE_LENGTH = 48U;
|
||||
|
||||
const uint8_t DOT_LENGTH = 50U;
|
||||
|
||||
|
||||
+111
-6
@@ -21,19 +21,121 @@
|
||||
#include "Globals.h"
|
||||
#include "CalDMR.h"
|
||||
|
||||
// Voice LC Header, CC: 1, srcID: 1, dstID: TG9
|
||||
const uint8_t VH_1K[] = {0x00U,
|
||||
0x00U, 0x20U, 0x08U, 0x08U, 0x02U, 0x38U, 0x15U, 0x00U, 0x2CU, 0xA0U, 0x14U,
|
||||
0x60U, 0x84U, 0x6DU, 0xFFU, 0x57U, 0xD7U, 0x5DU, 0xF5U, 0xDEU, 0x30U, 0x30U,
|
||||
0x01U, 0x10U, 0x01U, 0x40U, 0x03U, 0xC0U, 0x13U, 0xC1U, 0x1EU, 0x80U, 0x6FU};
|
||||
|
||||
// Voice Term with LC, CC: 1, srcID: 1, dstID: TG9
|
||||
const uint8_t VT_1K[] = {0x00U,
|
||||
0x00U, 0x4FU, 0x08U, 0xDCU, 0x02U, 0x88U, 0x15U, 0x78U, 0x2CU, 0xD0U, 0x14U,
|
||||
0xC0U, 0x84U, 0xADU, 0xFFU, 0x57U, 0xD7U, 0x5DU, 0xF5U, 0xD9U, 0x65U, 0x24U,
|
||||
0x02U, 0x28U, 0x06U, 0x20U, 0x0FU, 0x80U, 0x1BU, 0xC1U, 0x07U, 0x80U, 0x5CU};
|
||||
|
||||
// Voice coding data + FEC, 1031 Hz Test Pattern
|
||||
const uint8_t VOICE_1K[] = {0x00U,
|
||||
0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU, 0xCEU, 0xA8U,
|
||||
0xFEU, 0x83U, 0xA0U, 0x00U, 0x00U, 0x00U, 0x00U, 0x00U, 0x0CU, 0xC4U, 0x58U,
|
||||
0x20U, 0x0AU, 0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU};
|
||||
|
||||
// Embedded LC: CC: 1, srcID: 1, dstID: TG9
|
||||
const uint8_t SYNCEMB_1K[6][7] = {
|
||||
{0x07U, 0x55U, 0xFDU, 0x7DU, 0xF7U, 0x5FU, 0x70U}, // BS VOICE SYNC (audio seq 0)
|
||||
{0x01U, 0x30U, 0x00U, 0x00U, 0x90U, 0x09U, 0x10U}, // EMB + Embedded LC1 (audio seq 1)
|
||||
{0x01U, 0x70U, 0x00U, 0x90U, 0x00U, 0x07U, 0x40U}, // EMB + Embedded LC2 (audio seq 2)
|
||||
{0x01U, 0x70U, 0x00U, 0x31U, 0x40U, 0x07U, 0x40U}, // EMB + Embedded LC3 (audio seq 3)
|
||||
{0x01U, 0x50U, 0xA1U, 0x71U, 0xD1U, 0x70U, 0x70U}, // EMB + Embedded LC4 (audio seq 4)
|
||||
{0x01U, 0x10U, 0x00U, 0x00U, 0x00U, 0x0EU, 0x20U}}; // EMB (audio seq 5)
|
||||
|
||||
// Short LC:
|
||||
// TS1: dstID: 0, ACTIVITY_NONE
|
||||
// TS2: dstID: TG9, ACTIVITY_VOICE
|
||||
const uint8_t SHORTLC_1K[] = {0x33U, 0x3AU, 0xA0U, 0x30U, 0x00U, 0x55U, 0xA6U, 0x5FU, 0x50U};
|
||||
|
||||
CCalDMR::CCalDMR() :
|
||||
m_transmit(false)
|
||||
m_transmit(false),
|
||||
m_state(DMRCAL1K_IDLE),
|
||||
m_frame_start(0U),
|
||||
m_dmr1k(),
|
||||
m_audioSeq(0)
|
||||
{
|
||||
::memcpy(m_dmr1k, VOICE_1K, DMR_FRAME_LENGTH_BYTES + 1U);
|
||||
}
|
||||
|
||||
void CCalDMR::process()
|
||||
{
|
||||
if (m_transmit) {
|
||||
dmrTX.setCal(true);
|
||||
dmrTX.process();
|
||||
} else {
|
||||
dmrTX.setCal(false);
|
||||
switch (m_modemState) {
|
||||
case STATE_DMRCAL:
|
||||
case STATE_LFCAL:
|
||||
if (m_transmit) {
|
||||
dmrTX.setCal(true);
|
||||
dmrTX.process();
|
||||
} else {
|
||||
dmrTX.setCal(false);
|
||||
}
|
||||
break;
|
||||
case STATE_DMRCAL1K:
|
||||
dmr1kcal();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void CCalDMR::createData1k(uint8_t n)
|
||||
{
|
||||
for(uint8_t i = 0; i < 5U; i++)
|
||||
m_dmr1k[i + 15U] = SYNCEMB_1K[n][i + 1U];
|
||||
|
||||
m_dmr1k[14U] &= 0xF0U;
|
||||
m_dmr1k[20U] &= 0x0FU;
|
||||
m_dmr1k[14U] |= SYNCEMB_1K[n][0] & 0x0FU;
|
||||
m_dmr1k[20U] |= SYNCEMB_1K[n][6] & 0xF0U;
|
||||
}
|
||||
|
||||
void CCalDMR::dmr1kcal()
|
||||
{
|
||||
dmrTX.process();
|
||||
|
||||
uint16_t space = dmrTX.getSpace2();
|
||||
if (space < 1U)
|
||||
return;
|
||||
|
||||
switch (m_state) {
|
||||
case DMRCAL1K_VH:
|
||||
dmrTX.setColorCode(1U);
|
||||
dmrTX.writeShortLC(SHORTLC_1K, 9U);
|
||||
dmrTX.writeData2(VH_1K, DMR_FRAME_LENGTH_BYTES + 1U);
|
||||
dmrTX.setStart(true);
|
||||
m_state = DMRCAL1K_VOICE;
|
||||
break;
|
||||
case DMRCAL1K_VOICE:
|
||||
createData1k(m_audioSeq);
|
||||
dmrTX.writeData2(m_dmr1k, DMR_FRAME_LENGTH_BYTES + 1U);
|
||||
if(m_audioSeq == 5U) {
|
||||
m_audioSeq = 0U;
|
||||
if(!m_transmit)
|
||||
m_state = DMRCAL1K_VT;
|
||||
} else
|
||||
m_audioSeq++;
|
||||
break;
|
||||
case DMRCAL1K_VT:
|
||||
dmrTX.writeData2(VT_1K, DMR_FRAME_LENGTH_BYTES + 1U);
|
||||
m_frame_start = dmrTX.getFrameCount();
|
||||
m_state = DMRCAL1K_WAIT;
|
||||
break;
|
||||
case DMRCAL1K_WAIT:
|
||||
if (dmrTX.getFrameCount() > (m_frame_start + 30U)) {
|
||||
dmrTX.setStart(false);
|
||||
dmrTX.resetFifo2();
|
||||
m_audioSeq = 0U;
|
||||
m_state = DMRCAL1K_IDLE;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
m_state = DMRCAL1K_IDLE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -44,6 +146,9 @@ uint8_t CCalDMR::write(const uint8_t* data, uint8_t length)
|
||||
|
||||
m_transmit = data[0U] == 1U;
|
||||
|
||||
if(m_transmit && m_state == DMRCAL1K_IDLE && m_modemState == STATE_DMRCAL1K)
|
||||
m_state = DMRCAL1K_VH;
|
||||
|
||||
return 0U;
|
||||
}
|
||||
|
||||
|
||||
@@ -23,16 +23,30 @@
|
||||
#include "Config.h"
|
||||
#include "DMRDefines.h"
|
||||
|
||||
enum DMRCAL1K {
|
||||
DMRCAL1K_IDLE,
|
||||
DMRCAL1K_VH,
|
||||
DMRCAL1K_VOICE,
|
||||
DMRCAL1K_VT,
|
||||
DMRCAL1K_WAIT
|
||||
};
|
||||
|
||||
class CCalDMR {
|
||||
public:
|
||||
CCalDMR();
|
||||
|
||||
void process();
|
||||
void dmr1kcal();
|
||||
void createData1k(uint8_t n);
|
||||
|
||||
uint8_t write(const uint8_t* data, uint8_t length);
|
||||
|
||||
private:
|
||||
bool m_transmit;
|
||||
bool m_transmit;
|
||||
DMRCAL1K m_state;
|
||||
uint32_t m_frame_start;
|
||||
uint8_t m_dmr1k[DMR_FRAME_LENGTH_BYTES + 1U];
|
||||
uint8_t m_audioSeq;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
+1
-1
@@ -24,7 +24,7 @@
|
||||
const unsigned int BUFFER_LENGTH = 200U;
|
||||
|
||||
const uint32_t PLLMAX = 0x10000U;
|
||||
const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
|
||||
const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
const uint32_t INC = PLLINC / 32U;
|
||||
|
||||
// D-Star bit order version of 0x55 0x2D 0x16
|
||||
|
||||
+97
@@ -0,0 +1,97 @@
|
||||
/*
|
||||
* Copyright (C) 2018 by Andy Uribe CA6JAU
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
#include "CalP25.h"
|
||||
|
||||
// Recommended 1011 Hz test pattern for P25 Phase 1 (ANSI/TIA-102.CAAA)
|
||||
// NAC: 0x293, srcID: 1, dstID: TG1
|
||||
unsigned char LDU1_1K[] = {0x00,
|
||||
0x55, 0x75, 0xF5, 0xFF, 0x77, 0xFF, 0x29, 0x35, 0x54, 0x7B, 0xCB, 0x19, 0x4D, 0x0D, 0xCE, 0x24, 0xA1, 0x24,
|
||||
0x0D, 0x43, 0x3C, 0x0B, 0xE1, 0xB9, 0x18, 0x44, 0xFC, 0xC1, 0x62, 0x96, 0x27, 0x60, 0xE4, 0xE2, 0x4A, 0x10,
|
||||
0x90, 0xD4, 0x33, 0xC0, 0xBE, 0x1B, 0x91, 0x84, 0x4C, 0xFC, 0x16, 0x29, 0x62, 0x76, 0x0E, 0xC0, 0x00, 0x00,
|
||||
0x00, 0x00, 0x03, 0x89, 0x28, 0x49, 0x0D, 0x43, 0x3C, 0x02, 0xF8, 0x6E, 0x46, 0x11, 0x3F, 0xC1, 0x62, 0x94,
|
||||
0x89, 0xD8, 0x39, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x38, 0x24, 0xA1, 0x24, 0x35, 0x0C, 0xF0, 0x2F, 0x86, 0xE4,
|
||||
0x18, 0x44, 0xFF, 0x05, 0x8A, 0x58, 0x9D, 0x83, 0xB0, 0x00, 0x00, 0x00, 0x00, 0x70, 0xE2, 0x4A, 0x12, 0x40,
|
||||
0xD4, 0x33, 0xC0, 0xBE, 0x1B, 0x91, 0x84, 0x4F, 0xF0, 0x16, 0x29, 0x62, 0x76, 0x0E, 0x6D, 0xE5, 0xD5, 0x48,
|
||||
0xAD, 0xE3, 0x89, 0x28, 0x49, 0x0D, 0x43, 0x3C, 0x08, 0xF8, 0x6E, 0x46, 0x11, 0x3F, 0xC1, 0x62, 0x96, 0x24,
|
||||
0xD8, 0x3B, 0xA1, 0x41, 0xC2, 0xD2, 0xBA, 0x38, 0x90, 0xA1, 0x24, 0x35, 0x0C, 0xF0, 0x2F, 0x86, 0xE4, 0x60,
|
||||
0x44, 0xFF, 0x05, 0x8A, 0x58, 0x9D, 0x83, 0x94, 0xC8, 0xFB, 0x02, 0x35, 0xA4, 0xE2, 0x4A, 0x12, 0x43, 0x50,
|
||||
0x33, 0xC0, 0xBE, 0x1B, 0x91, 0x84, 0x4F, 0xF0, 0x58, 0x29, 0x62, 0x76, 0x0E, 0xC0, 0x00, 0x00, 0x00, 0x0C,
|
||||
0x89, 0x28, 0x49, 0x0D, 0x43, 0x3C, 0x0B, 0xE1, 0xB8, 0x46, 0x11, 0x3F, 0xC1, 0x62, 0x96, 0x27, 0x60, 0xE4};
|
||||
|
||||
unsigned char LDU2_1K[] = {0x00,
|
||||
0x55, 0x75, 0xF5, 0xFF, 0x77, 0xFF, 0x29, 0x3A, 0xB8, 0xA4, 0xEF, 0xB0, 0x9A, 0x8A, 0xCE, 0x24, 0xA1, 0x24,
|
||||
0x0D, 0x43, 0x3C, 0x0B, 0xE1, 0xB9, 0x18, 0x44, 0xFC, 0xC1, 0x62, 0x96, 0x27, 0x60, 0xEC, 0xE2, 0x4A, 0x10,
|
||||
0x90, 0xD4, 0x33, 0xC0, 0xBE, 0x1B, 0x91, 0x84, 0x4C, 0xFC, 0x16, 0x29, 0x62, 0x76, 0x0E, 0x40, 0x00, 0x00,
|
||||
0x00, 0x00, 0x03, 0x89, 0x28, 0x49, 0x0D, 0x43, 0x3C, 0x02, 0xF8, 0x6E, 0x46, 0x11, 0x3F, 0xC1, 0x62, 0x94,
|
||||
0x89, 0xD8, 0x3B, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x24, 0xA1, 0x24, 0x35, 0x0C, 0xF0, 0x2F, 0x86, 0xE4,
|
||||
0x18, 0x44, 0xFF, 0x05, 0x8A, 0x58, 0x9D, 0x83, 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE2, 0x4A, 0x12, 0x40,
|
||||
0xD4, 0x33, 0xC0, 0xBE, 0x1B, 0x91, 0x84, 0x4F, 0xF0, 0x16, 0x29, 0x62, 0x76, 0x0E, 0xE0, 0xE0, 0x00, 0x00,
|
||||
0x00, 0x03, 0x89, 0x28, 0x49, 0x0D, 0x43, 0x3C, 0x08, 0xF8, 0x6E, 0x46, 0x11, 0x3F, 0xC1, 0x62, 0x96, 0x24,
|
||||
0xD8, 0x39, 0xAE, 0x8B, 0x48, 0xB6, 0x49, 0x38, 0x90, 0xA1, 0x24, 0x35, 0x0C, 0xF0, 0x2F, 0x86, 0xE4, 0x60,
|
||||
0x44, 0xFF, 0x05, 0x8A, 0x58, 0x9D, 0x83, 0xB9, 0xA8, 0xF4, 0xF1, 0xFD, 0x60, 0xE2, 0x4A, 0x12, 0x43, 0x50,
|
||||
0x33, 0xC0, 0xBE, 0x1B, 0x91, 0x84, 0x4F, 0xF0, 0x58, 0x29, 0x62, 0x76, 0x0E, 0x40, 0x00, 0x00, 0x00, 0x0C,
|
||||
0x89, 0x28, 0x49, 0x0D, 0x43, 0x3C, 0x0B, 0xE1, 0xB8, 0x46, 0x11, 0x3F, 0xC1, 0x62, 0x96, 0x27, 0x60, 0xEC};
|
||||
|
||||
CCalP25::CCalP25() :
|
||||
m_transmit(false),
|
||||
m_state(P25CAL1K_IDLE)
|
||||
{
|
||||
}
|
||||
|
||||
void CCalP25::process()
|
||||
{
|
||||
p25TX.process();
|
||||
|
||||
uint16_t space = p25TX.getSpace();
|
||||
if (space < 1U)
|
||||
return;
|
||||
|
||||
switch (m_state) {
|
||||
case P25CAL1K_LDU1:
|
||||
p25TX.writeData(LDU1_1K, P25_LDU_FRAME_LENGTH_BYTES + 1U);
|
||||
m_state = P25CAL1K_LDU2;
|
||||
break;
|
||||
case P25CAL1K_LDU2:
|
||||
p25TX.writeData(LDU2_1K, P25_LDU_FRAME_LENGTH_BYTES + 1U);
|
||||
if(!m_transmit)
|
||||
m_state = P25CAL1K_IDLE;
|
||||
else
|
||||
m_state = P25CAL1K_LDU1;
|
||||
break;
|
||||
default:
|
||||
m_state = P25CAL1K_IDLE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t CCalP25::write(const uint8_t* data, uint8_t length)
|
||||
{
|
||||
if (length != 1U)
|
||||
return 4U;
|
||||
|
||||
m_transmit = data[0U] == 1U;
|
||||
|
||||
if(m_transmit && m_state == P25CAL1K_IDLE)
|
||||
m_state = P25CAL1K_LDU1;
|
||||
|
||||
return 0U;
|
||||
}
|
||||
|
||||
@@ -0,0 +1,45 @@
|
||||
/*
|
||||
* Copyright (C) 2018 by Andy Uribe CA6JAU
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if !defined(CALP25_H)
|
||||
#define CALP25_H
|
||||
|
||||
#include "Config.h"
|
||||
#include "P25Defines.h"
|
||||
|
||||
enum P25CAL1K {
|
||||
P25CAL1K_IDLE,
|
||||
P25CAL1K_LDU1,
|
||||
P25CAL1K_LDU2
|
||||
};
|
||||
|
||||
class CCalP25 {
|
||||
public:
|
||||
CCalP25();
|
||||
|
||||
void process();
|
||||
|
||||
uint8_t write(const uint8_t* data, uint8_t length);
|
||||
|
||||
private:
|
||||
bool m_transmit;
|
||||
P25CAL1K m_state;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
@@ -27,7 +27,7 @@
|
||||
// Frequencies such as 10.0 Mhz (48000 * 208.333) or 20 Mhz (48000 * 416.666) are not suitable.
|
||||
//
|
||||
// For 12 MHz
|
||||
// #define EXTERNAL_OSC 12000000
|
||||
#define EXTERNAL_OSC 12000000
|
||||
// For 12.288 MHz
|
||||
// #define EXTERNAL_OSC 12288000
|
||||
// For 14.4 MHz
|
||||
|
||||
+1
-1
@@ -22,7 +22,7 @@
|
||||
#include "Config.h"
|
||||
#include "DMRDefines.h"
|
||||
|
||||
const uint16_t DMO_BUFFER_LENGTH_SAMPLES = 1440U; // 60ms at 24 kHz
|
||||
const uint16_t DMO_BUFFER_LENGTH_SAMPLES = 2880U; // 60ms at 48 kHz
|
||||
|
||||
enum DMORX_STATE {
|
||||
DMORXS_NONE,
|
||||
|
||||
+10
-4
@@ -22,10 +22,16 @@
|
||||
#include "Globals.h"
|
||||
#include "DMRSlotType.h"
|
||||
|
||||
// Generated using rcosdesign(0.2, 8, 5, 'sqrt') in MATLAB
|
||||
static q15_t RRC_0_2_FILTER[] = {0, 0, 0, 0, 850, 219, -720, -1548, -1795, -1172, 237, 1927, 3120, 3073, 1447, -1431, -4544, -6442,
|
||||
-5735, -1633, 5651, 14822, 23810, 30367, 32767, 30367, 23810, 14822, 5651, -1633, -5735, -6442,
|
||||
-4544, -1431, 1447, 3073, 3120, 1927, 237, -1172, -1795, -1548, -720, 219, 850}; // numTaps = 45, L = 5
|
||||
// Generated using rcosdesign(0.2, 8, 10, 'sqrt') in MATLAB
|
||||
static q15_t RRC_0_2_FILTER[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 850, 592, 219, -234, -720, -1179,
|
||||
-1548, -1769, -1795, -1597, -1172, -544, 237, 1092, 1927, 2637,
|
||||
3120, 3286, 3073, 2454, 1447, 116, -1431, -3043, -4544, -5739,
|
||||
-6442, -6483, -5735, -4121, -1633, 1669, 5651, 10118, 14822,
|
||||
19484, 23810, 27520, 30367, 32156, 32767, 32156, 30367, 27520,
|
||||
23810, 19484, 14822, 10118, 5651, 1669, -1633, -4121, -5735,
|
||||
-6483, -6442, -5739, -4544, -3043, -1431, 116, 1447, 2454,
|
||||
3073, 3286, 3120, 2637, 1927, 1092, 237, -544, -1172, -1597,
|
||||
-1795, -1769, -1548, -1179, -720, -234, 219, 592, 850}; // numTaps = 90, L = 10
|
||||
const uint16_t RRC_0_2_FILTER_PHASE_LEN = 9U; // phaseLength = numTaps/L
|
||||
|
||||
const q15_t DMR_LEVELA = 1362;
|
||||
|
||||
+2
-2
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2009-2016 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -19,7 +19,7 @@
|
||||
#if !defined(DMRDEFINES_H)
|
||||
#define DMRDEFINES_H
|
||||
|
||||
const unsigned int DMR_RADIO_SYMBOL_LENGTH = 5U; // At 24 kHz sample rate
|
||||
const unsigned int DMR_RADIO_SYMBOL_LENGTH = 10U; // At 48 kHz sample rate
|
||||
|
||||
const unsigned int DMR_FRAME_LENGTH_BYTES = 33U;
|
||||
const unsigned int DMR_FRAME_LENGTH_BITS = DMR_FRAME_LENGTH_BYTES * 8U;
|
||||
|
||||
+3
-3
@@ -22,8 +22,8 @@
|
||||
#include "DMRSlotType.h"
|
||||
#include "Utils.h"
|
||||
|
||||
const uint16_t SCAN_START = 400U;
|
||||
const uint16_t SCAN_END = 490U;
|
||||
const uint16_t SCAN_START = 790U;
|
||||
const uint16_t SCAN_END = 920U;
|
||||
|
||||
const q15_t SCALING_FACTOR = 19505; // Q15(0.60)
|
||||
|
||||
@@ -97,7 +97,7 @@ bool CDMRSlotRX::processSample(q15_t sample, uint16_t rssi)
|
||||
return m_state != DMRRXS_NONE;
|
||||
|
||||
// Ensure that the buffer doesn't overflow
|
||||
if (m_dataPtr > m_endPtr || m_dataPtr >= 900U)
|
||||
if (m_dataPtr > m_endPtr || m_dataPtr >= 1900U)
|
||||
return m_state != DMRRXS_NONE;
|
||||
|
||||
m_buffer[m_dataPtr] = sample;
|
||||
|
||||
+2
-2
@@ -44,7 +44,7 @@ public:
|
||||
private:
|
||||
bool m_slot;
|
||||
uint32_t m_bitBuffer[DMR_RADIO_SYMBOL_LENGTH];
|
||||
q15_t m_buffer[900U];
|
||||
q15_t m_buffer[1900U];
|
||||
uint16_t m_bitPtr;
|
||||
uint16_t m_dataPtr;
|
||||
uint16_t m_syncPtr;
|
||||
@@ -62,7 +62,7 @@ private:
|
||||
DMRRX_STATE m_state;
|
||||
uint8_t m_n;
|
||||
uint8_t m_type;
|
||||
uint16_t m_rssi[900U];
|
||||
uint16_t m_rssi[1900U];
|
||||
|
||||
void correlateSync(bool first);
|
||||
void samplesToBits(uint16_t start, uint8_t count, uint8_t* buffer, uint16_t offset, q15_t centre, q15_t threshold);
|
||||
|
||||
@@ -22,10 +22,16 @@
|
||||
#include "Globals.h"
|
||||
#include "DMRSlotType.h"
|
||||
|
||||
// Generated using rcosdesign(0.2, 8, 5, 'sqrt') in MATLAB
|
||||
static q15_t RRC_0_2_FILTER[] = {0, 0, 0, 0, 850, 219, -720, -1548, -1795, -1172, 237, 1927, 3120, 3073, 1447, -1431, -4544, -6442,
|
||||
-5735, -1633, 5651, 14822, 23810, 30367, 32767, 30367, 23810, 14822, 5651, -1633, -5735, -6442,
|
||||
-4544, -1431, 1447, 3073, 3120, 1927, 237, -1172, -1795, -1548, -720, 219, 850}; // numTaps = 45, L = 5
|
||||
// Generated using rcosdesign(0.2, 8, 10, 'sqrt') in MATLAB
|
||||
static q15_t RRC_0_2_FILTER[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 850, 592, 219, -234, -720, -1179,
|
||||
-1548, -1769, -1795, -1597, -1172, -544, 237, 1092, 1927, 2637,
|
||||
3120, 3286, 3073, 2454, 1447, 116, -1431, -3043, -4544, -5739,
|
||||
-6442, -6483, -5735, -4121, -1633, 1669, 5651, 10118, 14822,
|
||||
19484, 23810, 27520, 30367, 32156, 32767, 32156, 30367, 27520,
|
||||
23810, 19484, 14822, 10118, 5651, 1669, -1633, -4121, -5735,
|
||||
-6483, -6442, -5739, -4544, -3043, -1431, 116, 1447, 2454,
|
||||
3073, 3286, 3120, 2637, 1927, 1092, 237, -544, -1172, -1597,
|
||||
-1795, -1769, -1548, -1179, -720, -234, 219, 592, 850}; // numTaps = 90, L = 10
|
||||
const uint16_t RRC_0_2_FILTER_PHASE_LEN = 9U; // phaseLength = numTaps/L
|
||||
|
||||
const q15_t DMR_LEVELA = 1362;
|
||||
@@ -302,12 +308,33 @@ void CDMRTX::createData(uint8_t slotIndex)
|
||||
|
||||
void CDMRTX::createCal()
|
||||
{
|
||||
for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++) {
|
||||
m_poBuffer[i] = 0x5FU; // +3, +3, -3, -3 pattern for deviation cal.
|
||||
m_markBuffer[i] = MARK_NONE;
|
||||
// 1.2 kHz sine wave generation
|
||||
if (m_modemState == STATE_DMRCAL) {
|
||||
for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++) {
|
||||
m_poBuffer[i] = 0x5FU; // +3, +3, -3, -3 pattern for deviation cal.
|
||||
m_markBuffer[i] = MARK_NONE;
|
||||
}
|
||||
|
||||
m_poLen = DMR_FRAME_LENGTH_BYTES;
|
||||
}
|
||||
|
||||
// 80 Hz square wave generation
|
||||
if (m_modemState == STATE_LFCAL) {
|
||||
for (unsigned int i = 0U; i < 7U; i++) {
|
||||
m_poBuffer[i] = 0x55U; // +3, +3, ... pattern
|
||||
m_markBuffer[i] = MARK_NONE;
|
||||
}
|
||||
|
||||
m_poBuffer[7U] = 0x5FU; // +3, +3, -3, -3 pattern
|
||||
|
||||
for (unsigned int i = 8U; i < 15U; i++) {
|
||||
m_poBuffer[i] = 0xFFU; // -3, -3, ... pattern
|
||||
m_markBuffer[i] = MARK_NONE;
|
||||
}
|
||||
|
||||
m_poLen = 15U;
|
||||
}
|
||||
|
||||
m_poLen = DMR_FRAME_LENGTH_BYTES;
|
||||
m_poPtr = 0U;
|
||||
}
|
||||
|
||||
@@ -368,3 +395,17 @@ void CDMRTX::setColorCode(uint8_t colorCode)
|
||||
slotType.encode(colorCode, DT_IDLE, m_idle);
|
||||
}
|
||||
|
||||
void CDMRTX::resetFifo1()
|
||||
{
|
||||
m_fifo[0U].reset();
|
||||
}
|
||||
|
||||
void CDMRTX::resetFifo2()
|
||||
{
|
||||
m_fifo[1U].reset();
|
||||
}
|
||||
|
||||
uint32_t CDMRTX::getFrameCount()
|
||||
{
|
||||
return m_frameCount;
|
||||
}
|
||||
|
||||
@@ -48,7 +48,11 @@ public:
|
||||
void setCal(bool start);
|
||||
|
||||
void process();
|
||||
|
||||
|
||||
void resetFifo1();
|
||||
void resetFifo2();
|
||||
uint32_t getFrameCount();
|
||||
|
||||
uint8_t getSpace1() const;
|
||||
uint8_t getSpace2() const;
|
||||
|
||||
|
||||
+37
-17
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2009-2015,2017 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -19,30 +19,50 @@
|
||||
#if !defined(DSTARDEFINES_H)
|
||||
#define DSTARDEFINES_H
|
||||
|
||||
const unsigned int DSTAR_RADIO_BIT_LENGTH = 5U; // At 24 kHz sample rate
|
||||
const unsigned int DSTAR_RADIO_SYMBOL_LENGTH = 10U; // At 48 kHz sample rate
|
||||
|
||||
const unsigned int DSTAR_HEADER_LENGTH_BYTES = 41U;
|
||||
const unsigned int DSTAR_HEADER_LENGTH_BITS = DSTAR_HEADER_LENGTH_BYTES * 8U;
|
||||
const unsigned int DSTAR_HEADER_LENGTH_BYTES = 41U;
|
||||
|
||||
const unsigned int DSTAR_FEC_SECTION_LENGTH_BYTES = 83U;
|
||||
const unsigned int DSTAR_FEC_SECTION_LENGTH_BITS = 660U;
|
||||
const unsigned int DSTAR_FEC_SECTION_LENGTH_BYTES = 83U;
|
||||
const unsigned int DSTAR_FEC_SECTION_LENGTH_SYMBOLS = 660U;
|
||||
const unsigned int DSTAR_FEC_SECTION_LENGTH_SAMPLES = DSTAR_FEC_SECTION_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
|
||||
const unsigned int DSTAR_DATA_LENGTH_BYTES = 12U;
|
||||
const unsigned int DSTAR_DATA_LENGTH_BITS = DSTAR_DATA_LENGTH_BYTES * 8U;
|
||||
const unsigned int DSTAR_DATA_LENGTH_BYTES = 12U;
|
||||
const unsigned int DSTAR_DATA_LENGTH_SYMBOLS = DSTAR_DATA_LENGTH_BYTES * 8U;
|
||||
const unsigned int DSTAR_DATA_LENGTH_SAMPLES = DSTAR_DATA_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
|
||||
const uint8_t DSTAR_EOT_BYTES[] = {0x55, 0x55, 0x55, 0x55, 0xC8, 0x7A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
|
||||
const unsigned int DSTAR_EOT_LENGTH_BYTES = 6U;
|
||||
const unsigned int DSTAR_EOT_LENGTH_BITS = DSTAR_EOT_LENGTH_BYTES * 8U;
|
||||
const unsigned int DSTAR_END_SYNC_LENGTH_BYTES = 6U;
|
||||
const unsigned int DSTAR_END_SYNC_LENGTH_BITS = DSTAR_END_SYNC_LENGTH_BYTES * 8U;
|
||||
|
||||
const uint8_t DSTAR_DATA_SYNC_LENGTH_BYTES = 3U;
|
||||
const uint8_t DSTAR_DATA_SYNC_LENGTH_BITS = DSTAR_DATA_SYNC_LENGTH_BYTES * 8U;
|
||||
const unsigned int DSTAR_FRAME_SYNC_LENGTH_BYTES = 3U;
|
||||
const unsigned int DSTAR_FRAME_SYNC_LENGTH_SYMBOLS = DSTAR_FRAME_SYNC_LENGTH_BYTES * 8U;
|
||||
const unsigned int DSTAR_FRAME_SYNC_LENGTH_SAMPLES = DSTAR_FRAME_SYNC_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
|
||||
const uint8_t DSTAR_DATA_SYNC_BYTES[] = {0x9E, 0x8D, 0x32, 0x88, 0x26, 0x1A, 0x3F, 0x61, 0xE8, 0x55, 0x2D, 0x16};
|
||||
const unsigned int DSTAR_DATA_SYNC_LENGTH_BYTES = 3U;
|
||||
const unsigned int DSTAR_DATA_SYNC_LENGTH_SYMBOLS = DSTAR_DATA_SYNC_LENGTH_BYTES * 8U;
|
||||
const unsigned int DSTAR_DATA_SYNC_LENGTH_SAMPLES = DSTAR_DATA_SYNC_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
|
||||
const uint8_t DSTAR_SLOW_DATA_TYPE_TEXT = 0x40U;
|
||||
const uint8_t DSTAR_SLOW_DATA_TYPE_HEADER = 0x50U;
|
||||
const uint8_t DSTAR_DATA_SYNC_BYTES[] = {0x9E, 0x8D, 0x32, 0x88, 0x26, 0x1A, 0x3F, 0x61, 0xE8, 0x55, 0x2D, 0x16};
|
||||
|
||||
const uint8_t DSTAR_SCRAMBLER_BYTES[] = {0x70U, 0x4FU, 0x93U};
|
||||
// D-Star bit order version of 0x55 0x6E 0x0A
|
||||
const uint32_t DSTAR_FRAME_SYNC_DATA = 0x00557650U;
|
||||
const uint32_t DSTAR_FRAME_SYNC_MASK = 0x00FFFFFFU;
|
||||
const bool DSTAR_FRAME_SYNC_SYMBOLS[] = {false, true, false, true, false, true, false, true, false, true, true, true, false, true, true, false, false, true, false, true, false, false, false, false};
|
||||
|
||||
// D-Star bit order version of 0x55 0x2D 0x16
|
||||
const uint32_t DSTAR_DATA_SYNC_DATA = 0x00AAB468U;
|
||||
const uint32_t DSTAR_DATA_SYNC_MASK = 0x00FFFFFFU;
|
||||
const bool DSTAR_DATA_SYNC_SYMBOLS[] = {true, false, true, false, true, false, true, false, true, false, true, true, false, true, false, false, false, true, true, false, true, false, false, false};
|
||||
|
||||
// D-Star bit order version of 0x55 0x55 0xC8 0x7A
|
||||
const uint32_t DSTAR_END_SYNC_DATA = 0xAAAA135EU;
|
||||
const uint32_t DSTAR_END_SYNC_MASK = 0xFFFFFFFFU;
|
||||
const uint8_t DSTAR_END_SYNC_BYTES[] = {0x55, 0x55, 0x55, 0x55, 0xC8, 0x7A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
|
||||
|
||||
const uint8_t DSTAR_SLOW_DATA_TYPE_TEXT = 0x40U;
|
||||
const uint8_t DSTAR_SLOW_DATA_TYPE_HEADER = 0x50U;
|
||||
|
||||
const uint8_t DSTAR_SCRAMBLER_BYTES[] = {0x70U, 0x4FU, 0x93U};
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
+239
-174
@@ -22,26 +22,12 @@
|
||||
#include "DStarRX.h"
|
||||
#include "Utils.h"
|
||||
|
||||
const unsigned int BUFFER_LENGTH = 200U;
|
||||
|
||||
const uint32_t PLLMAX = 0x10000U;
|
||||
const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
|
||||
const uint32_t INC = PLLINC / 32U;
|
||||
|
||||
const unsigned int MAX_SYNC_BITS = 50U * DSTAR_DATA_LENGTH_BITS;
|
||||
|
||||
const unsigned int SYNC_POS = 21U * DSTAR_DATA_LENGTH_BITS;
|
||||
const unsigned int SYNC_SCAN_START = SYNC_POS - 3U;
|
||||
const unsigned int SYNC_SCAN_END = SYNC_POS + 3U;
|
||||
|
||||
// Generated using [b, a] = butter(1, 0.001) in MATLAB
|
||||
static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2}
|
||||
const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
|
||||
const unsigned int MAX_FRAMES = 150U;
|
||||
|
||||
// D-Star bit order version of 0x55 0x55 0x6E 0x0A
|
||||
const uint32_t FRAME_SYNC_DATA = 0x00557650U;
|
||||
const uint32_t FRAME_SYNC_MASK = 0x00FFFFFFU;
|
||||
const uint8_t FRAME_SYNC_ERRS = 2U;
|
||||
const uint8_t FRAME_SYNC_ERRS = 1U;
|
||||
|
||||
// D-Star bit order version of 0x55 0x2D 0x16
|
||||
const uint32_t DATA_SYNC_DATA = 0x00AAB468U;
|
||||
@@ -51,7 +37,7 @@ const uint8_t DATA_SYNC_ERRS = 2U;
|
||||
// D-Star bit order version of 0x55 0x55 0xC8 0x7A
|
||||
const uint32_t END_SYNC_DATA = 0xAAAA135EU;
|
||||
const uint32_t END_SYNC_MASK = 0xFFFFFFFFU;
|
||||
const uint8_t END_SYNC_ERRS = 3U;
|
||||
const uint8_t END_SYNC_ERRS = 1U;
|
||||
|
||||
const uint8_t BIT_MASK_TABLE0[] = {0x7FU, 0xBFU, 0xDFU, 0xEFU, 0xF7U, 0xFBU, 0xFDU, 0xFEU};
|
||||
const uint8_t BIT_MASK_TABLE1[] = {0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U};
|
||||
@@ -245,14 +231,24 @@ const uint16_t CCITT_TABLE[] = {
|
||||
0xf78fU, 0xe606U, 0xd49dU, 0xc514U, 0xb1abU, 0xa022U, 0x92b9U, 0x8330U,
|
||||
0x7bc7U, 0x6a4eU, 0x58d5U, 0x495cU, 0x3de3U, 0x2c6aU, 0x1ef1U, 0x0f78U};
|
||||
|
||||
const uint16_t NOENDPTR = 9999U;
|
||||
|
||||
CDStarRX::CDStarRX() :
|
||||
m_pll(0U),
|
||||
m_prev(false),
|
||||
m_rxState(DSRXS_NONE),
|
||||
m_patternBuffer(0x00U),
|
||||
m_rxBuffer(),
|
||||
m_rxBufferBits(0U),
|
||||
m_dataBits(0U),
|
||||
m_bitBuffer(),
|
||||
m_headerBuffer(),
|
||||
m_dataBuffer(),
|
||||
m_bitPtr(0U),
|
||||
m_headerPtr(0U),
|
||||
m_dataPtr(0U),
|
||||
m_startPtr(NOENDPTR),
|
||||
m_syncPtr(NOENDPTR),
|
||||
m_minSyncPtr(NOENDPTR),
|
||||
m_maxSyncPtr(NOENDPTR),
|
||||
m_maxFrameCorr(0),
|
||||
m_maxDataCorr(0),
|
||||
m_frameCount(0U),
|
||||
m_countdown(0U),
|
||||
m_mar(0U),
|
||||
m_pathMetric(),
|
||||
m_pathMemory0(),
|
||||
@@ -261,167 +257,145 @@ m_pathMemory2(),
|
||||
m_pathMemory3(),
|
||||
m_fecOutput(),
|
||||
m_rssiAccum(0U),
|
||||
m_rssiCount(0U),
|
||||
m_dcFilter(),
|
||||
m_dcState()
|
||||
m_rssiCount(0U)
|
||||
{
|
||||
::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
|
||||
|
||||
m_dcFilter.numStages = DC_FILTER_STAGES;
|
||||
m_dcFilter.pState = m_dcState;
|
||||
m_dcFilter.pCoeffs = DC_FILTER;
|
||||
m_dcFilter.postShift = 0;
|
||||
}
|
||||
|
||||
void CDStarRX::reset()
|
||||
{
|
||||
m_pll = 0U;
|
||||
m_prev = false;
|
||||
m_rxState = DSRXS_NONE;
|
||||
m_patternBuffer = 0x00U;
|
||||
m_rxBufferBits = 0U;
|
||||
m_dataBits = 0U;
|
||||
m_rssiAccum = 0U;
|
||||
m_rssiCount = 0U;
|
||||
m_rxState = DSRXS_NONE;
|
||||
m_headerPtr = 0U;
|
||||
m_dataPtr = 0U;
|
||||
m_bitPtr = 0U;
|
||||
m_maxFrameCorr = 0;
|
||||
m_maxDataCorr = 0;
|
||||
m_startPtr = NOENDPTR;
|
||||
m_syncPtr = NOENDPTR;
|
||||
m_minSyncPtr = NOENDPTR;
|
||||
m_maxSyncPtr = NOENDPTR;
|
||||
m_frameCount = 0U;
|
||||
m_countdown = 0U;
|
||||
m_rssiAccum = 0U;
|
||||
m_rssiCount = 0U;
|
||||
}
|
||||
|
||||
void CDStarRX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t length)
|
||||
{
|
||||
q31_t dc_level = 0;
|
||||
q31_t dcVals[20];
|
||||
q31_t intSamp[20];
|
||||
|
||||
::arm_q15_to_q31((q15_t*)samples, intSamp, length);
|
||||
::arm_biquad_cascade_df1_q31(&m_dcFilter, intSamp, dcVals, length);
|
||||
|
||||
for (uint8_t i = 0U; i < length; i++)
|
||||
dc_level += dcVals[i];
|
||||
|
||||
dc_level /= length;
|
||||
|
||||
for (uint16_t i = 0U; i < length; i++) {
|
||||
m_rssiAccum += rssi[i];
|
||||
m_rssiCount++;
|
||||
|
||||
bool bit = samples[i] < (q15_t) (dc_level >> 16);
|
||||
q15_t sample = samples[i];
|
||||
|
||||
if (bit != m_prev) {
|
||||
if (m_pll < (PLLMAX / 2U))
|
||||
m_pll += INC;
|
||||
else
|
||||
m_pll -= INC;
|
||||
m_bitBuffer[m_bitPtr] <<= 1;
|
||||
if (sample < 0)
|
||||
m_bitBuffer[m_bitPtr] |= 0x01U;
|
||||
|
||||
m_dataBuffer[m_dataPtr] = sample;
|
||||
|
||||
switch (m_rxState) {
|
||||
case DSRXS_HEADER:
|
||||
processHeader(sample);
|
||||
break;
|
||||
case DSRXS_DATA:
|
||||
processData();
|
||||
break;
|
||||
default:
|
||||
processNone(sample);
|
||||
break;
|
||||
}
|
||||
|
||||
m_prev = bit;
|
||||
m_dataPtr++;
|
||||
if (m_dataPtr >= DSTAR_DATA_LENGTH_SAMPLES)
|
||||
m_dataPtr = 0U;
|
||||
|
||||
m_pll += PLLINC;
|
||||
|
||||
if (m_pll >= PLLMAX) {
|
||||
m_pll -= PLLMAX;
|
||||
|
||||
switch (m_rxState) {
|
||||
case DSRXS_NONE:
|
||||
processNone(bit);
|
||||
break;
|
||||
case DSRXS_HEADER:
|
||||
processHeader(bit);
|
||||
break;
|
||||
case DSRXS_DATA:
|
||||
processData(bit);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
m_bitPtr++;
|
||||
if (m_bitPtr >= DSTAR_RADIO_SYMBOL_LENGTH)
|
||||
m_bitPtr = 0U;
|
||||
}
|
||||
}
|
||||
|
||||
void CDStarRX::processNone(bool bit)
|
||||
void CDStarRX::processNone(q15_t sample)
|
||||
{
|
||||
m_patternBuffer <<= 1;
|
||||
if (bit)
|
||||
m_patternBuffer |= 0x01U;
|
||||
|
||||
// Fuzzy matching of the frame sync sequence
|
||||
if (countBits32((m_patternBuffer & FRAME_SYNC_MASK) ^ FRAME_SYNC_DATA) <= FRAME_SYNC_ERRS) {
|
||||
DEBUG1("DStarRX: found frame sync in None");
|
||||
|
||||
::memset(m_rxBuffer, 0x00U, DSTAR_FEC_SECTION_LENGTH_BYTES);
|
||||
m_rxBufferBits = 0U;
|
||||
bool ret = correlateFrameSync();
|
||||
if (ret) {
|
||||
m_countdown = 5U;
|
||||
|
||||
m_headerBuffer[m_headerPtr] = sample;
|
||||
m_headerPtr++;
|
||||
|
||||
m_rssiAccum = 0U;
|
||||
m_rssiCount = 0U;
|
||||
|
||||
m_rxState = DSRXS_HEADER;
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
// Exact matching of the data sync bit sequence
|
||||
if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) == 0U) {
|
||||
// Fuzzy matching of the data sync bit sequence
|
||||
ret = correlateDataSync();
|
||||
if (ret) {
|
||||
DEBUG1("DStarRX: found data sync in None");
|
||||
|
||||
io.setDecode(true);
|
||||
io.setADCDetection(true);
|
||||
|
||||
// Suppress RSSI on the dummy sync message
|
||||
m_rssiAccum = 0U;
|
||||
m_rssiCount = 0U;
|
||||
|
||||
::memcpy(m_rxBuffer, DSTAR_DATA_SYNC_BYTES, DSTAR_DATA_LENGTH_BYTES);
|
||||
writeRSSIData(m_rxBuffer);
|
||||
|
||||
::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
|
||||
m_rxBufferBits = 0U;
|
||||
|
||||
m_dataBits = 0U;
|
||||
m_rxState = DSRXS_DATA;
|
||||
return;
|
||||
m_rxState = DSRXS_DATA;
|
||||
}
|
||||
}
|
||||
|
||||
void CDStarRX::processHeader(bool bit)
|
||||
void CDStarRX::processHeader(q15_t sample)
|
||||
{
|
||||
m_patternBuffer <<= 1;
|
||||
if (bit)
|
||||
m_patternBuffer |= 0x01U;
|
||||
if (m_countdown > 0U) {
|
||||
correlateFrameSync();
|
||||
m_countdown--;
|
||||
}
|
||||
|
||||
WRITE_BIT2(m_rxBuffer, m_rxBufferBits, bit);
|
||||
m_rxBufferBits++;
|
||||
m_headerBuffer[m_headerPtr] = sample;
|
||||
m_headerPtr++;
|
||||
|
||||
// A full FEC header
|
||||
if (m_rxBufferBits == DSTAR_FEC_SECTION_LENGTH_BITS) {
|
||||
// Process the scrambling, interleaving and FEC, then return if the chcksum was correct
|
||||
unsigned char header[DSTAR_HEADER_LENGTH_BYTES];
|
||||
bool ok = rxHeader(m_rxBuffer, header);
|
||||
if (ok) {
|
||||
if (m_headerPtr == (DSTAR_FEC_SECTION_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH)) {
|
||||
uint8_t buffer[DSTAR_FEC_SECTION_LENGTH_BYTES];
|
||||
samplesToBits(m_headerBuffer, DSTAR_RADIO_SYMBOL_LENGTH, DSTAR_FEC_SECTION_LENGTH_SYMBOLS, buffer, DSTAR_FEC_SECTION_LENGTH_SAMPLES);
|
||||
|
||||
// Process the scrambling, interleaving and FEC, then return true if the chcksum was correct
|
||||
uint8_t header[DSTAR_HEADER_LENGTH_BYTES];
|
||||
bool ok = rxHeader(buffer, header);
|
||||
if (!ok) {
|
||||
// The checksum failed, return to looking for syncs
|
||||
m_rxState = DSRXS_NONE;
|
||||
m_maxFrameCorr = 0;
|
||||
m_maxDataCorr = 0;
|
||||
} else {
|
||||
io.setDecode(true);
|
||||
io.setADCDetection(true);
|
||||
|
||||
writeRSSIHeader(header);
|
||||
|
||||
::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
|
||||
m_rxBufferBits = 0U;
|
||||
|
||||
m_rxState = DSRXS_DATA;
|
||||
m_dataBits = SYNC_POS - DSTAR_DATA_LENGTH_BITS + 1U;
|
||||
} else {
|
||||
// The checksum failed, return to looking for syncs
|
||||
m_rxState = DSRXS_NONE;
|
||||
}
|
||||
}
|
||||
|
||||
// Ready to start the first data section
|
||||
if (m_headerPtr == (DSTAR_FEC_SECTION_LENGTH_SAMPLES + 2U * DSTAR_RADIO_SYMBOL_LENGTH)) {
|
||||
m_frameCount = 0U;
|
||||
m_dataPtr = 0U;
|
||||
|
||||
m_startPtr = 952U;
|
||||
m_syncPtr = 942U;
|
||||
m_maxSyncPtr = 944U;
|
||||
m_minSyncPtr = 940U;
|
||||
|
||||
DEBUG5("DStarRX: calc start/sync/max/min", m_startPtr, m_syncPtr, m_maxSyncPtr, m_minSyncPtr);
|
||||
|
||||
m_rxState = DSRXS_DATA;
|
||||
}
|
||||
}
|
||||
|
||||
void CDStarRX::processData(bool bit)
|
||||
void CDStarRX::processData()
|
||||
{
|
||||
m_patternBuffer <<= 1;
|
||||
if (bit)
|
||||
m_patternBuffer |= 0x01U;
|
||||
|
||||
WRITE_BIT2(m_rxBuffer, m_rxBufferBits, bit);
|
||||
m_rxBufferBits++;
|
||||
|
||||
// Fuzzy matching of the end frame sequences
|
||||
if (countBits32((m_patternBuffer & END_SYNC_MASK) ^ END_SYNC_DATA) <= END_SYNC_ERRS) {
|
||||
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_END_SYNC_MASK) ^ DSTAR_END_SYNC_DATA) <= END_SYNC_ERRS) {
|
||||
DEBUG1("DStarRX: Found end sync in Data");
|
||||
|
||||
io.setDecode(false);
|
||||
@@ -429,43 +403,24 @@ void CDStarRX::processData(bool bit)
|
||||
|
||||
serial.writeDStarEOT();
|
||||
|
||||
m_maxFrameCorr = 0;
|
||||
m_maxDataCorr = 0;
|
||||
|
||||
m_rxState = DSRXS_NONE;
|
||||
return;
|
||||
}
|
||||
|
||||
// Fuzzy matching of the data sync bit sequence
|
||||
bool syncSeen = false;
|
||||
if (m_dataBits >= SYNC_SCAN_START && m_dataBits <= (SYNC_POS + 1U)) {
|
||||
if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) <= DATA_SYNC_ERRS) {
|
||||
if (m_dataBits < SYNC_POS)
|
||||
DEBUG2("DStarRX: found data sync in Data, early", SYNC_POS - m_dataBits);
|
||||
else
|
||||
DEBUG1("DStarRX: found data sync in Data");
|
||||
|
||||
m_rxBufferBits = DSTAR_DATA_LENGTH_BITS;
|
||||
m_dataBits = 0U;
|
||||
syncSeen = true;
|
||||
}
|
||||
if (m_minSyncPtr < m_maxSyncPtr) {
|
||||
if (m_dataPtr >= m_minSyncPtr && m_dataPtr <= m_maxSyncPtr)
|
||||
correlateDataSync();
|
||||
} else {
|
||||
if (m_dataPtr >= m_minSyncPtr || m_dataPtr <= m_maxSyncPtr)
|
||||
correlateDataSync();
|
||||
}
|
||||
|
||||
// Check to see if the sync is arriving late
|
||||
if (m_dataBits == SYNC_POS) {
|
||||
for (uint8_t i = 1U; i <= 3U; i++) {
|
||||
uint32_t syncMask = DATA_SYNC_MASK >> i;
|
||||
uint32_t syncData = DATA_SYNC_DATA >> i;
|
||||
if (countBits32((m_patternBuffer & syncMask) ^ syncData) <= DATA_SYNC_ERRS) {
|
||||
DEBUG2("DStarRX: found data sync in Data, late", i);
|
||||
m_rxBufferBits -= i;
|
||||
m_dataBits -= i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
m_dataBits++;
|
||||
|
||||
// We've not seen a data sync for too long, signal RXLOST and change to RX_NONE
|
||||
if (m_dataBits >= MAX_SYNC_BITS) {
|
||||
if (m_frameCount >= MAX_FRAMES) {
|
||||
DEBUG1("DStarRX: data sync timed out, lost lock");
|
||||
|
||||
io.setDecode(false);
|
||||
@@ -473,24 +428,35 @@ void CDStarRX::processData(bool bit)
|
||||
|
||||
serial.writeDStarLost();
|
||||
|
||||
m_maxFrameCorr = 0;
|
||||
m_maxDataCorr = 0;
|
||||
|
||||
m_rxState = DSRXS_NONE;
|
||||
return;
|
||||
}
|
||||
|
||||
// Send a data frame to the host if the required number of bits have been received, or if a data sync has been seen
|
||||
if (m_rxBufferBits == DSTAR_DATA_LENGTH_BITS) {
|
||||
if (syncSeen) {
|
||||
m_rxBuffer[9U] = DSTAR_DATA_SYNC_BYTES[9U];
|
||||
m_rxBuffer[10U] = DSTAR_DATA_SYNC_BYTES[10U];
|
||||
m_rxBuffer[11U] = DSTAR_DATA_SYNC_BYTES[11U];
|
||||
writeRSSIData(m_rxBuffer);
|
||||
} else {
|
||||
serial.writeDStarData(m_rxBuffer, DSTAR_DATA_LENGTH_BYTES);
|
||||
}
|
||||
// Send a data frame to the host if the required number of bits have been received
|
||||
if (m_dataPtr == m_maxSyncPtr) {
|
||||
uint8_t buffer[DSTAR_DATA_LENGTH_BYTES + 2U];
|
||||
samplesToBits(m_dataBuffer, m_startPtr, DSTAR_DATA_LENGTH_SYMBOLS, buffer, DSTAR_DATA_LENGTH_SAMPLES);
|
||||
|
||||
// Start the next frame
|
||||
::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
|
||||
m_rxBufferBits = 0U;
|
||||
if ((m_frameCount % 21U) == 0U) {
|
||||
if (m_frameCount == 0U) {
|
||||
buffer[9U] = DSTAR_DATA_SYNC_BYTES[9U];
|
||||
buffer[10U] = DSTAR_DATA_SYNC_BYTES[10U];
|
||||
buffer[11U] = DSTAR_DATA_SYNC_BYTES[11U];
|
||||
DEBUG5("DStarRX: found start/sync/max/min", m_startPtr, m_syncPtr, m_maxSyncPtr, m_minSyncPtr);
|
||||
}
|
||||
|
||||
writeRSSIData(buffer);
|
||||
} else {
|
||||
serial.writeDStarData(buffer, DSTAR_DATA_LENGTH_BYTES);
|
||||
}
|
||||
|
||||
m_frameCount++;
|
||||
|
||||
m_maxFrameCorr = 0;
|
||||
m_maxDataCorr = 0;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -536,6 +502,105 @@ void CDStarRX::writeRSSIData(unsigned char* data)
|
||||
m_rssiCount = 0U;
|
||||
}
|
||||
|
||||
bool CDStarRX::correlateFrameSync()
|
||||
{
|
||||
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_FRAME_SYNC_MASK) ^ DSTAR_FRAME_SYNC_DATA) <= FRAME_SYNC_ERRS) {
|
||||
uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_FRAME_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
|
||||
ptr -= DSTAR_DATA_LENGTH_SAMPLES;
|
||||
|
||||
q31_t corr = 0;
|
||||
|
||||
for (uint8_t i = 0U; i < DSTAR_FRAME_SYNC_LENGTH_SYMBOLS; i++) {
|
||||
q15_t val = m_dataBuffer[ptr];
|
||||
|
||||
if (DSTAR_FRAME_SYNC_SYMBOLS[i])
|
||||
corr -= val;
|
||||
else
|
||||
corr += val;
|
||||
|
||||
ptr += DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
|
||||
ptr -= DSTAR_DATA_LENGTH_SAMPLES;
|
||||
}
|
||||
|
||||
if (corr > m_maxFrameCorr) {
|
||||
m_maxFrameCorr = corr;
|
||||
m_headerPtr = 0U;
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
bool CDStarRX::correlateDataSync()
|
||||
{
|
||||
uint8_t maxErrs = 0U;
|
||||
if (m_rxState == DSRXS_DATA)
|
||||
maxErrs = DATA_SYNC_ERRS;
|
||||
|
||||
if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_DATA_SYNC_MASK) ^ DSTAR_DATA_SYNC_DATA) <= maxErrs) {
|
||||
uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_DATA_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
|
||||
ptr -= DSTAR_DATA_LENGTH_SAMPLES;
|
||||
|
||||
q31_t corr = 0;
|
||||
|
||||
for (uint8_t i = 0U; i < DSTAR_DATA_SYNC_LENGTH_SYMBOLS; i++) {
|
||||
q15_t val = m_dataBuffer[ptr];
|
||||
|
||||
if (DSTAR_DATA_SYNC_SYMBOLS[i])
|
||||
corr -= val;
|
||||
else
|
||||
corr += val;
|
||||
|
||||
ptr += DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
|
||||
ptr -= DSTAR_DATA_LENGTH_SAMPLES;
|
||||
}
|
||||
|
||||
if (corr > m_maxDataCorr) {
|
||||
m_maxDataCorr = corr;
|
||||
m_frameCount = 0U;
|
||||
|
||||
m_syncPtr = m_dataPtr;
|
||||
|
||||
m_startPtr = m_dataPtr + DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
if (m_startPtr >= DSTAR_DATA_LENGTH_SAMPLES)
|
||||
m_startPtr -= DSTAR_DATA_LENGTH_SAMPLES;
|
||||
|
||||
m_maxSyncPtr = m_syncPtr + 1U;
|
||||
if (m_maxSyncPtr >= DSTAR_DATA_LENGTH_SAMPLES)
|
||||
m_maxSyncPtr -= DSTAR_DATA_LENGTH_SAMPLES;
|
||||
|
||||
m_minSyncPtr = m_syncPtr + DSTAR_DATA_LENGTH_SAMPLES - 1U;
|
||||
if (m_minSyncPtr >= DSTAR_DATA_LENGTH_SAMPLES)
|
||||
m_minSyncPtr -= DSTAR_DATA_LENGTH_SAMPLES;
|
||||
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
void CDStarRX::samplesToBits(const q15_t* inBuffer, uint16_t start, uint16_t count, uint8_t* outBuffer, uint16_t limit)
|
||||
{
|
||||
for (uint16_t i = 0U; i < count; i++) {
|
||||
q15_t sample = inBuffer[start];
|
||||
|
||||
if (sample < 0)
|
||||
WRITE_BIT2(outBuffer, i, true);
|
||||
else
|
||||
WRITE_BIT2(outBuffer, i, false);
|
||||
|
||||
start += DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
if (start >= limit)
|
||||
start -= limit;
|
||||
}
|
||||
}
|
||||
|
||||
bool CDStarRX::rxHeader(uint8_t* in, uint8_t* out)
|
||||
{
|
||||
int i;
|
||||
|
||||
@@ -37,13 +37,21 @@ public:
|
||||
void reset();
|
||||
|
||||
private:
|
||||
uint32_t m_pll;
|
||||
bool m_prev;
|
||||
DSRX_STATE m_rxState;
|
||||
uint32_t m_patternBuffer;
|
||||
uint8_t m_rxBuffer[100U];
|
||||
unsigned int m_rxBufferBits;
|
||||
unsigned int m_dataBits;
|
||||
uint32_t m_bitBuffer[DSTAR_RADIO_SYMBOL_LENGTH];
|
||||
q15_t m_headerBuffer[DSTAR_FEC_SECTION_LENGTH_SAMPLES + 2U * DSTAR_RADIO_SYMBOL_LENGTH];
|
||||
q15_t m_dataBuffer[DSTAR_DATA_LENGTH_SAMPLES];
|
||||
uint16_t m_bitPtr;
|
||||
uint16_t m_headerPtr;
|
||||
uint16_t m_dataPtr;
|
||||
uint16_t m_startPtr;
|
||||
uint16_t m_syncPtr;
|
||||
uint16_t m_minSyncPtr;
|
||||
uint16_t m_maxSyncPtr;
|
||||
q31_t m_maxFrameCorr;
|
||||
q31_t m_maxDataCorr;
|
||||
uint16_t m_frameCount;
|
||||
uint8_t m_countdown;
|
||||
unsigned int m_mar;
|
||||
int m_pathMetric[4U];
|
||||
unsigned int m_pathMemory0[42U];
|
||||
@@ -53,12 +61,13 @@ private:
|
||||
uint8_t m_fecOutput[42U];
|
||||
uint32_t m_rssiAccum;
|
||||
uint16_t m_rssiCount;
|
||||
arm_biquad_casd_df1_inst_q31 m_dcFilter;
|
||||
q31_t m_dcState[4];
|
||||
|
||||
void processNone(bool bit);
|
||||
void processHeader(bool bit);
|
||||
void processData(bool bit);
|
||||
void processNone(q15_t sample);
|
||||
void processHeader(q15_t sample);
|
||||
void processData();
|
||||
bool correlateFrameSync();
|
||||
bool correlateDataSync();
|
||||
void samplesToBits(const q15_t* inBuffer, uint16_t start, uint16_t count, uint8_t* outBuffer, uint16_t limit);
|
||||
void writeRSSIHeader(unsigned char* header);
|
||||
void writeRSSIData(unsigned char* data);
|
||||
bool rxHeader(uint8_t* in, uint8_t* out);
|
||||
|
||||
+12
-10
@@ -27,8 +27,10 @@ const uint8_t BIT_SYNC = 0xAAU;
|
||||
|
||||
const uint8_t FRAME_SYNC[] = {0xEAU, 0xA6U, 0x00U};
|
||||
|
||||
// Generated using gaussfir(0.35, 1, 5) in MATLAB
|
||||
static q15_t GAUSSIAN_0_35_FILTER[] = {0, 0, 0, 0, 1001, 3514, 9333, 18751, 28499, 32767, 28499, 18751, 9333, 3514, 1001}; // numTaps = 15, L = 5
|
||||
// Generated using gaussfir(0.35, 1, 10) in MATLAB
|
||||
static q15_t GAUSSIAN_0_35_FILTER[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 1001, 1942, 3514, 5930,
|
||||
9333, 13699, 18751, 23938, 28499, 31644, 32767, 31644,
|
||||
28499, 23938, 18751, 13699, 9333, 5930, 3514, 1942, 1001}; // numTaps = 30, L = 10
|
||||
const uint16_t GAUSSIAN_0_35_FILTER_PHASE_LEN = 3U; // phaseLength = numTaps/L
|
||||
|
||||
const q15_t DSTAR_LEVEL0 = -841;
|
||||
@@ -196,9 +198,9 @@ m_poLen(0U),
|
||||
m_poPtr(0U),
|
||||
m_txDelay(60U) // 100ms
|
||||
{
|
||||
::memset(m_modState, 0x00U, 20U * sizeof(q15_t));
|
||||
::memset(m_modState, 0x00U, 15U * sizeof(q15_t));
|
||||
|
||||
m_modFilter.L = DSTAR_RADIO_BIT_LENGTH;
|
||||
m_modFilter.L = DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
m_modFilter.phaseLength = GAUSSIAN_0_35_FILTER_PHASE_LEN;
|
||||
m_modFilter.pCoeffs = GAUSSIAN_0_35_FILTER;
|
||||
m_modFilter.pState = m_modState;
|
||||
@@ -252,8 +254,8 @@ void CDStarTX::process()
|
||||
m_buffer.get();
|
||||
|
||||
for (uint8_t j = 0U; j < 3U; j++) {
|
||||
for (uint8_t i = 0U; i < DSTAR_EOT_LENGTH_BYTES; i++)
|
||||
m_poBuffer[m_poLen++] = DSTAR_EOT_BYTES[i];
|
||||
for (uint8_t i = 0U; i < DSTAR_END_SYNC_LENGTH_BYTES; i++)
|
||||
m_poBuffer[m_poLen++] = DSTAR_END_SYNC_BYTES[i];
|
||||
}
|
||||
|
||||
m_poPtr = 0U;
|
||||
@@ -262,11 +264,11 @@ void CDStarTX::process()
|
||||
if (m_poLen > 0U) {
|
||||
uint16_t space = io.getSpace();
|
||||
|
||||
while (space > (8U * DSTAR_RADIO_BIT_LENGTH)) {
|
||||
while (space > (8U * DSTAR_RADIO_SYMBOL_LENGTH)) {
|
||||
uint8_t c = m_poBuffer[m_poPtr++];
|
||||
writeByte(c);
|
||||
|
||||
space -= 8U * DSTAR_RADIO_BIT_LENGTH;
|
||||
space -= 8U * DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
|
||||
if (m_poPtr >= m_poLen) {
|
||||
m_poPtr = 0U;
|
||||
@@ -412,7 +414,7 @@ void CDStarTX::txHeader(const uint8_t* in, uint8_t* out) const
|
||||
void CDStarTX::writeByte(uint8_t c)
|
||||
{
|
||||
q15_t inBuffer[8U];
|
||||
q15_t outBuffer[DSTAR_RADIO_BIT_LENGTH * 8U];
|
||||
q15_t outBuffer[DSTAR_RADIO_SYMBOL_LENGTH * 8U];
|
||||
|
||||
uint8_t mask = 0x01U;
|
||||
|
||||
@@ -427,7 +429,7 @@ void CDStarTX::writeByte(uint8_t c)
|
||||
|
||||
::arm_fir_interpolate_q15(&m_modFilter, inBuffer, outBuffer, 8U);
|
||||
|
||||
io.write(STATE_DSTAR, outBuffer, DSTAR_RADIO_BIT_LENGTH * 8U);
|
||||
io.write(STATE_DSTAR, outBuffer, DSTAR_RADIO_SYMBOL_LENGTH * 8U);
|
||||
}
|
||||
|
||||
void CDStarTX::setTXDelay(uint8_t delay)
|
||||
|
||||
@@ -40,7 +40,7 @@ public:
|
||||
private:
|
||||
CSerialRB m_buffer;
|
||||
arm_fir_interpolate_instance_q15 m_modFilter;
|
||||
q15_t m_modState[20U]; // blockSize + phaseLength - 1, 8 + 9 - 1 plus some spare
|
||||
q15_t m_modState[15U]; // blockSize + phaseLength - 1, 8 + 3 - 1 plus some spare
|
||||
uint8_t m_poBuffer[600U];
|
||||
uint16_t m_poLen;
|
||||
uint16_t m_poPtr;
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -19,8 +19,10 @@
|
||||
#if !defined(GLOBALS_H)
|
||||
#define GLOBALS_H
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F4)
|
||||
#if defined(STM32F4XX)
|
||||
#include "stm32f4xx.h"
|
||||
#elif defined(STM32F7XX)
|
||||
#include "stm32f7xx.h"
|
||||
#elif defined(STM32F105xC)
|
||||
#include "stm32f1xx.h"
|
||||
#include "STM32Utils.h"
|
||||
@@ -30,7 +32,9 @@
|
||||
|
||||
#if defined(__SAM3X8E__) || defined(STM32F105xC)
|
||||
#define ARM_MATH_CM3
|
||||
#elif defined(STM32F4XX) || defined(STM32F4) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
|
||||
#elif defined(STM32F7XX)
|
||||
#define ARM_MATH_CM7
|
||||
#elif defined(STM32F4XX) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
|
||||
#define ARM_MATH_CM4
|
||||
#else
|
||||
#error "Unknown processor type"
|
||||
@@ -46,6 +50,9 @@ enum MMDVM_STATE {
|
||||
STATE_P25 = 4,
|
||||
|
||||
// Dummy states start at 90
|
||||
STATE_P25CAL1K = 93,
|
||||
STATE_DMRCAL1K = 94,
|
||||
STATE_LFCAL = 95,
|
||||
STATE_RSSICAL = 96,
|
||||
STATE_CWID = 97,
|
||||
STATE_DMRCAL = 98,
|
||||
@@ -67,6 +74,7 @@ enum MMDVM_STATE {
|
||||
#include "CalDStarRX.h"
|
||||
#include "CalDStarTX.h"
|
||||
#include "CalDMR.h"
|
||||
#include "CalP25.h"
|
||||
#include "CalRSSI.h"
|
||||
#include "CWIdTX.h"
|
||||
#include "Debug.h"
|
||||
@@ -78,8 +86,8 @@ const uint8_t MARK_NONE = 0x00U;
|
||||
|
||||
const uint16_t RX_BLOCK_SIZE = 2U;
|
||||
|
||||
const uint16_t TX_RINGBUFFER_SIZE = 500U;
|
||||
const uint16_t RX_RINGBUFFER_SIZE = 600U;
|
||||
const uint16_t TX_RINGBUFFER_SIZE = 1000U;
|
||||
const uint16_t RX_RINGBUFFER_SIZE = 1200U;
|
||||
|
||||
extern MMDVM_STATE m_modemState;
|
||||
|
||||
@@ -115,6 +123,7 @@ extern CP25TX p25TX;
|
||||
extern CCalDStarRX calDStarRX;
|
||||
extern CCalDStarTX calDStarTX;
|
||||
extern CCalDMR calDMR;
|
||||
extern CCalP25 calP25;
|
||||
extern CCalRSSI calRSSI;
|
||||
|
||||
extern CCWIdTX cwIdTX;
|
||||
|
||||
@@ -22,19 +22,13 @@
|
||||
#include "Globals.h"
|
||||
#include "IO.h"
|
||||
|
||||
// Generated using rcosdesign(0.2, 8, 5, 'sqrt') in MATLAB
|
||||
static q15_t RRC_0_2_FILTER[] = {401, 104, -340, -731, -847, -553, 112, 909, 1472, 1450, 683, -675, -2144, -3040, -2706, -770, 2667, 6995,
|
||||
11237, 14331, 15464, 14331, 11237, 6995, 2667, -770, -2706, -3040, -2144, -675, 683, 1450, 1472, 909, 112,
|
||||
-553, -847, -731, -340, 104, 401, 0};
|
||||
const uint16_t RRC_0_2_FILTER_LEN = 42U;
|
||||
|
||||
// Generated using gaussfir(0.5, 4, 5) in MATLAB
|
||||
static q15_t GAUSSIAN_0_5_FILTER[] = {8, 104, 760, 3158, 7421, 9866, 7421, 3158, 760, 104, 8, 0};
|
||||
const uint16_t GAUSSIAN_0_5_FILTER_LEN = 12U;
|
||||
// Generated using [b, a] = butter(1, 0.001) in MATLAB
|
||||
static q31_t DC_FILTER[] = {1685306, 0, 1685306, 0, 2144113034, 0}; // {b0, 0, b1, b2, -a1, -a2}
|
||||
const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
|
||||
|
||||
// One symbol boxcar filter
|
||||
static q15_t BOXCAR_FILTER[] = {3000, 3000, 3000, 3000, 3000, 0};
|
||||
const uint16_t BOXCAR_FILTER_LEN = 6U;
|
||||
static q15_t BOXCAR_FILTER[] = {6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000, 0, 0};
|
||||
const uint16_t BOXCAR_FILTER_LEN = 12U;
|
||||
|
||||
const uint16_t DC_OFFSET = 2048U;
|
||||
|
||||
@@ -43,11 +37,9 @@ m_started(false),
|
||||
m_rxBuffer(RX_RINGBUFFER_SIZE),
|
||||
m_txBuffer(TX_RINGBUFFER_SIZE),
|
||||
m_rssiBuffer(RX_RINGBUFFER_SIZE),
|
||||
m_rrcFilter(),
|
||||
m_gaussianFilter(),
|
||||
m_dcFilter(),
|
||||
m_dcState(),
|
||||
m_boxcarFilter(),
|
||||
m_rrcState(),
|
||||
m_gaussianState(),
|
||||
m_boxcarState(),
|
||||
m_pttInvert(false),
|
||||
m_rxLevel(128 * 128),
|
||||
@@ -56,6 +48,8 @@ m_dstarTXLevel(128 * 128),
|
||||
m_dmrTXLevel(128 * 128),
|
||||
m_ysfTXLevel(128 * 128),
|
||||
m_p25TXLevel(128 * 128),
|
||||
m_rxDCOffset(DC_OFFSET),
|
||||
m_txDCOffset(DC_OFFSET),
|
||||
m_ledCount(0U),
|
||||
m_ledValue(true),
|
||||
m_detect(false),
|
||||
@@ -64,23 +58,97 @@ m_dacOverflow(0U),
|
||||
m_watchdog(0U),
|
||||
m_lockout(false)
|
||||
{
|
||||
::memset(m_rrcState, 0x00U, 70U * sizeof(q15_t));
|
||||
::memset(m_gaussianState, 0x00U, 40U * sizeof(q15_t));
|
||||
::memset(m_boxcarState, 0x00U, 30U * sizeof(q15_t));
|
||||
::memset(m_boxcarState, 0x00U, 30U * sizeof(q15_t));
|
||||
::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
|
||||
|
||||
m_rrcFilter.numTaps = RRC_0_2_FILTER_LEN;
|
||||
m_rrcFilter.pState = m_rrcState;
|
||||
m_rrcFilter.pCoeffs = RRC_0_2_FILTER;
|
||||
|
||||
m_gaussianFilter.numTaps = GAUSSIAN_0_5_FILTER_LEN;
|
||||
m_gaussianFilter.pState = m_gaussianState;
|
||||
m_gaussianFilter.pCoeffs = GAUSSIAN_0_5_FILTER;
|
||||
m_dcFilter.numStages = DC_FILTER_STAGES;
|
||||
m_dcFilter.pState = m_dcState;
|
||||
m_dcFilter.pCoeffs = DC_FILTER;
|
||||
m_dcFilter.postShift = 0;
|
||||
|
||||
m_boxcarFilter.numTaps = BOXCAR_FILTER_LEN;
|
||||
m_boxcarFilter.pState = m_boxcarState;
|
||||
m_boxcarFilter.pCoeffs = BOXCAR_FILTER;
|
||||
|
||||
|
||||
initInt();
|
||||
|
||||
selfTest();
|
||||
}
|
||||
|
||||
void CIO::selfTest()
|
||||
{
|
||||
bool ledValue = false;
|
||||
|
||||
for (uint8_t i = 0; i < 6; i++) {
|
||||
ledValue = !ledValue;
|
||||
|
||||
// We exclude PTT to avoid trigger the transmitter
|
||||
setLEDInt(ledValue);
|
||||
setCOSInt(ledValue);
|
||||
#if defined(ARDUINO_MODE_PINS)
|
||||
setDStarInt(ledValue);
|
||||
setDMRInt(ledValue);
|
||||
setYSFInt(ledValue);
|
||||
setP25Int(ledValue);
|
||||
#endif
|
||||
delayInt(250);
|
||||
}
|
||||
|
||||
#if defined(ARDUINO_MODE_PINS)
|
||||
setDStarInt(true);
|
||||
setDMRInt(false);
|
||||
setYSFInt(false);
|
||||
setP25Int(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
setDStarInt(true);
|
||||
setDMRInt(true);
|
||||
setYSFInt(false);
|
||||
setP25Int(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
setDStarInt(true);
|
||||
setDMRInt(true);
|
||||
setYSFInt(true);
|
||||
setP25Int(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
setDStarInt(true);
|
||||
setDMRInt(true);
|
||||
setYSFInt(true);
|
||||
setP25Int(true);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
setDStarInt(true);
|
||||
setDMRInt(true);
|
||||
setYSFInt(true);
|
||||
setP25Int(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
setDStarInt(true);
|
||||
setDMRInt(true);
|
||||
setYSFInt(false);
|
||||
setP25Int(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
setDStarInt(true);
|
||||
setDMRInt(false);
|
||||
setYSFInt(false);
|
||||
setP25Int(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
setDStarInt(false);
|
||||
setDMRInt(false);
|
||||
setYSFInt(false);
|
||||
setP25Int(false);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::start()
|
||||
@@ -100,7 +168,7 @@ void CIO::process()
|
||||
m_ledCount++;
|
||||
if (m_started) {
|
||||
// Two seconds timeout
|
||||
if (m_watchdog >= 48000U) {
|
||||
if (m_watchdog >= 96000U) {
|
||||
if (m_modemState == STATE_DSTAR || m_modemState == STATE_DMR || m_modemState == STATE_YSF) {
|
||||
if (m_modemState == STATE_DMR && m_tx)
|
||||
dmrTX.setStart(false);
|
||||
@@ -111,13 +179,13 @@ void CIO::process()
|
||||
m_watchdog = 0U;
|
||||
}
|
||||
|
||||
if (m_ledCount >= 24000U) {
|
||||
if (m_ledCount >= 48000U) {
|
||||
m_ledCount = 0U;
|
||||
m_ledValue = !m_ledValue;
|
||||
setLEDInt(m_ledValue);
|
||||
}
|
||||
} else {
|
||||
if (m_ledCount >= 240000U) {
|
||||
if (m_ledCount >= 480000U) {
|
||||
m_ledCount = 0U;
|
||||
m_ledValue = !m_ledValue;
|
||||
setLEDInt(m_ledValue);
|
||||
@@ -149,7 +217,7 @@ void CIO::process()
|
||||
if (m_detect && (sample == 0U || sample == 4095U))
|
||||
m_adcOverflow++;
|
||||
|
||||
q15_t res1 = q15_t(sample) - DC_OFFSET;
|
||||
q15_t res1 = q15_t(sample) - m_rxDCOffset;
|
||||
q31_t res2 = res1 * m_rxLevel;
|
||||
samples[i] = q15_t(__SSAT((res2 >> 15), 16));
|
||||
}
|
||||
@@ -157,76 +225,65 @@ void CIO::process()
|
||||
if (m_lockout)
|
||||
return;
|
||||
|
||||
q15_t vals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_boxcarFilter, samples, vals, RX_BLOCK_SIZE);
|
||||
|
||||
q31_t dcLevel = 0;
|
||||
q31_t dcValues[RX_BLOCK_SIZE];
|
||||
q31_t q31Vals[RX_BLOCK_SIZE];
|
||||
|
||||
::arm_q15_to_q31(vals, q31Vals, RX_BLOCK_SIZE);
|
||||
::arm_biquad_cascade_df1_q31(&m_dcFilter, q31Vals, dcValues, RX_BLOCK_SIZE);
|
||||
|
||||
for (uint8_t i = 0U; i < RX_BLOCK_SIZE; i++)
|
||||
dcLevel += dcValues[i];
|
||||
dcLevel /= RX_BLOCK_SIZE;
|
||||
|
||||
q15_t offset = q15_t(__SSAT((dcLevel >> 16), 16));;
|
||||
|
||||
q15_t dcVals[RX_BLOCK_SIZE];
|
||||
for (uint8_t i = 0U; i < RX_BLOCK_SIZE; i++)
|
||||
dcVals[i] = vals[i] - offset;
|
||||
|
||||
if (m_modemState == STATE_IDLE) {
|
||||
if (m_dstarEnable) {
|
||||
q15_t GMSKVals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
|
||||
if (m_dstarEnable)
|
||||
dstarRX.samples(dcVals, rssi, RX_BLOCK_SIZE);
|
||||
|
||||
dstarRX.samples(GMSKVals, rssi, RX_BLOCK_SIZE);
|
||||
if (m_p25Enable)
|
||||
p25RX.samples(dcVals, rssi, RX_BLOCK_SIZE);
|
||||
|
||||
if (m_dmrEnable) {
|
||||
if (m_duplex)
|
||||
dmrIdleRX.samples(vals, RX_BLOCK_SIZE);
|
||||
else
|
||||
dmrDMORX.samples(vals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
|
||||
if (m_p25Enable) {
|
||||
q15_t P25Vals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_boxcarFilter, samples, P25Vals, RX_BLOCK_SIZE);
|
||||
|
||||
p25RX.samples(P25Vals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
|
||||
if (m_dmrEnable || m_ysfEnable) {
|
||||
q15_t C4FSKVals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_rrcFilter, samples, C4FSKVals, RX_BLOCK_SIZE);
|
||||
|
||||
if (m_dmrEnable) {
|
||||
if (m_duplex)
|
||||
dmrIdleRX.samples(C4FSKVals, RX_BLOCK_SIZE);
|
||||
else
|
||||
dmrDMORX.samples(C4FSKVals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
|
||||
if (m_ysfEnable)
|
||||
ysfRX.samples(C4FSKVals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
if (m_ysfEnable)
|
||||
ysfRX.samples(dcVals, rssi, RX_BLOCK_SIZE);
|
||||
} else if (m_modemState == STATE_DSTAR) {
|
||||
if (m_dstarEnable) {
|
||||
q15_t GMSKVals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
|
||||
|
||||
dstarRX.samples(GMSKVals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
if (m_dstarEnable)
|
||||
dstarRX.samples(dcVals, rssi, RX_BLOCK_SIZE);
|
||||
} else if (m_modemState == STATE_DMR) {
|
||||
if (m_dmrEnable) {
|
||||
q15_t C4FSKVals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_rrcFilter, samples, C4FSKVals, RX_BLOCK_SIZE);
|
||||
|
||||
if (m_duplex) {
|
||||
// If the transmitter isn't on, use the DMR idle RX to detect the wakeup CSBKs
|
||||
if (m_tx)
|
||||
dmrRX.samples(C4FSKVals, rssi, control, RX_BLOCK_SIZE);
|
||||
dmrRX.samples(vals, rssi, control, RX_BLOCK_SIZE);
|
||||
else
|
||||
dmrIdleRX.samples(C4FSKVals, RX_BLOCK_SIZE);
|
||||
dmrIdleRX.samples(vals, RX_BLOCK_SIZE);
|
||||
} else {
|
||||
dmrDMORX.samples(C4FSKVals, rssi, RX_BLOCK_SIZE);
|
||||
dmrDMORX.samples(vals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
}
|
||||
} else if (m_modemState == STATE_YSF) {
|
||||
if (m_ysfEnable) {
|
||||
q15_t C4FSKVals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_rrcFilter, samples, C4FSKVals, RX_BLOCK_SIZE);
|
||||
|
||||
ysfRX.samples(C4FSKVals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
if (m_ysfEnable)
|
||||
ysfRX.samples(dcVals, rssi, RX_BLOCK_SIZE);
|
||||
} else if (m_modemState == STATE_P25) {
|
||||
if (m_p25Enable) {
|
||||
q15_t P25Vals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_boxcarFilter, samples, P25Vals, RX_BLOCK_SIZE);
|
||||
|
||||
p25RX.samples(P25Vals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
if (m_p25Enable)
|
||||
p25RX.samples(dcVals, rssi, RX_BLOCK_SIZE);
|
||||
} else if (m_modemState == STATE_DSTARCAL) {
|
||||
q15_t GMSKVals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
|
||||
|
||||
calDStarRX.samples(GMSKVals, RX_BLOCK_SIZE);
|
||||
calDStarRX.samples(vals, RX_BLOCK_SIZE);
|
||||
} else if (m_modemState == STATE_RSSICAL) {
|
||||
calRSSI.samples(rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
@@ -269,7 +326,7 @@ void CIO::write(MMDVM_STATE mode, q15_t* samples, uint16_t length, const uint8_t
|
||||
for (uint16_t i = 0U; i < length; i++) {
|
||||
q31_t res1 = samples[i] * txLevel;
|
||||
q15_t res2 = q15_t(__SSAT((res1 >> 15), 16));
|
||||
uint16_t res3 = uint16_t(res2 + DC_OFFSET);
|
||||
uint16_t res3 = uint16_t(res2 + m_txDCOffset);
|
||||
|
||||
// Detect DAC overflow
|
||||
if (res3 > 4095U)
|
||||
@@ -310,7 +367,7 @@ void CIO::setMode()
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel)
|
||||
void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, int16_t txDCOffset, int16_t rxDCOffset)
|
||||
{
|
||||
m_pttInvert = pttInvert;
|
||||
|
||||
@@ -320,6 +377,9 @@ void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rx
|
||||
m_dmrTXLevel = q15_t(dmrTXLevel * 128);
|
||||
m_ysfTXLevel = q15_t(ysfTXLevel * 128);
|
||||
m_p25TXLevel = q15_t(p25TXLevel * 128);
|
||||
|
||||
m_rxDCOffset = DC_OFFSET + rxDCOffset;
|
||||
m_txDCOffset = DC_OFFSET + txDCOffset;
|
||||
|
||||
if (rxInvert)
|
||||
m_rxLevel = -m_rxLevel;
|
||||
@@ -356,6 +416,11 @@ void CIO::resetWatchdog()
|
||||
m_watchdog = 0U;
|
||||
}
|
||||
|
||||
uint32_t CIO::getWatchdog()
|
||||
{
|
||||
return m_watchdog;
|
||||
}
|
||||
|
||||
bool CIO::hasLockout() const
|
||||
{
|
||||
return m_lockout;
|
||||
|
||||
@@ -42,7 +42,7 @@ public:
|
||||
|
||||
void interrupt();
|
||||
|
||||
void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel);
|
||||
void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, int16_t txDCOffset, int16_t rxDCOffset);
|
||||
|
||||
void getOverflow(bool& adcOverflow, bool& dacOverflow);
|
||||
|
||||
@@ -52,6 +52,9 @@ public:
|
||||
bool hasLockout() const;
|
||||
|
||||
void resetWatchdog();
|
||||
uint32_t getWatchdog();
|
||||
|
||||
void selfTest();
|
||||
|
||||
private:
|
||||
bool m_started;
|
||||
@@ -60,11 +63,10 @@ private:
|
||||
CSampleRB m_txBuffer;
|
||||
CRSSIRB m_rssiBuffer;
|
||||
|
||||
arm_fir_instance_q15 m_rrcFilter;
|
||||
arm_fir_instance_q15 m_gaussianFilter;
|
||||
arm_biquad_casd_df1_inst_q31 m_dcFilter;
|
||||
q31_t m_dcState[4];
|
||||
|
||||
arm_fir_instance_q15 m_boxcarFilter;
|
||||
q15_t m_rrcState[70U]; // NoTaps + BlockSize - 1, 42 + 20 - 1 plus some spare
|
||||
q15_t m_gaussianState[40U]; // NoTaps + BlockSize - 1, 12 + 20 - 1 plus some spare
|
||||
q15_t m_boxcarState[30U]; // NoTaps + BlockSize - 1, 6 + 20 - 1 plus some spare
|
||||
|
||||
bool m_pttInvert;
|
||||
@@ -75,6 +77,9 @@ private:
|
||||
q15_t m_ysfTXLevel;
|
||||
q15_t m_p25TXLevel;
|
||||
|
||||
uint16_t m_rxDCOffset;
|
||||
uint16_t m_txDCOffset;
|
||||
|
||||
uint32_t m_ledCount;
|
||||
bool m_ledValue;
|
||||
|
||||
@@ -101,6 +106,8 @@ private:
|
||||
void setDMRInt(bool on);
|
||||
void setYSFInt(bool on);
|
||||
void setP25Int(bool on);
|
||||
|
||||
void delayInt(unsigned int dly);
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
@@ -140,11 +140,11 @@ void CIO::startInt()
|
||||
TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_CLEAR |
|
||||
TC_CMR_BCPB_CLEAR | TC_CMR_BCPC_CLEAR;
|
||||
#if defined(EXTERNAL_OSC)
|
||||
t->TC_RC = EXTERNAL_OSC / 24000; // Counter resets on RC, so sets period in terms of the external clock
|
||||
t->TC_RA = EXTERNAL_OSC / 48000; // Roughly square wave
|
||||
t->TC_RC = EXTERNAL_OSC / 48000; // Counter resets on RC, so sets period in terms of the external clock
|
||||
t->TC_RA = EXTERNAL_OSC / 96000; // Roughly square wave
|
||||
#else
|
||||
t->TC_RC = 1750; // Counter resets on RC, so sets period in terms of 42MHz internal clock
|
||||
t->TC_RA = 880; // Roughly square wave
|
||||
t->TC_RC = 875; // Counter resets on RC, so sets period in terms of 42MHz internal clock
|
||||
t->TC_RA = 438; // Roughly square wave
|
||||
#endif
|
||||
t->TC_CMR = (t->TC_CMR & 0xFFF0FFFF) | TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_SET; // Set clear and set from RA and RC compares
|
||||
t->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG; // re-enable local clocking and switch to hardware trigger source.
|
||||
@@ -226,4 +226,9 @@ void CIO::setP25Int(bool on)
|
||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::delayInt(unsigned int dly)
|
||||
{
|
||||
delay(dly);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -22,27 +22,27 @@
|
||||
#include "Globals.h"
|
||||
#include "IO.h"
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F4)
|
||||
#if defined(STM32F4XX) || defined(STM32F7XX)
|
||||
|
||||
#if defined(STM32F4_DISCOVERY)
|
||||
/*
|
||||
Pin definitions for STM32F4 Discovery Board:
|
||||
|
||||
PTT PB13 output
|
||||
COSLED PA7 output
|
||||
LED PD15 output
|
||||
COS PA5 input
|
||||
PTT PB13 output P1 Pin37
|
||||
COSLED PA7 output P1 Pin17
|
||||
LED PD15 output P1 Pin47
|
||||
COS PA5 input P1 Pin15
|
||||
|
||||
DSTAR PD12 output
|
||||
DMR PD13 output
|
||||
YSF PD14 output
|
||||
P25 PD11 output
|
||||
DSTAR PD12 output P1 Pin44
|
||||
DMR PD13 output P1 Pin45
|
||||
YSF PD14 output P1 Pin46
|
||||
P25 PD11 output P1 Pin43
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA1 analog input
|
||||
TX PA4 analog output
|
||||
RX PA0 analog input P1 Pin12
|
||||
RSSI PA1 analog input P1 Pin11
|
||||
TX PA4 analog output P1 Pin16
|
||||
|
||||
EXT_CLK PA15 input
|
||||
EXT_CLK PA15 input P2 Pin40
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_5
|
||||
@@ -164,32 +164,172 @@ EXT_CLK PA15 input
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#elif defined(STM32F722_PI)
|
||||
/*
|
||||
Pin definitions for STM32F722 Pi Board:
|
||||
|
||||
PTT PB13 output
|
||||
COSLED PB14 output
|
||||
LED PB15 output
|
||||
COS PC0 input
|
||||
|
||||
DSTAR PC7 output
|
||||
DMR PC8 output
|
||||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
TX PA4 analog output
|
||||
|
||||
EXT_CLK PA15 input
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_0
|
||||
#define PORT_COS GPIOC
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_PTT GPIO_Pin_13
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_14
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_15
|
||||
#define PORT_LED GPIOB
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_P25 GPIO_Pin_9
|
||||
#define PORT_P25 GPIOC
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_DMR GPIO_Pin_8
|
||||
#define PORT_DMR GPIOC
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_YSF GPIO_Pin_8
|
||||
#define PORT_YSF GPIOA
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_7
|
||||
#define PIN_RSSI_CH ADC_Channel_7
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#elif defined(STM32F4_F4M)
|
||||
/*
|
||||
Pin definitions for MMDVM-F4M Pi-Hat F0DEI board:
|
||||
|
||||
PTT PB13 output
|
||||
COSLED PB14 output
|
||||
LED PB15 output
|
||||
COS PC0 input
|
||||
|
||||
DSTAR PC7 output
|
||||
DMR PC8 output
|
||||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
TX PA4 analog output
|
||||
|
||||
EXT_CLK PA15 input
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_0
|
||||
#define PORT_COS GPIOC
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_PTT GPIO_Pin_13
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_14
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_15
|
||||
#define PORT_LED GPIOB
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_P25 GPIO_Pin_9
|
||||
#define PORT_P25 GPIOC
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_DMR GPIO_Pin_8
|
||||
#define PORT_DMR GPIOC
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_YSF GPIO_Pin_8
|
||||
#define PORT_YSF GPIOA
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_7
|
||||
#define PIN_RSSI_CH ADC_Channel_7
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
|
||||
#if defined(STM32F4_NUCLEO_MORPHO_HEADER)
|
||||
/*
|
||||
Pin definitions for STM32F4 Nucleo boards (ST Morpho header):
|
||||
|
||||
PTT PB13 output
|
||||
COSLED PB14 output
|
||||
LED PA5 output
|
||||
COS PB15 input
|
||||
PTT PB13 output CN10 Pin30
|
||||
COSLED PB14 output CN10 Pin28
|
||||
LED PA5 output CN10 Pin11
|
||||
COS PB15 input CN10 Pin26
|
||||
|
||||
DSTAR PB10 output
|
||||
DMR PB4 output
|
||||
YSF PB5 output
|
||||
P25 PB3 output
|
||||
DSTAR PB10 output CN10 Pin25
|
||||
DMR PB4 output CN10 Pin27
|
||||
YSF PB5 output CN10 Pin29
|
||||
P25 PB3 output CN10 Pin31
|
||||
|
||||
MDSTAR PC4 output
|
||||
MDMR PC5 outout
|
||||
MYSF PC2 output
|
||||
MP25 PC3 output
|
||||
MDSTAR PC4 output CN10 Pin34
|
||||
MDMR PC5 output CN10 Pin6
|
||||
MYSF PC2 output CN7 Pin35
|
||||
MP25 PC3 output CN7 Pin37
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA1 analog input
|
||||
TX PA4 analog output
|
||||
RX PA0 analog input CN7 Pin28
|
||||
RSSI PA1 analog input CN7 Pin30
|
||||
TX PA4 analog output CN7 Pin32
|
||||
|
||||
EXT_CLK PA15 input
|
||||
EXT_CLK PA15 input CN7 Pin17
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_15
|
||||
@@ -263,21 +403,21 @@ EXT_CLK PA15 input
|
||||
/*
|
||||
Pin definitions for STM32F4 Nucleo boards (Arduino header):
|
||||
|
||||
PTT PB10 output
|
||||
COSLED PB3 output
|
||||
LED PB5 output
|
||||
COS PB4 input
|
||||
PTT PB10 output CN9 Pin7
|
||||
COSLED PB3 output CN9 Pin4
|
||||
LED PB5 output CN9 Pin5
|
||||
COS PB4 input CN9 Pin6
|
||||
|
||||
DSTAR PA1 output
|
||||
DMR PA4 output
|
||||
YSF PB0 output
|
||||
P25 PC1 output
|
||||
DSTAR PA1 output CN8 Pin2
|
||||
DMR PA4 output CN8 Pin3
|
||||
YSF PB0 output CN8 Pin4
|
||||
P25 PC1 output CN8 Pin5
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PC0 analog input
|
||||
TX PA5 analog output
|
||||
RX PA0 analog input CN8 Pin1
|
||||
RSSI PC0 analog input CN8 Pin6
|
||||
TX PA5 analog output CN5 Pin6
|
||||
|
||||
EXT_CLK PB8 input
|
||||
EXT_CLK PB8 input CN5 Pin10
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_4
|
||||
@@ -333,14 +473,107 @@ EXT_CLK PB8 input
|
||||
#error "Either STM32F4_NUCLEO_MORPHO_HEADER or STM32F4_NUCLEO_ARDUINO_HEADER need to be defined in Config.h"
|
||||
#endif
|
||||
|
||||
#elif defined(STM32F7_NUCLEO)
|
||||
/*
|
||||
Pin definitions for STM32F7 Nucleo boards (ST Morpho header):
|
||||
|
||||
PTT PB13 output CN12 Pin30
|
||||
COSLED PB14 output CN12 Pin28
|
||||
LED PA5 output CN12 Pin11
|
||||
COS PB15 input CN12 Pin26
|
||||
|
||||
DSTAR PB10 output CN12 Pin25
|
||||
DMR PB4 output CN12 Pin27
|
||||
YSF PB5 output CN12 Pin29
|
||||
P25 PB3 output CN12 Pin31
|
||||
|
||||
MDSTAR PC4 output CN12 Pin34
|
||||
MDMR PC5 output CN12 Pin6
|
||||
MYSF PC2 output CN11 Pin35
|
||||
MP25 PC3 output CN11 Pin37
|
||||
|
||||
RX PA0 analog input CN11 Pin28
|
||||
RSSI PA1 analog input CN11 Pin30
|
||||
TX PA4 analog output CN11 Pin32
|
||||
|
||||
EXT_CLK PA15 input CN11 Pin17
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_15
|
||||
#define PORT_COS GPIOB
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_PTT GPIO_Pin_13
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_14
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_5
|
||||
#define PORT_LED GPIOA
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_P25 GPIO_Pin_3
|
||||
#define PORT_P25 GPIOB
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_10
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DMR GPIO_Pin_4
|
||||
#define PORT_DMR GPIOB
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_YSF GPIO_Pin_5
|
||||
#define PORT_YSF GPIOB
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS)
|
||||
#define PIN_MP25 GPIO_Pin_3
|
||||
#define PORT_MP25 GPIOC
|
||||
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDSTAR GPIO_Pin_4
|
||||
#define PORT_MDSTAR GPIOC
|
||||
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDMR GPIO_Pin_5
|
||||
#define PORT_MDMR GPIOC
|
||||
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MYSF GPIO_Pin_2
|
||||
#define PORT_MYSF GPIOC
|
||||
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
|
||||
#endif
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_1
|
||||
#define PIN_RSSI_CH ADC_Channel_1
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#else
|
||||
#error "Either STM32F4_DISCOVERY, STM32F4_PI or STM32F4_NUCLEO need to be defined"
|
||||
#error "Either STM32F4_DISCOVERY, STM32F4_PI, STM32F722_PI, STM32F4_F4M, STM32F4_NUCLEO or STM32F7_NUCLEO need to be defined"
|
||||
#endif
|
||||
|
||||
const uint16_t DC_OFFSET = 2048U;
|
||||
|
||||
// Sampling frequency
|
||||
#define SAMP_FREQ 24000
|
||||
#define SAMP_FREQ 48000
|
||||
|
||||
extern "C" {
|
||||
void TIM2_IRQHandler() {
|
||||
@@ -355,7 +588,7 @@ void CIO::initInt()
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
GPIO_StructInit(&GPIO_InitStruct);
|
||||
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStruct.GPIO_Speed = GPIO_Fast_Speed;
|
||||
GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN;
|
||||
|
||||
@@ -535,7 +768,7 @@ void CIO::startInt()
|
||||
// Init the timer
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
|
||||
|
||||
#if defined(EXTERNAL_OSC)
|
||||
#if defined(EXTERNAL_OSC) && !(defined(STM32F4_PI) || defined(STM32F722_PI))
|
||||
// Configure a GPIO as external TIM2 clock source
|
||||
GPIO_PinAFConfig(PORT_EXT_CLK, SRC_EXT_CLK, GPIO_AF_TIM2);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_EXT_CLK;
|
||||
@@ -547,19 +780,20 @@ void CIO::startInt()
|
||||
TIM_TimeBaseStructInit (&timerInitStructure);
|
||||
|
||||
// TIM2 output frequency
|
||||
#if defined(EXTERNAL_OSC)
|
||||
#if defined(EXTERNAL_OSC) && !(defined(STM32F4_PI) || defined(STM32F722_PI))
|
||||
timerInitStructure.TIM_Prescaler = (uint16_t) ((EXTERNAL_OSC/(2*SAMP_FREQ)) - 1);
|
||||
timerInitStructure.TIM_Period = 1;
|
||||
#else
|
||||
timerInitStructure.TIM_Prescaler = (uint16_t) ((SystemCoreClock/(4*SAMP_FREQ)) - 1);
|
||||
timerInitStructure.TIM_Prescaler = (uint16_t) ((SystemCoreClock/(6*SAMP_FREQ)) - 1);
|
||||
timerInitStructure.TIM_Period = 2;
|
||||
#endif
|
||||
|
||||
timerInitStructure.TIM_CounterMode = TIM_CounterMode_Up;
|
||||
timerInitStructure.TIM_Period = 1;
|
||||
timerInitStructure.TIM_ClockDivision = TIM_CKD_DIV1;
|
||||
timerInitStructure.TIM_RepetitionCounter = 0;
|
||||
TIM_TimeBaseInit(TIM2, &timerInitStructure);
|
||||
|
||||
#if defined(EXTERNAL_OSC)
|
||||
#if defined(EXTERNAL_OSC) && !(defined(STM32F4_PI) || defined(STM32F722_PI))
|
||||
// Enable external clock
|
||||
TIM_ETRClockMode2Config(TIM2, TIM_ExtTRGPSC_OFF, TIM_ExtTRGPolarity_NonInverted, 0x00);
|
||||
#else
|
||||
@@ -671,4 +905,30 @@ void CIO::setP25Int(bool on)
|
||||
#endif
|
||||
}
|
||||
|
||||
// Simple delay function for STM32
|
||||
// Example from: http://thehackerworkshop.com/?p=1209
|
||||
void CIO::delayInt(unsigned int dly)
|
||||
{
|
||||
#if defined(STM32F7XX)
|
||||
unsigned int loopsPerMillisecond = (SystemCoreClock/1000);
|
||||
#else
|
||||
unsigned int loopsPerMillisecond = (SystemCoreClock/1000) / 3;
|
||||
#endif
|
||||
|
||||
for (; dly > 0; dly--)
|
||||
{
|
||||
asm volatile //this routine waits (approximately) one millisecond
|
||||
(
|
||||
"mov r3, %[loopsPerMillisecond] \n\t" //load the initial loop counter
|
||||
"loop: \n\t"
|
||||
"subs r3, #1 \n\t"
|
||||
"bne loop \n\t"
|
||||
|
||||
: //empty output list
|
||||
: [loopsPerMillisecond] "r" (loopsPerMillisecond) //input to the asm routine
|
||||
: "r3", "cc" //clobber list
|
||||
);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
+66
-9
@@ -46,8 +46,8 @@ TX PA4 analog output (DAC_OUT1)
|
||||
|
||||
EXT_CLK PA15 input (AF: TIM2_CH1_ETR)
|
||||
|
||||
USART2_TXD PA2 output (AF)
|
||||
USART2_RXD PA3 input (AF)
|
||||
USART1_TXD PA9 output (AF)
|
||||
USART1_RXD PA10 input (AF)
|
||||
|
||||
*/
|
||||
|
||||
@@ -91,10 +91,10 @@ USART2_RXD PA3 input (AF)
|
||||
#define SRC_EXT_CLK 15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_USART2_TXD 2
|
||||
#define PORT_USART2_TXD GPIOA
|
||||
#define PIN_USART2_RXD 3
|
||||
#define PORT_USART2_RXD GPIOA
|
||||
#define PIN_USART1_TXD 9
|
||||
#define PORT_USART1_TXD GPIOA
|
||||
#define PIN_USART1_RXD 10
|
||||
#define PORT_USART1_RXD GPIOA
|
||||
|
||||
#else // defined(STM32F1_POG)
|
||||
#error "Either STM32F1_POG, or sth need to be defined"
|
||||
@@ -103,7 +103,7 @@ USART2_RXD PA3 input (AF)
|
||||
const uint16_t DC_OFFSET = 2048U;
|
||||
|
||||
// Sampling frequency
|
||||
#define SAMP_FREQ 24000
|
||||
#define SAMP_FREQ 48000
|
||||
|
||||
extern "C" {
|
||||
void TIM2_IRQHandler() {
|
||||
@@ -143,6 +143,46 @@ void GPIOConfigPin(GPIO_TypeDef *port_ptr, uint32_t pin, uint32_t mode_cnf_value
|
||||
*cr_ptr = cr_value; // save localized value to CRL / CRL
|
||||
}
|
||||
|
||||
#if defined(STM32F1_POG)
|
||||
void FancyLEDEffect()
|
||||
{
|
||||
bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25};
|
||||
|
||||
for(int i=0; i<7; i++){
|
||||
*foo[i] = 0x01;
|
||||
}
|
||||
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1);
|
||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
|
||||
delay(SystemCoreClock/1000*100);
|
||||
for(int i=0; i<7; i++){
|
||||
*foo[i] = 0x00;
|
||||
}
|
||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
|
||||
delay(SystemCoreClock/1000*20);
|
||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
|
||||
delay(SystemCoreClock/1000*10);
|
||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
|
||||
|
||||
*foo[0] = 0x01;
|
||||
for(int i=1; i<7; i++){
|
||||
delay(SystemCoreClock/1000*10);
|
||||
*foo[i-1] = 0x00;
|
||||
*foo[i] = 0x01;
|
||||
}
|
||||
for(int i=5; i>=0; i--){
|
||||
delay(SystemCoreClock/1000*10);
|
||||
*foo[i+1] = 0x00;
|
||||
*foo[i] = 0x01;
|
||||
}
|
||||
delay(SystemCoreClock/1000*10);
|
||||
*foo[5+1-6] = 0x00;
|
||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
|
||||
delay(SystemCoreClock/1000*10);
|
||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
|
||||
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1|GPIO_CRL_CNF0_1);
|
||||
delay(SystemCoreClock/1000*50);
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline void GPIOInit()
|
||||
{
|
||||
@@ -188,8 +228,8 @@ static inline void GPIOInit()
|
||||
#endif
|
||||
#endif
|
||||
|
||||
GPIOConfigPin(PORT_USART2_TXD, PIN_USART2_TXD, GPIO_CRL_MODE0_1|GPIO_CRL_CNF0_1);
|
||||
GPIOConfigPin(PORT_USART2_RXD, PIN_USART2_RXD, GPIO_CRL_CNF0_0);
|
||||
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1|GPIO_CRL_CNF0_1);
|
||||
GPIOConfigPin(PORT_USART1_RXD, PIN_USART1_RXD, GPIO_CRL_CNF0_0);
|
||||
|
||||
AFIO->MAPR = (AFIO->MAPR & ~AFIO_MAPR_SWJ_CFG) | AFIO_MAPR_SWJ_CFG_1;
|
||||
}
|
||||
@@ -250,6 +290,9 @@ static inline void ADCInit()
|
||||
|
||||
// Trigger first conversion
|
||||
ADC1->CR2 |= ADC_CR2_ADON;
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
ADC2->CR2 |= ADC_CR2_ADON;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
@@ -295,6 +338,9 @@ void CIO::initInt()
|
||||
GPIOInit();
|
||||
ADCInit();
|
||||
DACInit();
|
||||
#if defined(STM32F1_POG)
|
||||
FancyLEDEffect();
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::startInt()
|
||||
@@ -312,10 +358,16 @@ void CIO::interrupt()
|
||||
uint16_t rawRSSI = 0U;
|
||||
bitband_t eoc = (bitband_t)BITBAND_PERIPH(&ADC1->SR, ADC_SR_EOS_Pos);
|
||||
bitband_t adon = (bitband_t)BITBAND_PERIPH(&ADC1->CR2, ADC_CR2_ADON_Pos);
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
bitband_t rssi_adon = (bitband_t)BITBAND_PERIPH(&ADC2->CR2, ADC_CR2_ADON_Pos);
|
||||
#endif
|
||||
|
||||
if (*eoc) {
|
||||
// trigger next conversion
|
||||
*adon = 1;
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
*rssi_adon = 1;
|
||||
#endif
|
||||
|
||||
m_txBuffer.get(sample, control);
|
||||
DAC->DHR12R1 = sample; // Send the value to the DAC
|
||||
@@ -372,4 +424,9 @@ void CIO::setP25Int(bool on)
|
||||
BB_P25 = !!on;
|
||||
}
|
||||
|
||||
void CIO::delayInt(unsigned int dly)
|
||||
{
|
||||
delay(dly);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
+10
-5
@@ -112,7 +112,7 @@ void CIO::startInt()
|
||||
#endif
|
||||
|
||||
#if defined(EXTERNAL_OSC)
|
||||
// Set ADC0 to trigger from the LPTMR at 24 kHz
|
||||
// Set ADC0 to trigger from the LPTMR at 48 kHz
|
||||
SIM_SOPT7 = SIM_SOPT7_ADC0ALTTRGEN | // Enable ADC0 alternate trigger
|
||||
SIM_SOPT7_ADC0TRGSEL(14); // Trigger ADC0 by LPTMR0
|
||||
|
||||
@@ -121,14 +121,14 @@ void CIO::startInt()
|
||||
SIM_SCGC5 |= SIM_SCGC5_LPTIMER; // Enable Low Power Timer Access
|
||||
LPTMR0_CSR = 0; // Disable
|
||||
LPTMR0_PSR = LPTMR_PSR_PBYP; // Bypass prescaler/filter
|
||||
LPTMR0_CMR = (EXTERNAL_OSC / 24000) - 1; // Frequency divided by CMR + 1
|
||||
LPTMR0_CMR = (EXTERNAL_OSC / 48000) - 1; // Frequency divided by CMR + 1
|
||||
LPTMR0_CSR = LPTMR_CSR_TPS(2) | // Pin: 0=CMP0, 1=xtal, 2=pin13
|
||||
LPTMR_CSR_TMS; // Mode Select, 0=timer, 1=counter
|
||||
LPTMR0_CSR |= LPTMR_CSR_TEN; // Enable
|
||||
#else
|
||||
// Setup PDB for ADC0 at 24 kHz
|
||||
// Setup PDB for ADC0 at 48 kHz
|
||||
SIM_SCGC6 |= SIM_SCGC6_PDB; // Enable PDB clock
|
||||
PDB0_MOD = (F_BUS / 24000) - 1; // Timer period - 1
|
||||
PDB0_MOD = (F_BUS / 48000) - 1; // Timer period - 1
|
||||
PDB0_IDLY = 0; // Interrupt delay
|
||||
PDB0_CH0C1 = PDB_CHnC1_TOS | PDB_CHnC1_EN; // Enable pre-trigger for ADC0
|
||||
PDB0_SC = PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | // SW trigger, enable interrupts, continuous mode
|
||||
@@ -210,4 +210,9 @@ void CIO::setP25Int(bool on)
|
||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
#endif
|
||||
void CIO::delayInt(unsigned int dly)
|
||||
{
|
||||
delay(dly);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -18,7 +18,7 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F4) || defined(STM32F105xC)
|
||||
#if defined(STM32F4XX) || defined(STM32F7XX) || defined(STM32F105xC)
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
@@ -55,6 +55,7 @@ CP25TX p25TX;
|
||||
CCalDStarRX calDStarRX;
|
||||
CCalDStarTX calDStarTX;
|
||||
CCalDMR calDMR;
|
||||
CCalP25 calP25;
|
||||
CCalRSSI calRSSI;
|
||||
|
||||
CCWIdTX cwIdTX;
|
||||
@@ -93,11 +94,14 @@ void loop()
|
||||
if (m_modemState == STATE_DSTARCAL)
|
||||
calDStarTX.process();
|
||||
|
||||
if (m_modemState == STATE_DMRCAL)
|
||||
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K)
|
||||
calDMR.process();
|
||||
|
||||
if (m_modemState == STATE_IDLE)
|
||||
cwIdTX.process();
|
||||
if (m_modemState == STATE_P25CAL1K)
|
||||
calP25.process();
|
||||
|
||||
if (m_modemState == STATE_IDLE)
|
||||
cwIdTX.process();
|
||||
}
|
||||
|
||||
int main()
|
||||
|
||||
@@ -52,6 +52,7 @@ CP25TX p25TX;
|
||||
CCalDStarRX calDStarRX;
|
||||
CCalDStarTX calDStarTX;
|
||||
CCalDMR calDMR;
|
||||
CCalP25 calP25;
|
||||
CCalRSSI calRSSI;
|
||||
|
||||
CCWIdTX cwIdTX;
|
||||
@@ -90,9 +91,12 @@ void loop()
|
||||
if (m_modemState == STATE_DSTARCAL)
|
||||
calDStarTX.process();
|
||||
|
||||
if (m_modemState == STATE_DMRCAL)
|
||||
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K)
|
||||
calDMR.process();
|
||||
|
||||
if (m_modemState == STATE_P25CAL1K)
|
||||
calP25.process();
|
||||
|
||||
if (m_modemState == STATE_IDLE)
|
||||
cwIdTX.process();
|
||||
}
|
||||
|
||||
@@ -98,8 +98,6 @@
|
||||
<Define name="HSE_VALUE=12000000"/>
|
||||
<Define name="STM32F4_PI"/>
|
||||
<Define name="ARDUINO_MODE_PINS"/>
|
||||
<Define name="SEND_RSSI_DATA"/>
|
||||
<Define name="SERIAL_REPEATER"/>
|
||||
</DefinedSymbols>
|
||||
</Compile>
|
||||
<Link useDefault="0">
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
# Copyright (C) 2016 by Andy Uribe CA6JAU
|
||||
# Copyright (C) 2016,2017 by Andy Uribe CA6JAU
|
||||
# Copyright (C) 2016 by Jim McLaughlin KI6ZUM
|
||||
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
@@ -15,6 +15,54 @@
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
|
||||
# MMDVM source files
|
||||
MMDVM_PATH=.
|
||||
|
||||
# STM32 library paths
|
||||
F4_LIB_PATH=./STM32F4XX_Lib
|
||||
F7_LIB_PATH=./STM32F7XX_Lib
|
||||
|
||||
# MCU external clock frequency (Hz)
|
||||
CLK_MMDVM_PI=12000000
|
||||
CLK_NUCLEO=8000000
|
||||
|
||||
# Directory Structure
|
||||
BINDIR=bin
|
||||
OBJDIR_F4=obj_f4
|
||||
OBJDIR_F7=obj_f7
|
||||
|
||||
# Output files
|
||||
BINELF_F4=mmdvm_f4.elf
|
||||
BINHEX_F4=mmdvm_f4.hex
|
||||
BINBIN_F4=mmdvm_f4.bin
|
||||
BINELF_F7=mmdvm_f7.elf
|
||||
BINHEX_F7=mmdvm_f7.hex
|
||||
BINBIN_F7=mmdvm_f7.bin
|
||||
|
||||
# Header directories
|
||||
INC_F4= . $(F4_LIB_PATH)/CMSIS/Include/ $(F4_LIB_PATH)/Device/ $(F4_LIB_PATH)/STM32F4xx_StdPeriph_Driver/include/
|
||||
INCLUDES_F4=$(INC_F4:%=-I%)
|
||||
INC_F7= . $(F7_LIB_PATH)/CMSIS/Include/ $(F7_LIB_PATH)/Device/ $(F7_LIB_PATH)/STM32F7xx_StdPeriph_Driver/inc/
|
||||
INCLUDES_F7=$(INC_F7:%=-I%)
|
||||
|
||||
# CMSIS libraries
|
||||
INCLUDES_LIBS_F4=$(F4_LIB_PATH)/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a
|
||||
INCLUDES_LIBS_F7=$(F7_LIB_PATH)/CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a
|
||||
|
||||
# STM32F4 Standard Peripheral Libraries source path
|
||||
STD_LIB_F4=$(F4_LIB_PATH)/STM32F4xx_StdPeriph_Driver/source
|
||||
|
||||
# STM32F7 Standard Peripheral Libraries source path
|
||||
STD_LIB_F7=$(F7_LIB_PATH)/STM32F7xx_StdPeriph_Driver/src
|
||||
|
||||
# STM32F4 system source path
|
||||
SYS_DIR_F4=$(F4_LIB_PATH)/Device
|
||||
STARTUP_DIR_F4=$(F4_LIB_PATH)/Device/startup
|
||||
|
||||
# STM32F7 system source path
|
||||
SYS_DIR_F7=$(F7_LIB_PATH)/Device
|
||||
STARTUP_DIR_F7=$(F7_LIB_PATH)/Device/startup
|
||||
|
||||
# GNU ARM Embedded Toolchain
|
||||
CC=arm-none-eabi-gcc
|
||||
CXX=arm-none-eabi-g++
|
||||
@@ -27,163 +75,248 @@ NM=arm-none-eabi-nm
|
||||
SIZE=arm-none-eabi-size
|
||||
A2L=arm-none-eabi-addr2line
|
||||
|
||||
# Directory Structure
|
||||
BINDIR=bin
|
||||
|
||||
# Find source files
|
||||
# "SystemRoot" is only defined in Windows
|
||||
ifdef SYSTEMROOT
|
||||
ASOURCES=$(shell dir /S /B *.s)
|
||||
CSOURCES=$(shell dir /S /B *.c)
|
||||
CXXSOURCES=$(shell dir /S /B *.cpp)
|
||||
CLEANCMD=del /S *.o *.hex *.bin *.elf GitVersion.h
|
||||
MDBIN=md $@
|
||||
MDDIRS=md $@
|
||||
else ifdef SystemRoot
|
||||
ASOURCES=$(shell dir /S /B *.s)
|
||||
CSOURCES=$(shell dir /S /B *.c)
|
||||
CXXSOURCES=$(shell dir /S /B *.cpp)
|
||||
CLEANCMD=del /S *.o *.hex *.bin *.elf GitVersion.h
|
||||
MDBIN=md $@
|
||||
MDDIRS=md $@
|
||||
else
|
||||
ASOURCES=$(shell find . -name '*.s')
|
||||
CSOURCES=$(shell find . -name '*.c')
|
||||
CXXSOURCES=$(shell find . -name '*.cpp')
|
||||
CLEANCMD=rm -f $(OBJECTS) $(BINDIR)/$(BINELF) $(BINDIR)/$(BINHEX) $(BINDIR)/$(BINBIN) GitVersion.h
|
||||
MDBIN=mkdir $@
|
||||
CLEANCMD=rm -f $(OBJ_F4) $(OBJ_F7) $(BINDIR)/*.hex $(BINDIR)/*.bin $(BINDIR)/*.elf GitVersion.h
|
||||
MDDIRS=mkdir $@
|
||||
endif
|
||||
|
||||
# Default reference oscillator frequencies
|
||||
ifndef $(OSC)
|
||||
ifeq ($(MAKECMDGOALS),pi)
|
||||
OSC=12000000
|
||||
OSC=$(CLK_MMDVM_PI)
|
||||
else ifeq ($(MAKECMDGOALS),pi-f722)
|
||||
OSC=$(CLK_MMDVM_PI)
|
||||
else
|
||||
OSC=8000000
|
||||
OSC=$(CLK_NUCLEO)
|
||||
endif
|
||||
endif
|
||||
|
||||
# Find header directories
|
||||
INC= . STM32F4XX_Lib/CMSIS/Include/ STM32F4XX_Lib/Device/ STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/
|
||||
INCLUDES=$(INC:%=-I%)
|
||||
# Build object lists
|
||||
CXXSRC=$(wildcard $(MMDVM_PATH)/*.cpp)
|
||||
CSRC_STD_F4=$(wildcard $(STD_LIB_F4)/*.c)
|
||||
SYS_F4=$(wildcard $(SYS_DIR_F4)/*.c)
|
||||
STARTUP_F4=$(wildcard $(STARTUP_DIR_F4)/*.c)
|
||||
CSRC_STD_F7=$(wildcard $(STD_LIB_F7)/*.c)
|
||||
SYS_F7=$(wildcard $(SYS_DIR_F7)/*.c)
|
||||
STARTUP_F7=$(wildcard $(STARTUP_DIR_F7)/*.c)
|
||||
OBJ_F4=$(CXXSRC:$(MMDVM_PATH)/%.cpp=$(OBJDIR_F4)/%.o) $(CSRC_STD_F4:$(STD_LIB_F4)/%.c=$(OBJDIR_F4)/%.o) $(SYS_F4:$(SYS_DIR_F4)/%.c=$(OBJDIR_F4)/%.o) $(STARTUP_F4:$(STARTUP_DIR_F4)/%.c=$(OBJDIR_F4)/%.o)
|
||||
OBJ_F7=$(CXXSRC:$(MMDVM_PATH)/%.cpp=$(OBJDIR_F7)/%.o) $(CSRC_STD_F7:$(STD_LIB_F7)/%.c=$(OBJDIR_F7)/%.o) $(SYS_F7:$(SYS_DIR_F7)/%.c=$(OBJDIR_F7)/%.o) $(STARTUP_F7:$(STARTUP_DIR_F7)/%.c=$(OBJDIR_F7)/%.o)
|
||||
|
||||
# Find libraries
|
||||
INCLUDES_LIBS=STM32F4XX_Lib/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a
|
||||
LINK_LIBS=
|
||||
# MCU flags
|
||||
MCFLAGS_F4=-mcpu=cortex-m4 -mthumb -mlittle-endian -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb-interwork
|
||||
MCFLAGS_F7=-mcpu=cortex-m7 -mthumb -mlittle-endian -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb-interwork
|
||||
|
||||
# Create object list
|
||||
OBJECTS=$(ASOURCES:%.s=%.o)
|
||||
OBJECTS+=$(CSOURCES:%.c=%.o)
|
||||
OBJECTS+=$(CXXSOURCES:%.cpp=%.o)
|
||||
|
||||
# Define output files ELF & IHEX
|
||||
BINELF=outp.elf
|
||||
BINHEX=outp.hex
|
||||
BINBIN=outp.bin
|
||||
|
||||
# MCU FLAGS
|
||||
MCFLAGS=-mcpu=cortex-m4 -mthumb -mlittle-endian \
|
||||
-mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb-interwork
|
||||
|
||||
# COMPILE FLAGS
|
||||
# Compile flags
|
||||
# STM32F4 Discovery board:
|
||||
DEFS_DIS=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_DISCOVERY -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# Pi board:
|
||||
DEFS_PI=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_PI -DARDUINO_MODE_PINS -DSEND_RSSI_DATA -DSERIAL_REPEATER -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# STM32F4 Nucleo 446 board:
|
||||
# MMDVM-Pi board:
|
||||
DEFS_PI=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_PI -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# MMDVM-F4M F0DEI board:
|
||||
DEFS_F4M=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_F4M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# STM32F4 Nucleo-64 F446RE board:
|
||||
DEFS_NUCLEO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_NUCLEO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# STM32F7 Nucleo-144 F767ZI board:
|
||||
DEFS_NUCLEO_F767=-DUSE_HAL_DRIVER -DSTM32F767xx -DSTM32F7XX -DSTM32F7_NUCLEO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# MMDVM-Pi F722 board:
|
||||
DEFS_PI_F722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_PI -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
|
||||
CFLAGS=-c $(MCFLAGS) $(INCLUDES)
|
||||
CXXFLAGS=-c $(MCFLAGS) $(INCLUDES)
|
||||
# Build compiler flags
|
||||
CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
|
||||
CXXFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
|
||||
CFLAGS_F7=-c $(MCFLAGS_F7) $(INCLUDES_F7)
|
||||
CXXFLAGS_F7=-c $(MCFLAGS_F7) $(INCLUDES_F7)
|
||||
|
||||
# LINKER FLAGS
|
||||
LDSCRIPT=stm32f4xx_link.ld
|
||||
LDFLAGS =-T $(LDSCRIPT) $(MCFLAGS) --specs=nosys.specs $(INCLUDES_LIBS) $(LINK_LIBS)
|
||||
# Linker flags
|
||||
LDFLAGS_F4 =-T stm32f4xx_link.ld $(MCFLAGS_F4) --specs=nosys.specs $(INCLUDES_LIBS_F4)
|
||||
LDFLAGS_F767 =-T stm32f767_link.ld $(MCFLAGS_F7) --specs=nosys.specs $(INCLUDES_LIBS_F7)
|
||||
LDFLAGS_F722 =-T stm32f722_link.ld $(MCFLAGS_F7) --specs=nosys.specs $(INCLUDES_LIBS_F7)
|
||||
|
||||
# Common flags
|
||||
CFLAGS=-Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
|
||||
CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
|
||||
LDFLAGS=-Os --specs=nano.specs
|
||||
|
||||
# Build Rules
|
||||
.PHONY: all release dis pi nucleo debug clean
|
||||
.PHONY: all release dis pi pi_f722 f4m nucleo f767 clean
|
||||
|
||||
# Default target: STM32F4 Nucleo F446RE board
|
||||
# Default target: Nucleo-64 F446RE board
|
||||
all: nucleo
|
||||
|
||||
pi: GitVersion.h
|
||||
pi: CFLAGS+=$(DEFS_PI) -Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
|
||||
pi: CXXFLAGS+=$(DEFS_PI) -Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
|
||||
pi: LDFLAGS+=-Os --specs=nano.specs
|
||||
pi: release
|
||||
pi: CFLAGS+=$(CFLAGS_F4) $(DEFS_PI)
|
||||
pi: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_PI)
|
||||
pi: LDFLAGS+=$(LDFLAGS_F4)
|
||||
pi: release_f4
|
||||
|
||||
pi-f722: GitVersion.h
|
||||
pi-f722: CFLAGS+=$(CFLAGS_F7) $(DEFS_PI_F722)
|
||||
pi-f722: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_PI_F722)
|
||||
pi-f722: LDFLAGS+=$(LDFLAGS_F722)
|
||||
pi-f722: release_f7
|
||||
|
||||
f4m: GitVersion.h
|
||||
f4m: CFLAGS+=$(CFLAGS_F4) $(DEFS_F4M)
|
||||
f4m: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_F4M)
|
||||
f4m: LDFLAGS+=$(LDFLAGS_F4)
|
||||
f4m: release_f4
|
||||
|
||||
nucleo: GitVersion.h
|
||||
nucleo: CFLAGS+=$(DEFS_NUCLEO) -Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
|
||||
nucleo: CXXFLAGS+=$(DEFS_NUCLEO) -Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
|
||||
nucleo: LDFLAGS+=-Os --specs=nano.specs
|
||||
nucleo: release
|
||||
nucleo: CFLAGS+=$(CFLAGS_F4) $(DEFS_NUCLEO)
|
||||
nucleo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_NUCLEO)
|
||||
nucleo: LDFLAGS+=$(LDFLAGS_F4)
|
||||
nucleo: release_f4
|
||||
|
||||
dis: GitVersion.h
|
||||
dis: CFLAGS+=$(DEFS_DIS) -Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
|
||||
dis: CXXFLAGS+=$(DEFS_DIS) -Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
|
||||
dis: LDFLAGS+=-Os --specs=nano.specs
|
||||
dis: release
|
||||
dis: CFLAGS+=$(CFLAGS_F4) $(DEFS_DIS)
|
||||
dis: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DIS)
|
||||
dis: LDFLAGS+=$(LDFLAGS_F4)
|
||||
dis: release_f4
|
||||
|
||||
debug: CFLAGS+=-g
|
||||
debug: CXXFLAGS+=-g
|
||||
debug: LDFLAGS+=-g
|
||||
debug: release
|
||||
f767: GitVersion.h
|
||||
f767: CFLAGS+=$(CFLAGS_F7) $(DEFS_NUCLEO_F767)
|
||||
f767: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_NUCLEO_F767)
|
||||
f767: LDFLAGS+=$(LDFLAGS_F767)
|
||||
f767: release_f7
|
||||
|
||||
release: $(BINDIR)
|
||||
release: $(BINDIR)/$(BINHEX)
|
||||
release: $(BINDIR)/$(BINBIN)
|
||||
release_f4: $(BINDIR)
|
||||
release_f4: $(OBJDIR_F4)
|
||||
release_f4: $(BINDIR)/$(BINHEX_F4)
|
||||
release_f4: $(BINDIR)/$(BINBIN_F4)
|
||||
|
||||
release_f7: $(BINDIR)
|
||||
release_f7: $(OBJDIR_F7)
|
||||
release_f7: $(BINDIR)/$(BINHEX_F7)
|
||||
release_f7: $(BINDIR)/$(BINBIN_F7)
|
||||
|
||||
$(BINDIR):
|
||||
$(MDBIN)
|
||||
$(MDDIRS)
|
||||
|
||||
$(BINDIR)/$(BINHEX): $(BINDIR)/$(BINELF)
|
||||
$(OBJDIR_F4):
|
||||
$(MDDIRS)
|
||||
|
||||
$(OBJDIR_F7):
|
||||
$(MDDIRS)
|
||||
|
||||
$(BINDIR)/$(BINHEX_F4): $(BINDIR)/$(BINELF_F4)
|
||||
$(CP) -O ihex $< $@
|
||||
@echo "Objcopy from ELF to IHEX complete!\n"
|
||||
|
||||
$(BINDIR)/$(BINBIN): $(BINDIR)/$(BINELF)
|
||||
$(BINDIR)/$(BINBIN_F4): $(BINDIR)/$(BINELF_F4)
|
||||
$(CP) -O binary $< $@
|
||||
@echo "Objcopy from ELF to BINARY complete!\n"
|
||||
|
||||
$(BINDIR)/$(BINELF): $(OBJECTS)
|
||||
$(CXX) $(OBJECTS) $(LDFLAGS) -o $@
|
||||
$(BINDIR)/$(BINELF_F4): $(OBJ_F4)
|
||||
$(CXX) $(OBJ_F4) $(LDFLAGS) -o $@
|
||||
@echo "Linking complete!\n"
|
||||
$(SIZE) $(BINDIR)/$(BINELF)
|
||||
$(SIZE) $(BINDIR)/$(BINELF_F4)
|
||||
|
||||
%.o: %.cpp
|
||||
$(BINDIR)/$(BINHEX_F7): $(BINDIR)/$(BINELF_F7)
|
||||
$(CP) -O ihex $< $@
|
||||
@echo "Objcopy from ELF to IHEX complete!\n"
|
||||
|
||||
$(BINDIR)/$(BINBIN_F7): $(BINDIR)/$(BINELF_F7)
|
||||
$(CP) -O binary $< $@
|
||||
@echo "Objcopy from ELF to BINARY complete!\n"
|
||||
|
||||
$(BINDIR)/$(BINELF_F7): $(OBJ_F7)
|
||||
$(CXX) $(OBJ_F7) $(LDFLAGS) -o $@
|
||||
@echo "Linking complete!\n"
|
||||
$(SIZE) $(BINDIR)/$(BINELF_F7)
|
||||
|
||||
$(OBJDIR_F4)/%.o: $(MMDVM_PATH)/%.cpp
|
||||
$(CXX) $(CXXFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
%.o: %.c
|
||||
$(OBJDIR_F7)/%.o: $(MMDVM_PATH)/%.cpp
|
||||
$(CXX) $(CXXFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
$(OBJDIR_F4)/%.o: $(STD_LIB_F4)/%.c
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
%.o: %.s
|
||||
$(OBJDIR_F7)/%.o: $(STD_LIB_F7)/%.c
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Assambled "$<"!\n"
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
$(OBJDIR_F4)/%.o: $(SYS_DIR_F4)/%.c
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
$(OBJDIR_F4)/%.o: $(STARTUP_DIR_F4)/%.c
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
$(OBJDIR_F7)/%.o: $(SYS_DIR_F7)/%.c
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
$(OBJDIR_F7)/%.o: $(STARTUP_DIR_F7)/%.c
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
clean:
|
||||
$(CLEANCMD)
|
||||
|
||||
|
||||
deploy:
|
||||
ifneq ($(wildcard /usr/bin/openocd),)
|
||||
/usr/bin/openocd -f /usr/share/openocd/scripts/board/stm32f4discovery.cfg -c "program bin/$(BINELF) verify reset exit"
|
||||
/usr/bin/openocd -f /usr/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/share/openocd/scripts/target/stm32f4x.cfg -c "program bin/$(BINELF_F4) verify reset exit"
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /usr/local/bin/openocd),)
|
||||
/usr/local/bin/openocd -f /usr/local/share/openocd/scripts/board/stm32f4discovery.cfg -c "program bin/$(BINELF) verify reset exit"
|
||||
/usr/local/bin/openocd -f /usr/local/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/local/share/openocd/scripts/target/stm32f4x.cfg -c "program bin/$(BINELF_F4) verify reset exit"
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /opt/openocd/bin/openocd),)
|
||||
/opt/openocd/bin/openocd -f /opt/openocd/share/openocd/scripts/board/stm32f4discovery.cfg -c "program bin/$(BINELF) verify reset exit"
|
||||
/opt/openocd/bin/openocd -f /opt/openocd/share/openocd/scripts/interface/stlink-v2-1.cfg -f /opt/openocd/share/openocd/scripts/target/stm32f4x.cfg -c "program bin/$(BINELF_F4) verify reset exit"
|
||||
endif
|
||||
|
||||
deploy-f7:
|
||||
ifneq ($(wildcard /usr/bin/openocd),)
|
||||
/usr/bin/openocd -f /usr/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/share/openocd/scripts/target/stm32f7x.cfg -c "program bin/$(BINELF_F7) verify reset exit"
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /usr/local/bin/openocd),)
|
||||
/usr/local/bin/openocd -f /usr/local/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/local/share/openocd/scripts/target/stm32f7x.cfg -c "program bin/$(BINELF_F7) verify reset exit"
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /opt/openocd/bin/openocd),)
|
||||
/opt/openocd/bin/openocd -f /opt/openocd/share/openocd/scripts/interface/stlink-v2-1.cfg -f /opt/openocd/share/openocd/scripts/target/stm32f7x.cfg -c "program bin/$(BINELF_F7) verify reset exit"
|
||||
endif
|
||||
|
||||
deploy-pi:
|
||||
ifneq ($(wildcard /usr/local/bin/stm32flash),)
|
||||
-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
|
||||
/usr/local/bin/stm32flash -v -w bin/outp.bin -g 0x0 -R -c /dev/ttyAMA0
|
||||
-/usr/local/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F4)
|
||||
/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R -c /dev/ttyAMA0
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /usr/bin/stm32flash),)
|
||||
-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
|
||||
/usr/bin/stm32flash -v -w bin/outp.bin -g 0x0 -R -c /dev/ttyAMA0
|
||||
-/usr/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F4)
|
||||
/usr/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R -c /dev/ttyAMA0
|
||||
endif
|
||||
|
||||
deploy-f4m: deploy-pi
|
||||
|
||||
deploy-pi-f7:
|
||||
ifneq ($(wildcard /usr/local/bin/stm32flash),)
|
||||
-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
|
||||
-/usr/local/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F7)
|
||||
/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /usr/bin/stm32flash),)
|
||||
-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
|
||||
-/usr/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F7)
|
||||
/usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
|
||||
endif
|
||||
|
||||
# Export the current git version if the index file exists, else 000...
|
||||
|
||||
+2
-3
@@ -93,8 +93,7 @@ default:
|
||||
|
||||
#This rule is good to just make sure stuff compiles, without having to wait
|
||||
#for bossac.
|
||||
compile: GitVersion.h
|
||||
compile: $(TMPDIR)/$(PROJNAME).elf
|
||||
compile: GitVersion.h $(TMPDIR)/$(PROJNAME).elf $(TMPDIR)/$(PROJNAME).bin
|
||||
|
||||
#This is a make rule template to create object files from the source files.
|
||||
# arg 1=src file
|
||||
@@ -175,7 +174,7 @@ $(TMPDIR)/$(PROJNAME).bin: $(TMPDIR)/$(PROJNAME).elf
|
||||
$(OBJCOPY) -O binary $< $@
|
||||
|
||||
#upload to the arduino by first resetting it (stty) and the running bossac
|
||||
upload: $(TMPDIR)/$(PROJNAME).bin
|
||||
upload: compile
|
||||
stty -F /dev/$(PORT) cs8 1200 hupcl
|
||||
$(ADIR)/packages/arduino/tools/bossac/1.6.1-arduino/bossac -i --port=$(PORT) -U false -e -w $(VERIFY) -b $(TMPDIR)/$(PROJNAME).bin -R
|
||||
|
||||
|
||||
+2
-2
@@ -39,7 +39,7 @@ OBJDIR:=obj
|
||||
BINDIR:=bin
|
||||
|
||||
# Port definition for programming via bootloader (using stm32flash)
|
||||
BL_PORT:=/dev/ttyUSB0
|
||||
BL_PORT:=ttyUSB0
|
||||
|
||||
|
||||
|
||||
@@ -102,7 +102,7 @@ program: $(HEX) $(ELF)
|
||||
|
||||
.PHONY: program_bl
|
||||
program_bl: $(HEX) $(ELF)
|
||||
stm32flash -w $(HEX) -v $(BL_PORT)
|
||||
stm32flash -w $(HEX) -v /dev/$(BL_PORT)
|
||||
$(SIZE) $(ELF)
|
||||
|
||||
.PHONY: run
|
||||
|
||||
+1
-1
@@ -19,7 +19,7 @@
|
||||
#if !defined(P25DEFINES_H)
|
||||
#define P25DEFINES_H
|
||||
|
||||
const unsigned int P25_RADIO_SYMBOL_LENGTH = 5U; // At 24 kHz sample rate
|
||||
const unsigned int P25_RADIO_SYMBOL_LENGTH = 10U; // At 48 kHz sample rate
|
||||
|
||||
const unsigned int P25_HDR_FRAME_LENGTH_BYTES = 99U;
|
||||
const unsigned int P25_HDR_FRAME_LENGTH_BITS = P25_HDR_FRAME_LENGTH_BYTES * 8U;
|
||||
|
||||
@@ -23,18 +23,22 @@
|
||||
|
||||
#include "P25Defines.h"
|
||||
|
||||
// Generated using rcosdesign(0.2, 8, 5, 'normal') in MATLAB
|
||||
// numTaps = 40, L = 5
|
||||
static q15_t RC_0_2_FILTER[] = {-897, -1636, -1840, -1278, 0, 1613, 2936, 3310, 2315, 0, -3011, -5627, -6580, -4839,
|
||||
0, 7482, 16311, 24651, 30607, 32767, 30607, 24651, 16311, 7482, 0, -4839, -6580, -5627,
|
||||
-3011, 0, 2315, 3310, 2936, 1613, 0, -1278, -1840, -1636, -897, 0}; // numTaps = 40, L = 5
|
||||
// Generated using rcosdesign(0.2, 8, 10, 'normal') in MATLAB
|
||||
static q15_t RC_0_2_FILTER[] = {-444, -897, -1311, -1636, -1825, -1840, -1659, -1278, -712, 0,
|
||||
800, 1613, 2354, 2936, 3277, 3310, 2994, 2315, 1296, 0, -1478,
|
||||
-3011, -4448, -5627, -6386, -6580, -6090, -4839, -2800, 0, 3474,
|
||||
7482, 11835, 16311, 20666, 24651, 28032, 30607, 32219, 32767,
|
||||
32219, 30607, 28032, 24651, 20666, 16311, 11835, 7482, 3474, 0,
|
||||
-2800, -4839, -6090, -6580, -6386, -5627, -4448, -3011, -1478,
|
||||
0, 1296, 2315, 2994, 3310, 3277, 2936, 2354, 1613, 800, 0, -712,
|
||||
-1278, -1659, -1840, -1825, -1636, -1311, -897, -444, 0}; // numTaps = 80, L = 10
|
||||
const uint16_t RC_0_2_FILTER_PHASE_LEN = 8U; // phaseLength = numTaps/L
|
||||
|
||||
// Generated in MATLAB using the following commands, and then normalised for unity gain
|
||||
// shape2 = 'Inverse-sinc Lowpass';
|
||||
// d2 = fdesign.interpolator(1, shape2);
|
||||
// h2 = design(d2, 'SystemObject', true);
|
||||
static q15_t LOWPASS_FILTER[] = {1376, -2393, 4584, -8933, 22325, 22325, -8933, 4584, -2393, 1376};
|
||||
static q15_t LOWPASS_FILTER[] = {1294, -2251, 4312, -8402, 20999, 20999, -8402, 4312, -2251, 1294};
|
||||
const uint16_t LOWPASS_FILTER_LEN = 10U;
|
||||
|
||||
const q15_t P25_LEVELA = 1260;
|
||||
|
||||
@@ -21,9 +21,10 @@ Boston, MA 02110-1301, USA.
|
||||
#if !defined(RSSIRB_H)
|
||||
#define RSSIRB_H
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F4)
|
||||
#if defined(STM32F4XX)
|
||||
#include "stm32f4xx.h"
|
||||
#include <cstddef>
|
||||
#elif defined(STM32F7XX)
|
||||
#include "stm32f7xx.h"
|
||||
#elif defined(STM32F105xC)
|
||||
#include "stm32f1xx.h"
|
||||
#include <cstddef>
|
||||
|
||||
+3
-2
@@ -21,9 +21,10 @@ Boston, MA 02110-1301, USA.
|
||||
#if !defined(SAMPLERB_H)
|
||||
#define SAMPLERB_H
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F4)
|
||||
#if defined(STM32F4XX)
|
||||
#include "stm32f4xx.h"
|
||||
#include <cstddef>
|
||||
#elif defined(STM32F7XX)
|
||||
#include "stm32f7xx.h"
|
||||
#elif defined(STM32F105xC)
|
||||
#include "stm32f1xx.h"
|
||||
#include <cstddef>
|
||||
|
||||
+67
-24
@@ -73,9 +73,9 @@ const uint8_t MMDVM_DEBUG5 = 0xF5U;
|
||||
|
||||
|
||||
#if defined(EXTERNAL_OSC)
|
||||
#define DESCRIPTION "MMDVM 20170406 TCXO (D-Star/DMR/System Fusion/P25/RSSI/CW Id)"
|
||||
#define DESCRIPTION "MMDVM 20170501 TCXO 48kHz (D-Star/DMR/YSF/P25/RSSI/CW Id)"
|
||||
#else
|
||||
#define DESCRIPTION "MMDVM 20170406 (D-Star/DMR/System Fusion/P25/RSSI/CW Id)"
|
||||
#define DESCRIPTION "MMDVM 20170501 48kHz (D-Star/DMR/YSF/P25/RSSI/CW Id)"
|
||||
#endif
|
||||
|
||||
#if defined(GITVERSION)
|
||||
@@ -221,7 +221,7 @@ void CSerialPort::getVersion()
|
||||
|
||||
uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
|
||||
{
|
||||
if (length < 13U)
|
||||
if (length < 15U)
|
||||
return 4U;
|
||||
|
||||
bool rxInvert = (data[0U] & 0x01U) == 0x01U;
|
||||
@@ -243,7 +243,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
|
||||
|
||||
MMDVM_STATE modemState = MMDVM_STATE(data[3U]);
|
||||
|
||||
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL)
|
||||
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K)
|
||||
return 4U;
|
||||
if (modemState == STATE_DSTAR && !dstarEnable)
|
||||
return 4U;
|
||||
@@ -268,6 +268,9 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
|
||||
uint8_t ysfTXLevel = data[11U];
|
||||
uint8_t p25TXLevel = data[12U];
|
||||
|
||||
int16_t txDCOffset = int16_t(data[13U]) - 128;
|
||||
int16_t rxDCOffset = int16_t(data[14U]) - 128;
|
||||
|
||||
m_modemState = modemState;
|
||||
|
||||
m_dstarEnable = dstarEnable;
|
||||
@@ -289,7 +292,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
|
||||
|
||||
ysfTX.setLoDev(ysfLoDev);
|
||||
|
||||
io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel);
|
||||
io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, txDCOffset, rxDCOffset);
|
||||
|
||||
io.start();
|
||||
|
||||
@@ -306,7 +309,7 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
|
||||
if (modemState == m_modemState)
|
||||
return 0U;
|
||||
|
||||
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL)
|
||||
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K)
|
||||
return 4U;
|
||||
if (modemState == STATE_DSTAR && !m_dstarEnable)
|
||||
return 4U;
|
||||
@@ -389,6 +392,36 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
|
||||
p25RX.reset();
|
||||
cwIdTX.reset();
|
||||
break;
|
||||
case STATE_LFCAL:
|
||||
DEBUG1("Mode set to 80 Hz Calibrate");
|
||||
dmrIdleRX.reset();
|
||||
dmrDMORX.reset();
|
||||
dmrRX.reset();
|
||||
dstarRX.reset();
|
||||
ysfRX.reset();
|
||||
p25RX.reset();
|
||||
cwIdTX.reset();
|
||||
break;
|
||||
case STATE_DMRCAL1K:
|
||||
DEBUG1("Mode set to DMR 1031 Hz Calibrate");
|
||||
dmrIdleRX.reset();
|
||||
dmrDMORX.reset();
|
||||
dmrRX.reset();
|
||||
dstarRX.reset();
|
||||
ysfRX.reset();
|
||||
p25RX.reset();
|
||||
cwIdTX.reset();
|
||||
break;
|
||||
case STATE_P25CAL1K:
|
||||
DEBUG1("Mode set to P25 1011 Hz Calibrate");
|
||||
dmrIdleRX.reset();
|
||||
dmrDMORX.reset();
|
||||
dmrRX.reset();
|
||||
dstarRX.reset();
|
||||
ysfRX.reset();
|
||||
p25RX.reset();
|
||||
cwIdTX.reset();
|
||||
break;
|
||||
default:
|
||||
DEBUG1("Mode set to Idle");
|
||||
// STATE_IDLE
|
||||
@@ -420,6 +453,9 @@ void CSerialPort::process()
|
||||
m_buffer[0U] = c;
|
||||
m_ptr = 1U;
|
||||
m_len = 0U;
|
||||
} else {
|
||||
m_ptr = 0U;
|
||||
m_len = 0U;
|
||||
}
|
||||
} else if (m_ptr == 1U) {
|
||||
// Handle the frame length
|
||||
@@ -466,8 +502,10 @@ void CSerialPort::process()
|
||||
case MMDVM_CAL_DATA:
|
||||
if (m_modemState == STATE_DSTARCAL)
|
||||
err = calDStarTX.write(m_buffer + 3U, m_len - 3U);
|
||||
if (m_modemState == STATE_DMRCAL)
|
||||
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K)
|
||||
err = calDMR.write(m_buffer + 3U, m_len - 3U);
|
||||
if (m_modemState == STATE_P25CAL1K)
|
||||
err = calP25.write(m_buffer + 3U, m_len - 3U);
|
||||
if (err == 0U) {
|
||||
sendACK();
|
||||
} else {
|
||||
@@ -645,9 +683,9 @@ void CSerialPort::process()
|
||||
|
||||
#if defined(SERIAL_REPEATER)
|
||||
case MMDVM_SERIAL: {
|
||||
for (uint8_t i = 3U; i < m_len; i++)
|
||||
m_repeat.put(m_buffer[i]);
|
||||
}
|
||||
for (uint8_t i = 3U; i < m_len; i++)
|
||||
m_repeat.put(m_buffer[i]);
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
|
||||
@@ -663,23 +701,28 @@ void CSerialPort::process()
|
||||
}
|
||||
}
|
||||
|
||||
if (io.getWatchdog() >= 96000U) {
|
||||
m_ptr = 0U;
|
||||
m_len = 0U;
|
||||
}
|
||||
|
||||
#if defined(SERIAL_REPEATER)
|
||||
// Write any outgoing serial data
|
||||
uint16_t space = m_repeat.getData();
|
||||
if (space > 0U) {
|
||||
int avail = availableForWriteInt(3U);
|
||||
if (avail < space)
|
||||
space = avail;
|
||||
// Write any outgoing serial data
|
||||
uint16_t space = m_repeat.getData();
|
||||
if (space > 0U) {
|
||||
int avail = availableForWriteInt(3U);
|
||||
if (avail < space)
|
||||
space = avail;
|
||||
|
||||
for (uint16_t i = 0U; i < space; i++) {
|
||||
uint8_t c = m_repeat.get();
|
||||
writeInt(3U, &c, 1U);
|
||||
}
|
||||
}
|
||||
for (uint16_t i = 0U; i < space; i++) {
|
||||
uint8_t c = m_repeat.get();
|
||||
writeInt(3U, &c, 1U);
|
||||
}
|
||||
}
|
||||
|
||||
// Read any incoming serial data
|
||||
while (availableInt(3U))
|
||||
readInt(3U);
|
||||
// Read any incoming serial data
|
||||
while (availableInt(3U))
|
||||
readInt(3U);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
+3
-2
@@ -21,9 +21,10 @@ Boston, MA 02110-1301, USA.
|
||||
#if !defined(SERIALRB_H)
|
||||
#define SERIALRB_H
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F4)
|
||||
#if defined(STM32F4XX)
|
||||
#include "stm32f4xx.h"
|
||||
#include <cstddef>
|
||||
#elif defined(STM32F7XX)
|
||||
#include "stm32f7xx.h"
|
||||
#elif defined(STM32F105xC)
|
||||
#include "stm32f1xx.h"
|
||||
#include <cstddef>
|
||||
|
||||
+44
-35
@@ -27,17 +27,17 @@
|
||||
Pin definitions:
|
||||
|
||||
- Host communication:
|
||||
USART1 - TXD PA9 - RXD PA10 (Pi board)
|
||||
USART2 - TXD PA2 - RXD PA3 (Nucleo board)
|
||||
USART1 - TXD PA9 - RXD PA10 (MMDVM-Pi board, MMDVM-Pi F722 board, MMDVM-F4M board)
|
||||
USART2 - TXD PA2 - RXD PA3 (Nucleo64 F446RE board, Morpho or Arduino header)
|
||||
USART3 - TXD PC10 - RXD PC11 (Discovery board)
|
||||
USART3 - TXD PD8 - RXD PD9 (Nucleo144 F767ZI board)
|
||||
|
||||
- Serial repeater:
|
||||
USART1 - TXD PA9 - RXD PA10 (Nucleo with Arduino header)
|
||||
UART5 - TXD PC12 - RXD PD2 (Discovery, Pi and Nucleo with Morpho header)
|
||||
|
||||
UART5 - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, Nucleo64 with Morpho header and Nucleo144 F767ZI)
|
||||
*/
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F4)
|
||||
#if defined(STM32F4XX) || defined(STM32F7XX)
|
||||
|
||||
#define TX_SERIAL_FIFO_SIZE 512U
|
||||
#define RX_SERIAL_FIFO_SIZE 512U
|
||||
@@ -50,9 +50,8 @@ extern "C" {
|
||||
}
|
||||
|
||||
/* ************* USART1 ***************** */
|
||||
#if defined(STM32F4_PI) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
|
||||
#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
|
||||
|
||||
volatile uint32_t intcount1;
|
||||
volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead1, TXSerialfifotail1;
|
||||
@@ -139,7 +138,6 @@ void USART1_IRQHandler()
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(USART1, USART_IT_RXNE);
|
||||
intcount1++;
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(USART1, USART_IT_TXE)) {
|
||||
@@ -186,7 +184,7 @@ void InitUSART1(int speed)
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9 | GPIO_Pin_10; // Tx | Rx
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Fast_Speed;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
|
||||
// Configure USART baud rate
|
||||
@@ -245,7 +243,6 @@ void WriteUSART1(const uint8_t* data, uint16_t length)
|
||||
/* ************* USART2 ***************** */
|
||||
#if defined(STM32F4_NUCLEO)
|
||||
|
||||
volatile uint32_t intcount2;
|
||||
volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead2, TXSerialfifotail2;
|
||||
@@ -332,7 +329,6 @@ void USART2_IRQHandler()
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(USART2, USART_IT_RXNE);
|
||||
intcount2++;
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(USART2, USART_IT_TXE)) {
|
||||
@@ -379,7 +375,7 @@ void InitUSART2(int speed)
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3; // Tx | Rx
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Fast_Speed;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
|
||||
// Configure USART baud rate
|
||||
@@ -436,9 +432,8 @@ void WriteUSART2(const uint8_t* data, uint16_t length)
|
||||
#endif
|
||||
|
||||
/* ************* USART3 ***************** */
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F4_PI)
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
|
||||
volatile uint32_t intcount3;
|
||||
volatile uint8_t TXSerialfifo3[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo3[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead3, TXSerialfifotail3;
|
||||
@@ -525,7 +520,6 @@ void USART3_IRQHandler()
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(USART3, USART_IT_RXNE);
|
||||
intcount3++;
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(USART3, USART_IT_TXE)) {
|
||||
@@ -547,17 +541,34 @@ void USART3_IRQHandler()
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(STM32F7_NUCLEO)
|
||||
// USART3 - TXD PD8 - RXD PD9
|
||||
#define USART3_GPIO_PinSource_TX GPIO_PinSource8
|
||||
#define USART3_GPIO_PinSource_RX GPIO_PinSource9
|
||||
#define USART3_GPIO_Pin_TX GPIO_Pin_8
|
||||
#define USART3_GPIO_Pin_RX GPIO_Pin_9
|
||||
#define USART3_GPIO_PORT GPIOD
|
||||
#define USART3_RCC_Periph RCC_AHB1Periph_GPIOD
|
||||
#else
|
||||
// USART3 - TXD PC10 - RXD PC11
|
||||
#define USART3_GPIO_PinSource_TX GPIO_PinSource10
|
||||
#define USART3_GPIO_PinSource_RX GPIO_PinSource11
|
||||
#define USART3_GPIO_Pin_TX GPIO_Pin_10
|
||||
#define USART3_GPIO_Pin_RX GPIO_Pin_11
|
||||
#define USART3_GPIO_PORT GPIOC
|
||||
#define USART3_RCC_Periph RCC_AHB1Periph_GPIOC
|
||||
#endif
|
||||
|
||||
void InitUSART3(int speed)
|
||||
{
|
||||
// USART3 - TXD PC10 - RXD PC11
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
USART_InitTypeDef USART_InitStructure;
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
|
||||
RCC_AHB1PeriphClockCmd(USART3_RCC_Periph, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
|
||||
GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_USART3);
|
||||
GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_USART3);
|
||||
GPIO_PinAFConfig(USART3_GPIO_PORT, USART3_GPIO_PinSource_TX, GPIO_AF_USART3);
|
||||
GPIO_PinAFConfig(USART3_GPIO_PORT, USART3_GPIO_PinSource_RX, GPIO_AF_USART3);
|
||||
|
||||
// USART IRQ init
|
||||
NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
|
||||
@@ -571,9 +582,9 @@ void InitUSART3(int speed)
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10 | GPIO_Pin_11; // Tx | Rx
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_Pin = USART3_GPIO_Pin_TX | USART3_GPIO_Pin_RX; // Tx | Rx
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Fast_Speed;
|
||||
GPIO_Init(USART3_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
// Configure USART baud rate
|
||||
USART_StructInit(&USART_InitStructure);
|
||||
@@ -631,7 +642,6 @@ void WriteUSART3(const uint8_t* data, uint16_t length)
|
||||
/* ************* UART5 ***************** */
|
||||
#if !(defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
|
||||
|
||||
volatile uint32_t intcount5;
|
||||
volatile uint8_t TXSerialfifo5[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo5[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead5, TXSerialfifotail5;
|
||||
@@ -718,7 +728,6 @@ void UART5_IRQHandler()
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(UART5, USART_IT_RXNE);
|
||||
intcount5++;
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(UART5, USART_IT_TXE)) {
|
||||
@@ -766,7 +775,7 @@ void InitUART5(int speed)
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; // Tx
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Fast_Speed;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; // Rx
|
||||
@@ -830,9 +839,9 @@ void CSerialPort::beginInt(uint8_t n, int speed)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY)
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
InitUSART3(speed);
|
||||
#elif defined(STM32F4_PI)
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI)
|
||||
InitUSART1(speed);
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
InitUSART2(speed);
|
||||
@@ -854,9 +863,9 @@ int CSerialPort::availableInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY)
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
return AvailUSART3();
|
||||
#elif defined(STM32F4_PI)
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI)
|
||||
return AvailUSART1();
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
return AvailUSART2();
|
||||
@@ -876,9 +885,9 @@ int CSerialPort::availableForWriteInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY)
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
return AvailForWriteUSART3();
|
||||
#elif defined(STM32F4_PI)
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI)
|
||||
return AvailForWriteUSART1();
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
return AvailForWriteUSART2();
|
||||
@@ -898,9 +907,9 @@ uint8_t CSerialPort::readInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY)
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
return ReadUSART3();
|
||||
#elif defined(STM32F4_PI)
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI)
|
||||
return ReadUSART1();
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
return ReadUSART2();
|
||||
@@ -920,11 +929,11 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY)
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
WriteUSART3(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush3();
|
||||
#elif defined(STM32F4_PI)
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI)
|
||||
WriteUSART1(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush1();
|
||||
|
||||
+30
-29
@@ -26,10 +26,11 @@
|
||||
Pin definitions (configuration in IOSTM_CMSIS.c):
|
||||
|
||||
- Host communication:
|
||||
USART2 - TXD PA2 - RXD PA3
|
||||
USART1 - TXD PA9 - RXD PA10
|
||||
|
||||
*/
|
||||
|
||||
|
||||
#if defined(STM32F1)
|
||||
|
||||
// BaudRate calculator macro
|
||||
@@ -42,22 +43,22 @@ USART2 - TXD PA2 - RXD PA3
|
||||
#define USART_BUFFER_SIZE 256U
|
||||
DECLARE_RINGBUFFER_TYPE(USARTBuffer, USART_BUFFER_SIZE);
|
||||
|
||||
/* ************* USART2 ***************** */
|
||||
static volatile USARTBuffer_t txBuffer2={.size=USART_BUFFER_SIZE};
|
||||
static volatile USARTBuffer_t rxBuffer2={.size=USART_BUFFER_SIZE};
|
||||
/* ************* USART1 ***************** */
|
||||
static volatile USARTBuffer_t txBuffer1={.size=USART_BUFFER_SIZE};
|
||||
static volatile USARTBuffer_t rxBuffer1={.size=USART_BUFFER_SIZE};
|
||||
|
||||
|
||||
extern "C" {
|
||||
bitband_t txe = (bitband_t)BITBAND_PERIPH(&USART2->SR, USART_SR_TXE_Pos);
|
||||
bitband_t rxne = (bitband_t)BITBAND_PERIPH(&USART2->SR, USART_SR_RXNE_Pos);
|
||||
bitband_t txeie = (bitband_t)BITBAND_PERIPH(&USART2->CR1, USART_CR1_TXEIE_Pos);
|
||||
bitband_t txe = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_TXE_Pos);
|
||||
bitband_t rxne = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_RXNE_Pos);
|
||||
bitband_t txeie = (bitband_t)BITBAND_PERIPH(&USART1->CR1, USART_CR1_TXEIE_Pos);
|
||||
|
||||
RAMFUNC void USART2_IRQHandler()
|
||||
RAMFUNC void USART1_IRQHandler()
|
||||
{
|
||||
/* Transmitting data */
|
||||
if(*txe){
|
||||
if(!(RINGBUFF_EMPTY(txBuffer2))){
|
||||
USART2->DR = RINGBUFF_READ(txBuffer2);
|
||||
if(!(RINGBUFF_EMPTY(txBuffer1))){
|
||||
USART1->DR = RINGBUFF_READ(txBuffer1);
|
||||
}else{ /* Buffer empty */
|
||||
*txeie = 0; /* Don't send further data */
|
||||
}
|
||||
@@ -65,42 +66,42 @@ extern "C" {
|
||||
|
||||
/* Receiving data */
|
||||
if(*rxne){
|
||||
RINGBUFF_WRITE(rxBuffer2, USART2->DR);
|
||||
RINGBUFF_WRITE(rxBuffer1, USART1->DR);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void USART2Init(int speed)
|
||||
void USART1Init(int speed)
|
||||
{
|
||||
RCC->APB1ENR |= RCC_APB1ENR_USART2EN;
|
||||
RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
|
||||
|
||||
USART2->BRR = USART_BRR(36000000UL, speed);
|
||||
USART1->BRR = USART_BRR(72000000UL, speed);
|
||||
|
||||
USART2->CR1 = USART_CR1_UE | USART_CR1_TE |
|
||||
USART1->CR1 = USART_CR1_UE | USART_CR1_TE |
|
||||
USART_CR1_RE | USART_CR1_RXNEIE; // Enable USART and RX interrupt
|
||||
NVIC_EnableIRQ(USART2_IRQn);
|
||||
NVIC_EnableIRQ(USART1_IRQn);
|
||||
}
|
||||
|
||||
RAMFUNC void USART2TxData(const uint8_t* data, uint16_t length)
|
||||
RAMFUNC void USART1TxData(const uint8_t* data, uint16_t length)
|
||||
{
|
||||
NVIC_DisableIRQ(USART2_IRQn);
|
||||
NVIC_DisableIRQ(USART1_IRQn);
|
||||
|
||||
/* Check remaining space in buffer */
|
||||
if(RINGBUFF_COUNT(txBuffer2) + length > RINGBUFF_SIZE(txBuffer2)){
|
||||
NVIC_EnableIRQ(USART2_IRQn);
|
||||
if(RINGBUFF_COUNT(txBuffer1) + length > RINGBUFF_SIZE(txBuffer1)){
|
||||
NVIC_EnableIRQ(USART1_IRQn);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Append data to buffer */
|
||||
while(length--){
|
||||
RINGBUFF_WRITE(txBuffer2, *(data++));
|
||||
RINGBUFF_WRITE(txBuffer1, *(data++));
|
||||
}
|
||||
|
||||
/* Start sending data */
|
||||
USART2->CR1 |= USART_CR1_TXEIE;
|
||||
USART1->CR1 |= USART_CR1_TXEIE;
|
||||
|
||||
NVIC_EnableIRQ(USART2_IRQn);
|
||||
NVIC_EnableIRQ(USART1_IRQn);
|
||||
}
|
||||
|
||||
|
||||
@@ -110,7 +111,7 @@ void CSerialPort::beginInt(uint8_t n, int speed)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
USART2Init(speed);
|
||||
USART1Init(speed);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
@@ -121,7 +122,7 @@ int CSerialPort::availableInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return !RINGBUFF_EMPTY(rxBuffer2);
|
||||
return !RINGBUFF_EMPTY(rxBuffer1);
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
@@ -131,7 +132,7 @@ uint8_t CSerialPort::readInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return RINGBUFF_READ(rxBuffer2);
|
||||
return RINGBUFF_READ(rxBuffer1);
|
||||
default:
|
||||
return 0U;
|
||||
}
|
||||
@@ -139,15 +140,15 @@ uint8_t CSerialPort::readInt(uint8_t n)
|
||||
|
||||
void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
|
||||
{
|
||||
bitband_t tc = (bitband_t)BITBAND_PERIPH(&USART2->SR, USART_SR_TC_Pos);
|
||||
bitband_t tc = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_TC_Pos);
|
||||
|
||||
switch (n) {
|
||||
case 1U:
|
||||
USART2TxData(data, length);
|
||||
USART1TxData(data, length);
|
||||
*tc = 0;
|
||||
|
||||
if (flush) {
|
||||
while (!RINGBUFF_EMPTY(txBuffer2) || !tc)
|
||||
while (!RINGBUFF_EMPTY(txBuffer1) || !tc)
|
||||
;
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -0,0 +1,41 @@
|
||||
Jobs To Do
|
||||
----------
|
||||
|
||||
Jobs Done
|
||||
---------
|
||||
|
||||
1. Boxcar coefficients
|
||||
2. Symbols lengths for:
|
||||
D-Star
|
||||
DMR
|
||||
YSF
|
||||
P25
|
||||
3. Sample ring buffer sizing
|
||||
RX
|
||||
TX
|
||||
4. Hardware sample rates:
|
||||
Due
|
||||
STM32
|
||||
Teensy
|
||||
5. DC Offset coefficients
|
||||
6. TX Filters:
|
||||
D-Star
|
||||
DMR
|
||||
YSF
|
||||
P25
|
||||
7. TX Filter workspaces and clearing:
|
||||
D-Star
|
||||
DMR
|
||||
YSF
|
||||
P25
|
||||
8. CW Id sine wave, silence and construction
|
||||
9. RX Filters
|
||||
10. RX Filter workspaces and clearing:
|
||||
D-Star
|
||||
DMR
|
||||
YSF
|
||||
P25
|
||||
11. TX symbols.
|
||||
12. DC Offset workspace and clearing.
|
||||
13. DMR magic numbers.
|
||||
14. Watchdog values.
|
||||
@@ -19,9 +19,10 @@
|
||||
#if !defined(UTILS_H)
|
||||
#define UTILS_H
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F4)
|
||||
#if defined(STM32F4XX)
|
||||
#include "stm32f4xx.h"
|
||||
#include <cstddef>
|
||||
#elif defined(STM32F7XX)
|
||||
#include "stm32f7xx.h"
|
||||
#elif defined(STM32F105xC)
|
||||
#include "stm32f1xx.h"
|
||||
#include <cstddef>
|
||||
|
||||
+1
-1
@@ -19,7 +19,7 @@
|
||||
#if !defined(YSFDEFINES_H)
|
||||
#define YSFDEFINES_H
|
||||
|
||||
const unsigned int YSF_RADIO_SYMBOL_LENGTH = 5U; // At 24 kHz sample rate
|
||||
const unsigned int YSF_RADIO_SYMBOL_LENGTH = 10U; // At 48 kHz sample rate
|
||||
|
||||
const unsigned int YSF_FRAME_LENGTH_BYTES = 120U;
|
||||
const unsigned int YSF_FRAME_LENGTH_BITS = YSF_FRAME_LENGTH_BYTES * 8U;
|
||||
|
||||
@@ -43,9 +43,9 @@ private:
|
||||
uint16_t m_dataPtr;
|
||||
uint16_t m_startPtr;
|
||||
uint16_t m_endPtr;
|
||||
uint16_t m_syncPtr;
|
||||
uint16_t m_minSyncPtr;
|
||||
uint16_t m_maxSyncPtr;
|
||||
uint16_t m_syncPtr;
|
||||
q31_t m_maxCorr;
|
||||
uint16_t m_lostCount;
|
||||
uint8_t m_countdown;
|
||||
|
||||
@@ -23,10 +23,16 @@
|
||||
|
||||
#include "YSFDefines.h"
|
||||
|
||||
// Generated using rcosdesign(0.2, 8, 5, 'sqrt') in MATLAB
|
||||
static q15_t RRC_0_2_FILTER[] = {0, 0, 0, 0, 850, 219, -720, -1548, -1795, -1172, 237, 1927, 3120, 3073, 1447, -1431, -4544, -6442,
|
||||
-5735, -1633, 5651, 14822, 23810, 30367, 32767, 30367, 23810, 14822, 5651, -1633, -5735, -6442,
|
||||
-4544, -1431, 1447, 3073, 3120, 1927, 237, -1172, -1795, -1548, -720, 219, 850}; // numTaps = 45, L = 5
|
||||
// Generated using rcosdesign(0.2, 8, 10, 'sqrt') in MATLAB
|
||||
static q15_t RRC_0_2_FILTER[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 850, 592, 219, -234, -720, -1179,
|
||||
-1548, -1769, -1795, -1597, -1172, -544, 237, 1092, 1927, 2637,
|
||||
3120, 3286, 3073, 2454, 1447, 116, -1431, -3043, -4544, -5739,
|
||||
-6442, -6483, -5735, -4121, -1633, 1669, 5651, 10118, 14822,
|
||||
19484, 23810, 27520, 30367, 32156, 32767, 32156, 30367, 27520,
|
||||
23810, 19484, 14822, 10118, 5651, 1669, -1633, -4121, -5735,
|
||||
-6483, -6442, -5739, -4544, -3043, -1431, 116, 1447, 2454,
|
||||
3073, 3286, 3120, 2637, 1927, 1092, 237, -544, -1172, -1597,
|
||||
-1795, -1769, -1548, -1179, -720, -234, 219, 592, 850}; // numTaps = 90, L = 10
|
||||
const uint16_t RRC_0_2_FILTER_PHASE_LEN = 9U; // phaseLength = numTaps/L
|
||||
|
||||
const q15_t YSF_LEVELA_HI = 1893;
|
||||
|
||||
@@ -0,0 +1,137 @@
|
||||
/*
|
||||
* Copyright (C) 2017 by Andy Uribe CA6JAU
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
/* Required amount of heap and stack */
|
||||
_min_heap_size = 0x1000;
|
||||
_min_stack_size = 0x0800;
|
||||
|
||||
/* The entry point in the interrupt vector table */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Memory areas */
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* FLASH */
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K /* Main RAM */
|
||||
}
|
||||
|
||||
/* Stack start address (end of 256K RAM) */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
/* The interrupt vector table */
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector .isr_vector.*))
|
||||
|
||||
/* The program code */
|
||||
. = ALIGN(4);
|
||||
*(.text .text*)
|
||||
*(.rodata .rodata*)
|
||||
|
||||
/* ARM-Thumb code */
|
||||
*(.glue_7) *(.glue_7t)
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
/* EABI C++ global constructors support */
|
||||
. = ALIGN(4);
|
||||
__preinit_array_start = .;
|
||||
KEEP (*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
|
||||
/* EABI C++ global constructors support */
|
||||
. = ALIGN(4);
|
||||
__init_array_start = .;
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
__init_array_end = .;
|
||||
|
||||
/* EABI C++ global constructors support */
|
||||
. = ALIGN(4);
|
||||
__fini_array_start = .;
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
|
||||
} > ROM
|
||||
|
||||
/* ARM sections containing exception unwinding information */
|
||||
.ARM.extab : {
|
||||
__extab_start = .;
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
__extab_end = .;
|
||||
} > ROM
|
||||
|
||||
/* ARM index entries for section unwinding */
|
||||
.ARM.exidx : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} > ROM
|
||||
|
||||
/* Start address for the initialization values of the .data section */
|
||||
_sidata = .;
|
||||
|
||||
/* The .data section (initialized data) */
|
||||
.data : AT ( _sidata )
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = . ; /* Start address for the .data section */
|
||||
*(.data .data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = . ; /* End address for the .data section */
|
||||
} > RAM
|
||||
|
||||
/* The .bss section (uninitialized data) */
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sbss = .; /* Start address for the .bss section */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = . ; /* End address for the .bss section */
|
||||
__bss_end__ = _ebss;
|
||||
} > RAM
|
||||
|
||||
/* Space for heap and stack */
|
||||
.heap_stack :
|
||||
{
|
||||
end = . ; /* 'end' symbol defines heap location */
|
||||
_end = end ;
|
||||
. = . + _min_heap_size; /* Additional space for heap and stack */
|
||||
. = . + _min_stack_size;
|
||||
} > RAM
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
}
|
||||
@@ -0,0 +1,137 @@
|
||||
/*
|
||||
* Copyright (C) 2017 by Andy Uribe CA6JAU
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
/* Required amount of heap and stack */
|
||||
_min_heap_size = 0x1000;
|
||||
_min_stack_size = 0x0800;
|
||||
|
||||
/* The entry point in the interrupt vector table */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
/* Memory areas */
|
||||
MEMORY
|
||||
{
|
||||
ROM (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* FLASH */
|
||||
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 512K /* Main RAM */
|
||||
}
|
||||
|
||||
/* Stack start address (end of 512K RAM) */
|
||||
_estack = ORIGIN(RAM) + LENGTH(RAM);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.text :
|
||||
{
|
||||
/* The interrupt vector table */
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector .isr_vector.*))
|
||||
|
||||
/* The program code */
|
||||
. = ALIGN(4);
|
||||
*(.text .text*)
|
||||
*(.rodata .rodata*)
|
||||
|
||||
/* ARM-Thumb code */
|
||||
*(.glue_7) *(.glue_7t)
|
||||
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.init))
|
||||
KEEP(*(.fini))
|
||||
|
||||
/* EABI C++ global constructors support */
|
||||
. = ALIGN(4);
|
||||
__preinit_array_start = .;
|
||||
KEEP (*(.preinit_array))
|
||||
__preinit_array_end = .;
|
||||
|
||||
/* EABI C++ global constructors support */
|
||||
. = ALIGN(4);
|
||||
__init_array_start = .;
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array))
|
||||
__init_array_end = .;
|
||||
|
||||
/* EABI C++ global constructors support */
|
||||
. = ALIGN(4);
|
||||
__fini_array_start = .;
|
||||
KEEP (*(.fini_array))
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
__fini_array_end = .;
|
||||
|
||||
} > ROM
|
||||
|
||||
/* ARM sections containing exception unwinding information */
|
||||
.ARM.extab : {
|
||||
__extab_start = .;
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
__extab_end = .;
|
||||
} > ROM
|
||||
|
||||
/* ARM index entries for section unwinding */
|
||||
.ARM.exidx : {
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} > ROM
|
||||
|
||||
/* Start address for the initialization values of the .data section */
|
||||
_sidata = .;
|
||||
|
||||
/* The .data section (initialized data) */
|
||||
.data : AT ( _sidata )
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sdata = . ; /* Start address for the .data section */
|
||||
*(.data .data*)
|
||||
|
||||
. = ALIGN(4);
|
||||
_edata = . ; /* End address for the .data section */
|
||||
} > RAM
|
||||
|
||||
/* The .bss section (uninitialized data) */
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
_sbss = .; /* Start address for the .bss section */
|
||||
__bss_start__ = _sbss;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
*(COMMON)
|
||||
|
||||
. = ALIGN(4);
|
||||
_ebss = . ; /* End address for the .bss section */
|
||||
__bss_end__ = _ebss;
|
||||
} > RAM
|
||||
|
||||
/* Space for heap and stack */
|
||||
.heap_stack :
|
||||
{
|
||||
end = . ; /* 'end' symbol defines heap location */
|
||||
_end = end ;
|
||||
. = . + _min_heap_size; /* Additional space for heap and stack */
|
||||
. = . + _min_stack_size;
|
||||
} > RAM
|
||||
|
||||
/* Remove information from the standard libraries */
|
||||
/DISCARD/ :
|
||||
{
|
||||
libc.a ( * )
|
||||
libm.a ( * )
|
||||
libgcc.a ( * )
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user