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Add support for external mode pins on F0DEI board

This commit is contained in:
phl0 2017-01-20 17:34:32 +01:00
parent 850978a954
commit 79b0b141a2
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GPG Key ID: 48EA1E640798CA9A
2 changed files with 64 additions and 0 deletions
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3
Config.h
View File

@ -54,6 +54,9 @@
// #define STM32F4_NUCLEO_MORPHO_HEADER
// #define STM32F4_NUCLEO_ARDUINO_HEADER
// Use separate mode pins to switch external filters/bandwidth for example
// #define STM32F4_NUCLEO_MODE_PINS
// To use wider C4FSK filters for DMR, System Fusion and P25 on transmit
// #define WIDE_C4FSK_FILTERS_TX
// To use wider C4FSK filters for DMR, System Fusion and P25 on receive

61
IOSTM.cpp
View File

@ -180,6 +180,11 @@ DMR PB4 output
YSF PB5 output
P25 PB3 output
MDSTAR PC14 output
MDMR PC15 outout
MYSF PC2 output
MP25 PC3 output
RX PA0 analog input
RSSI PA1 analog input
TX PA4 analog output
@ -219,6 +224,24 @@ EXT_CLK PA15 input
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#if defined(STM32F4_NUCLEO_MODE_PINS)
#define PIN_MP25 GPIO_Pin_3
#define PORT_MP25 GPIOC
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
#define PIN_MDSTAR GPIO_Pin_14
#define PORT_MDSTAR GPIOC
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
#define PIN_MDMR GPIO_Pin_15
#define PORT_MDMR GPIOC
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
#define PIN_MYSF GPIO_Pin_2
#define PORT_MYSF GPIOC
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
@ -385,6 +408,32 @@ void CIO::initInt()
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_Init(PORT_P25, &GPIO_InitStruct);
#endif
#if defined(STM32F4_NUCLEO_MODE_PINS)
// DSTAR mode pin
RCC_AHB1PeriphClockCmd(RCC_Per_MDSTAR, ENABLE);
GPIO_InitStruct.GPIO_Pin = PIN_MDSTAR;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_Init(PORT_MDSTAR, &GPIO_InitStruct);
// DMR mode pin
RCC_AHB1PeriphClockCmd(RCC_Per_MDMR, ENABLE);
GPIO_InitStruct.GPIO_Pin = PIN_MDMR;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_Init(PORT_MDMR, &GPIO_InitStruct);
// YSF mode pin
RCC_AHB1PeriphClockCmd(RCC_Per_MYSF, ENABLE);
GPIO_InitStruct.GPIO_Pin = PIN_MYSF;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_Init(PORT_MYSF, &GPIO_InitStruct);
// P25 mode pin
RCC_AHB1PeriphClockCmd(RCC_Per_MP25, ENABLE);
GPIO_InitStruct.GPIO_Pin = PIN_MP25;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_Init(PORT_MP25, &GPIO_InitStruct);
#endif
}
void CIO::startInt()
@ -593,21 +642,33 @@ void CIO::setCOSInt(bool on)
void CIO::setDStarInt(bool on)
{
GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
#if defined(STM32F4_NUCLEO_MODE_PINS)
GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
#endif
}
void CIO::setDMRInt(bool on)
{
GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
#if defined(STM32F4_NUCLEO_MODE_PINS)
GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET);
#endif
}
void CIO::setYSFInt(bool on)
{
GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
#if defined(STM32F4_NUCLEO_MODE_PINS)
GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
#endif
}
void CIO::setP25Int(bool on)
{
GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
#if defined(STM32F4_NUCLEO_MODE_PINS)
GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
#endif
}
#endif