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323 Commits
Author SHA1 Message Date
Jonathan Naylor 02000c8049 Merge branch 'master' into AX25_FM 2020-09-01 13:27:57 +01:00
Jonathan Naylor 2509ab5ba1 Fix the self-test LEDs. 2020-09-01 13:27:29 +01:00
Jonathan Naylor 2de9e4d533 Merge branch 'master' into AX25_FM 2020-09-01 09:59:31 +01:00
Jonathan Naylor fda1e3dcf4 More LED fixes. 2020-09-01 09:57:49 +01:00
Jonathan Naylor cb3ed795d0 Merge branch 'master' into AX25_FM 2020-08-31 16:09:44 +01:00
Jonathan Naylor 632ddda68b Change the handling of the mode LEDs. 2020-08-31 16:06:59 +01:00
Jonathan Naylor b6093406ad Fix missing AX25 class definition. 2020-08-11 16:39:19 +01:00
Jonathan Naylor 8d9b49bdb0 Merge pull request #297 from F4FXL/AX25_FM
Add some delay to squelch
2020-08-05 22:16:37 +01:00
Geoffrey Merck 625ec93af8 Remove unused variable 2020-08-05 21:17:05 +02:00
Geoffrey Merck b2111553c6 Correct comment 2020-08-05 21:15:03 +02:00
Geoffrey Merck 252d54a484 Add some delay to squelch 2020-08-05 21:11:32 +02:00
Jonathan Naylor 1ad9799123 Merge branch 'AX25' into AX25_FM 2020-08-03 13:09:15 +01:00
Jonathan Naylor 6d67b9f104 Merge branch 'master' into AX25 2020-08-03 13:08:48 +01:00
Jonathan Naylor fb85505433 Merge pull request #296 from msraya/patch-1
YSF pictures can go through modem
2020-08-03 08:43:11 +01:00
Manuel Sánchez Raya 823b91c97d Update YSFRX.cpp
Lower MAX_SYNC_FRAMES to 2, so decoder can recover and Yaesu pictures can pass through the modem without problem.
2020-08-03 09:17:07 +02:00
Jonathan Naylor 2a001f491d Simplify the CTCSS and Noise Squelch decoders and logic. 2020-07-31 09:20:55 +01:00
Jonathan Naylor b5ba384495 Fix a couple of minor bugs. 2020-07-28 14:24:51 +01:00
Jonathan Naylor d8f138066e Add an experimental noise squelch. 2020-07-28 13:55:50 +01:00
Jonathan Naylor 6964251122 Merge branch 'AX25' into AX25_FM 2020-07-28 12:40:42 +01:00
Jonathan Naylor 0fca178bd7 Merge branch 'master' into AX25 2020-07-28 12:37:07 +01:00
Jonathan Naylor a60ecb3e57 Merge pull request #295 from n0mjs710/master
Added pin definition for FM mode LED (WA0EDA Boards)
2020-07-21 16:21:08 +01:00
Cort Buffington a2978d9e91 Removed a local change to not contaminate the repo 2020-07-21 08:27:02 -05:00
Cort Buffington e304f5cce2 Added pin assignment for FM mode LED (WA0EDA) 2020-07-21 08:19:18 -05:00
Jonathan Naylor 99a7df7c13 Merge pull request #294 from n0mjs710/master
Add support for WA0EDA MTR2000 & MASTR III boards
2020-07-21 06:08:08 +01:00
Cort Buffington 6dfe1a9271 Add support for WA0EDA MTR2000 & MASTR3 boards 2020-07-20 17:11:29 -05:00
Jonathan Naylor 9ff59570c7 Merge branch 'AX25' into AX25_FM 2020-07-15 10:42:43 +01:00
Jonathan Naylor d5e9b5a315 Merge branch 'master' into AX25 2020-07-15 08:49:40 +01:00
Jonathan Naylor 1ac0628c1c Improve the code efficiency slightly. 2020-07-14 14:54:47 +01:00
Jonathan Naylor dc41fd83d2 Test the use of a reverse burst at the end of a transmission. 2020-07-14 12:20:42 +01:00
Jonathan Naylor 20013e3adc Make Use COS As Lockout a run-time parameter and allow for different access modes. 2020-07-13 17:13:01 +01:00
Jonathan Naylor 5960fb97f3 Merge branch 'AX25' into AX25_FM 2020-07-12 15:28:00 +01:00
Jonathan Naylor 8f8dc92a14 Merge branch 'master' into AX25 2020-07-12 15:24:50 +01:00
Jonathan Naylor ccdbe126e0 Fix the timeout tones. 2020-07-12 15:22:35 +01:00
Jonathan Naylor d29a0bc3a6 Merge branch 'AX25' into AX25_FM 2020-07-12 10:48:43 +01:00
Jonathan Naylor 4ff057069b Merge branch 'master' into AX25 2020-07-12 10:48:20 +01:00
Jonathan Naylor f8d8f85841 Small simplification of the timeout tones. 2020-07-12 10:47:43 +01:00
Jonathan Naylor ad77fd60fd Remove KerchunkTX. 2020-07-07 17:57:31 +01:00
Jonathan Naylor aab8f5469f Add timeouts to the FM simplex state machine. 2020-07-06 10:56:35 +01:00
Jonathan Naylor f1d6a8b36e Add DCD LED control. 2020-07-06 10:03:48 +01:00
Jonathan Naylor 843997ccad Merge pull request #293 from F4FXL/AX25_FM
Fix wrong frame type
2020-07-06 06:52:50 +01:00
Geoffrey Merck d5f2d1c382 Fix wrong frame type 2020-07-04 12:15:33 +02:00
Jonathan Naylor c99f50575d Add a simpe simplex FM controller state machine. 2020-07-01 13:02:14 +01:00
Jonathan Naylor 29c8cf9414 Add AX.25 Slot Time and P-Persist processing for simplex work. 2020-07-01 12:33:08 +01:00
Jonathan Naylor 2c6e2c2a11 Remove unneeded zeroes from the band pass FIR filter. 2020-06-30 17:09:09 +01:00
Jonathan Naylor 8d10555dc9 Reduce the low pass filter a little. 2020-06-30 15:35:58 +01:00
Jonathan Naylor 14d5098018 Rename FMDownsampler to FMDownSampler. 2020-06-30 12:44:02 +01:00
Jonathan Naylor 52a351d0f1 Slight tweak to the mark and space. 2020-06-29 16:11:56 +01:00
Jonathan Naylor 43f84ae968 Simplify the pre-emphasis code for AX.25. 2020-06-29 15:59:46 +01:00
Jonathan Naylor a73376671c Fix preamble and NRZI. 2020-06-28 15:27:58 +01:00
Jonathan Naylor 759efd1da4 Merge pull request #292 from F4FXL/AX25_FM
correct preamble and NRZI
2020-06-28 15:25:45 +01:00
Geoffrey Merck ea0c1953cc correct preamble and NRZI 2020-06-28 11:22:10 +02:00
Jonathan Naylor a29cb23a75 Remove TX Twist. 2020-06-27 22:55:16 +01:00
Jonathan Naylor bb66c72ef3 Merge branch 'FM_Ext' into AX25_FM 2020-06-25 10:41:48 +01:00
Jonathan Naylor 2da28ede64 Increase the maximum AX25 frame size. 2020-06-24 13:14:10 +01:00
Jonathan Naylor a7ac55795d Fix obvious AX25 TX data bug. 2020-06-24 12:46:27 +01:00
Jonathan Naylor 835ef46aef Bump the version date. 2020-06-24 11:16:02 +01:00
Jonathan Naylor 3de10fe98b First version of the AX25 TX functionality. 2020-06-24 11:14:02 +01:00
Jonathan Naylor 7ad70d04a4 Add a dummy AX25 transmit function and make AX25 RX changes. 2020-06-23 10:34:19 +01:00
Jonathan Naylor e210062365 Add the twist processing to the AX25 RX. 2020-06-21 21:40:40 +01:00
Jonathan Naylor f9fcdc5292 Begin adding AX25 TX. 2020-06-21 19:16:02 +01:00
Jonathan Naylor 0ea732780d Implement Kerchunk TX option. 2020-06-20 21:03:11 +01:00
Jonathan Naylor 33d922b8c2 Handle the incoming data offset correctly. 2020-06-19 13:27:45 +01:00
Jonathan Naylor 114c2bcb15 Handle extended packet lengths. 2020-06-19 13:16:47 +01:00
Jonathan Naylor 6dbda2795a Miscalculated the address length. 2020-06-17 22:40:09 +01:00
Jonathan Naylor 6a80d0ec09 Fix minimum packet size. 2020-06-17 22:33:13 +01:00
Jonathan Naylor 0e8f20e1cc Bump the version date. 2020-06-17 16:02:15 +01:00
Jonathan Naylor af11be16dc First woring AX.25 decoder (in simulation). 2020-06-17 15:28:41 +01:00
Jonathan Naylor e332dbba8e Add the correct CCITT checksum table. 2020-06-11 12:59:30 +01:00
Jonathan Naylor 746d915bf9 Rescale one of the filters for the MMDVM sample rate. 2020-06-11 12:14:36 +01:00
Jonathan Naylor c896cf823e Add mobilinkd copyright. 2020-06-11 10:04:09 +01:00
Jonathan Naylor c2959466fd Code complete, but untested. 2020-06-11 10:02:11 +01:00
Jonathan Naylor 121c76f3d8 More filtering added. 2020-06-10 16:38:10 +01:00
Jonathan Naylor 22cb16f831 Add more frame processing. 2020-06-10 16:09:45 +01:00
Jonathan Naylor 57e18e337f Add the seperate AX25Frame class. 2020-06-10 13:53:18 +01:00
Jonathan Naylor e1d1ac4a4d More work on adding AX.25 decoding. 2020-06-10 12:07:04 +01:00
Jonathan Naylor 64fe59382f Start on the actual AX.25 demodulator. 2020-06-09 14:57:06 +01:00
Jonathan Naylor a2e2853241 Begin AX.25 development. 2020-06-08 15:02:12 +01:00
Jonathan Naylor 598d32287d Add alternate FM LEDs for the POG board. 2020-06-01 16:55:13 +01:00
Jonathan Naylor 53d8cfa360 Revert IOSTM_CMSIS.cpp to 5c9abf2 2020-06-01 16:51:59 +01:00
Jonathan Naylor 1309ad9326 Merge pull request #286 from F4FXL/FM_Ext
Add forgotten file for large frame handling
2020-06-01 09:55:25 +01:00
Geoffrey Merck 411d439d78 Add forgotten file for large frame handling 2020-06-01 10:29:05 +02:00
Jonathan Naylor ec9428d63e Merge pull request #285 from F4FXL/FM_Ext
Habdle full frame length
2020-05-31 21:14:35 +01:00
Geoffrey Merck 2a4b28c35e return space as number of bytes 2020-05-31 22:11:28 +02:00
Geoffrey Merck 4f060c0047 Esnure frame size is 84 samples, correctly report space as number of frames 2020-05-31 21:50:06 +02:00
Jonathan Naylor 1ed3a4c9d5 Merge pull request #284 from F4FXL/FM_Ext
Avoid Buffer underruns
2020-05-31 11:26:27 +01:00
Geoffrey Merck f414288c9b Update speed comments 2020-05-31 11:45:17 +02:00
Geoffrey Merck 72cd2ce03e Ensure we have at least 75ms of audio before transmitting 2020-05-30 20:05:34 +02:00
Jonathan Naylor 9137af8e3f Merge pull request #281 from F4FXL/FM_Ext
Speed improvements and fixes for FM Ext
2020-05-24 07:56:45 +01:00
Geoffrey Merck cdfe3d0ec9 Clean up includes 2020-05-24 08:20:03 +02:00
Geoffrey Merck 4dfab06a50 Revert to GPIO_Fast_Speed 2020-05-24 08:11:32 +02:00
Geoffrey Merck 47649171fc Fix sample unpacking 2020-05-24 08:01:59 +02:00
Geoffrey Merck 0bd79fa440 Fix sample packing 2020-05-24 07:45:50 +02:00
Geoffrey Merck 26d055a67b Update filter generation script 2020-05-24 07:44:38 +02:00
Geoffrey Merck 5db1adb5ea #defines for serial speeds 2020-05-23 21:01:21 +02:00
Geoffrey Merck f86b5435bb Remove unneeded include 2020-05-23 15:30:00 +02:00
Geoffrey Merck 31f0e24588 Make serial speed a compile option 2020-05-23 08:57:30 +02:00
Geoffrey Merck 04d0b15545 Remove UART habndling Copy/Paste code 2020-05-23 08:28:23 +02:00
Geoffrey Merck f14222e77d Make sure buffer is continuously filled 2020-05-23 08:25:51 +02:00
Jonathan Naylor 7fabddd7f1 Update the README file. 2020-05-21 11:11:19 +01:00
Jonathan Naylor 5039dfbe68 Merge pull request #280 from F4FXL/FM_Ext
Fix Callsign at end and simplify Samples
2020-05-20 22:19:36 +01:00
Jonathan Naylor f9f81b9b8e Try and make the closing callsign appear.
(cherry picked from commit 063b21f999)
2020-05-20 23:11:22 +02:00
Geoffrey Merck 3cc5d67696 check acks 2020-05-20 22:51:22 +02:00
Geoffrey Merck 3f960f9fc5 Fix Callsignatend and simplify Samples 2020-05-20 22:30:55 +02:00
Jonathan Naylor 489853f200 Fix the TX Hang. 2020-05-20 15:27:16 +01:00
Jonathan Naylor 2cf2ce4dfa Fix the TX Hang handling. 2020-05-20 15:16:12 +01:00
Jonathan Naylor 96e1a765f9 Merge pull request #279 from F4FXL/FM_Ext
Remove SerialUSB for Arduino and remove uneeded class
2020-05-20 10:17:33 +01:00
Geoffrey Merck 04982c25c0 Remove SerialUSB for Arduino 2020-05-20 11:06:02 +02:00
Geoffrey Merck a3ffa9ed36 Remove no longer needed SerialRB class 2020-05-20 08:08:22 +02:00
Jonathan Naylor e7a22482db Set the COS LED on incoming RF transmissions. 2020-05-19 13:45:17 +01:00
Jonathan Naylor 5f29808b80 Set the COS LED correctly. 2020-05-19 12:09:44 +01:00
Jonathan Naylor 063b21f999 Try and make the closing callsign appear. 2020-05-18 11:09:56 +01:00
Jonathan Naylor 89b8641955 Merge pull request #278 from shawnchain/drcc_serial_bugfix
Drcc serial bugfix
2020-05-18 06:34:09 +01:00
Shawn Chain 6397c720e8 Generate bin map file for analysis 2020-05-18 12:19:22 +08:00
Shawn Chain 50c1e5aa3f update pin defs for drcc/nqf board 2020-05-18 12:18:44 +08:00
Shawn Chain 970d02773f Fix serial no write bug on DRCC board 2020-05-18 12:18:17 +08:00
Jonathan Naylor 625749a546 Fixed up the use of the writeFMEOT method. 2020-05-16 13:15:21 +01:00
Jonathan Naylor d75042dc4c Merge pull request #276 from F4FXL/FM_Ext
Add FM EOT
2020-05-16 12:57:33 +01:00
Geoffrey Merck 296ac88842 Correct length 2020-05-16 12:08:26 +02:00
Geoffrey Merck 48e863d1d0 Sent EOT on rf timeout 2020-05-15 21:19:26 +02:00
Geoffrey Merck 7b915f9cac Only send EOT when EXT is enabled 2020-05-15 21:06:16 +02:00
Geoffrey Merck e330c9f52a Fix typo 2020-05-15 21:05:57 +02:00
Geoffrey Merck 9470b1d6d3 Merge remote-tracking branch 'upstream/FM_Ext' into FM_Ext 2020-05-15 20:21:12 +02:00
Geoffrey Merck 388620b182 Add FM EOT 2020-05-15 18:53:34 +02:00
Jonathan Naylor 72e45177f3 Merge pull request #275 from F4FXL/FM_Ext
Minor fix, reduce memory usage
2020-05-14 22:19:27 +01:00
Geoffrey Merck 90b82621f2 Merge remote-tracking branch 'upstream/FM_Ext' into FM_Ext 2020-05-14 22:02:47 +02:00
Jonathan Naylor ff375abb0e Hold off the mode change until the ack and callsign have been
transmitted.
2020-05-14 12:10:37 +01:00
Geoffrey Merck cfcb7ed852 Really fix TX Buffer ovrflows,, reduce delay buffer memory footprint 2020-05-14 09:10:11 +02:00
Geoffrey Merck b245be464f Fix txbuffer overflows and bring back elegant while loop 2020-05-13 22:57:42 +02:00
Jonathan Naylor 139003d4c7 Merge pull request #274 from F4FXL/FM_Ext
Add define to use native USB port on Arduino
2020-05-13 20:19:41 +01:00
Geoffrey Merck c47eacd010 Add define to use native port on Arduino 2020-05-13 21:02:19 +02:00
Jonathan Naylor 6b01f12602 Merge branch 'FM' into FM_Ext 2020-05-13 12:03:12 +01:00
Jonathan Naylor 7169836621 Merge branch 'master' into FM 2020-05-13 12:01:19 +01:00
Jonathan Naylor c84d227242 Merge branch 'master' into TXHang 2020-05-13 12:00:23 +01:00
Jonathan Naylor 4f93c6022c Merge pull request #273 from F4FXL/FM_Ext
Send unsigned data and simplify downdampling code
2020-05-13 11:44:37 +01:00
Geoffrey Merck 81f6b6be53 Send usigned data and simplify downdamplign code 2020-05-13 12:42:14 +02:00
Jonathan Naylor fa9f89700f Merge pull request #272 from F4FXL/FM_Ext
Fix compiler warnings
2020-05-13 11:10:04 +01:00
Geoffrey Merck 9023b6ae13 Correct indentation 2020-05-13 12:03:52 +02:00
Geoffrey Merck df23e15c91 Fix compilation warnings 2020-05-13 11:52:59 +02:00
Jonathan Naylor 51e5e7b851 Merge branch 'FM' into FM_Ext 2020-05-13 10:31:17 +01:00
Jonathan Naylor 8e52bdcc5c Merge branch 'master' into FM 2020-05-13 10:30:46 +01:00
Jonathan Naylor 1332c6544b Merge pull request #271 from shawnchain/fix_led_alternate_macro_names
Fix led alternate macro names
2020-05-13 09:36:05 +01:00
Shawn Chain 703ed2628d Init FM led/mode GPIO pin 2020-05-13 16:28:05 +08:00
Shawn Chain f3943a7888 fix wrong macro name for LED/MODE pin 2020-05-13 16:27:12 +08:00
Jonathan Naylor 737454281a Merge pull request #270 from shawnchain/add_nqf_board_pin_defs_header
pin header file for nqf board
2020-05-13 08:43:19 +01:00
Shawn Chain 1aef42bb21 add missing header files for nqf board 2020-05-13 15:28:08 +08:00
Jonathan Naylor 9550299e4d Merge pull request #268 from shawnchain/drcc_dvm_nqf_board_support
Supports drcc_dvm_nqf board
2020-05-13 07:46:58 +01:00
Jonathan Naylor 056dd908b3 Merge pull request #269 from F4FXL/FM_Ext
Fix crash when writing to serial, Tighten handling of incomign data
2020-05-13 07:41:39 +01:00
Geoffrey Merck 62f239ccc9 Fix modem crash while writing to serial, Split IO write and serial write to 2 separate loops. 2020-05-13 08:31:59 +02:00
Shawn Chain f8879e1f25 Supports drcc_dvm_nqf board 2020-05-13 13:51:02 +08:00
Geoffrey Merck 994226e4b1 Tighten incoming data, Add FM UpSampler 2020-05-12 22:06:26 +02:00
Jonathan Naylor 2cc6c1f68f Merge pull request #267 from F4FXL/FM_Ext
Write Audio to serial
2020-05-12 19:00:09 +01:00
Geoffrey Merck 8e8cf35b19 Merge remote-tracking branch 'upstream/FM_Ext' into FM_Ext 2020-05-12 17:55:41 +02:00
Geoffrey Merck 66de35b6d8 Move downsamplig call back to samples 2020-05-12 17:55:24 +02:00
Jonathan Naylor 43e00bbe1d Merge pull request #266 from shawnchain/io_pins_def_for_each_board_type
Extract the IO pins defs from IOSTM.cpp to separate files
2020-05-12 16:28:04 +01:00
Shawn Chain f31b682625 Extract the IO pins defs from IOSTM.cpp to separate files 2020-05-12 23:21:05 +08:00
Jonathan Naylor 7dc420c8ff Add the FM controller status to the FM Status message. 2020-05-12 15:58:54 +01:00
Jonathan Naylor df0a9ebe72 Merge branch 'FM' into FM_Ext 2020-05-12 15:51:41 +01:00
Jonathan Naylor 66feb9d50b Merge branch 'master' into FM 2020-05-12 15:48:44 +01:00
Jonathan Naylor 0b14b0b73f Merge pull request #265 from shawnchain/mode_led_fm_fix
fix compile error if no MODE_LEDS defined
2020-05-12 15:48:22 +01:00
Shawn Chain 50706c6f09 fix compile error if no MODE_LEDS defined 2020-05-12 22:44:15 +08:00
Jonathan Naylor e957f0154e Merge pull request #264 from F4FXL/FM_Ext
Fix Silence
2020-05-12 15:25:27 +01:00
Geoffrey Merck b10c72fd78 Merge branch 'FM_Ext' of https://github.com/F4FXL/MMDVM into FM_Ext 2020-05-12 16:22:54 +02:00
Geoffrey Merck 496afcb40e Fix silence 2020-05-12 16:21:24 +02:00
Geoffrey Merck 9467b10e5c Fix silence 2020-05-12 16:19:19 +02:00
Jonathan Naylor 13c5f7b0b4 Merge pull request #263 from F4FXL/FM_Ext
Fix FM not transmitting, remove silence for testing
2020-05-12 15:07:17 +01:00
Jonathan Naylor 435544f7a1 Add CTCSS hysteresis. 2020-05-12 13:55:30 +01:00
Geoffrey Merck b64712f657 Restore silence 2020-05-12 14:45:03 +02:00
Geoffrey Merck d23c0900c1 Fix compilation 2020-05-12 14:18:27 +02:00
Geoffrey Merck a0a3080da2 Make sure downsampler always buffers 22 samples at a time 2020-05-12 14:15:04 +02:00
Geoffrey Merck 0fad84b46d Remove silence 2020-05-12 09:29:01 +02:00
Geoffrey Merck 1b40044a23 Re-enable write audio to serial 2020-05-12 09:28:24 +02:00
Geoffrey Merck a671263398 Merge remote-tracking branch 'upstream/FM_Ext' into FM_Ext 2020-05-12 08:37:10 +02:00
Geoffrey Merck ca1cc7096a Fix modem not goign on transmit, still some cleansing to be done 2020-05-12 08:36:38 +02:00
Geoffrey Merck a5aabd8fac Update TX ON/OFF debug info 2020-05-12 08:35:48 +02:00
Jonathan Naylor 6d0e57ea88 Merge pull request #262 from F4FXL/FM_Ext
Still some work in progress to fix no TX
2020-05-11 23:39:05 +01:00
Geoffrey Merck 1d04c1e903 Typo 2020-05-11 22:35:46 +02:00
Geoffrey Merck 042c26b3bb Trying to fix no tx, WIP 2020-05-11 22:32:24 +02:00
Geoffrey Merck b4a125a759 Add debug info TX switching 2020-05-11 22:31:50 +02:00
Geoffrey Merck 8ecf80ff8f Merge branch 'FM_Ext' of https://github.com/F4FXL/MMDVM into FM_Ext 2020-05-11 19:02:24 +02:00
Geoffrey Merck 6786b9b6b1 Temporary revert to previous code 2020-05-11 19:02:08 +02:00
Geoffrey Merck 86ffc69b30 Add getData 2020-05-11 19:02:08 +02:00
Geoffrey Merck 5d4df6ffd9 Write larger chunks of data to IO 2020-05-11 19:02:08 +02:00
Geoffrey Merck eac2aa4ac1 Write larger chunks of FM audio to the serial port 2020-05-11 19:02:08 +02:00
Geoffrey Merck 8cbd52aa72 Update to SAM 1.6.12 2020-05-11 19:02:08 +02:00
Jonathan Naylor 99b853a976 Stop the status timer when leaving TX. 2020-05-11 15:00:53 +01:00
Jonathan Naylor 15bc1a4027 Merge branch 'FM' into FM_Ext 2020-05-11 13:42:14 +01:00
Jonathan Naylor 75e32e1b71 Merge branch 'master' into FM 2020-05-11 13:41:37 +01:00
Jonathan Naylor 7ebc4044f9 Remove Coocox file. 2020-05-11 13:41:10 +01:00
Jonathan Naylor 1836ba928e Merge branch 'FM' into FM_Ext 2020-05-11 13:36:38 +01:00
Jonathan Naylor c54c13c146 Merge branch 'master' into FM 2020-05-11 13:33:49 +01:00
phl0 17a3743cd8 Add GPIO and LEDs for FM mode 2020-05-11 14:27:23 +02:00
Jonathan Naylor 4a5a260c28 Perform FM mode changing in a more conventional manner. 2020-05-11 13:15:13 +01:00
Geoffrey Merck 4bcc1e88c4 Update to SAM 1.6.12 2020-05-11 07:53:21 +02:00
Jonathan Naylor 4cba5931f4 Loosen the conditions for returning to STATE_IDLE 2020-05-10 21:29:01 +01:00
Jonathan Naylor 89458a2c93 Release to STATE_IDLE under simpler conditions. 2020-05-10 21:25:10 +01:00
Jonathan Naylor c91a42f53d Merge pull request #260 from F4FXL/FM_Ext
Write audio to serial port, blank too ext high audio, really ignore ext audio when ext is disabled
2020-05-10 21:04:22 +01:00
Geoffrey Merck 470a070d96 Merge remote-tracking branch 'upstream/FM_Ext' into FM_Ext 2020-05-10 21:59:57 +02:00
Geoffrey Merck 36537c981c Write audio to serial port, blank to high audio, really ignore ext aduio when ext is disabled 2020-05-10 21:59:14 +02:00
Jonathan Naylor c85978a4e3 Rescale the FM calibration level. 2020-05-10 17:33:50 +01:00
Jonathan Naylor d0062a55f8 Rescale the FM calibration output. 2020-05-10 17:31:21 +01:00
Jonathan Naylor 66ea3ad0d1 Only use the CTCSS delay when not using COS. 2020-05-10 17:15:54 +01:00
Jonathan Naylor 3ad443dc2a Remove the delay when using COS. 2020-05-10 17:13:10 +01:00
Jonathan Naylor da16ee277c Merge pull request #258 from F4FXL/FM_Ext
Fix repeater stuck on transmit
2020-05-10 17:06:57 +01:00
Jonathan Naylor 85acdc7121 Merge pull request #259 from F4FXL/FM
Fix stuck on TX
2020-05-10 17:06:26 +01:00
Geoffrey Merck a2518e99f2 Fix stuck on TX 2020-05-10 17:29:17 +02:00
Geoffrey Merck 0f51ddd0bd Fix repeater stuck on transmit 2020-05-10 17:18:59 +02:00
Jonathan Naylor aaa72e769f Merge pull request #257 from F4FXL/FM_Ext
Only use one RingBuffer plus some bug fixes
2020-05-10 08:14:08 +01:00
Geoffrey Merck 0e8fdb381a Fix State machine not changing state 2020-05-10 09:07:21 +02:00
Geoffrey Merck 0b31c40c2b Made Get volatile 2020-05-10 08:01:10 +02:00
Geoffrey Merck 2b3df4e901 Merge remote-tracking branch 'upstream/FM_Ext' into FM_Ext 2020-05-10 07:01:21 +02:00
Geoffrey Merck 807f01ba72 Get rid of annoying PI warning 2020-05-10 07:00:58 +02:00
Geoffrey Merck 03f18451f7 Remove CSerialBuffer, use CRingBuffer 2020-05-10 06:50:35 +02:00
Geoffrey Merck 16c3d418eb Buffer no longer volatile, not needed 2020-05-10 00:03:32 +02:00
Geoffrey Merck 55df5fe04c Remove useless stuff 2020-05-10 00:03:05 +02:00
Geoffrey Merck b0ba3b5dd8 SerialRB now inherits from RingBuffer 2020-05-09 19:57:40 +02:00
Geoffrey Merck 05d21c0a14 TX Buffer now using Templae RB 2020-05-09 17:44:44 +02:00
Geoffrey Merck 26a703c68c IO RXbuffer now uses template RingBuffer 2020-05-09 17:35:38 +02:00
Geoffrey Merck 6c3dd265ab No more need to specify each types for ringBuffer 2020-05-09 14:14:53 +02:00
Jonathan Naylor c04e207821 Insert the missing silence. 2020-05-09 13:10:02 +01:00
Jonathan Naylor 67e0bf02e2 Merge branch 'FM' into FM_Ext 2020-05-09 13:06:32 +01:00
Jonathan Naylor 3bb7cde322 Add input audio delay to match the CTCSS decoder results. 2020-05-09 13:01:02 +01:00
Jonathan Naylor fa29a27695 Ensure all output audio is flushed before leaving FM state. 2020-05-09 12:53:50 +01:00
Geoffrey Merck 7302dc8bd7 Replace RSSI RB with template RB 2020-05-09 11:08:18 +02:00
Jonathan Naylor bb7383a301 Merge pull request #256 from F4FXL/FM_Ext
Add missing files
2020-05-09 10:03:04 +01:00
Geoffrey Merck 61a69d8536 Add missing file 2020-05-09 11:01:28 +02:00
Jonathan Naylor 5a11fcea5b Merge pull request #255 from F4FXL/FM_Ext
Add RingBuffer Template
2020-05-09 09:59:57 +01:00
Geoffrey Merck 05775f0bfa Add RingBuffer Template 2020-05-09 10:57:16 +02:00
Jonathan Naylor 973a1391d7 Merge pull request #254 from F4FXL/FM_Ext
Handle Incoming external audio
2020-05-09 07:36:32 +01:00
Geoffrey Merck 5d45649096 Simplify code 2020-05-09 08:29:31 +02:00
Geoffrey Merck e91c4417cb Handle incoming audio 2020-05-09 08:23:02 +02:00
Geoffrey Merck ff3e6feeb6 Use more explicit names 2020-05-09 08:00:24 +02:00
Geoffrey Merck 0e2a83bc7b Add incoming network data buffer 2020-05-09 07:57:45 +02:00
Jonathan Naylor c84dbd02e5 Merge pull request #253 from F4FXL/FM_Ext
FM into FM_Ext
2020-05-08 21:07:46 +01:00
Geoffrey Merck c0aad5effa Add mising initilizer 2020-05-08 21:47:03 +02:00
Geoffrey Merck e0234dfc00 Merge remote-tracking branch 'upstream/FM' into FM_Ext 2020-05-08 21:39:18 +02:00
Jonathan Naylor e30eb3adaf Reduce the output buffer loading. 2020-05-08 17:18:26 +01:00
Jonathan Naylor 7c9385beab Merge pull request #252 from F4FXL/FM_Ext
Use pointer/shift/masking for sample unpacking
2020-05-08 16:53:32 +01:00
Geoffrey Merck 4c6601d778 Merge branch 'FM_Ext' of https://github.com/F4FXL/MMDVM into FM_Ext 2020-05-08 17:43:43 +02:00
Geoffrey Merck e3a951b33b Use pointer/masking/shifting for sample unpacking 2020-05-08 17:43:05 +02:00
Geoffrey Merck 97192602d8 Use pointer/masking/shifting for sample unpacking 2020-05-08 17:41:12 +02:00
Jonathan Naylor 604957b3e2 Merge pull request #251 from F4FXL/FM_Ext
Remove Union for sample packing
2020-05-08 16:30:06 +01:00
Geoffrey Merck bb731e7890 Init pointer with null 2020-05-08 17:15:23 +02:00
Geoffrey Merck c81d13395b Use correct types 2020-05-08 17:13:29 +02:00
Jonathan Naylor 9b0fed975c Buffer output after adding some initial silence. 2020-05-08 15:48:03 +01:00
Geoffrey Merck 18bc0a75b8 Merge branch 'FM_Ext' of https://github.com/F4FXL/MMDVM into FM_Ext 2020-05-08 16:45:22 +02:00
Geoffrey Merck f1a43ee520 Remove union, use pointer tricks instead 2020-05-08 16:44:53 +02:00
Geoffrey Merck b73bca237d Remove union, use pointer tricks instead 2020-05-08 15:06:08 +02:00
Jonathan Naylor e7ff0d1898 Use const uint8_t instead of non-const. 2020-05-08 13:29:50 +01:00
Jonathan Naylor 880df2536d Add audio packing code. 2020-05-08 12:30:15 +01:00
Jonathan Naylor 09b6929100 Merge pull request #250 from F4FXL/FM_Ext
Merge FM into FM_Ext
2020-05-08 11:04:14 +01:00
Geoffrey Merck 9afcf3acc9 Merge remote-tracking branch 'upstream/FM' into FM_Ext 2020-05-08 12:00:36 +02:00
Jonathan Naylor 5ca9313db8 Merge pull request #248 from F4FXL/FM
Make the FM chain RX Level independant
2020-05-08 09:18:58 +01:00
Geoffrey Merck feff1ee2c7 remove emphasis 2020-05-08 09:04:28 +02:00
Geoffrey Merck 77e0deee76 Make whole FM chain RX level independant 2020-05-08 09:01:00 +02:00
Jonathan Naylor d7cd7096d0 Add the external audio state machine and the beginnings of the audio
processing.
2020-05-07 22:39:17 +01:00
Jonathan Naylor 5d1b66dde3 Add the missing functions. 2020-05-07 22:07:58 +01:00
Jonathan Naylor 96364dc189 Add the external audio parameters. 2020-05-07 22:01:48 +01:00
Jonathan Naylor a816818e3f Beginnings of external audio for the FM controller. 2020-05-07 16:17:00 +01:00
Jonathan Naylor 61ae1fc83a Add transmit hangs to NXDN and P25. 2020-05-06 17:42:46 +01:00
Jonathan Naylor eb9c0dfd93 Allow for the inversion of COS levels. 2020-05-06 11:34:04 +01:00
Jonathan Naylor 79a09e61fa Add the dot to the FM keyer. 2020-05-05 21:02:56 +01:00
Jonathan Naylor 9978a75651 Merge branch 'master' into FM 2020-05-05 21:01:15 +01:00
Jonathan Naylor bd16d13531 Add the dot to the CW Id. 2020-05-05 21:00:36 +01:00
Jonathan Naylor f00d729264 Merge pull request #246 from F4FXL/bugfix/STM32F1_POG
Bug Fixes for the STM32F1_POG and derivatives
2020-05-05 10:17:03 +01:00
Geoffrey Merck a4ddc2a060 Merge remote-tracking branch 'upstream/FM' into bugfix/STM32F1_POG 2020-05-05 11:02:27 +02:00
Geoffrey Merck a938c8b708 Reduce buffer size 2020-05-05 10:48:44 +02:00
Jonathan Naylor aa7a484c7a Allow the start callsign to occur when the kerchunk timer has latched. 2020-05-04 22:18:51 +01:00
Jonathan Naylor 915be8c279 Calculate the AckMinTime accurately. 2020-05-04 22:06:57 +01:00
Geoffrey Merck 87feadd451 Better LED management 2020-05-04 19:12:45 +02:00
Geoffrey Merck 419ab89ee9 Merge branch 'bugfix/STM32F1_POG' of https://github.com/F4FXL/MMDVM into bugfix/STM32F1_POG 2020-05-04 16:44:25 +02:00
Geoffrey Merck fcdb582893 Change FM LED Pin 2020-05-04 16:43:08 +02:00
Geoffrey Merck 5e85565208 Fix compile isue 2020-05-04 15:26:17 +02:00
Geoffrey Merck 2d876b8d8e Fix Fancy LED effect accessing unused ports 2020-05-03 15:36:10 +02:00
Jonathan Naylor 4feca3c5b7 Clock the timers seperately. 2020-05-03 13:08:33 +01:00
Jonathan Naylor f8e119c26b Set the modem state in SET_CONFIG. 2020-05-02 17:37:47 +01:00
Jonathan Naylor edddbedd4b Fix compilation issues. 2020-05-02 15:46:36 +01:00
Jonathan Naylor baa4f7aa4c Last minute tidy-ups. 2020-05-02 14:47:43 +01:00
Jonathan Naylor de3c257f79 Bump the version date. 2020-05-01 18:47:15 +01:00
Jonathan Naylor b027e1d1bf Merge pull request #243 from F4FXL/FM
Fix CTCSS value is different when using RXLevel 50 to 99
2020-05-01 17:04:05 +01:00
Geoffrey Merck 0a5c496a3a Fix CTCSS value is different when using RXLevel 50 to 99 2020-05-01 17:56:45 +02:00
Jonathan Naylor 5b32fecc0a Remove the pre- and de-emphasis and the downsampler. 2020-04-30 11:39:04 +01:00
Jonathan Naylor 92a4db9886 Merge pull request #242 from g4klx/revert-241-FM
Revert "Change emphasis time constant to 750µS"
2020-04-30 11:23:42 +01:00
Jonathan Naylor cc785e3225 Revert "Change emphasis time constant to 750µS" 2020-04-30 11:23:19 +01:00
Jonathan Naylor be0690e587 Merge pull request #241 from F4FXL/FM
Change emphasis time constant to 750µS
2020-04-30 09:38:24 +01:00
Geoffrey Merck 69e39e36b0 Change emphasis time constant to 750µS 2020-04-30 10:26:04 +02:00
Jonathan Naylor b2f33fd4d2 Bump the version date. 2020-04-29 21:51:12 +01:00
Jonathan Naylor 200199c5d4 Reduce the CPU load slightly. 2020-04-29 20:59:48 +01:00
Jonathan Naylor 1465d6f91d Merge pull request #240 from F4FXL/FM
Add resmaplign/packing and Pre and De emphasis
2020-04-29 20:45:02 +01:00
Geoffrey Merck 373aed13c8 Restore Passband 2020-04-29 20:43:01 +02:00
Geoffrey Merck b23620ede3 Add de and pre emphasis 2020-04-29 20:42:20 +02:00
Geoffrey Merck da87afc8d4 Move helper script to separate folder 2020-04-29 20:41:41 +02:00
Geoffrey Merck 626a280d27 Add filter chrachertitics comment 2020-04-29 18:24:15 +02:00
Geoffrey Merck 4b267c2e1e Move downsampling tap point 2020-04-28 22:35:06 +02:00
Geoffrey Merck cf18f95a92 Add Downsampling 2020-04-28 21:37:06 +02:00
Jonathan Naylor dac0f26e5d Rename RXBoost to RFAudioBoost. 2020-04-28 14:43:40 +01:00
Jonathan Naylor 13993891ec Merge pull request #239 from m0vse/FM
Change FM cal levels
2020-04-28 09:55:31 +01:00
m0vse 849c2a0f50 Change FM cal levels 2020-04-28 09:51:11 +01:00
Jonathan Naylor 172ac615a8 Rescale the output. 2020-04-27 14:59:33 +01:00
Jonathan Naylor 30031d8e95 Increase the output level. 2020-04-27 14:53:41 +01:00
Jonathan Naylor b2de5defa4 Tweak the values slightly. 2020-04-27 14:47:17 +01:00
Jonathan Naylor 177c7548ae Merge pull request #237 from m0vse/FM
Add FM Cal modes
2020-04-27 14:35:53 +01:00
m0vse b9bfc36e6f Remove commented code 2020-04-27 14:32:16 +01:00
m0vse 980c529107 Merge remote-tracking branch 'upstream/FM' into FM 2020-04-27 14:19:12 +01:00
m0vse 5156ca13b7 Add FM Cal modes 2020-04-27 14:18:42 +01:00
Jonathan Naylor d08a3690b0 Double the signal level to the CTCSS decoder. 2020-04-27 13:07:03 +01:00
Jonathan Naylor e8ed77241c Simplify the calculations. 2020-04-27 12:05:55 +01:00
Jonathan Naylor 82dcc44a2d Merge pull request #235 from F4FXL/FM
Move division to CTCSSRX, change sample unscaling to 1/rxLevel
2020-04-27 10:27:51 +01:00
Geoffrey Merck 93a8e63233 Remove m_rxLevel 2020-04-27 11:26:19 +02:00
Geoffrey Merck 4ffaa62855 Move division to CTCSSRX, change sample unscaling to 1/rxLevel 2020-04-27 11:16:06 +02:00
Jonathan Naylor f9530ee82a Pass the RX level to the FM controller. 2020-04-26 22:01:11 +01:00
Jonathan Naylor d66c6d7f9c Fix the multiplication. 2020-04-26 15:24:51 +01:00
Jonathan Naylor 458a3d2d24 Bump the version date. 2020-04-26 13:22:16 +01:00
Jonathan Naylor 6f4c19c006 Convert to Q47 arithmetic. 2020-04-26 13:02:43 +01:00
Jonathan Naylor a31cf3d6f8 Convert the CTCSS TX tones to Q31 from Q15. 2020-04-26 12:07:10 +01:00
Jonathan Naylor 3fb0631953 Merge pull request #233 from F4FXL/FM
Remove IO from CTCSSRX
2020-04-26 11:45:44 +01:00
Geoffrey Merck 028d0cf609 Add q31_t cast 2020-04-26 12:38:23 +02:00
Geoffrey Merck 6824d5662a Remove dependency to IO in CTCSSRX 2020-04-26 12:24:05 +02:00
Jonathan Naylor 1bc8726046 Merge pull request #232 from F4FXL/bugfix/FM_CTCSS_TX
Fix invalid values passed to arm_sin_q15
2020-04-26 08:16:20 +01:00
Jonathan Naylor 05c8c130b6 Merge pull request #231 from F4FXL/feature/FM_Normalized_CTCSS_Threshold
CTCSS threshold is level agnostic
2020-04-26 08:15:15 +01:00
Geoffrey Merck 5051a13711 Fix invalid values passed to arm_sin_q15 2020-04-26 08:16:08 +02:00
Geoffrey Merck 103116e410 Add debug essage when CTCSS status changes 2020-04-26 07:26:35 +02:00
Geoffrey Merck d973238596 CTCSS threshold is level agnostic, experimental
(cherry picked from commit d2d50e21e1)
2020-04-26 06:58:27 +02:00
Jonathan Naylor 4d664c4aa4 Merge pull request #230 from g4klx/revert-229-FM
Revert "Make CTCSS threshold RXLevel and RXBoost agnostic"
2020-04-25 23:48:25 +01:00
100 changed files with 6180 additions and 3249 deletions
+36
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/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(AX25DEFINES_H)
#define AX25DEFINES_H
const uint8_t AX25_RADIO_SYMBOL_LENGTH = 20U; // At 24 kHz sample rate
const uint8_t AX25_FRAME_START = 0x7EU;
const uint8_t AX25_FRAME_END = 0x7EU;
const uint8_t AX25_FRAME_ABORT = 0xFEU;
const uint8_t AX25_MAX_ONES = 5U;
const uint16_t AX25_MIN_FRAME_LENGTH = 17U; // Callsign (7) + Callsign (7) + Control (1) + Checksum (2)
const uint16_t AX25_MAX_FRAME_LENGTH = 330U; // Callsign (7) + Callsign (7) + 8 Digipeaters (56) +
// Control (1) + PID (1) + Data (256) + Checksum (2)
#endif
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/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
* Copyright 2015-2019 Mobilinkd LLC <[email protected]>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "AX25Demodulator.h"
#include "AX25Defines.h"
const float32_t SAMPLE_RATE = 24000.0F;
const float32_t SYMBOL_RATE = 1200.0F;
const uint16_t DELAY_LEN = 11U;
const float32_t SAMPLES_PER_SYMBOL = SAMPLE_RATE / SYMBOL_RATE;
const float32_t PLL_LIMIT = SAMPLES_PER_SYMBOL / 2.0F;
const uint32_t LPF_FILTER_LEN = 48U;
q15_t LPF_FILTER_COEFFS[] = {
-2, -8, -17, -28, -40, -47, -47, -34,
-5, 46, 122, 224, 354, 510, 689, 885,
1092, 1302, 1506, 1693, 1856, 1987, 2077, 2124,
2124, 2077, 1987, 1856, 1693, 1506, 1302, 1092,
885, 689, 510, 354, 224, 122, 46, -5,
-34, -47, -47, -40, -28, -17, -8, -2
};
// Lock low-pass filter taps (80Hz Bessel)
// scipy.signal:
// b, a = bessel(4, [80.0/(1200/2)], 'lowpass')
//
const uint8_t PLL_IIR_SIZE = 5U;
const float32_t PLL_LOCK_B[] = {
1.077063e-03,4.308253e-03,6.462379e-03,4.308253e-03,1.077063e-03};
const float32_t PLL_LOCK_A[] = {
1.000000e+00,-2.774567e+00,2.962960e+00,-1.437990e+00,2.668296e-01};
// 64 Hz loop filter.
// scipy.signal:
// loop_coeffs = firwin(9, [64.0/(1200/2)], width = None,
// pass_zero = True, scale = True, window='hann')
//
const uint32_t PLL_FILTER_LEN = 7U;
float32_t PLL_FILTER_COEFFS[] = {3.196252e-02F, 1.204223e-01F, 2.176819e-01F, 2.598666e-01F, 2.176819e-01F, 1.204223e-01F, 3.196252e-02F};
CAX25Demodulator::CAX25Demodulator(int8_t n) :
m_frame(),
m_twist(n),
m_lpfFilter(),
m_lpfState(),
m_delayLine(NULL),
m_delayPos(0U),
m_nrziState(false),
m_pllFilter(),
m_pllState(),
m_pllLast(false),
m_pllBits(1U),
m_pllCount(0.0F),
m_pllJitter(0.0F),
m_pllDCD(false),
m_iirHistory(),
m_hdlcOnes(0U),
m_hdlcFlag(false),
m_hdlcBuffer(0U),
m_hdlcBits(0U),
m_hdlcState(AX25_IDLE)
{
m_delayLine = new bool[DELAY_LEN];
m_lpfFilter.numTaps = LPF_FILTER_LEN;
m_lpfFilter.pState = m_lpfState;
m_lpfFilter.pCoeffs = LPF_FILTER_COEFFS;
m_pllFilter.numTaps = PLL_FILTER_LEN;
m_pllFilter.pState = m_pllState;
m_pllFilter.pCoeffs = PLL_FILTER_COEFFS;
for (uint8_t i = 0U; i < PLL_IIR_SIZE; i++)
m_iirHistory[i] = 0.0F;
}
bool CAX25Demodulator::process(q15_t* samples, uint8_t length, CAX25Frame& frame)
{
bool result = false;
q15_t fa[RX_BLOCK_SIZE];
m_twist.process(samples, fa, RX_BLOCK_SIZE);
int16_t buffer[RX_BLOCK_SIZE];
for (uint8_t i = 0; i < length; i++) {
bool level = (fa[i] >= 0);
bool delayed = delay(level);
buffer[i] = (int16_t(level ^ delayed) << 1) - 1;
}
q15_t fc[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_lpfFilter, buffer, fc, RX_BLOCK_SIZE);
for (uint8_t i = 0; i < length; i++) {
bool bit = fc[i] >= 0;
bool sample = PLL(bit);
if (sample) {
// We will only ever get one frame because there are
// not enough bits in a block for more than one.
if (result) {
HDLC(NRZI(bit));
} else {
result = HDLC(NRZI(bit));
if (result) {
// Copy the frame data.
::memcpy(frame.m_data, m_frame.m_data, AX25_MAX_PACKET_LEN);
frame.m_length = m_frame.m_length;
frame.m_fcs = m_frame.m_fcs;
m_frame.m_length = 0U;
}
}
}
}
return result;
}
bool CAX25Demodulator::delay(bool b)
{
bool r = m_delayLine[m_delayPos];
m_delayLine[m_delayPos++] = b;
if (m_delayPos >= DELAY_LEN)
m_delayPos = 0U;
return r;
}
bool CAX25Demodulator::NRZI(bool b)
{
bool result = (b == m_nrziState);
m_nrziState = b;
return result;
}
bool CAX25Demodulator::PLL(bool input)
{
bool sample = false;
if (input != m_pllLast || m_pllBits > 16U) {
// Record transition.
m_pllLast = input;
if (m_pllCount > PLL_LIMIT)
m_pllCount -= SAMPLES_PER_SYMBOL;
float32_t adjust = m_pllBits > 16U ? 5.0F : 0.0F;
float32_t offset = m_pllCount / float32_t(m_pllBits);
float32_t jitter;
::arm_fir_f32(&m_pllFilter, &offset, &jitter, 1U);
float32_t absOffset = adjust;
if (offset < 0.0F)
absOffset -= offset;
else
absOffset += offset;
m_pllJitter = iir(absOffset);
m_pllCount -= jitter / 2.0F;
m_pllBits = 1U;
} else {
if (m_pllCount > PLL_LIMIT) {
sample = true;
m_pllCount -= SAMPLES_PER_SYMBOL;
m_pllBits++;
}
}
m_pllCount += 1.0F;
return sample;
}
bool CAX25Demodulator::HDLC(bool b)
{
if (m_hdlcOnes == AX25_MAX_ONES) {
if (b) {
// flag byte
m_hdlcFlag = true;
} else {
// bit stuffing...
m_hdlcFlag = false;
m_hdlcOnes = 0U;
return false;
}
}
m_hdlcBuffer >>= 1;
m_hdlcBuffer |= b ? 128U : 0U;
m_hdlcBits++; // Free-running until Sync byte.
if (b)
m_hdlcOnes++;
else
m_hdlcOnes = 0U;
if (m_hdlcFlag) {
bool result = false;
switch (m_hdlcBuffer) {
case AX25_FRAME_END:
if (m_frame.m_length >= AX25_MIN_FRAME_LENGTH) {
result = m_frame.checkCRC();
if (!result)
m_frame.m_length = 0U;
} else {
m_frame.m_length = 0U;
}
m_hdlcState = AX25_SYNC;
m_hdlcFlag = false;
m_hdlcBits = 0U;
break;
case AX25_FRAME_ABORT:
// Frame aborted
m_frame.m_length = 0U;
m_hdlcState = AX25_IDLE;
m_hdlcFlag = false;
m_hdlcBits = 0U;
break;
default:
break;
}
return result;
}
switch (m_hdlcState) {
case AX25_IDLE:
break;
case AX25_SYNC:
if (m_hdlcBits == 8U) { // 8th bit.
// Start of frame data.
m_hdlcState = AX25_RECEIVE;
m_frame.append(m_hdlcBuffer);
m_hdlcBits = 0U;
}
break;
case AX25_RECEIVE:
if (m_hdlcBits == 8U) { // 8th bit.
m_frame.append(m_hdlcBuffer);
m_hdlcBits = 0U;
}
break;
default:
break;
}
return false;
}
void CAX25Demodulator::setTwist(int8_t n)
{
m_twist.setTwist(n);
}
bool CAX25Demodulator::isDCD()
{
if (m_pllJitter <= (SAMPLES_PER_SYMBOL * 0.03F))
m_pllDCD = true;
else if (m_pllJitter >= (SAMPLES_PER_SYMBOL * 0.15F))
m_pllDCD = false;
return m_pllDCD;
}
float32_t CAX25Demodulator::iir(float32_t input)
{
for (int8_t i = int8_t(PLL_IIR_SIZE) - 1; i != 0; i--)
m_iirHistory[i] = m_iirHistory[i - 1];
m_iirHistory[0] = input;
for (uint8_t i = 1U; i < PLL_IIR_SIZE; i++)
m_iirHistory[0] -= PLL_LOCK_A[i] * m_iirHistory[i];
float32_t result = 0.0F;
for (uint8_t i = 0U; i < PLL_IIR_SIZE; i++)
result += PLL_LOCK_B[i] * m_iirHistory[i];
return result;
}
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/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(AX25Demodulator_H)
#define AX25Demodulator_H
#include "Config.h"
#include "AX25Frame.h"
#include "AX25Twist.h"
enum AX25_STATE {
AX25_IDLE,
AX25_SYNC,
AX25_RECEIVE
};
class CAX25Demodulator {
public:
CAX25Demodulator(int8_t n);
bool process(q15_t* samples, uint8_t length, CAX25Frame& frame);
void setTwist(int8_t n);
bool isDCD();
private:
CAX25Frame m_frame;
CAX25Twist m_twist;
arm_fir_instance_q15 m_lpfFilter;
q15_t m_lpfState[70U]; // NoTaps + BlockSize - 1, 48 + 20 - 1 plus some spare
bool* m_delayLine;
uint16_t m_delayPos;
bool m_nrziState;
arm_fir_instance_f32 m_pllFilter;
float32_t m_pllState[20U]; // NoTaps + BlockSize - 1, 7 + 1 - 1 plus some spare
bool m_pllLast;
uint8_t m_pllBits;
float32_t m_pllCount;
float32_t m_pllJitter;
bool m_pllDCD;
float32_t m_iirHistory[5U];
uint16_t m_hdlcOnes;
bool m_hdlcFlag;
uint16_t m_hdlcBuffer;
uint16_t m_hdlcBits;
AX25_STATE m_hdlcState;
bool delay(bool b);
bool NRZI(bool b);
bool PLL(bool b);
bool HDLC(bool b);
float32_t iir(float32_t input);
};
#endif
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/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "AX25Frame.h"
const uint16_t CCITT_TABLE[] = {
0x0000,0x1189,0x2312,0x329b,0x4624,0x57ad,0x6536,0x74bf,
0x8c48,0x9dc1,0xaf5a,0xbed3,0xca6c,0xdbe5,0xe97e,0xf8f7,
0x1081,0x0108,0x3393,0x221a,0x56a5,0x472c,0x75b7,0x643e,
0x9cc9,0x8d40,0xbfdb,0xae52,0xdaed,0xcb64,0xf9ff,0xe876,
0x2102,0x308b,0x0210,0x1399,0x6726,0x76af,0x4434,0x55bd,
0xad4a,0xbcc3,0x8e58,0x9fd1,0xeb6e,0xfae7,0xc87c,0xd9f5,
0x3183,0x200a,0x1291,0x0318,0x77a7,0x662e,0x54b5,0x453c,
0xbdcb,0xac42,0x9ed9,0x8f50,0xfbef,0xea66,0xd8fd,0xc974,
0x4204,0x538d,0x6116,0x709f,0x0420,0x15a9,0x2732,0x36bb,
0xce4c,0xdfc5,0xed5e,0xfcd7,0x8868,0x99e1,0xab7a,0xbaf3,
0x5285,0x430c,0x7197,0x601e,0x14a1,0x0528,0x37b3,0x263a,
0xdecd,0xcf44,0xfddf,0xec56,0x98e9,0x8960,0xbbfb,0xaa72,
0x6306,0x728f,0x4014,0x519d,0x2522,0x34ab,0x0630,0x17b9,
0xef4e,0xfec7,0xcc5c,0xddd5,0xa96a,0xb8e3,0x8a78,0x9bf1,
0x7387,0x620e,0x5095,0x411c,0x35a3,0x242a,0x16b1,0x0738,
0xffcf,0xee46,0xdcdd,0xcd54,0xb9eb,0xa862,0x9af9,0x8b70,
0x8408,0x9581,0xa71a,0xb693,0xc22c,0xd3a5,0xe13e,0xf0b7,
0x0840,0x19c9,0x2b52,0x3adb,0x4e64,0x5fed,0x6d76,0x7cff,
0x9489,0x8500,0xb79b,0xa612,0xd2ad,0xc324,0xf1bf,0xe036,
0x18c1,0x0948,0x3bd3,0x2a5a,0x5ee5,0x4f6c,0x7df7,0x6c7e,
0xa50a,0xb483,0x8618,0x9791,0xe32e,0xf2a7,0xc03c,0xd1b5,
0x2942,0x38cb,0x0a50,0x1bd9,0x6f66,0x7eef,0x4c74,0x5dfd,
0xb58b,0xa402,0x9699,0x8710,0xf3af,0xe226,0xd0bd,0xc134,
0x39c3,0x284a,0x1ad1,0x0b58,0x7fe7,0x6e6e,0x5cf5,0x4d7c,
0xc60c,0xd785,0xe51e,0xf497,0x8028,0x91a1,0xa33a,0xb2b3,
0x4a44,0x5bcd,0x6956,0x78df,0x0c60,0x1de9,0x2f72,0x3efb,
0xd68d,0xc704,0xf59f,0xe416,0x90a9,0x8120,0xb3bb,0xa232,
0x5ac5,0x4b4c,0x79d7,0x685e,0x1ce1,0x0d68,0x3ff3,0x2e7a,
0xe70e,0xf687,0xc41c,0xd595,0xa12a,0xb0a3,0x8238,0x93b1,
0x6b46,0x7acf,0x4854,0x59dd,0x2d62,0x3ceb,0x0e70,0x1ff9,
0xf78f,0xe606,0xd49d,0xc514,0xb1ab,0xa022,0x92b9,0x8330,
0x7bc7,0x6a4e,0x58d5,0x495c,0x3de3,0x2c6a,0x1ef1,0x0f78 };
CAX25Frame::CAX25Frame(const uint8_t* data, uint16_t length) :
m_data(),
m_length(0U),
m_fcs(0U)
{
for (uint16_t i = 0U; i < length && i < (AX25_MAX_PACKET_LEN - 2U); i++)
m_data[m_length++] = data[i];
}
CAX25Frame::CAX25Frame() :
m_data(),
m_length(0U),
m_fcs(0U)
{
}
bool CAX25Frame::append(uint16_t c)
{
if (m_length == AX25_MAX_PACKET_LEN)
return false;
m_data[m_length++] = uint8_t(c);
return true;
}
bool CAX25Frame::checkCRC()
{
union {
uint16_t crc16;
uint8_t crc8[2U];
};
crc16 = 0xFFFFU;
for (uint16_t i = 0U; i < (m_length - 2U); i++)
crc16 = uint16_t(crc8[1U]) ^ CCITT_TABLE[crc8[0U] ^ m_data[i]];
crc16 = ~crc16;
if (crc8[0U] == m_data[m_length - 2U] && crc8[1U] == m_data[m_length - 1U]) {
m_fcs = crc16;
return true;
} else {
return false;
}
}
void CAX25Frame::addCRC()
{
union {
uint16_t crc16;
uint8_t crc8[2U];
};
crc16 = 0xFFFFU;
for (uint16_t i = 0U; i < m_length; i++)
crc16 = uint16_t(crc8[1U]) ^ CCITT_TABLE[crc8[0U] ^ m_data[i]];
crc16 = ~crc16;
m_fcs = crc16;
m_data[m_length++] = crc8[0U];
m_data[m_length++] = crc8[1U];
}
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/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(AX25Frame_H)
#define AX25Frame_H
#include "Config.h"
const uint16_t AX25_MAX_PACKET_LEN = 300U;
class CAX25Frame {
public:
CAX25Frame(const uint8_t* data, uint16_t length);
CAX25Frame();
bool append(uint16_t c);
bool checkCRC();
void addCRC();
uint8_t m_data[AX25_MAX_PACKET_LEN];
uint16_t m_length;
uint16_t m_fcs;
};
#endif
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/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "AX25RX.h"
/*
* Generated with Scipy Filter, 152 coefficients, 1100-2300Hz bandpass,
* Hann window, starting and ending 0 value coefficients removed.
*
* np.array(
* firwin2(152,
* [
* 0.0,
* 1000.0/(sample_rate/2),
* 1100.0/(sample_rate/2),
* 2350.0/(sample_rate/2),
* 2500.0/(sample_rate/2),
* 1.0
* ],
* [0,0,1,1,0,0],
* antisymmetric = False,
* window='hann') * 32768,
* dtype=int)[10:-10]
*/
const uint32_t FILTER_LEN = 130U;
q15_t FILTER_COEFFS[] = {
5, 12, 18, 21, 19, 11, -2, -15, -25, -27,
-21, -11, -3, -5, -19, -43, -69, -83, -73, -35,
27, 98, 155, 180, 163, 109, 39, -20, -45, -26,
23, 74, 89, 39, -81, -247, -407, -501, -480, -334,
-92, 175, 388, 479, 429, 275, 99, 5, 68, 298,
626, 913, 994, 740, 115, -791, -1770, -2544, -2847, -2509,
-1527, -76, 1518, 2875, 3653, 3653, 2875, 1518, -76, -1527,
-2509, -2847, -2544, -1770, -791, 115, 740, 994, 913, 626,
298, 68, 5, 99, 275, 429, 479, 388, 175, -92,
-334, -480, -501, -407, -247, -81, 39, 89, 74, 23,
-26, -45, -20, 39, 109, 163, 180, 155, 98, 27,
-35, -73, -83, -69, -43, -19, -5, -3, -11, -21,
-27, -25, -15, -2, 11, 19, 21, 18, 12, 5
};
CAX25RX::CAX25RX() :
m_filter(),
m_state(),
m_demod1(3),
m_demod2(6),
m_demod3(9),
m_lastFCS(0U),
m_count(0U),
m_slotTime(30U),
m_slotCount(0U),
m_pPersist(128U),
m_dcd(false),
m_canTX(false),
m_x(1U),
m_a(0xB7U),
m_b(0x73U),
m_c(0xF6U)
{
m_filter.numTaps = FILTER_LEN;
m_filter.pState = m_state;
m_filter.pCoeffs = FILTER_COEFFS;
initRand();
}
void CAX25RX::samples(q15_t* samples, uint8_t length)
{
q15_t output[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_filter, samples, output, RX_BLOCK_SIZE);
m_count++;
CAX25Frame frame;
bool ret = m_demod1.process(output, length, frame);
if (ret) {
if (frame.m_fcs != m_lastFCS || m_count > 2U) {
m_lastFCS = frame.m_fcs;
m_count = 0U;
serial.writeAX25Data(frame.m_data, frame.m_length - 2U);
}
DEBUG1("Decoder 1 reported");
}
ret = m_demod2.process(output, length, frame);
if (ret) {
if (frame.m_fcs != m_lastFCS || m_count > 2U) {
m_lastFCS = frame.m_fcs;
m_count = 0U;
serial.writeAX25Data(frame.m_data, frame.m_length - 2U);
}
DEBUG1("Decoder 2 reported");
}
ret = m_demod3.process(output, length, frame);
if (ret) {
if (frame.m_fcs != m_lastFCS || m_count > 2U) {
m_lastFCS = frame.m_fcs;
m_count = 0U;
serial.writeAX25Data(frame.m_data, frame.m_length - 2U);
}
DEBUG1("Decoder 3 reported");
}
m_slotCount += RX_BLOCK_SIZE;
if (m_slotCount >= m_slotTime) {
m_slotCount = 0U;
bool dcd1 = m_demod1.isDCD();
bool dcd2 = m_demod2.isDCD();
bool dcd3 = m_demod3.isDCD();
if (dcd1 || dcd2 || dcd3) {
if (!m_dcd) {
io.setDecode(true);
io.setADCDetection(true);
m_dcd = true;
}
m_canTX = false;
} else {
if (m_dcd) {
io.setDecode(false);
io.setADCDetection(false);
m_dcd = false;
}
m_canTX = m_pPersist >= rand();
}
}
}
bool CAX25RX::canTX() const
{
return m_canTX;
}
void CAX25RX::setParams(int8_t twist, uint8_t slotTime, uint8_t pPersist)
{
m_demod1.setTwist(twist - 3);
m_demod2.setTwist(twist);
m_demod3.setTwist(twist + 3);
m_slotTime = slotTime * 240U; // Slot time in samples
m_pPersist = pPersist;
}
// Taken from https://www.electro-tech-online.com/threads/ultra-fast-pseudorandom-number-generator-for-8-bit.124249/
//X ABC Algorithm Random Number Generator for 8-Bit Devices:
//This is a small PRNG, experimentally verified to have at least a 50 million byte period
//by generating 50 million bytes and observing that there were no overapping sequences and repeats.
//This generator passes serial correlation, entropy , Monte Carlo Pi value, arithmetic mean,
//And many other statistical tests. This generator may have a period of up to 2^32, but this has
//not been verified.
//
// By XORing 3 bytes into the a,b, and c registers, you can add in entropy from
//an external source easily.
//
//This generator is free to use, but is not suitable for cryptography due to its short period(by //cryptographic standards) and simple construction. No attempt was made to make this generator
// suitable for cryptographic use.
//
//Due to the use of a constant counter, the generator should be resistant to latching up.
//A significant performance gain is had in that the x variable is only ever incremented.
//
//Only 4 bytes of ram are needed for the internal state, and generating a byte requires 3 XORs , //2 ADDs, one bit shift right , and one increment. Difficult or slow operations like multiply, etc
//were avoided for maximum speed on ultra low power devices.
void CAX25RX::initRand() //Can also be used to seed the rng with more entropy during use.
{
m_a = (m_a ^ m_c ^ m_x);
m_b = (m_b + m_a);
m_c = (m_c + (m_b >> 1) ^ m_a);
}
uint8_t CAX25RX::rand()
{
m_x++; //x is incremented every round and is not affected by any other variable
m_a = (m_a ^ m_c ^ m_x); //note the mix of addition and XOR
m_b = (m_b + m_a); //And the use of very few instructions
m_c = (m_c + (m_b >> 1) ^ m_a); //the right shift is to ensure that high-order bits from b can affect
return uint8_t(m_c); //low order bits of other variables
}
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/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(AX25RX_H)
#define AX25RX_H
#include "Config.h"
#include "AX25Demodulator.h"
class CAX25RX {
public:
CAX25RX();
void samples(q15_t* samples, uint8_t length);
void setParams(int8_t twist, uint8_t slotTime, uint8_t pPersist);
bool canTX() const;
private:
arm_fir_instance_q15 m_filter;
q15_t m_state[160U]; // NoTaps + BlockSize - 1, 130 + 20 - 1 plus some spare
CAX25Demodulator m_demod1;
CAX25Demodulator m_demod2;
CAX25Demodulator m_demod3;
uint16_t m_lastFCS;
uint32_t m_count;
uint32_t m_slotTime;
uint32_t m_slotCount;
uint8_t m_pPersist;
bool m_dcd;
bool m_canTX;
uint8_t m_x;
uint8_t m_a;
uint8_t m_b;
uint8_t m_c;
void initRand();
uint8_t rand();
};
#endif
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/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "AX25TX.h"
#include "AX25Defines.h"
#include "AX25Frame.h"
const uint8_t START_FLAG[] = { AX25_FRAME_START };
const uint8_t END_FLAG[] = { AX25_FRAME_END };
const uint8_t BIT_MASK_TABLE1[] = { 0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U };
#define WRITE_BIT1(p,i,b) p[(i)>>3] = (b) ? (p[(i)>>3] | BIT_MASK_TABLE1[(i)&7]) : (p[(i)>>3] & ~BIT_MASK_TABLE1[(i)&7])
#define READ_BIT1(p,i) (p[(i)>>3] & BIT_MASK_TABLE1[(i)&7])
const uint8_t BIT_MASK_TABLE2[] = { 0x01U, 0x02U, 0x04U, 0x08U, 0x10U, 0x20U, 0x40U, 0x80U };
#define WRITE_BIT2(p,i,b) p[(i)>>3] = (b) ? (p[(i)>>3] | BIT_MASK_TABLE2[(i)&7]) : (p[(i)>>3] & ~BIT_MASK_TABLE2[(i)&7])
#define READ_BIT2(p,i) (p[(i)>>3] & BIT_MASK_TABLE2[(i)&7])
const uint16_t AUDIO_TABLE_LEN = 120U;
const q15_t AUDIO_TABLE_DATA[] = {
0, 214, 428, 641, 851, 1060, 1265, 1468, 1666, 1859, 2048, 2230, 2407, 2577, 2740, 2896, 3043, 3182, 3313, 3434, 3546, 3649,
3741, 3823, 3895, 3955, 4006, 4045, 4073, 4089, 4095, 4089, 4073, 4045, 4006, 3955, 3895, 3823, 3741, 3649, 3546, 3434, 3313,
3182, 3043, 2896, 2740, 2577, 2407, 2230, 2048, 1859, 1666, 1468, 1265, 1060, 851, 641, 428, 214, 0, -214, -428, -641, -851,
-1060, -1265, -1468, -1666, -1859, -2047, -2230, -2407, -2577, -2740, -2896, -3043, -3182, -3313, -3434, -3546, -3649, -3741,
-3823, -3895, -3955, -4006, -4045, -4073, -4089, -4095, -4089, -4073, -4045, -4006, -3955, -3895, -3823, -3741, -3649, -3546,
-3434, -3313, -3182, -3043, -2896, -2740, -2577, -2407, -2230, -2047, -1859, -1666, -1468, -1265, -1060, -851, -641, -428, -214
};
CAX25TX::CAX25TX() :
m_poBuffer(),
m_poLen(0U),
m_poPtr(0U),
m_txDelay(360U),
m_tablePtr(0U),
m_nrzi(false)
{
}
void CAX25TX::process()
{
if (m_poLen == 0U)
return;
if (!m_duplex) {
if (m_poPtr == 0U) {
bool tx = ax25RX.canTX();
if (!tx)
return;
}
}
uint16_t space = io.getSpace();
while (space > AX25_RADIO_SYMBOL_LENGTH) {
bool b = READ_BIT1(m_poBuffer, m_poPtr) != 0U;
m_poPtr++;
writeBit(b);
space -= AX25_RADIO_SYMBOL_LENGTH;
if (m_poPtr >= m_poLen) {
m_poPtr = 0U;
m_poLen = 0U;
return;
}
}
}
uint8_t CAX25TX::writeData(const uint8_t* data, uint16_t length)
{
CAX25Frame frame(data, length);
frame.addCRC();
m_poLen = 0U;
m_poPtr = 0U;
m_nrzi = false;
m_tablePtr = 0U;
// Add TX delay
for (uint16_t i = 0U; i < m_txDelay; i++, m_poLen++) {
bool preamble = NRZI(false);
WRITE_BIT1(m_poBuffer, m_poLen, preamble);
}
// Add the Start Flag
for (uint16_t i = 0U; i < 8U; i++, m_poLen++) {
bool b1 = READ_BIT1(START_FLAG, i) != 0U;
bool b2 = NRZI(b1);
WRITE_BIT1(m_poBuffer, m_poLen, b2);
}
uint8_t ones = 0U;
for (uint16_t i = 0U; i < (frame.m_length * 8U); i++) {
bool b1 = READ_BIT2(frame.m_data, i) != 0U;
bool b2 = NRZI(b1);
WRITE_BIT1(m_poBuffer, m_poLen, b2);
m_poLen++;
if (b1) {
ones++;
if (ones == AX25_MAX_ONES) {
// Bit stuffing
bool b = NRZI(false);
WRITE_BIT1(m_poBuffer, m_poLen, b);
m_poLen++;
ones = 0U;
}
} else {
ones = 0U;
}
}
// Add the End Flag
for (uint16_t i = 0U; i < 8U; i++, m_poLen++) {
bool b1 = READ_BIT1(END_FLAG, i) != 0U;
bool b2 = NRZI(b1);
WRITE_BIT1(m_poBuffer, m_poLen, b2);
}
return 0U;
}
void CAX25TX::writeBit(bool b)
{
q15_t buffer[AX25_RADIO_SYMBOL_LENGTH];
for (uint8_t i = 0U; i < AX25_RADIO_SYMBOL_LENGTH; i++) {
q15_t value = AUDIO_TABLE_DATA[m_tablePtr];
if (b) {
// De-emphasise the lower frequency by 6dB
value >>= 2;
m_tablePtr += 6U;
} else {
m_tablePtr += 11U;
}
buffer[i] = value;
if (m_tablePtr >= AUDIO_TABLE_LEN)
m_tablePtr -= AUDIO_TABLE_LEN;
}
io.write(STATE_AX25, buffer, AX25_RADIO_SYMBOL_LENGTH);
}
void CAX25TX::setTXDelay(uint8_t delay)
{
m_txDelay = delay * 12U;
}
uint8_t CAX25TX::getSpace() const
{
return m_poLen == 0U ? 255U : 0U;
}
bool CAX25TX::NRZI(bool b)
{
if (!b)
m_nrzi = !m_nrzi;
return m_nrzi;
}
+49
View File
@@ -0,0 +1,49 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(AX25TX_H)
#define AX25TX_H
#include "Config.h"
class CAX25TX {
public:
CAX25TX();
uint8_t writeData(const uint8_t* data, uint16_t length);
void process();
void setTXDelay(uint8_t delay);
uint8_t getSpace() const;
private:
uint8_t m_poBuffer[600U];
uint16_t m_poLen;
uint16_t m_poPtr;
uint16_t m_txDelay;
uint16_t m_tablePtr;
bool m_nrzi;
void writeBit(bool b);
bool NRZI(bool b);
};
#endif
+311
View File
@@ -0,0 +1,311 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "AX25Twist.h"
// 1200Hz = -12dB, 2200Hz = 0dB; 3381Hz cutoff; cosine.
q15_t dB12[] = {
176,
-812,
-3916,
-7586,
23536,
-7586,
-3916,
-812,
176
};
// 1200Hz = -11dB, 2200Hz = 0dB; 3258Hz cutoff; cosine.
q15_t dB11[] = {
121,
-957,
-3959,
-7383,
23871,
-7383,
-3959,
-957,
121
};
// 1200Hz = -10dB, 2200Hz = 0dB; 3118Hz cutoff; cosine.
q15_t dB10[] = {
56,
-1110,
-3987,
-7141,
24254,
-7141,
-3987,
-1110,
56
};
// 1200Hz = -9dB, 2200Hz = 0dB; 2959Hz cutoff; cosine.
q15_t dB9[] = {
-19,
-1268,
-3994,
-6856,
24688,
-6856,
-3994,
-1268,
-19
};
// 1200Hz = -8dB, 2200Hz = 0dB; 2778Hz cutoff; cosine.
q15_t dB8[] = {
-104,
-1424,
-3968,
-6516,
25182,
-6516,
-3968,
-1424,
-104
};
// 1200Hz = -7dB, 2200Hz = 0dB; 2573Hz cutoff; cosine.
q15_t dB7[] = {
-196,
-1565,
-3896,
-6114,
25742,
-6114,
-3896,
-1565,
-196
};
// 1200Hz = -6dB, 2200Hz = 0dB; 2343Hz cutoff; cosine.
q15_t dB6[] = {
-288,
-1676,
-3761,
-5642,
26370,
-5642,
-3761,
-1676,
-288
};
// 1200Hz = -5dB, 2200Hz = 0dB; 2085Hz cutoff; cosine.
q15_t dB5[] = {
-370,
-1735,
-3545,
-5088,
27075,
-5088,
-3545,
-1735,
-370
};
// 1200Hz = -4dB, 2200Hz = 0dB; 1790Hz cutoff; cosine.
q15_t dB4[] = {
-432,
-1715,
-3220,
-4427,
27880,
-4427,
-3220,
-1715,
-432
};
// 1200Hz = -3dB, 2200Hz = 0dB; 1456Hz cutoff; cosine.
q15_t dB3[] = {
-452,
-1582,
-2759,
-3646,
28792,
-3646,
-2759,
-1582,
-452
};
// 1200Hz = -2dB, 2200Hz = 0dB; 1070Hz cutoff; cosine.
q15_t dB2[] = {
-408,
-1295,
-2123,
-2710,
29846,
-2710,
-2123,
-1295,
-408
};
// 1200Hz = -1dB, 2200Hz = 0dB; 605Hz cutoff; cosine.
q15_t dB1[] = {
-268,
-795,
-1244,
-1546,
31116,
-1546,
-1244,
-795,
-268
};
q15_t dB0[] = {
0,
0,
0,
0,
32767,
0,
0,
0,
0,
};
// 1200Hz = 0dB, 2200Hz = -1dB; 4130Hz cutoff; cosine.
q15_t dB_1[] = {
-419,
-177,
3316,
8650,
11278,
8650,
3316,
-177,
-419
};
// 1200Hz = 0dB, 2200Hz = -2dB; 3190Hz cutoff; cosine.
q15_t dB_2[] = {
-90,
1033,
3975,
7267,
8711,
7267,
3975,
1033,
-90
};
// 1200Hz = 0dB, 2200Hz = -3dB; 2330Hz cutoff; cosine.
q15_t dB_3[] = {
292,
1680,
3752,
5615,
6362,
5615,
3752,
1680,
292
};
// 1200Hz = 0dB, 2200Hz = -4dB; 2657Hz cutoff; boxcar.
q15_t dB_4[] = {
917,
3024,
5131,
6684,
7255,
6684,
5131,
3024,
917
};
// 1200Hz = 0dB, 2200Hz = -5dB; 2360Hz cutoff; boxcar.
q15_t dB_5[] = {
1620,
3339,
4925,
6042,
6444,
6042,
4925,
3339,
1620
};
// 1200Hz = 0dB, 2200Hz = -6dB; 2067Hz cutoff; boxcar.
q15_t dB_6[] = {
2161,
3472,
4605,
5373,
5644,
5373,
4605,
3472,
2161
};
q15_t* coeffs[] = {
dB12,
dB11,
dB10,
dB9,
dB8,
dB7,
dB6,
dB5,
dB4,
dB3,
dB2,
dB1,
dB0,
dB_1,
dB_2,
dB_3,
dB_4,
dB_5,
dB_6
};
CAX25Twist::CAX25Twist(int8_t n) :
m_filter(),
m_state()
{
setTwist(n);
}
void CAX25Twist::process(q15_t* in, q15_t* out, uint8_t length)
{
::arm_fir_fast_q15(&m_filter, in, out, length);
}
void CAX25Twist::setTwist(int8_t n)
{
uint8_t twist = uint8_t(n + 6);
m_filter.numTaps = 9;
m_filter.pState = m_state;
m_filter.pCoeffs = coeffs[twist];
}
+39
View File
@@ -0,0 +1,39 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(AX25Twist_H)
#define AX25Twist_H
#include "Config.h"
class CAX25Twist {
public:
CAX25Twist(int8_t n);
void process(q15_t* in, q15_t* out, uint8_t length);
void setTwist(int8_t n);
private:
arm_fir_instance_q15 m_filter;
q15_t m_state[40U]; // NoTaps + BlockSize - 1, 9 + 20 - 1 plus some spare
};
#endif
+3 -3
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
*
* This program is free software; you can redistribute it and/or modify
@@ -77,6 +77,7 @@ const struct {
{',', 0xEEAEE000U, 22U},
{'-', 0xEAAE0000U, 18U},
{'=', 0xEAB80000U, 16U},
{'.', 0xBAEB8000U, 20U},
{' ', 0x00000000U, 4U},
{0U, 0x00000000U, 0U}
};
@@ -124,7 +125,7 @@ void CCWIdTX::process()
}
}
uint8_t CCWIdTX::write(const uint8_t* data, uint8_t length)
uint8_t CCWIdTX::write(const uint8_t* data, uint16_t length)
{
::memset(m_poBuffer, 0x00U, 1000U * sizeof(uint8_t));
@@ -170,4 +171,3 @@ void CCWIdTX::reset()
m_poPtr = 0U;
m_n = 0U;
}
+2 -2
View File
@@ -1,6 +1,6 @@
/*
* Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
* Copyright (C) 2016,2020 by Colin Durbridge G4EML
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -28,7 +28,7 @@ public:
void process();
uint8_t write(const uint8_t* data, uint8_t length);
uint8_t write(const uint8_t* data, uint16_t length);
void reset();
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2015,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
*
* This program is free software; you can redistribute it and/or modify
@@ -208,7 +208,7 @@ void CCalDMR::dmrdmo1k()
}
}
uint8_t CCalDMR::write(const uint8_t* data, uint8_t length)
uint8_t CCalDMR::write(const uint8_t* data, uint16_t length)
{
if (length != 1U)
return 4U;
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2015,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
*
* This program is free software; you can redistribute it and/or modify
@@ -41,7 +41,7 @@ public:
void createData1k(uint8_t n);
void createDataDMO1k(uint8_t n);
uint8_t write(const uint8_t* data, uint8_t length);
uint8_t write(const uint8_t* data, uint16_t length);
private:
bool m_transmit;
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2016 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2016,2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -162,7 +162,7 @@ void CCalDStarTX::process()
m_count = (m_count + 1U) % (30U * 21U);
}
uint8_t CCalDStarTX::write(const uint8_t* data, uint8_t length)
uint8_t CCalDStarTX::write(const uint8_t* data, uint16_t length)
{
if (length != 1U)
return 4U;
+2 -2
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -26,7 +26,7 @@ class CCalDStarTX {
public:
CCalDStarTX();
uint8_t write(const uint8_t* data, uint8_t length);
uint8_t write(const uint8_t* data, uint16_t length);
void process();
+127
View File
@@ -0,0 +1,127 @@
/*
* Copyright (C) 2009-2015,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
* Copyright (C) 2020 by Phil Taylor M0VSE
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "CalFM.h"
const struct TONE_TABLE {
uint16_t frequency;
uint16_t length;
q31_t increment;
} TONE_TABLE_DATA[] = {
{2495U, 10U, 223248821},
{2079U, 12U, 186025772},
{1633U, 15U, 146118367},
{1247U, 19U, 111579672},
{1039U, 23U, 93012886},
{956U, 25U, 85541432}};
const uint8_t TONE_TABLE_DATA_LEN = 6U;
CCalFM::CCalFM() :
m_frequency(0),
m_length(0),
m_tone(NULL),
m_level(128 * 12),
m_transmit(false),
m_audioSeq(0),
m_lastState(STATE_IDLE)
{
}
void CCalFM::process()
{
const TONE_TABLE* entry = NULL;
if (m_modemState != m_lastState)
{
switch (m_modemState) {
case STATE_FMCAL10K:
m_frequency = 956U;
break;
case STATE_FMCAL12K:
m_frequency = 1039U;
break;
case STATE_FMCAL15K:
m_frequency = 1247U;
break;
case STATE_FMCAL20K:
m_frequency = 1633U;
break;
case STATE_FMCAL25K:
m_frequency = 2079U;
break;
case STATE_FMCAL30K:
m_frequency = 2495U;
break;
default:
m_frequency = 0U;
break;
}
for (uint8_t i = 0U; i < TONE_TABLE_DATA_LEN; i++) {
if (TONE_TABLE_DATA[i].frequency == m_frequency) {
entry = TONE_TABLE_DATA + i;
break;
}
}
if (entry == NULL)
return;
m_length = entry->length;
delete[] m_tone;
m_tone = new q15_t[m_length];
q31_t arg = 0;
for (uint16_t i = 0U; i < m_length; i++) {
q63_t value = ::arm_sin_q31(arg) * q63_t(m_level);
m_tone[i] = q15_t(__SSAT((value >> 31), 16));
arg += entry->increment;
}
m_lastState=m_modemState;
}
if (m_transmit)
{
uint16_t space = io.getSpace();
while (space > m_length)
{
io.write(m_modemState,m_tone,m_length);
space -= m_length;
}
}
}
uint8_t CCalFM::write(const uint8_t* data, uint16_t length)
{
if (length != 1U)
return 4U;
m_transmit = data[0U] == 1U;
return 0U;
}
+51
View File
@@ -0,0 +1,51 @@
/*
* Copyright (C) 2009-2015,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
* Copyright (C) 2020 by Phil Taylor M0VSE
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(CALFM_H)
#define CALFM_H
#include "Config.h"
class CCalFM {
public:
CCalFM();
void process();
void fm10kcal();
void fm12k5cal();
void fm15kcal();
void fm20kcal();
void fm25kcal();
void fm30kcal();
uint8_t write(const uint8_t* data, uint16_t length);
private:
uint16_t m_frequency;
uint16_t m_length;
q15_t* m_tone;
q15_t m_level;
bool m_transmit;
uint8_t m_audioSeq;
uint8_t m_lastState;
};
#endif
+2 -1
View File
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2018 by Andy Uribe CA6JAU
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -79,7 +80,7 @@ void CCalNXDN::process()
}
}
uint8_t CCalNXDN::write(const uint8_t* data, uint8_t length)
uint8_t CCalNXDN::write(const uint8_t* data, uint16_t length)
{
if (length != 1U)
return 4U;
+2 -1
View File
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2018 by Andy Uribe CA6JAU
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -32,7 +33,7 @@ public:
void process();
uint8_t write(const uint8_t* data, uint8_t length);
uint8_t write(const uint8_t* data, uint16_t length);
private:
bool m_transmit;
+2 -1
View File
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2018 by Andy Uribe CA6JAU
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -82,7 +83,7 @@ void CCalP25::process()
}
}
uint8_t CCalP25::write(const uint8_t* data, uint8_t length)
uint8_t CCalP25::write(const uint8_t* data, uint16_t length)
{
if (length != 1U)
return 4U;
+2 -1
View File
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2018 by Andy Uribe CA6JAU
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -34,7 +35,7 @@ public:
void process();
uint8_t write(const uint8_t* data, uint8_t length);
uint8_t write(const uint8_t* data, uint16_t length);
private:
bool m_transmit;
+2 -1
View File
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2019 by Florian Wolters DF2ET
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -38,7 +39,7 @@ void CCalPOCSAG::process()
pocsagTX.writeByte(0xAAU);
}
uint8_t CCalPOCSAG::write(const uint8_t* data, uint8_t length)
uint8_t CCalPOCSAG::write(const uint8_t* data, uint16_t length)
{
if (length != 1U)
return 4U;
+2 -1
View File
@@ -1,5 +1,6 @@
/*
* Copyright (C) 2019 by Florian Wolters DF2ET
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -32,7 +33,7 @@ public:
void process();
uint8_t write(const uint8_t* data, uint8_t length);
uint8_t write(const uint8_t* data, uint16_t length);
private:
POCSAGCAL m_state;
+8 -2
View File
@@ -35,11 +35,16 @@
// For 19.2 MHz
// #define EXTERNAL_OSC 19200000
// Use a higher baudrate for host communication. Required for FM network !
#define SERIAL_SPEED 115200 //suitable for most older boards (Arduino, Due STM32F1_POG etc). External FM will NOT work with this !
// #define SERIAL_SPEED 230400 // Only works on newer board M4, M7, Teensy. External FM might work with this
// #define SERIAL_SPEED 460800 // Only works on newer board M4, M7, Teensy. External FM should work with this
// Allow the use of the COS line to lockout the modem
// #define USE_COS_AS_LOCKOUT
// Use pins to output the current mode via LEDs
// #define MODE_LEDS
#define MODE_LEDS
// For the original Arduino Due pin layout
// #define ARDUINO_DUE_PAPA
@@ -85,6 +90,7 @@
// #define USE_ALTERNATE_POCSAG_LEDS
// Use the D-Star and YSF LEDs for FM
// #define USE_ALTERNATE_FM_LEDS
#define USE_ALTERNATE_FM_LEDS
#endif
+3 -3
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
@@ -74,7 +74,7 @@ void CDMRDMOTX::process()
m_poLen = m_txDelay;
} else {
for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++)
m_poBuffer[i] = m_fifo.get();
m_fifo.get(m_poBuffer[i]);
for (unsigned int i = 0U; i < 39U; i++)
m_poBuffer[i + DMR_FRAME_LENGTH_BYTES] = PR_FILL[i];
@@ -104,7 +104,7 @@ void CDMRDMOTX::process()
}
}
uint8_t CDMRDMOTX::writeData(const uint8_t* data, uint8_t length)
uint8_t CDMRDMOTX::writeData(const uint8_t* data, uint16_t length)
{
if (length != (DMR_FRAME_LENGTH_BYTES + 1U))
return 4U;
+4 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
*
* This program is free software; you can redistribute it and/or modify
@@ -23,13 +23,13 @@
#include "Config.h"
#include "DMRDefines.h"
#include "SerialRB.h"
#include "RingBuffer.h"
class CDMRDMOTX {
public:
CDMRDMOTX();
uint8_t writeData(const uint8_t* data, uint8_t length);
uint8_t writeData(const uint8_t* data, uint16_t length);
void process();
@@ -38,7 +38,7 @@ public:
uint8_t getSpace() const;
private:
CSerialRB m_fifo;
CRingBuffer<uint8_t> m_fifo;
arm_fir_interpolate_instance_q15 m_modFilter;
q15_t m_modState[16U]; // blockSize + phaseLength - 1, 4 + 9 - 1 plus some spare
uint8_t m_poBuffer[1200U];
+6 -6
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
@@ -144,7 +144,7 @@ void CDMRTX::process()
}
}
uint8_t CDMRTX::writeData1(const uint8_t* data, uint8_t length)
uint8_t CDMRTX::writeData1(const uint8_t* data, uint16_t length)
{
if (length != (DMR_FRAME_LENGTH_BYTES + 1U))
return 4U;
@@ -168,7 +168,7 @@ uint8_t CDMRTX::writeData1(const uint8_t* data, uint8_t length)
return 0U;
}
uint8_t CDMRTX::writeData2(const uint8_t* data, uint8_t length)
uint8_t CDMRTX::writeData2(const uint8_t* data, uint16_t length)
{
if (length != (DMR_FRAME_LENGTH_BYTES + 1U))
return 4U;
@@ -192,7 +192,7 @@ uint8_t CDMRTX::writeData2(const uint8_t* data, uint8_t length)
return 0U;
}
uint8_t CDMRTX::writeShortLC(const uint8_t* data, uint8_t length)
uint8_t CDMRTX::writeShortLC(const uint8_t* data, uint16_t length)
{
if (length != 9U)
return 4U;
@@ -208,7 +208,7 @@ uint8_t CDMRTX::writeShortLC(const uint8_t* data, uint8_t length)
return 0U;
}
uint8_t CDMRTX::writeAbort(const uint8_t* data, uint8_t length)
uint8_t CDMRTX::writeAbort(const uint8_t* data, uint16_t length)
{
if (length != 1U)
return 4U;
@@ -293,7 +293,7 @@ void CDMRTX::createData(uint8_t slotIndex)
{
if (m_fifo[slotIndex].getData() >= DMR_FRAME_LENGTH_BYTES && m_frameCount >= STARTUP_COUNT && m_abortCount[slotIndex] >= ABORT_COUNT) {
for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++) {
m_poBuffer[i] = m_fifo[slotIndex].get();
m_fifo[slotIndex].get(m_poBuffer[i]);
m_markBuffer[i] = MARK_NONE;
}
} else {
+7 -7
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
*
* This program is free software; you can redistribute it and/or modify
@@ -23,7 +23,7 @@
#include "Config.h"
#include "DMRDefines.h"
#include "SerialRB.h"
#include "RingBuffer.h"
enum DMRTXSTATE {
DMRTXSTATE_IDLE,
@@ -38,11 +38,11 @@ class CDMRTX {
public:
CDMRTX();
uint8_t writeData1(const uint8_t* data, uint8_t length);
uint8_t writeData2(const uint8_t* data, uint8_t length);
uint8_t writeData1(const uint8_t* data, uint16_t length);
uint8_t writeData2(const uint8_t* data, uint16_t length);
uint8_t writeShortLC(const uint8_t* data, uint8_t length);
uint8_t writeAbort(const uint8_t* data, uint8_t length);
uint8_t writeShortLC(const uint8_t* data, uint16_t length);
uint8_t writeAbort(const uint8_t* data, uint16_t length);
void setStart(bool start);
void setCal(bool start);
@@ -59,7 +59,7 @@ public:
void setColorCode(uint8_t colorCode);
private:
CSerialRB m_fifo[2U];
CRingBuffer<uint8_t> m_fifo[2U];
arm_fir_interpolate_instance_q15 m_modFilter;
q15_t m_modState[16U]; // blockSize + phaseLength - 1, 4 + 9 - 1 plus some spare
DMRTXSTATE m_state;
+11 -8
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2017,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
@@ -216,12 +216,13 @@ void CDStarTX::process()
for (uint16_t i = 0U; i < m_txDelay; i++)
m_poBuffer[m_poLen++] = BIT_SYNC;
} else {
uint8_t dummy;
// Pop the type byte off
m_buffer.get();
m_buffer.get(dummy);
uint8_t header[DSTAR_HEADER_LENGTH_BYTES];
for (uint8_t i = 0U; i < DSTAR_HEADER_LENGTH_BYTES; i++)
header[i] = m_buffer.get();
m_buffer.get(header[i]);
uint8_t buffer[86U];
txHeader(header, buffer + 2U);
@@ -239,17 +240,19 @@ void CDStarTX::process()
if (type == DSTAR_DATA && m_poLen == 0U) {
// Pop the type byte off
m_buffer.get();
uint8_t dummy;
m_buffer.get(dummy);
for (uint8_t i = 0U; i < DSTAR_DATA_LENGTH_BYTES; i++)
m_poBuffer[m_poLen++] = m_buffer.get();
m_buffer.get(m_poBuffer[m_poLen++]);
m_poPtr = 0U;
}
if (type == DSTAR_EOT && m_poLen == 0U) {
// Pop the type byte off
m_buffer.get();
uint8_t dummy;
m_buffer.get(dummy);
for (uint8_t j = 0U; j < 3U; j++) {
for (uint8_t i = 0U; i < DSTAR_EOT_LENGTH_BYTES; i++)
@@ -277,7 +280,7 @@ void CDStarTX::process()
}
}
uint8_t CDStarTX::writeHeader(const uint8_t* header, uint8_t length)
uint8_t CDStarTX::writeHeader(const uint8_t* header, uint16_t length)
{
if (length != DSTAR_HEADER_LENGTH_BYTES)
return 4U;
@@ -296,7 +299,7 @@ uint8_t CDStarTX::writeHeader(const uint8_t* header, uint8_t length)
return 0U;
}
uint8_t CDStarTX::writeData(const uint8_t* data, uint8_t length)
uint8_t CDStarTX::writeData(const uint8_t* data, uint16_t length)
{
if (length != DSTAR_DATA_LENGTH_BYTES)
return 4U;
+5 -5
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017,2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,14 +21,14 @@
#include "Config.h"
#include "SerialRB.h"
#include "RingBuffer.h"
class CDStarTX {
public:
CDStarTX();
uint8_t writeHeader(const uint8_t* header, uint8_t length);
uint8_t writeData(const uint8_t* data, uint8_t length);
uint8_t writeHeader(const uint8_t* header, uint16_t length);
uint8_t writeData(const uint8_t* data, uint16_t length);
uint8_t writeEOT();
void process();
@@ -38,7 +38,7 @@ public:
uint8_t getSpace() const;
private:
CSerialRB m_buffer;
CRingBuffer<uint8_t> m_buffer;
arm_fir_interpolate_instance_q15 m_modFilter;
q15_t m_modState[20U]; // blockSize + phaseLength - 1, 8 + 9 - 1 plus some spare
uint8_t m_poBuffer[600U];
+794 -137
View File
File diff suppressed because it is too large Load Diff
+69 -19
View File
@@ -27,21 +27,28 @@
#include "FMTimeout.h"
#include "FMKeyer.h"
#include "FMTimer.h"
#include "RingBuffer.h"
#include "FMDirectForm1.h"
#include "FMDownSampler.h"
#include "FMUpSampler.h"
#include "FMNoiseSquelch.h"
enum FM_STATE {
FS_LISTENING,
FS_KERCHUNK,
FS_RELAYING,
FS_RELAYING_WAIT,
FS_TIMEOUT,
FS_TIMEOUT_WAIT,
FS_KERCHUNK_RF,
FS_RELAYING_RF,
FS_RELAYING_WAIT_RF,
FS_TIMEOUT_RF,
FS_TIMEOUT_WAIT_RF,
FS_KERCHUNK_EXT,
FS_RELAYING_EXT,
FS_RELAYING_WAIT_EXT,
FS_TIMEOUT_EXT,
FS_TIMEOUT_WAIT_EXT,
FS_HANG
};
class CFM {
public:
CFM();
@@ -52,19 +59,27 @@ public:
void reset();
uint8_t setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd);
uint8_t setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd, bool callsignAtLatch);
uint8_t setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_t minTime, uint16_t delay, uint8_t level);
uint8_t setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, uint8_t rxBoost, uint8_t maxDev);
uint8_t setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, uint8_t accessMode, bool cosInvert, bool noiseSquelch, uint8_t squelchHighThreshold, uint8_t squelchLowThreshold, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel);
uint8_t setExt(const char* ack, uint8_t audioBoost, uint8_t speed, uint16_t frequency, uint8_t level);
uint8_t getSpace() const;
uint8_t writeData(const uint8_t* data, uint8_t length);
private:
CFMKeyer m_callsign;
CFMKeyer m_rfAck;
CFMKeyer m_extAck;
CFMCTCSSRX m_ctcssRX;
CFMCTCSSTX m_ctcssTX;
CFMNoiseSquelch m_squelch;
CFMTimeout m_timeoutTone;
FM_STATE m_state;
bool m_callsignAtStart;
bool m_callsignAtEnd;
bool m_callsignAtLatch;
CFMTimer m_callsignTimer;
CFMTimer m_timeoutTimer;
CFMTimer m_holdoffTimer;
@@ -72,24 +87,59 @@ private:
CFMTimer m_ackMinTimer;
CFMTimer m_ackDelayTimer;
CFMTimer m_hangTimer;
CFMTimer m_statusTimer;
CFMTimer m_reverseTimer;
bool m_needReverse;
CFMDirectFormI m_filterStage1;
CFMDirectFormI m_filterStage2;
CFMDirectFormI m_filterStage3;
CFMBlanking m_blanking;
bool m_useCOS;
q15_t m_rxBoost;
uint8_t m_accessMode;
bool m_cosInvert;
bool m_noiseSquelch;
q15_t m_rfAudioBoost;
q15_t m_extAudioBoost;
CFMDownSampler m_downSampler;
bool m_extEnabled;
q15_t m_rxLevel;
CRingBuffer<q15_t> m_inputRFRB;
CRingBuffer<q15_t> m_outputRFRB;
CFMUpSampler m_inputExtRB;
void stateMachine(bool validSignal, uint8_t length);
void listeningState(bool validSignal);
void kerchunkState(bool validSignal);
void relayingState(bool validSignal);
void relayingWaitState(bool validSignal);
void timeoutState(bool validSignal);
void timeoutWaitState(bool validSignal);
void hangState(bool validSignal);
void stateMachine(bool validRFSignal, bool validExtSignal);
void duplexStateMachine(bool validRFSignal, bool validExtSignal);
void listeningStateDuplex(bool validRFSignal, bool validExtSignal);
void kerchunkRFStateDuplex(bool validSignal);
void relayingRFStateDuplex(bool validSignal);
void relayingRFWaitStateDuplex(bool validSignal);
void timeoutRFStateDuplex(bool validSignal);
void timeoutRFWaitStateDuplex(bool validSignal);
void kerchunkExtStateDuplex(bool validSignal);
void relayingExtStateDuplex(bool validSignal);
void relayingExtWaitStateDuplex(bool validSignal);
void timeoutExtStateDuplex(bool validSignal);
void timeoutExtWaitStateDuplex(bool validSignal);
void hangStateDuplex(bool validRFSignal, bool validExtSignal);
void simplexStateMachine(bool validRFSignal, bool validExtSignal);
void listeningStateSimplex(bool validRFSignal, bool validExtSignal);
void relayingRFStateSimplex(bool validSignal);
void relayingRFWaitStateSimplex(bool validSignal);
void timeoutRFStateSimplex(bool validSignal);
void timeoutRFWaitStateSimplex(bool validSignal);
void relayingExtStateSimplex(bool validSignal);
void relayingExtWaitStateSimplex(bool validSignal);
void timeoutExtStateSimplex(bool validSignal);
void timeoutExtWaitStateSimplex(bool validSignal);
void clock(uint8_t length);
void sendCallsign();
void beginRelaying();
void insertDelay(uint16_t ms);
void insertSilence(uint16_t ms);
};
#endif
+23 -20
View File
@@ -82,15 +82,16 @@ const uint16_t N = 24000U / 4U;
CFMCTCSSRX::CFMCTCSSRX() :
m_coeffDivTwo(0),
m_threshold(0),
m_highThreshold(0),
m_lowThreshold(0),
m_count(0U),
m_q0(0),
m_q1(0),
m_result(CTS_NONE)
m_state(false)
{
}
uint8_t CFMCTCSSRX::setParams(uint8_t frequency, uint8_t threshold)
uint8_t CFMCTCSSRX::setParams(uint8_t frequency, uint8_t highThreshold, uint8_t lowThreshold)
{
m_coeffDivTwo = 0;
@@ -104,14 +105,16 @@ uint8_t CFMCTCSSRX::setParams(uint8_t frequency, uint8_t threshold)
if (m_coeffDivTwo == 0)
return 4U;
m_threshold = q31_t(threshold);
m_highThreshold = q31_t(highThreshold);
m_lowThreshold = q31_t(lowThreshold);
return 0U;
}
CTCSSState CFMCTCSSRX::process(q15_t sample)
bool CFMCTCSSRX::process(q15_t sample)
{
m_result = m_result & (~CTS_READY);
//get more dynamic into the decoder by multiplying the sample by 1.5
q31_t sample31 = q31_t(sample) + (q31_t(sample) >> 1);
q31_t q2 = m_q1;
m_q1 = m_q0;
@@ -122,7 +125,7 @@ CTCSSState CFMCTCSSRX::process(q15_t sample)
q31_t t3 = t2 * 2;
// m_q0 = m_coeffDivTwo * m_q1 * 2 - q2 + sample
m_q0 = t3 - q2 + q31_t(sample);
m_q0 = t3 - q2 + sample31;
m_count++;
if (m_count == N) {
@@ -144,29 +147,29 @@ CTCSSState CFMCTCSSRX::process(q15_t sample)
// value = m_q0 * m_q0 + m_q1 * m_q1 - m_q0 * m_q1 * m_coeffDivTwo * 2
q31_t value = t2 + t4 - t9;
m_result = m_result | CTS_READY;
if (value >= m_threshold)
m_result = m_result | CTS_VALID;
else
m_result = m_result & ~CTS_VALID;
bool previousState = m_state;
q31_t threshold = m_highThreshold;
if (previousState)
threshold = m_lowThreshold;
m_state = value >= threshold;
if (previousState != m_state)
DEBUG4("CTCSS Value / Threshold / Valid", value, threshold, m_state);
m_count = 0U;
m_q0 = 0;
m_q1 = 0;
}
return m_result;
}
CTCSSState CFMCTCSSRX::getState()
{
return m_result;
return m_state;
}
void CFMCTCSSRX::reset()
{
m_q0 = 0;
m_q1 = 0;
m_result = CTS_NONE;
m_count = 0U;
m_state = false;
m_count = 0U;
}
+9 -38
View File
@@ -21,53 +21,24 @@
#include "Config.h"
enum CTCSSState
{
CTS_NONE = 0,
CTS_READY = 1,
CTS_VALID = 2,
CTS_READY_VALID = CTS_READY | CTS_VALID
};
inline CTCSSState operator|(CTCSSState a, CTCSSState b)
{
return static_cast<CTCSSState>(static_cast<uint8_t>(a) | static_cast<uint8_t>(b));
}
inline CTCSSState operator&(CTCSSState a, CTCSSState b)
{
return static_cast<CTCSSState>(static_cast<uint8_t>(a) & static_cast<uint8_t>(b));
}
inline CTCSSState operator~(CTCSSState a)
{
return static_cast<CTCSSState>(~(static_cast<uint8_t>(a)));
}
#define CTCSS_READY(a) ((a & CTS_READY) != 0)
#define CTCSS_NOT_READY(a) ((a & CTS_READY) == 0)
#define CTCSS_VALID(a) ((a & CTS_VALID) != 0)
#define CTCSS_NOT_VALID(a) ((a & CTS_VALID) == 0)
class CFMCTCSSRX {
public:
CFMCTCSSRX();
uint8_t setParams(uint8_t frequency, uint8_t threshold);
uint8_t setParams(uint8_t frequency, uint8_t highThreshold, uint8_t lowThreshold);
CTCSSState process(q15_t samples);
CTCSSState getState();
bool process(q15_t sample);
void reset();
private:
q63_t m_coeffDivTwo;
q31_t m_threshold;
uint16_t m_count;
q31_t m_q0;
q31_t m_q1;
CTCSSState m_result;
q63_t m_coeffDivTwo;
q31_t m_highThreshold;
q31_t m_lowThreshold;
uint16_t m_count;
q31_t m_q0;
q31_t m_q1;
bool m_state;
};
#endif
+60 -58
View File
@@ -23,59 +23,58 @@
const struct TX_CTCSS_TABLE {
uint8_t frequency;
uint16_t length;
q15_t increment;
q31_t increment;
} TX_CTCSS_TABLE_DATA[] = {
{ 67U, 358U, 92},
{ 69U, 346U, 95},
{ 71U, 334U, 99},
{ 74U, 323U, 102},
{ 77U, 312U, 106},
{ 79U, 301U, 109},
{ 82U, 291U, 113},
{ 85U, 281U, 117},
{ 88U, 271U, 121},
{ 91U, 262U, 125},
{ 94U, 253U, 130},
{ 97U, 246U, 133},
{100U, 240U, 137},
{103U, 232U, 142},
{107U, 224U, 147},
{110U, 216U, 152},
{114U, 209U, 157},
{118U, 202U, 163},
{123U, 195U, 168},
{127U, 189U, 174},
{131U, 182U, 180},
{136U, 176U, 187},
{141U, 170U, 193},
{146U, 164U, 200},
{151U, 159U, 207},
{156U, 153U, 214},
{159U, 150U, 219},
{162U, 148U, 222},
{165U, 145U, 226},
{167U, 143U, 230},
{171U, 140U, 234},
{173U, 138U, 238},
{177U, 135U, 243},
{179U, 133U, 246},
{183U, 131U, 251},
{186U, 129U, 255},
{189U, 126U, 260},
{192U, 124U, 264},
{196U, 122U, 269},
{199U, 120U, 273},
{203U, 118U, 278},
{206U, 116U, 282},
{210U, 114U, 288},
{218U, 110U, 298},
{225U, 106U, 309},
{229U, 105U, 313},
{233U, 103U, 319},
{241U, 99U, 331},
{250U, 96U, 342},
{254U, 94U, 347}
};
{ 67U, 358U, 5995059},
{ 69U, 346U, 6200860},
{ 71U, 334U, 6433504},
{ 74U, 323U, 6657200},
{ 77U, 312U, 6889844},
{ 79U, 301U, 7131436},
{ 82U, 291U, 7381976},
{ 85U, 281U, 7641463},
{ 88U, 271U, 7918846},
{ 91U, 262U, 8187282},
{ 94U, 253U, 8482561},
{ 97U, 246U, 8715205},
{100U, 240U, 8947849},
{103U, 232U, 9261024},
{107U, 224U, 9592094},
{110U, 216U, 9923165},
{114U, 209U, 10272131},
{118U, 202U, 10630045},
{123U, 195U, 11005854},
{127U, 189U, 11390612},
{131U, 182U, 11793265},
{136U, 176U, 12213814},
{141U, 170U, 12643310},
{146U, 164U, 13081755},
{151U, 159U, 13547043},
{156U, 153U, 14021279},
{159U, 150U, 14298662},
{162U, 148U, 14513411},
{165U, 145U, 14808690},
{167U, 143U, 15023438},
{171U, 140U, 15327665},
{173U, 138U, 15551361},
{177U, 135U, 15864536},
{179U, 133U, 16097180},
{183U, 131U, 16419303},
{186U, 129U, 16660894},
{189U, 126U, 16991965},
{192U, 124U, 17251452},
{196U, 122U, 17591471},
{199U, 120U, 17850958},
{203U, 118U, 18208872},
{206U, 116U, 18477308},
{210U, 114U, 18853117},
{218U, 110U, 19515258},
{225U, 106U, 20195295},
{229U, 105U, 20499521},
{233U, 103U, 20902175},
{241U, 99U, 21635898},
{250U, 96U, 22396465},
{254U, 94U, 22736484}};
const uint8_t CTCSS_TABLE_DATA_LEN = 50U;
@@ -105,10 +104,10 @@ uint8_t CFMCTCSSTX::setParams(uint8_t frequency, uint8_t level)
delete[] m_values;
m_values = new q15_t[m_length];
q15_t arg = 0;
q31_t arg = 0;
for (uint16_t i = 0U; i < m_length; i++) {
q31_t value = ::arm_sin_q15(arg) * q15_t(level * 13);
m_values[i] = q15_t(__SSAT((value >> 15), 16));
q63_t value = ::arm_sin_q31(arg) * q63_t(level * 13);
m_values[i] = q15_t(__SSAT((value >> 31), 16));
arg += entry->increment;
}
@@ -116,11 +115,14 @@ uint8_t CFMCTCSSTX::setParams(uint8_t frequency, uint8_t level)
return 0U;
}
q15_t CFMCTCSSTX::getAudio()
q15_t CFMCTCSSTX::getAudio(bool reverse)
{
q15_t sample = m_values[m_n++];
if(m_n >= m_length)
if (m_n >= m_length)
m_n = 0U;
return sample;
if (reverse)
return -sample;
else
return sample;
}
+1 -1
View File
@@ -27,7 +27,7 @@ public:
uint8_t setParams(uint8_t frequency, uint8_t level);
q15_t getAudio();
q15_t getAudio(bool reverse);
private:
q15_t* m_values;
+2 -2
View File
@@ -29,7 +29,7 @@ THE SOFTWARE.
// based on https://raw.githubusercontent.com/berndporr/iir_fixed_point/master/DirectFormI.h
#include "Globals.h"
#include <cstdint>
#ifndef DIRECTFORMI_H_
#define DIRECTFORMI_H_
@@ -79,7 +79,7 @@ public:
inline q15_t filter(const q15_t in)
{
// calculate the output
register q31_t out_upscaled = c_b0 * in //F4FXL puting stauration here made everything quiet, not sure why
register q31_t out_upscaled = c_b0 * in
+ c_b1 * m_x1
+ c_b2 * m_x2
- c_a1 * m_y1
+74
View File
@@ -0,0 +1,74 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
* Copyright (C) 2020 by Geoffrey Merck F4FXL - KC3FRA
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "FMDownSampler.h"
CFMDownSampler::CFMDownSampler(uint16_t length) :
m_ringBuffer(length),
m_samplePack(0U),
m_samplePackPointer(NULL),
m_sampleIndex(0U)
{
m_samplePackPointer = (uint8_t*)&m_samplePack;
}
void CFMDownSampler::addSample(q15_t sample)
{
uint32_t usample = uint32_t(int32_t(sample) + 2048);
//only take one of three samples
switch(m_sampleIndex){
case 0:
m_samplePack = usample << 12;
break;
case 3:{
m_samplePack |= usample;
//we did not use MSB; skip it
TSamplePairPack pair{m_samplePackPointer[0U], m_samplePackPointer[1U], m_samplePackPointer[2U]};
m_ringBuffer.put(pair);
m_samplePack = 0U;//reset the sample pack
}
break;
default:
//Just skip this sample
break;
}
m_sampleIndex++;
if (m_sampleIndex >= 6U)//did we pack two samples ?
m_sampleIndex = 0U;
}
bool CFMDownSampler::getPackedData(TSamplePairPack& data)
{
return m_ringBuffer.get(data);
}
uint16_t CFMDownSampler::getData()
{
return m_ringBuffer.getData();
}
void CFMDownSampler::reset()
{
m_sampleIndex = 0U;
}
+47
View File
@@ -0,0 +1,47 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
* Copyright (C) 2020 by Geoffrey Merck F4FXL - KC3FRA
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(FMDOWNSAMPLER_H)
#define FMDOWNSAMPLER_H
#include "Config.h"
#include "RingBuffer.h"
#include "FMSamplePairPack.h"
class CFMDownSampler {
public:
CFMDownSampler(uint16_t length);
void addSample(q15_t sample);
bool getPackedData(TSamplePairPack& data);
uint16_t getData();
void reset();
private:
CRingBuffer<TSamplePairPack> m_ringBuffer;
uint32_t m_samplePack;
uint8_t* m_samplePackPointer;
uint8_t m_sampleIndex;
};
#endif
+6
View File
@@ -66,6 +66,7 @@ const struct {
{',', 0xEEAEE000U, 22U},
{'-', 0xEAAE0000U, 18U},
{'=', 0xEAB80000U, 16U},
{'.', 0xBAEB8000U, 20U},
{' ', 0x00000000U, 4U},
{0U, 0x00000000U, 0U}
};
@@ -204,6 +205,11 @@ void CFMKeyer::stop()
m_audioPos = 0U;
}
bool CFMKeyer::isWanted() const
{
return m_wanted;
}
bool CFMKeyer::isRunning() const
{
return m_poPos > 0U || m_dotPos > 0U || m_audioPos > 0U;
+2
View File
@@ -35,6 +35,8 @@ public:
bool isRunning() const;
bool isWanted() const;
private:
bool m_wanted;
uint8_t m_poBuffer[1000U];
+127
View File
@@ -0,0 +1,127 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "FMNoiseSquelch.h"
// 4500Hz centre frequency
const q31_t COEFF_DIV_TWO = 821806413;
// 400Hz bandwidth
const uint16_t N = 24000U / 400U;
CFMNoiseSquelch::CFMNoiseSquelch() :
m_highThreshold(0),
m_lowThreshold(0),
m_count(0U),
m_q0(0),
m_q1(0),
m_state(false),
m_validCount(0U)
{
}
void CFMNoiseSquelch::setParams(uint8_t highThreshold, uint8_t lowThreshold)
{
m_highThreshold = q31_t(highThreshold);
m_lowThreshold = q31_t(lowThreshold);
}
bool CFMNoiseSquelch::process(q15_t sample)
{
//get more dynamic into the decoder by multiplying the sample by 64
q31_t sample31 = q31_t(sample) << 6; //+ (q31_t(sample) >> 1);
q31_t q2 = m_q1;
m_q1 = m_q0;
// Q31 multiplication, t3 = m_coeffDivTwo * 2 * m_q1
q63_t t1 = COEFF_DIV_TWO * m_q1;
q31_t t2 = __SSAT((t1 >> 31), 31);
q31_t t3 = t2 * 2;
// m_q0 = m_coeffDivTwo * m_q1 * 2 - q2 + sample
m_q0 = t3 - q2 + sample31;
m_count++;
if (m_count == N) {
// Q31 multiplication, t2 = m_q0 * m_q0
q63_t t1 = q63_t(m_q0) * q63_t(m_q0);
q31_t t2 = __SSAT((t1 >> 31), 31);
// Q31 multiplication, t4 = m_q0 * m_q0
q63_t t3 = q63_t(m_q1) * q63_t(m_q1);
q31_t t4 = __SSAT((t3 >> 31), 31);
// Q31 multiplication, t9 = m_q0 * m_q1 * m_coeffDivTwo * 2
q63_t t5 = q63_t(m_q0) * q63_t(m_q1);
q31_t t6 = __SSAT((t5 >> 31), 31);
q63_t t7 = t6 * COEFF_DIV_TWO;
q31_t t8 = __SSAT((t7 >> 31), 31);
q31_t t9 = t8 * 2;
// value = m_q0 * m_q0 + m_q1 * m_q1 - m_q0 * m_q1 * m_coeffDivTwo * 2
q31_t value = t2 + t4 - t9;
bool previousState = m_state;
q31_t threshold = m_highThreshold;
if (previousState)
threshold = m_lowThreshold;
if (!m_state) {
if (value < threshold)
m_validCount++;
else
m_validCount = 0U;
}
if (m_state) {
if (value >= threshold)
m_invalidCount++;
else
m_invalidCount = 0U;
}
m_state = m_validCount >= 10U && m_invalidCount < 10U;
if(previousState && !m_state)
m_invalidCount = 0U;
if (previousState != m_state) {
DEBUG4("Noise Squelch Value / Threshold / Valid", value, threshold, m_state);
DEBUG3("Valid Count / Invalid Count", m_validCount, m_invalidCount);
}
m_count = 0U;
m_q0 = 0;
m_q1 = 0;
}
return m_state;
}
void CFMNoiseSquelch::reset()
{
m_q0 = 0;
m_q1 = 0;
m_state = false;
m_count = 0U;
}
+45
View File
@@ -0,0 +1,45 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(FMNOISESQUELCH_H)
#define FMNOISESQUELCH_H
#include "Config.h"
class CFMNoiseSquelch {
public:
CFMNoiseSquelch();
void setParams(uint8_t highThreshold, uint8_t lowThreshold);
bool process(q15_t sample);
void reset();
private:
q31_t m_highThreshold;
q31_t m_lowThreshold;
uint16_t m_count;
q31_t m_q0;
q31_t m_q1;
bool m_state;
uint8_t m_validCount;
uint8_t m_invalidCount;
};
#endif
+29
View File
@@ -0,0 +1,29 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
* Copyright (C) 2020 by Geoffrey Merck F4FXL - KC3FRA
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(TSAMPLEPACK_H)
#define TSAMPLEPACK_H
struct TSamplePairPack {
uint8_t byte0;
uint8_t byte1;
uint8_t byte2;
};
#endif
+5 -7
View File
@@ -36,24 +36,22 @@ m_n(0U)
void CFMTimeout::setParams(uint8_t level)
{
m_level = q15_t(level * 128);
m_level = q15_t(level * 5);
}
q15_t CFMTimeout::getAudio()
{
q15_t sample = 0U;
q15_t sample = 0;
if (!m_running)
return sample;
if (m_pos > 12000U) {
q31_t sample = BUSY_AUDIO[m_n] * m_level;
sample = q15_t(__SSAT((sample >> 15), 16));
if (m_pos >= 12000U) {
q31_t sample31 = BUSY_AUDIO[m_n] * m_level;
sample = q15_t(__SSAT((sample31 >> 15), 16));
m_n++;
if (m_n >= BUSY_AUDIO_LEN)
m_n = 0U;
} else {
sample = 0U;
}
m_pos++;
+97
View File
@@ -0,0 +1,97 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
* Copyright (C) 2020 by Geoffrey Merck F4FXL - KC3FRA
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "FMUpSampler.h"
const uint32_t FM_UPSAMPLE_MASK = 0x00000FFFU;
CFMUpSampler::CFMUpSampler() :
m_upSampleIndex(0),
m_pack(0U),
m_packPointer(NULL),
m_samples(3600U), //300ms of 12 bit 8kHz audio
m_running(false)
{
m_packPointer = (uint8_t*)&m_pack;
}
void CFMUpSampler::reset()
{
m_upSampleIndex = 0U;
m_pack = 0U;
m_samples.reset();
m_running = false;
}
void CFMUpSampler::addData(const uint8_t* data, uint16_t length)
{
TSamplePairPack* packPointer = (TSamplePairPack*)data;
TSamplePairPack* packPointerEnd = packPointer + (length / 3U);
while(packPointer != packPointerEnd) {
m_samples.put(*packPointer);
packPointer++;
}
if(!m_running)
m_running = m_samples.getData() > 300U;//75ms of audio
}
bool CFMUpSampler::getSample(q15_t& sample)
{
if(!m_running)
return false;
switch (m_upSampleIndex)
{
case 0: {
TSamplePairPack pairPack;
if(!m_samples.get(pairPack)) {
m_running = false;
return false;
}
m_pack = 0U;
m_packPointer = (uint8_t*)&m_pack;
m_packPointer[0U] = pairPack.byte0;
m_packPointer[1U] = pairPack.byte1;
m_packPointer[2U] = pairPack.byte2;
sample = q15_t(m_pack >> 12) - 2048;
break;
}
case 3:
sample = q15_t(m_pack & FM_UPSAMPLE_MASK) - 2048;
break;
default:
sample = 0;
break;
}
m_upSampleIndex++;
if(m_upSampleIndex >= 6U)
m_upSampleIndex = 0U;
return true;
}
uint16_t CFMUpSampler::getSpace() const
{
//return available space in bytes
return m_samples.getSpace() * sizeof(TSamplePairPack);
}
+48
View File
@@ -0,0 +1,48 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
* Copyright (C) 2020 by Geoffrey Merck F4FXL - KC3FRA
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(FMUPSAMPLER_H)
#define FMUPSAMPLER_H
#include "Config.h"
#include "RingBuffer.h"
#include "FMSamplePairPack.h"
class CFMUpSampler {
public:
CFMUpSampler();
void reset();
void addData(const uint8_t* data, uint16_t length);
bool getSample(q15_t& sample);
uint16_t getSpace() const;
private:
uint8_t m_upSampleIndex;
uint32_t m_pack;
uint8_t * m_packPointer;
CRingBuffer<TSamplePairPack> m_samples;
bool m_running;
};
#endif
+18 -2
View File
@@ -28,6 +28,7 @@
#include "STM32Utils.h"
#else
#include <Arduino.h>
#undef PI //Undefine PI to get rid of annoying warning as it is also defined in arm_math.h.
#endif
#if defined(__SAM3X8E__) || defined(STM32F105xC)
@@ -51,6 +52,7 @@ enum MMDVM_STATE {
STATE_NXDN = 5,
STATE_POCSAG = 6,
STATE_FM = 10,
STATE_AX25 = 11,
// Dummy states start at 90
STATE_NXDNCAL1K = 91,
@@ -63,7 +65,13 @@ enum MMDVM_STATE {
STATE_DMRCAL = 98,
STATE_DSTARCAL = 99,
STATE_INTCAL = 100,
STATE_POCSAGCAL = 101
STATE_POCSAGCAL = 101,
STATE_FMCAL10K = 102,
STATE_FMCAL12K = 103,
STATE_FMCAL15K = 104,
STATE_FMCAL20K = 105,
STATE_FMCAL25K = 106,
STATE_FMCAL30K = 107
};
#include "SerialPort.h"
@@ -83,12 +91,15 @@ enum MMDVM_STATE {
#include "POCSAGTX.h"
#include "CalDStarRX.h"
#include "CalDStarTX.h"
#include "CalFM.h"
#include "CalDMR.h"
#include "CalP25.h"
#include "CalNXDN.h"
#include "CalPOCSAG.h"
#include "CalRSSI.h"
#include "CWIdTX.h"
#include "AX25RX.h"
#include "AX25TX.h"
#include "Debug.h"
#include "IO.h"
#include "FM.h"
@@ -117,6 +128,7 @@ extern bool m_p25Enable;
extern bool m_nxdnEnable;
extern bool m_pocsagEnable;
extern bool m_fmEnable;
extern bool m_ax25Enable;
extern bool m_duplex;
@@ -147,11 +159,14 @@ extern CNXDNTX nxdnTX;
extern CPOCSAGTX pocsagTX;
extern CFM fm;
extern CFM fm;
extern CAX25RX ax25RX;
extern CAX25TX ax25TX;
extern CCalDStarRX calDStarRX;
extern CCalDStarTX calDStarTX;
extern CCalDMR calDMR;
extern CCalFM calFM;
extern CCalP25 calP25;
extern CCalNXDN calNXDN;
extern CCalPOCSAG calPOCSAG;
@@ -160,3 +175,4 @@ extern CCalRSSI calRSSI;
extern CCWIdTX cwIdTX;
#endif
+74 -23
View File
@@ -81,8 +81,10 @@ m_p25TXLevel(128 * 128),
m_nxdnTXLevel(128 * 128),
m_pocsagTXLevel(128 * 128),
m_fmTXLevel(128 * 128),
m_ax25TXLevel(128 * 128),
m_rxDCOffset(DC_OFFSET),
m_txDCOffset(DC_OFFSET),
m_useCOSAsLockout(false),
m_ledCount(0U),
m_ledValue(true),
m_detect(false),
@@ -132,7 +134,7 @@ void CIO::selfTest()
{
bool ledValue = false;
for (uint8_t i = 0; i < 6; i++) {
for (uint8_t i = 0U; i < 6U; i++) {
ledValue = !ledValue;
// We exclude PTT to avoid trigger the transmitter
@@ -143,21 +145,34 @@ void CIO::selfTest()
setDMRInt(ledValue);
setYSFInt(ledValue);
setP25Int(ledValue);
#if !defined(USE_ALTERNATE_NXDN_LEDS)
setNXDNInt(ledValue);
#endif
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
setPOCSAGInt(ledValue);
#endif
#if !defined(USE_ALTERNATE_FM_LEDS)
setFMInt(ledValue);
#endif
#endif
delayInt(250);
}
#if defined(MODE_LEDS)
setDStarInt(true);
setDStarInt(false);
setDMRInt(false);
setYSFInt(false);
setP25Int(false);
#if !defined(USE_ALTERNATE_NXDN_LEDS)
setNXDNInt(false);
#endif
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
setPOCSAGInt(false);
#endif
#if !defined(USE_ALTERNATE_FM_LEDS)
setFMInt(false);
#endif
setDStarInt(true);
delayInt(250);
setDMRInt(true);
@@ -219,7 +234,7 @@ void CIO::start()
m_started = true;
setMode();
setMode(STATE_IDLE);
}
void CIO::process()
@@ -231,8 +246,7 @@ void CIO::process()
if (m_modemState == STATE_DSTAR || m_modemState == STATE_DMR || m_modemState == STATE_YSF || m_modemState == STATE_P25 || m_modemState == STATE_NXDN || m_modemState == STATE_POCSAG) {
if (m_modemState == STATE_DMR && m_tx)
dmrTX.setStart(false);
m_modemState = STATE_IDLE;
setMode();
setMode(STATE_IDLE);
}
m_watchdog = 0U;
@@ -256,14 +270,14 @@ void CIO::process()
return;
}
#if defined(USE_COS_AS_LOCKOUT)
m_lockout = getCOSInt();
#endif
if (m_useCOSAsLockout)
m_lockout = getCOSInt();
// Switch off the transmitter if needed
if (m_txBuffer.getData() == 0U && m_tx) {
m_tx = false;
setPTTInt(m_pttInvert ? true : false);
DEBUG1("TX OFF");
}
if (m_rxBuffer.getData() >= RX_BLOCK_SIZE) {
@@ -272,15 +286,16 @@ void CIO::process()
uint16_t rssi[RX_BLOCK_SIZE];
for (uint16_t i = 0U; i < RX_BLOCK_SIZE; i++) {
uint16_t sample;
m_rxBuffer.get(sample, control[i]);
TSample sample;
m_rxBuffer.get(sample);
control[i] = sample.control;
m_rssiBuffer.get(rssi[i]);
// Detect ADC overflow
if (m_detect && (sample == 0U || sample == 4095U))
if (m_detect && (sample.sample == 0U || sample.sample == 4095U))
m_adcOverflow++;
q15_t res1 = q15_t(sample) - m_rxDCOffset;
q15_t res1 = q15_t(sample.sample) - m_rxDCOffset;
q31_t res2 = res1 * m_rxLevel;
samples[i] = q15_t(__SSAT((res2 >> 15), 16));
}
@@ -362,6 +377,14 @@ void CIO::process()
fm.samples(cos, dcSamples, RX_BLOCK_SIZE);
#else
fm.samples(cos, samples, RX_BLOCK_SIZE);
#endif
}
if (m_ax25Enable) {
#if defined(USE_DCBLOCKER)
ax25RX.samples(dcSamples, RX_BLOCK_SIZE);
#else
ax25RX.samples(samples, RX_BLOCK_SIZE);
#endif
}
} else if (m_modemState == STATE_DSTAR) {
@@ -426,8 +449,12 @@ void CIO::process()
bool cos = getCOSInt();
#if defined(USE_DCBLOCKER)
fm.samples(cos, dcSamples, RX_BLOCK_SIZE);
if (m_ax25Enable)
ax25RX.samples(dcSamples, RX_BLOCK_SIZE);
#else
fm.samples(cos, samples, RX_BLOCK_SIZE);
if (m_ax25Enable)
ax25RX.samples(samples, RX_BLOCK_SIZE);
#endif
} else if (m_modemState == STATE_DSTARCAL) {
q15_t GMSKVals[RX_BLOCK_SIZE];
@@ -452,6 +479,7 @@ void CIO::write(MMDVM_STATE mode, q15_t* samples, uint16_t length, const uint8_t
if (!m_tx) {
m_tx = true;
setPTTInt(m_pttInvert ? false : true);
DEBUG1("TX ON");
}
q15_t txLevel = 0;
@@ -477,6 +505,9 @@ void CIO::write(MMDVM_STATE mode, q15_t* samples, uint16_t length, const uint8_t
case STATE_FM:
txLevel = m_fmTXLevel;
break;
case STATE_AX25:
txLevel = m_ax25TXLevel;
break;
default:
txLevel = m_cwIdTXLevel;
break;
@@ -492,9 +523,9 @@ void CIO::write(MMDVM_STATE mode, q15_t* samples, uint16_t length, const uint8_t
m_dacOverflow++;
if (control == NULL)
m_txBuffer.put(res3, MARK_NONE);
m_txBuffer.put({res3, MARK_NONE});
else
m_txBuffer.put(res3, control[i]);
m_txBuffer.put({res3, control[i]});
}
}
@@ -516,20 +547,37 @@ void CIO::setADCDetection(bool detect)
m_detect = detect;
}
void CIO::setMode()
void CIO::setMode(MMDVM_STATE state)
{
if (state == m_modemState)
return;
#if defined(MODE_LEDS)
setDStarInt(m_modemState == STATE_DSTAR);
setDMRInt(m_modemState == STATE_DMR);
setYSFInt(m_modemState == STATE_YSF);
setP25Int(m_modemState == STATE_P25);
setNXDNInt(m_modemState == STATE_NXDN);
setPOCSAGInt(m_modemState == STATE_POCSAG);
setFMInt(m_modemState == STATE_FM);
switch (m_modemState) {
case STATE_DSTAR: setDStarInt(false); break;
case STATE_DMR: setDMRInt(false); break;
case STATE_YSF: setYSFInt(false); break;
case STATE_P25: setP25Int(false); break;
case STATE_NXDN: setNXDNInt(false); break;
case STATE_POCSAG: setPOCSAGInt(false); break;
case STATE_FM: setFMInt(false); break;
}
switch (state) {
case STATE_DSTAR: setDStarInt(true); break;
case STATE_DMR: setDMRInt(true); break;
case STATE_YSF: setYSFInt(true); break;
case STATE_P25: setP25Int(true); break;
case STATE_NXDN: setNXDNInt(true); break;
case STATE_POCSAG: setPOCSAGInt(true); break;
case STATE_FM: setFMInt(true); break;
}
#endif
m_modemState = state;
}
void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset)
void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, uint8_t ax25TXLevel, int16_t txDCOffset, int16_t rxDCOffset, bool useCOSAsLockout)
{
m_pttInvert = pttInvert;
@@ -542,9 +590,12 @@ void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rx
m_nxdnTXLevel = q15_t(nxdnTXLevel * 128);
m_pocsagTXLevel = q15_t(pocsagTXLevel * 128);
m_fmTXLevel = q15_t(fmTXLevel * 128);
m_ax25TXLevel = q15_t(ax25TXLevel * 128);
m_rxDCOffset = DC_OFFSET + rxDCOffset;
m_txDCOffset = DC_OFFSET + txDCOffset;
m_useCOSAsLockout = useCOSAsLockout;
if (rxInvert)
m_rxLevel = -m_rxLevel;
+16 -9
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,8 +21,12 @@
#include "Globals.h"
#include "SampleRB.h"
#include "RSSIRB.h"
#include "RingBuffer.h"
struct TSample {
volatile uint16_t sample;
volatile uint8_t control;
};
class CIO {
public:
@@ -38,11 +42,11 @@ public:
void setDecode(bool dcd);
void setADCDetection(bool detect);
void setMode();
void setMode(MMDVM_STATE state);
void interrupt();
void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset);
void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, uint8_t ax25TXLevel, int16_t txDCOffset, int16_t rxDCOffset, bool useCOSAsLockout);
void getOverflow(bool& adcOverflow, bool& dacOverflow);
@@ -57,11 +61,11 @@ public:
void selfTest();
private:
bool m_started;
bool m_started;
CSampleRB m_rxBuffer;
CSampleRB m_txBuffer;
CRSSIRB m_rssiBuffer;
CRingBuffer<TSample> m_rxBuffer;
CRingBuffer<TSample> m_txBuffer;
CRingBuffer<uint16_t> m_rssiBuffer;
arm_biquad_casd_df1_inst_q31 m_dcFilter;
q31_t m_dcState[4];
@@ -87,10 +91,13 @@ private:
q15_t m_nxdnTXLevel;
q15_t m_pocsagTXLevel;
q15_t m_fmTXLevel;
q15_t m_ax25TXLevel;
uint16_t m_rxDCOffset;
uint16_t m_txDCOffset;
bool m_useCOSAsLockout;
uint32_t m_ledCount;
bool m_ledValue;
+5 -6
View File
@@ -185,14 +185,13 @@ void CIO::startInt()
void CIO::interrupt()
{
if ((ADC->ADC_ISR & ADC_ISR_EOC_Chan) == ADC_ISR_EOC_Chan) { // Ensure there was an End-of-Conversion and we read the ISR reg
uint8_t control = MARK_NONE;
uint16_t sample = DC_OFFSET;
TSample sample = {DC_OFFSET, MARK_NONE};
m_txBuffer.get(sample, control);
DACC->DACC_CDR = sample;
m_txBuffer.get(sample);
DACC->DACC_CDR = sample.sample;
sample = ADC->ADC_CDR[ADC_CDR_Chan];
m_rxBuffer.put(sample, control);
sample.sample = ADC->ADC_CDR[ADC_CDR_Chan];
m_rxBuffer.put(sample);
#if defined(SEND_RSSI_DATA)
m_rssiBuffer.put(ADC->ADC_CDR[RSSI_CDR_Chan]);
+73
View File
@@ -0,0 +1,73 @@
/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _IO_PINS_H
#define _IO_PINS_H
#if !defined(CONFIG_H)
#error "Requires Config.h to be included first!"
#endif
#if defined(STM32F4_RPT_HAT_TGO)
#include "pins/pins_f4_rpt_tgo.h"
#elif defined(STM32F4_DISCOVERY)
#include "pins/pins_f4_discovery.h"
#elif defined(STM32F4_PI)
#include "pins/pins_f4_pi.h"
#elif defined(STM32F722_PI)
#include "pins/pins_f7_pi.h"
#elif defined(STM32F4_F4M)
#include "pins/pins_f4_f4m.h"
#elif defined(STM32F722_F7M)
#include "pins/pins_f7_f7m.h"
#elif defined(STM32F722_RPT_HAT)
#include "pins/pins_f7_rpt_hat.h"
#elif defined(STM32F4_NUCLEO)
#if defined(STM32F4_NUCLEO_MORPHO_HEADER)
#include "pins/pins_f4_nucleo_morpho.h"
#elif defined(STM32F4_NUCLEO_ARDUINO_HEADER)
#include "pins/pins_f4_nucleo_arduino.h"
#else
#error "Either STM32F4_NUCLEO_MORPHO_HEADER or STM32F4_NUCLEO_ARDUINO_HEADER need to be defined"
#endif
#elif defined(STM32F7_NUCLEO)
#include "pins/pins_f7_nucleo.h"
#elif defined(STM32F4_DVM)
#include "pins/pins_f4_stm32dvm_v3.h"
#elif defined(DRCC_DVM_NQF)
#include "pins/pins_f4_drcc_nqf.h"
#elif defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
#include "pins/pins_f4_stm32eda.h"
#else
#error "A valid board type macro need to be defined."
#endif
#endif //#ifndef _IO_PINS_H
+59 -1032
View File
File diff suppressed because it is too large Load Diff
+9 -19
View File
@@ -41,7 +41,6 @@ YSF PB8 output
P25 PB9 output
NXDN PB10 output
POCSAG PB11 output
FM PB12 output
RX PB0 analog input (ADC1_8)
RSSI PB1 analog input (ADC2_9)
@@ -85,9 +84,6 @@ USART1_RXD PA10 input (AF)
#define PIN_POCSAG 11
#define PORT_POCSAG GPIOB
#define BB_POCSAG *((bitband_t)BITBAND_PERIPH(&PORT_POCSAG->ODR, PIN_POCSAG))
#define PIN_FM 12
#define PORT_FM GPIOB
#define BB_FM *((bitband_t)BITBAND_PERIPH(&PORT_FM->ODR, PIN_FM))
#define PIN_RX 0
#define PIN_RX_ADC_CH 8
@@ -158,9 +154,9 @@ void GPIOConfigPin(GPIO_TypeDef *port_ptr, uint32_t pin, uint32_t mode_cnf_value
#if defined(STM32F1_POG)
void FancyLEDEffect()
{
bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25, &BB_NXDN, &BB_POCSAG, &BB_FM};
bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25};
for(int i=0; i<10; i++){
for(int i=0; i<7; i++){
*foo[i] = 0x01;
}
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1);
@@ -176,12 +172,12 @@ void FancyLEDEffect()
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
*foo[0] = 0x01;
for(int i=1; i<10; i++){
for(int i=1; i<7; i++){
delay(SystemCoreClock/1000*10);
*foo[i-1] = 0x00;
*foo[i] = 0x01;
}
for(int i=10; i>=0; i--){
for(int i=5; i>=0; i--){
delay(SystemCoreClock/1000*10);
*foo[i+1] = 0x00;
*foo[i] = 0x01;
@@ -232,9 +228,6 @@ static inline void GPIOInit()
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
GPIOConfigPin(PORT_POCSAG, PIN_POCSAG, GPIO_CRL_MODE0_1);
#endif
#if !defined(USE_ALTERNATE_FM_LEDS)
GPIOConfigPin(PORT_FM, PIN_FM, GPIO_CRL_MODE0_1);
#endif
GPIOConfigPin(PORT_RX, PIN_RX, 0);
#if defined(SEND_RSSI_DATA)
@@ -374,8 +367,7 @@ void CIO::startInt()
void CIO::interrupt()
{
uint8_t control = MARK_NONE;
uint16_t sample = DC_OFFSET;
TSample sample = {DC_OFFSET, MARK_NONE};
#if defined(SEND_RSSI_DATA)
uint16_t rawRSSI = 0U;
#endif
@@ -392,12 +384,12 @@ void CIO::interrupt()
*rssi_adon = 1;
#endif
m_txBuffer.get(sample, control);
DAC->DHR12R1 = sample; // Send the value to the DAC
m_txBuffer.get(sample);
DAC->DHR12R1 = sample.sample; // Send the value to the DAC
// Read value from ADC1 and ADC2
sample = ADC1->DR; // read conversion result; EOC is cleared by this read
m_rxBuffer.put(sample, control);
sample.sample = ADC1->DR; // read conversion result; EOC is cleared by this read
m_rxBuffer.put(sample);
#if defined(SEND_RSSI_DATA)
rawRSSI = ADC2->DR;
m_rssiBuffer.put(rawRSSI);
@@ -472,8 +464,6 @@ void CIO::setFMInt(bool on)
#if defined(USE_ALTERNATE_FM_LEDS)
BB_DSTAR = !!on;
BB_YSF = !!on;
#else
BB_FM = !!on;
#endif
}
+5 -6
View File
@@ -161,15 +161,14 @@ void CIO::startInt()
void CIO::interrupt()
{
uint8_t control = MARK_NONE;
uint16_t sample = DC_OFFSET;
TSample sample = {DC_OFFSET, MARK_NONE};
m_txBuffer.get(sample, control);
*(int16_t *)&(DAC0_DAT0L) = sample;
m_txBuffer.get(sample);
*(int16_t *)&(DAC0_DAT0L) = sample.sample;
if ((ADC0_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
sample = ADC0_RA;
m_rxBuffer.put(sample, control);
sample.sample = ADC0_RA;
m_rxBuffer.put(sample);
}
#if defined(SEND_RSSI_DATA)
+10
View File
@@ -33,6 +33,7 @@ bool m_p25Enable = true;
bool m_nxdnEnable = true;
bool m_pocsagEnable = true;
bool m_fmEnable = true;
bool m_ax25Enable = true;
bool m_duplex = true;
@@ -61,12 +62,15 @@ CNXDNTX nxdnTX;
CPOCSAGTX pocsagTX;
CFM fm;
CAX25RX ax25RX;
CAX25TX ax25TX;
CCalDStarRX calDStarRX;
CCalDStarTX calDStarTX;
CCalDMR calDMR;
CCalP25 calP25;
CCalNXDN calNXDN;
CCalFM calFM;
CCalPOCSAG calPOCSAG;
CCalRSSI calRSSI;
@@ -109,6 +113,9 @@ void loop()
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
pocsagTX.process();
if (m_ax25Enable && (m_modemState == STATE_IDLE || m_modemState == STATE_FM))
ax25TX.process();
if (m_fmEnable && m_modemState == STATE_FM)
fm.process();
@@ -127,6 +134,9 @@ void loop()
if (m_modemState == STATE_POCSAGCAL)
calPOCSAG.process();
if (m_modemState == STATE_FMCAL10K || m_modemState == STATE_FMCAL12K || m_modemState == STATE_FMCAL15K || m_modemState == STATE_FMCAL20K || m_modemState == STATE_FMCAL25K ||m_modemState == STATE_FMCAL30K)
calFM.process();
if (m_modemState == STATE_IDLE)
cwIdTX.process();
}
+10
View File
@@ -30,6 +30,7 @@ bool m_p25Enable = true;
bool m_nxdnEnable = true;
bool m_pocsagEnable = true;
bool m_fmEnable = true;
bool m_ax25Enable = true;
bool m_duplex = true;
@@ -58,10 +59,13 @@ CNXDNTX nxdnTX;
CPOCSAGTX pocsagTX;
CFM fm;
CAX25RX ax25RX;
CAX25TX ax25TX;
CCalDStarRX calDStarRX;
CCalDStarTX calDStarTX;
CCalDMR calDMR;
CCalFM calFM;
CCalP25 calP25;
CCalNXDN calNXDN;
CCalPOCSAG calPOCSAG;
@@ -106,6 +110,9 @@ void loop()
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
pocsagTX.process();
if (m_ax25Enable && (m_modemState == STATE_IDLE || m_modemState == STATE_FM))
ax25TX.process();
if (m_fmEnable && m_modemState == STATE_FM)
fm.process();
@@ -115,6 +122,9 @@ void loop()
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K || m_modemState == STATE_DMRDMO1K)
calDMR.process();
if (m_modemState == STATE_FMCAL10K || m_modemState == STATE_FMCAL12K || m_modemState == STATE_FMCAL15K || m_modemState == STATE_FMCAL20K || m_modemState == STATE_FMCAL25K || m_modemState == STATE_FMCAL30K)
calFM.process();
if (m_modemState == STATE_P25CAL1K)
calP25.process();
-338
View File
@@ -1,338 +0,0 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<Project version="2G - 1.7.8" name="MMDVM_STM32F4xx">
<Target name="MMDVM_Discovery_407" isCurrent="1">
<Device manufacturerId="9" manufacturerName="ST" chipId="344" chipName="STM32F407VG" boardId="" boardName=""/>
<BuildOption>
<Compile>
<Option name="OptimizationLevel" value="4"/>
<Option name="UseFPU" value="0"/>
<Option name="UserEditCompiler" value=""/>
<Option name="SupportCPlusplus" value="1"/>
<Option name="FPU" value="2"/>
<Includepaths>
<Includepath path="."/>
</Includepaths>
<DefinedSymbols>
<Define name="STM32F4XX"/>
<Define name="USE_STDPERIPH_DRIVER"/>
<Define name="__ASSEMBLY__"/>
<Define name="SUPPORT_CPLUSPLUS"/>
<Define name="STM32F40_41xxx"/>
<Define name="HSE_VALUE=8000000"/>
<Define name="STM32F4_DISCOVERY"/>
<Define name="__FPU_USED"/>
</DefinedSymbols>
</Compile>
<Link useDefault="0">
<Option name="DiscardUnusedSection" value="0"/>
<Option name="UserEditLinkder" value=""/>
<Option name="UseMemoryLayout" value="0"/>
<Option name="nostartfiles" value="1"/>
<Option name="LTO" value="0"/>
<Option name="IsNewStartupCode" value="1"/>
<Option name="Library" value="Semihosting"/>
<Option name="UserEditLinker" value="-lstdc++; --specs=nano.specs;"/>
<LinkedLibraries>
<Libset dir="stm32f4xx_lib\cmsis\lib\gcc\" libs="arm_cortexm4lf_math"/>
</LinkedLibraries>
<MemoryAreas debugInFlashNotRAM="1">
<Memory name="IROM1" type="ReadOnly" size="0x00100000" startValue="0x08000000"/>
<Memory name="IRAM1" type="ReadWrite" size="0x00020000" startValue="0x20000000"/>
<Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
<Memory name="IRAM2" type="ReadWrite" size="0x00010000" startValue="0x10000000"/>
</MemoryAreas>
<LocateLinkFile path="./stm32f4xx_link.ld" type="0"/>
</Link>
<Output>
<Option name="OutputFileType" value="0"/>
<Option name="Path" value="./"/>
<Option name="Name" value="MMDVM_DIS"/>
<Option name="HEX" value="1"/>
<Option name="BIN" value="1"/>
</Output>
<User>
<UserRun name="Run#1" type="Before" checked="0" value=""/>
<UserRun name="Run#1" type="After" checked="0" value=""/>
</User>
</BuildOption>
<DebugOption>
<Option name="org.coocox.codebugger.gdbjtag.core.adapter" value="ST-Link"/>
<Option name="org.coocox.codebugger.gdbjtag.core.debugMode" value="SWD"/>
<Option name="org.coocox.codebugger.gdbjtag.core.clockDiv" value="1M"/>
<Option name="org.coocox.codebugger.gdbjtag.corerunToMain" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.jlinkgdbserver" value=""/>
<Option name="org.coocox.codebugger.gdbjtag.core.userDefineGDBScript" value=""/>
<Option name="org.coocox.codebugger.gdbjtag.core.targetEndianess" value="0"/>
<Option name="org.coocox.codebugger.gdbjtag.core.jlinkResetMode" value="Type 0: Normal"/>
<Option name="org.coocox.codebugger.gdbjtag.core.resetMode" value="SYSRESETREQ"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ifSemihost" value="0"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ifCacheRom" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ipAddress" value="127.0.0.1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.portNumber" value="2009"/>
<Option name="org.coocox.codebugger.gdbjtag.core.autoDownload" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.verify" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.downloadFuction" value="Erase Effected"/>
<Option name="org.coocox.codebugger.gdbjtag.core.defaultAlgorithm" value="STM32F4xx_1024.elf"/>
</DebugOption>
<ExcludeFile/>
</Target>
<Target name="MMDVM_Pi_446" isCurrent="0">
<Device manufacturerId="9" manufacturerName="ST" chipId="344" chipName="STM32F407VG" boardId="" boardName=""/>
<BuildOption>
<Compile>
<Option name="OptimizationLevel" value="4"/>
<Option name="UseFPU" value="0"/>
<Option name="UserEditCompiler" value=""/>
<Option name="SupportCPlusplus" value="1"/>
<Option name="FPU" value="2"/>
<Includepaths>
<Includepath path="."/>
</Includepaths>
<DefinedSymbols>
<Define name="STM32F4XX"/>
<Define name="USE_STDPERIPH_DRIVER"/>
<Define name="__ASSEMBLY__"/>
<Define name="SUPPORT_CPLUSPLUS"/>
<Define name="__FPU_USED"/>
<Define name="STM32F446xx"/>
<Define name="HSE_VALUE=12000000"/>
<Define name="STM32F4_PI"/>
<Define name="MODE_LEDS"/>
</DefinedSymbols>
</Compile>
<Link useDefault="0">
<Option name="DiscardUnusedSection" value="0"/>
<Option name="UserEditLinkder" value=""/>
<Option name="UseMemoryLayout" value="0"/>
<Option name="nostartfiles" value="1"/>
<Option name="LTO" value="0"/>
<Option name="IsNewStartupCode" value="1"/>
<Option name="Library" value="Semihosting"/>
<Option name="UserEditLinker" value="-lstdc++; --specs=nano.specs;"/>
<LinkedLibraries>
<Libset dir="stm32f4xx_lib\cmsis\lib\gcc\" libs="arm_cortexm4lf_math"/>
</LinkedLibraries>
<MemoryAreas debugInFlashNotRAM="1">
<Memory name="IROM1" type="ReadOnly" size="0x00100000" startValue="0x08000000"/>
<Memory name="IRAM1" type="ReadWrite" size="0x00020000" startValue="0x20000000"/>
<Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
<Memory name="IRAM2" type="ReadWrite" size="0x00010000" startValue="0x10000000"/>
</MemoryAreas>
<LocateLinkFile path="./stm32f4xx_link.ld" type="0"/>
</Link>
<Output>
<Option name="OutputFileType" value="0"/>
<Option name="Path" value="./"/>
<Option name="Name" value="MMDVM_PI"/>
<Option name="HEX" value="1"/>
<Option name="BIN" value="1"/>
</Output>
<User>
<UserRun name="Run#1" type="Before" checked="0" value=""/>
<UserRun name="Run#1" type="After" checked="0" value=""/>
</User>
</BuildOption>
<DebugOption>
<Option name="org.coocox.codebugger.gdbjtag.core.adapter" value="ST-Link"/>
<Option name="org.coocox.codebugger.gdbjtag.core.debugMode" value="SWD"/>
<Option name="org.coocox.codebugger.gdbjtag.core.clockDiv" value="1M"/>
<Option name="org.coocox.codebugger.gdbjtag.corerunToMain" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.jlinkgdbserver" value=""/>
<Option name="org.coocox.codebugger.gdbjtag.core.userDefineGDBScript" value=""/>
<Option name="org.coocox.codebugger.gdbjtag.core.targetEndianess" value="0"/>
<Option name="org.coocox.codebugger.gdbjtag.core.jlinkResetMode" value="Type 0: Normal"/>
<Option name="org.coocox.codebugger.gdbjtag.core.resetMode" value="SYSRESETREQ"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ifSemihost" value="0"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ifCacheRom" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ipAddress" value="127.0.0.1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.portNumber" value="2009"/>
<Option name="org.coocox.codebugger.gdbjtag.core.autoDownload" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.verify" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.downloadFuction" value="Erase Effected"/>
<Option name="org.coocox.codebugger.gdbjtag.core.defaultAlgorithm" value="STM32F4xx_1024.elf"/>
</DebugOption>
<ExcludeFile/>
</Target>
<Target name="MMDVM_Nucleo_446" isCurrent="0">
<Device manufacturerId="9" manufacturerName="ST" chipId="344" chipName="STM32F407VG" boardId="" boardName=""/>
<BuildOption>
<Compile>
<Option name="OptimizationLevel" value="4"/>
<Option name="UseFPU" value="0"/>
<Option name="UserEditCompiler" value=""/>
<Option name="SupportCPlusplus" value="1"/>
<Option name="FPU" value="2"/>
<Includepaths>
<Includepath path="."/>
</Includepaths>
<DefinedSymbols>
<Define name="STM32F4XX"/>
<Define name="USE_STDPERIPH_DRIVER"/>
<Define name="__ASSEMBLY__"/>
<Define name="SUPPORT_CPLUSPLUS"/>
<Define name="HSE_VALUE=8000000"/>
<Define name="__FPU_USED"/>
<Define name="STM32F4_NUCLEO"/>
<Define name="STM32F446xx"/>
</DefinedSymbols>
</Compile>
<Link useDefault="0">
<Option name="DiscardUnusedSection" value="0"/>
<Option name="UserEditLinkder" value=""/>
<Option name="UseMemoryLayout" value="0"/>
<Option name="nostartfiles" value="1"/>
<Option name="LTO" value="0"/>
<Option name="IsNewStartupCode" value="1"/>
<Option name="Library" value="Semihosting"/>
<Option name="UserEditLinker" value="-lstdc++; --specs=nano.specs;"/>
<LinkedLibraries>
<Libset dir="stm32f4xx_lib\cmsis\lib\gcc\" libs="arm_cortexm4lf_math"/>
</LinkedLibraries>
<MemoryAreas debugInFlashNotRAM="1">
<Memory name="IROM1" type="ReadOnly" size="0x00100000" startValue="0x08000000"/>
<Memory name="IRAM1" type="ReadWrite" size="0x00020000" startValue="0x20000000"/>
<Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
<Memory name="IRAM2" type="ReadWrite" size="0x00010000" startValue="0x10000000"/>
</MemoryAreas>
<LocateLinkFile path="./stm32f4xx_link.ld" type="0"/>
</Link>
<Output>
<Option name="OutputFileType" value="0"/>
<Option name="Path" value="./"/>
<Option name="Name" value="MMDVM_NUCLEO"/>
<Option name="HEX" value="1"/>
<Option name="BIN" value="1"/>
</Output>
<User>
<UserRun name="Run#1" type="Before" checked="0" value=""/>
<UserRun name="Run#1" type="After" checked="0" value=""/>
</User>
</BuildOption>
<DebugOption>
<Option name="org.coocox.codebugger.gdbjtag.core.adapter" value="ST-Link"/>
<Option name="org.coocox.codebugger.gdbjtag.core.debugMode" value="SWD"/>
<Option name="org.coocox.codebugger.gdbjtag.core.clockDiv" value="1M"/>
<Option name="org.coocox.codebugger.gdbjtag.corerunToMain" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.jlinkgdbserver" value=""/>
<Option name="org.coocox.codebugger.gdbjtag.core.userDefineGDBScript" value=""/>
<Option name="org.coocox.codebugger.gdbjtag.core.targetEndianess" value="0"/>
<Option name="org.coocox.codebugger.gdbjtag.core.jlinkResetMode" value="Type 0: Normal"/>
<Option name="org.coocox.codebugger.gdbjtag.core.resetMode" value="SYSRESETREQ"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ifSemihost" value="0"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ifCacheRom" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ipAddress" value="127.0.0.1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.portNumber" value="2009"/>
<Option name="org.coocox.codebugger.gdbjtag.core.autoDownload" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.verify" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.downloadFuction" value="Erase Effected"/>
<Option name="org.coocox.codebugger.gdbjtag.core.defaultAlgorithm" value="STM32F4xx_1024.elf"/>
</DebugOption>
<ExcludeFile/>
</Target>
<Components path="./">
</Components>
<Files>
<File name="DMRIdleRX.h" path="DMRIdleRX.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_dac.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_dac.c" type="1"/>
<File name="DMRDMOTX.cpp" path="DMRDMOTX.cpp" type="1"/>
<File name="DMRRX.cpp" path="DMRRX.cpp" type="1"/>
<File name="YSFRX.cpp" path="YSFRX.cpp" type="1"/>
<File name="CalRSSI.cpp" path="CalRSSI.cpp" type="1"/>
<File name="STM32F4XX_Lib/Device/stm32f4xx.h" path="STM32F4XX_Lib/Device/stm32f4xx.h" type="1"/>
<File name="SampleRB.cpp" path="SampleRB.cpp" type="1"/>
<File name="CalDStarTX.h" path="CalDStarTX.h" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Include/core_cm4.h" path="STM32F4XX_Lib/CMSIS/Include/core_cm4.h" type="1"/>
<File name="DMRSlotRX.h" path="DMRSlotRX.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_tim.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_tim.c" type="1"/>
<File name="YSFRX.h" path="YSFRX.h" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Include" path="" type="2"/>
<File name="IO.cpp" path="IO.cpp" type="1"/>
<File name="DMRDMORX.cpp" path="DMRDMORX.cpp" type="1"/>
<File name="P25RX.h" path="P25RX.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/misc.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/misc.c" type="1"/>
<File name="STM32F4XX_Lib/CMSIS" path="" type="2"/>
<File name="SerialArduino.cpp" path="SerialArduino.cpp" type="1"/>
<File name="SerialPort.cpp" path="SerialPort.cpp" type="1"/>
<File name="STM32F4XX_Lib/Device/stm32f4xx_conf.h" path="STM32F4XX_Lib/Device/stm32f4xx_conf.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_adc.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_adc.c" type="1"/>
<File name="DStarTX.cpp" path="DStarTX.cpp" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_usart.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_usart.c" type="1"/>
<File name="SampleRB.h" path="SampleRB.h" type="1"/>
<File name="YSFTX.h" path="YSFTX.h" type="1"/>
<File name="DMRRX.h" path="DMRRX.h" type="1"/>
<File name="CalRSSI.h" path="CalRSSI.h" type="1"/>
<File name="IOTeensy.cpp" path="IOTeensy.cpp" type="1"/>
<File name="MMDVM.cpp" path="MMDVM.cpp" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Include/core_cmSimd.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmSimd.h" type="1"/>
<File name="DMRDMORX.h" path="DMRDMORX.h" type="1"/>
<File name="SerialPort.h" path="SerialPort.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_dac.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_dac.h" type="1"/>
<File name="CWIdTX.h" path="CWIdTX.h" type="1"/>
<File name="STM32F4XX_Lib/Device/system_stm32f4xx.h" path="STM32F4XX_Lib/Device/system_stm32f4xx.h" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Include/core_cmFunc.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmFunc.h" type="1"/>
<File name="CalDStarTX.cpp" path="CalDStarTX.cpp" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source" path="" type="2"/>
<File name="CalDMR.h" path="CalDMR.h" type="1"/>
<File name="DMRDMOTX.h" path="DMRDMOTX.h" type="1"/>
<File name="IODue.cpp" path="IODue.cpp" type="1"/>
<File name="DMRTX.cpp" path="DMRTX.cpp" type="1"/>
<File name="P25RX.cpp" path="P25RX.cpp" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Lib/GCC" path="" type="2"/>
<File name="STM32F4XX_Lib" path="" type="2"/>
<File name="STM32F4XX_Lib/CMSIS/Include/core_cmInstr.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmInstr.h" type="1"/>
<File name="DMRTX.h" path="DMRTX.h" type="1"/>
<File name="STM32F4XX_Lib/Device/system_stm32f4xx.c" path="STM32F4XX_Lib/Device/system_stm32f4xx.c" type="1"/>
<File name="RSSIRB.h" path="RSSIRB.h" type="1"/>
<File name="STM32F4XX_Lib/Device/startup/startup_stm32f4xx.c" path="STM32F4XX_Lib/Device/startup/startup_stm32f4xx.c" type="1"/>
<File name="STM32F4XX_Lib/Device/startup" path="" type="2"/>
<File name="SerialRB.h" path="SerialRB.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_gpio.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_gpio.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver" path="" type="2"/>
<File name="DMRDefines.h" path="DMRDefines.h" type="1"/>
<File name="CalDMR.cpp" path="CalDMR.cpp" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_adc.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_adc.h" type="1"/>
<File name="SerialSTM.cpp" path="SerialSTM.cpp" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" path="STM32F4XX_Lib/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" type="1"/>
<File name="DStarDefines.h" path="DStarDefines.h" type="1"/>
<File name="DStarRX.h" path="DStarRX.h" type="1"/>
<File name="Config.h" path="Config.h" type="1"/>
<File name="DMRSlotType.cpp" path="DMRSlotType.cpp" type="1"/>
<File name="Globals.h" path="Globals.h" type="1"/>
<File name="STM32F4XX_Lib/Device" path="" type="2"/>
<File name="CalDStarRX.cpp" path="CalDStarRX.cpp" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_tim.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_tim.h" type="1"/>
<File name="CalDStarRX.h" path="CalDStarRX.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include" path="" type="2"/>
<File name="IO.h" path="IO.h" type="1"/>
<File name="Utils.cpp" path="Utils.cpp" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/.DS_Store" path="STM32F4XX_Lib/CMSIS/.DS_Store" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Lib/.DS_Store" path="STM32F4XX_Lib/CMSIS/Lib/.DS_Store" type="1"/>
<File name="Utils.h" path="Utils.h" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Lib" path="" type="2"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/.DS_Store" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/.DS_Store" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Include/.DS_Store" path="STM32F4XX_Lib/CMSIS/Include/.DS_Store" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Include/arm_math.h" path="STM32F4XX_Lib/CMSIS/Include/arm_math.h" type="1"/>
<File name="YSFDefines.h" path="YSFDefines.h" type="1"/>
<File name="DStarTX.h" path="DStarTX.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_rcc.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_rcc.c" type="1"/>
<File name="STM32F4XX_Lib/Device/.DS_Store" path="STM32F4XX_Lib/Device/.DS_Store" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_rcc.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_rcc.h" type="1"/>
<File name="P25Defines.h" path="P25Defines.h" type="1"/>
<File name="DMRSlotType.h" path="DMRSlotType.h" type="1"/>
<File name="Debug.h" path="Debug.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/misc.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/misc.h" type="1"/>
<File name="P25TX.h" path="P25TX.h" type="1"/>
<File name="RSSIRB.cpp" path="RSSIRB.cpp" type="1"/>
<File name="DStarRX.cpp" path="DStarRX.cpp" type="1"/>
<File name="DMRSlotRX.cpp" path="DMRSlotRX.cpp" type="1"/>
<File name="IOSTM.cpp" path="IOSTM.cpp" type="1"/>
<File name="P25TX.cpp" path="P25TX.cpp" type="1"/>
<File name="SerialRB.cpp" path="SerialRB.cpp" type="1"/>
<File name="CWIdTX.cpp" path="CWIdTX.cpp" type="1"/>
<File name="DMRIdleRX.cpp" path="DMRIdleRX.cpp" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_usart.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_usart.h" type="1"/>
<File name="STM32F4XX_Lib/.DS_Store" path="STM32F4XX_Lib/.DS_Store" type="1"/>
<File name="YSFTX.cpp" path="YSFTX.cpp" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_gpio.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_gpio.c" type="1"/>
</Files>
</Project>
+36 -2
View File
@@ -25,6 +25,7 @@ F7_LIB_PATH=./STM32F7XX_Lib
# MCU external clock frequency (Hz)
CLK_MMDVM_PI=12000000
CLK_NUCLEO=8000000
CLK_12MHZ=12000000
# Directory Structure
BINDIR=bin
@@ -93,6 +94,8 @@ ifndef $(OSC)
OSC=$(CLK_MMDVM_PI)
else ifeq ($(MAKECMDGOALS),pi-f722)
OSC=$(CLK_MMDVM_PI)
else ifeq ($(MAKECMDGOALS),drcc_nqf)
OSC=$(CLK_12MHZ)
else
OSC=$(CLK_NUCLEO)
endif
@@ -134,6 +137,13 @@ DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHS
DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# MMDVM_RPT_Hat BG4TGO, BG5HHP board:
DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# DRCC_DVM BG7NQF board:
DEFS_DRCC_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DDRCC_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# WA0EDA F405 MTR2K, MASTR3 board:
DEFS_EDA_405=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_EDA_405 -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# WA0EDA F446 MTR2K, MASTR3 board:
DEFS_EDA_446=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_EDA_446 -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# Build compiler flags
CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
@@ -149,10 +159,10 @@ LDFLAGS_F722 =-T stm32f722_link.ld $(MCFLAGS_F7) --specs=nosys.specs $(INCLUDES_
# Common flags
CFLAGS=-Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
LDFLAGS=-Os --specs=nano.specs
LDFLAGS=-Os --specs=nano.specs -Wl,-Map=bin/mmdvm.map
# Build Rules
.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm clean
.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm drcc_nqf clean
# Default target: Nucleo-64 F446RE board
all: nucleo
@@ -217,6 +227,24 @@ dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM)
dvm: LDFLAGS+=$(LDFLAGS_F4)
dvm: release_f4
drcc_nqf: GitVersion.h
drcc_nqf: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
drcc_nqf: LDFLAGS+=$(LDFLAGS_F4)
drcc_nqf: release_f4
eda405: GitVersion.h
eda405: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_405)
eda405: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_405)
eda405: LDFLAGS+=$(LDFLAGS_F4)
eda405: release_f4
eda446: GitVersion.h
eda446: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_446)
eda446: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_446)
eda446: LDFLAGS+=$(LDFLAGS_F4)
eda446: release_f4
release_f4: $(BINDIR)
release_f4: $(OBJDIR_F4)
release_f4: $(BINDIR)/$(BINHEX_F4)
@@ -338,6 +366,8 @@ endif
deploy-f4m: deploy-pi
deploy-dvm: deploy-pi
deploy-eda405: deploy-pi
deploy-eda446: deploy-pi
deploy-pi-f7:
ifneq ($(wildcard /usr/local/bin/stm32flash),)
@@ -365,3 +395,7 @@ else
echo "#define GITVERSION \"0000000\"" > $@
endif
endif
flash_f4:
@echo "flashing firmware..."
st-flash write bin/$(BINBIN_F4) 0x8000000
+2 -2
View File
@@ -1,5 +1,5 @@
#!/usr/bin/make
# makefile for the arduino due (works with arduino IDE 1.6.11)
# makefile for the arduino due (works with arduino IDE 1.6.12)
#
# The original file can be found at https://github.com/pauldreik/arduino-due-makefile
#
@@ -34,7 +34,7 @@ OBJCOPY:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-n
C:=$(CC)
#SAM:=arduino/sam/
SAM:=$(ADIR)/packages/arduino/hardware/sam/1.6.11
SAM:=$(ADIR)/packages/arduino/hardware/sam/1.6.12
#CMSIS:=arduino/sam/system/CMSIS/
#LIBSAM:=arduino/sam/system/libsam
TMPDIR:=$(PWD)/build
+40 -8
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2018 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2018,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
@@ -53,7 +53,9 @@ m_sincState(),
m_poBuffer(),
m_poLen(0U),
m_poPtr(0U),
m_txDelay(240U) // 200ms
m_txDelay(240U), // 200ms
m_txHang(3000U), // 5s
m_txCount(0U)
{
::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
::memset(m_sincState, 0x00U, 70U * sizeof(q15_t));
@@ -70,10 +72,7 @@ m_txDelay(240U) // 200ms
void CNXDNTX::process()
{
if (m_buffer.getData() == 0U && m_poLen == 0U)
return;
if (m_poLen == 0U) {
if (m_poLen == 0U && m_buffer.getData() > 0U) {
if (!m_tx) {
for (uint16_t i = 0U; i < m_txDelay; i++)
m_poBuffer[m_poLen++] = NXDN_SYNC;
@@ -82,7 +81,8 @@ void CNXDNTX::process()
m_poBuffer[m_poLen++] = NXDN_PREAMBLE[2U];
} else {
for (uint8_t i = 0U; i < NXDN_FRAME_LENGTH_BYTES; i++) {
uint8_t c = m_buffer.get();
uint8_t c = 0U;
m_buffer.get(c);
m_poBuffer[m_poLen++] = c;
}
}
@@ -98,6 +98,8 @@ void CNXDNTX::process()
writeByte(c);
space -= 4U * NXDN_RADIO_SYMBOL_LENGTH;
if (m_duplex)
m_txCount = m_txHang;
if (m_poPtr >= m_poLen) {
m_poPtr = 0U;
@@ -105,10 +107,23 @@ void CNXDNTX::process()
return;
}
}
} else if (m_txCount > 0U) {
// Transmit silence until the hang timer has expired.
uint16_t space = io.getSpace();
while (space > (4U * NXDN_RADIO_SYMBOL_LENGTH)) {
writeSilence();
space -= 4U * NXDN_RADIO_SYMBOL_LENGTH;
m_txCount--;
if (m_txCount == 0U)
return;
}
}
}
uint8_t CNXDNTX::writeData(const uint8_t* data, uint8_t length)
uint8_t CNXDNTX::writeData(const uint8_t* data, uint16_t length)
{
if (length != (NXDN_FRAME_LENGTH_BYTES + 1U))
return 4U;
@@ -155,6 +170,19 @@ void CNXDNTX::writeByte(uint8_t c)
io.write(STATE_NXDN, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
}
void CNXDNTX::writeSilence()
{
q15_t inBuffer[4U] = {0x00U, 0x00U, 0x00U, 0x00U};
q15_t intBuffer[NXDN_RADIO_SYMBOL_LENGTH * 4U];
q15_t outBuffer[NXDN_RADIO_SYMBOL_LENGTH * 4U];
::arm_fir_interpolate_q15(&m_modFilter, inBuffer, intBuffer, 4U);
::arm_fir_fast_q15(&m_sincFilter, intBuffer, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
io.write(STATE_NXDN, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
}
void CNXDNTX::setTXDelay(uint8_t delay)
{
m_txDelay = 300U + uint16_t(delay) * 6U; // 500ms + tx delay
@@ -168,3 +196,7 @@ uint8_t CNXDNTX::getSpace() const
return m_buffer.getSpace() / NXDN_FRAME_LENGTH_BYTES;
}
void CNXDNTX::setParams(uint8_t txHang)
{
m_txHang = txHang * 600U;
}
+9 -5
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,13 +21,13 @@
#include "Config.h"
#include "SerialRB.h"
#include "RingBuffer.h"
class CNXDNTX {
public:
CNXDNTX();
uint8_t writeData(const uint8_t* data, uint8_t length);
uint8_t writeData(const uint8_t* data, uint16_t length);
void process();
@@ -35,8 +35,10 @@ public:
uint8_t getSpace() const;
void setParams(uint8_t txHang);
private:
CSerialRB m_buffer;
CRingBuffer<uint8_t> m_buffer;
arm_fir_interpolate_instance_q15 m_modFilter;
arm_fir_instance_q15 m_sincFilter;
q15_t m_modState[16U]; // blockSize + phaseLength - 1, 4 + 9 - 1 plus some spare
@@ -45,9 +47,11 @@ private:
uint16_t m_poLen;
uint16_t m_poPtr;
uint16_t m_txDelay;
uint32_t m_txHang;
uint32_t m_txCount;
void writeByte(uint8_t c);
void writeSilence();
};
#endif
+44 -10
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2016,2017,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
@@ -51,7 +51,9 @@ m_lpState(),
m_poBuffer(),
m_poLen(0U),
m_poPtr(0U),
m_txDelay(240U) // 200ms
m_txDelay(240U), // 200ms
m_txHang(6000U), // 5s
m_txCount(0U)
{
::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
::memset(m_lpState, 0x00U, 60U * sizeof(q15_t));
@@ -68,17 +70,16 @@ m_txDelay(240U) // 200ms
void CP25TX::process()
{
if (m_buffer.getData() == 0U && m_poLen == 0U)
return;
if (m_poLen == 0U) {
if (m_poLen == 0U && m_buffer.getData() > 0U) {
if (!m_tx) {
for (uint16_t i = 0U; i < m_txDelay; i++)
m_poBuffer[m_poLen++] = P25_START_SYNC;
} else {
uint8_t length = m_buffer.get();
uint8_t length;
m_buffer.get(length);
for (uint8_t i = 0U; i < length; i++) {
uint8_t c = m_buffer.get();
uint8_t c = 0U;
m_buffer.get(c);
m_poBuffer[m_poLen++] = c;
}
}
@@ -94,17 +95,32 @@ void CP25TX::process()
writeByte(c);
space -= 4U * P25_RADIO_SYMBOL_LENGTH;
if (m_duplex)
m_txCount = m_txHang;
if (m_poPtr >= m_poLen) {
m_poPtr = 0U;
m_poLen = 0U;
return;
}
}
} else if (m_txCount > 0U) {
// Transmit silence until the hang timer has expired.
uint16_t space = io.getSpace();
while (space > (4U * P25_RADIO_SYMBOL_LENGTH)) {
writeSilence();
space -= 4U * P25_RADIO_SYMBOL_LENGTH;
m_txCount--;
if (m_txCount == 0U)
return;
}
}
}
uint8_t CP25TX::writeData(const uint8_t* data, uint8_t length)
uint8_t CP25TX::writeData(const uint8_t* data, uint16_t length)
{
if (length < (P25_TERM_FRAME_LENGTH_BYTES + 1U))
return 4U;
@@ -152,6 +168,19 @@ void CP25TX::writeByte(uint8_t c)
io.write(STATE_P25, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
}
void CP25TX::writeSilence()
{
q15_t inBuffer[4U] = {0x00U, 0x00U, 0x00U, 0x00U};
q15_t intBuffer[P25_RADIO_SYMBOL_LENGTH * 4U];
q15_t outBuffer[P25_RADIO_SYMBOL_LENGTH * 4U];
::arm_fir_interpolate_q15(&m_modFilter, inBuffer, intBuffer, 4U);
::arm_fir_fast_q15(&m_lpFilter, intBuffer, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
io.write(STATE_P25, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
}
void CP25TX::setTXDelay(uint8_t delay)
{
m_txDelay = 600U + uint16_t(delay) * 12U; // 500ms + tx delay
@@ -164,3 +193,8 @@ uint8_t CP25TX::getSpace() const
{
return m_buffer.getSpace() / P25_LDU_FRAME_LENGTH_BYTES;
}
void CP25TX::setParams(uint8_t txHang)
{
m_txHang = txHang * 1200U;
}
+9 -5
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2016,2017,2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,13 +21,13 @@
#include "Config.h"
#include "SerialRB.h"
#include "RingBuffer.h"
class CP25TX {
public:
CP25TX();
uint8_t writeData(const uint8_t* data, uint8_t length);
uint8_t writeData(const uint8_t* data, uint16_t length);
void process();
@@ -35,8 +35,10 @@ public:
uint8_t getSpace() const;
void setParams(uint8_t txHang);
private:
CSerialRB m_buffer;
CRingBuffer<uint8_t> m_buffer;
arm_fir_interpolate_instance_q15 m_modFilter;
arm_fir_instance_q15 m_lpFilter;
q15_t m_modState[16U]; // blockSize + phaseLength - 1, 4 + 9 - 1 plus some spare
@@ -45,9 +47,11 @@ private:
uint16_t m_poLen;
uint16_t m_poPtr;
uint16_t m_txDelay;
uint32_t m_txHang;
uint32_t m_txCount;
void writeByte(uint8_t c);
void writeSilence();
};
#endif
+4 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2018 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2018,2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -61,7 +61,8 @@ void CPOCSAGTX::process()
m_poBuffer[m_poLen++] = POCSAG_SYNC;
} else {
for (uint8_t i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++) {
uint8_t c = m_buffer.get();
uint8_t c = 0U;
m_buffer.get(c);
m_poBuffer[m_poLen++] = c;
}
}
@@ -95,7 +96,7 @@ bool CPOCSAGTX::busy()
return false;
}
uint8_t CPOCSAGTX::writeData(const uint8_t* data, uint8_t length)
uint8_t CPOCSAGTX::writeData(const uint8_t* data, uint16_t length)
{
if (length != POCSAG_FRAME_LENGTH_BYTES)
return 4U;
@@ -146,4 +147,3 @@ uint8_t CPOCSAGTX::getSpace() const
{
return m_buffer.getSpace() / POCSAG_FRAME_LENGTH_BYTES;
}
+4 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015-2019 by Jonathan Naylor G4KLX
* Copyright (C) 2015-2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,13 +21,13 @@
#include "Config.h"
#include "SerialRB.h"
#include "RingBuffer.h"
class CPOCSAGTX {
public:
CPOCSAGTX();
uint8_t writeData(const uint8_t* data, uint8_t length);
uint8_t writeData(const uint8_t* data, uint16_t length);
void writeByte(uint8_t c);
@@ -40,7 +40,7 @@ public:
bool busy();
private:
CSerialRB m_buffer;
CRingBuffer<uint8_t> m_buffer;
arm_fir_instance_q15 m_modFilter;
q15_t m_modState[170U]; // NoTaps + BlockSize - 1, 6 + 160 - 1 plus some spare
uint8_t m_poBuffer[200U];
+14 -4
View File
@@ -1,7 +1,17 @@
This is the source code of the MMDVM firmware that supports D-Star, DMR, System Fusion, P25, NXDN, and POCSAG modes.
This is the source code of the MMDVM firmware that supports D-Star, DMR,
System Fusion, P25, NXDN, POCSAG, and FM modes.
It runs on the Arduino Due, the ST-Micro STM32F1xxx, STM32F4xxx and STM32F7xxx processors, as well as the Teensy 3.1/3.2/3.5/3.6. What these platforms have in common is the use of an ARM Cortex-M3 or M4 processor with a clock speed greater than 70 MHz, and access to at least one analogue to digital converter and one digital to analogue converter.
It runs on the Arduino Due, the ST-Micro STM32F1xxx, STM32F4xxx and STM32F7xxx
processors, as well as the Teensy 3.1/3.2/3.5/3.6. What these platforms have in
common is the use of an ARM Cortex-M3, M4, or M7 processors with a clock speed
greater than 70 MHz, and access to at least one analogue to digital converter
and one digital to analogue converter.
In order to build this software for the Arduino Due, you will need to edit a file within the Arduino GUI and that is detailed in the BUILD.txt file. The STM32 support is being supplied via the Coocox IDE with ARM GCC. The Teensy support uses Teensyduino.
In order to build this software for the Arduino Due, you will need to edit a
file within the Arduino GUI and that is detailed in the BUILD.txt file. The
STM32 support is being supplied via the ARM GCC compiler. The Teensy support
uses Teensyduino.
This software is licenced under the GPL v2 and is intended for amateur and educational use only. Use of this software for commercial purposes is strictly forbidden.
This software is licenced under the GPL v2 and is intended for amateur and
educational use only. Use of this software for commercial purposes is strictly
forbidden.
-102
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@@ -1,102 +0,0 @@
/*
TX fifo control - Copyright (C) KI6ZUM 2015
Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
You should have received a copy of the GNU Library General Public
License along with this library; if not, write to the
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#include "RSSIRB.h"
CRSSIRB::CRSSIRB(uint16_t length) :
m_length(length),
m_head(0U),
m_tail(0U),
m_full(false),
m_overflow(false)
{
m_rssi = new uint16_t[length];
}
uint16_t CRSSIRB::getSpace() const
{
uint16_t n = 0U;
if (m_tail == m_head)
n = m_full ? 0U : m_length;
else if (m_tail < m_head)
n = m_length - m_head + m_tail;
else
n = m_tail - m_head;
if (n > m_length)
n = 0U;
return n;
}
uint16_t CRSSIRB::getData() const
{
if (m_tail == m_head)
return m_full ? m_length : 0U;
else if (m_tail < m_head)
return m_head - m_tail;
else
return m_length - m_tail + m_head;
}
bool CRSSIRB::put(uint16_t rssi)
{
if (m_full) {
m_overflow = true;
return false;
}
m_rssi[m_head] = rssi;
m_head++;
if (m_head >= m_length)
m_head = 0U;
if (m_head == m_tail)
m_full = true;
return true;
}
bool CRSSIRB::get(uint16_t& rssi)
{
if (m_head == m_tail && !m_full)
return false;
rssi = m_rssi[m_tail];
m_full = false;
m_tail++;
if (m_tail >= m_length)
m_tail = 0U;
return true;
}
bool CRSSIRB::hasOverflowed()
{
bool overflow = m_overflow;
m_overflow = false;
return overflow;
}
-59
View File
@@ -1,59 +0,0 @@
/*
Serial fifo control - Copyright (C) KI6ZUM 2015
Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
You should have received a copy of the GNU Library General Public
License along with this library; if not, write to the
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#if !defined(RSSIRB_H)
#define RSSIRB_H
#if defined(STM32F4XX)
#include "stm32f4xx.h"
#elif defined(STM32F7XX)
#include "stm32f7xx.h"
#elif defined(STM32F105xC)
#include "stm32f1xx.h"
#include <cstddef>
#else
#include <Arduino.h>
#endif
class CRSSIRB {
public:
CRSSIRB(uint16_t length);
uint16_t getSpace() const;
uint16_t getData() const;
bool put(uint16_t rssi);
bool get(uint16_t& rssi);
bool hasOverflowed();
private:
uint16_t m_length;
volatile uint16_t* m_rssi;
volatile uint16_t m_head;
volatile uint16_t m_tail;
volatile bool m_full;
bool m_overflow;
};
#endif
+77
View File
@@ -0,0 +1,77 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
* Copyright (C) 2020 by Geoffrey Merck F4FXL - KC3FRA
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(RINGBUFFER_H)
#define RINGBUFFER_H
#if defined(STM32F4XX)
#include "stm32f4xx.h"
#elif defined(STM32F7XX)
#include "stm32f7xx.h"
#elif defined(STM32F105xC)
#include "stm32f1xx.h"
#include <cstddef>
#else
#include <Arduino.h>
#undef PI
#endif
#if defined(__SAM3X8E__) || defined(STM32F105xC)
#define ARM_MATH_CM3
#elif defined(STM32F7XX)
#define ARM_MATH_CM7
#elif defined(STM32F4XX) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
#define ARM_MATH_CM4
#else
#error "Unknown processor type"
#endif
#include <arm_math.h>
template <typename TDATATYPE>
class CRingBuffer {
public:
CRingBuffer(uint16_t length = 370U);
uint16_t getSpace() const;
uint16_t getData() const;
bool put(TDATATYPE item) volatile;
bool get(TDATATYPE& item) volatile;
TDATATYPE peek() const;
bool hasOverflowed();
void reset();
private:
uint16_t m_length;
TDATATYPE* m_buffer;
volatile uint16_t m_head;
volatile uint16_t m_tail;
volatile bool m_full;
bool m_overflow;
};
#include "RingBuffer.impl.h"
#endif
+114
View File
@@ -0,0 +1,114 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
* Copyright (C) 2020 by Geoffrey Merck F4FXL - KC3FRA
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "RingBuffer.h"
template <typename TDATATYPE> CRingBuffer<TDATATYPE>::CRingBuffer(uint16_t length) :
m_length(length),
m_head(0U),
m_tail(0U),
m_full(false),
m_overflow(false)
{
m_buffer = new TDATATYPE[length];
}
template <typename TDATATYPE> uint16_t CRingBuffer<TDATATYPE>::getSpace() const
{
uint16_t n = 0U;
if (m_tail == m_head)
n = m_full ? 0U : m_length;
else if (m_tail < m_head)
n = m_length - m_head + m_tail;
else
n = m_tail - m_head;
if (n > m_length)
n = 0U;
return n;
}
template <typename TDATATYPE> uint16_t CRingBuffer<TDATATYPE>::getData() const
{
if (m_tail == m_head)
return m_full ? m_length : 0U;
else if (m_tail < m_head)
return m_head - m_tail;
else
return m_length - m_tail + m_head;
}
template <typename TDATATYPE> bool CRingBuffer<TDATATYPE>::put(TDATATYPE item) volatile
{
if (m_full) {
m_overflow = true;
return false;
}
m_buffer[m_head] = item;
m_head++;
if (m_head >= m_length)
m_head = 0U;
if (m_head == m_tail)
m_full = true;
return true;
}
template <typename TDATATYPE> TDATATYPE CRingBuffer<TDATATYPE>::peek() const
{
return m_buffer[m_tail];
}
template <typename TDATATYPE> bool CRingBuffer<TDATATYPE>::get(TDATATYPE& item) volatile
{
if (m_head == m_tail && !m_full)
return false;
item = m_buffer[m_tail];
m_full = false;
m_tail++;
if (m_tail >= m_length)
m_tail = 0U;
return true;
}
template <typename TDATATYPE> bool CRingBuffer<TDATATYPE>::hasOverflowed()
{
bool overflow = m_overflow;
m_overflow = false;
return overflow;
}
template <typename TDATATYPE> void CRingBuffer<TDATATYPE>::reset()
{
m_head = 0U;
m_tail = 0U;
m_full = false;
m_overflow = false;
}
+100
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@@ -0,0 +1,100 @@
/*
* Copyright (c) 2020 by Jonathan Naylor G4KLX
* Copyright (c) 2020 by Geoffrey Merck F4FXL - KC3FRA
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if defined(STM32F4XX) || defined(STM32F7XX)
#include "STMUART.h"
CSTMUART::CSTMUART() :
m_usart(NULL)
{
}
void CSTMUART::init(USART_TypeDef* usart)
{
m_usart = usart;
}
void CSTMUART::write(const uint8_t * data, uint16_t length)
{
if(length == 0U || m_usart == NULL)
return;
m_txFifo.put(data[0]);
USART_ITConfig(m_usart, USART_IT_TXE, ENABLE);//switch TX IRQ is on
for(uint16_t i = 1U; i < length; i++) {
m_txFifo.put(data[i]);
}
USART_ITConfig(m_usart, USART_IT_TXE, ENABLE);//make sure TX IRQ is on
}
uint8_t CSTMUART::read()
{
return m_rxFifo.get();
}
void CSTMUART::handleIRQ()
{
if(m_usart == NULL)
return;
if (USART_GetITStatus(m_usart, USART_IT_RXNE)) {
if(!m_rxFifo.isFull())
m_rxFifo.put((uint8_t) USART_ReceiveData(m_usart));
USART_ClearITPendingBit(USART1, USART_IT_RXNE);
}
if (USART_GetITStatus(m_usart, USART_IT_TXE)) {
if(!m_txFifo.isEmpty())
USART_SendData(m_usart, m_txFifo.get());
USART_ClearITPendingBit(m_usart, USART_IT_TXE);
if (m_txFifo.isEmpty()) // if there's no more data to transmit then turn off TX interrupts
USART_ITConfig(m_usart, USART_IT_TXE, DISABLE);
}
}
// Flushes the transmit shift register
// warning: this call is blocking
void CSTMUART::flush()
{
if(m_usart == NULL)
return;
// wait until the TXE shows the shift register is empty
while (USART_GetITStatus(m_usart, USART_FLAG_TXE))
;
}
uint16_t CSTMUART::available()
{
return m_rxFifo.isEmpty() ? 0U : 1U;
}
uint16_t CSTMUART::availableForWrite()
{
return m_txFifo.isFull() ? 0U : 1U;
}
#endif
+91
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@@ -0,0 +1,91 @@
/*
* Copyright (c) 2020 by Jonathan Naylor G4KLX
* Copyright (c) 2020 by Geoffrey Merck F4FXL - KC3FRA
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if defined(STM32F4XX) || defined(STM32F7XX)
#if !defined(STMUART_H)
#define STMUART_H
#if defined(STM32F4XX)
#include "stm32f4xx.h"
#elif defined(STM32F7XX)
#include "stm32f7xx.h"
#endif
const uint16_t BUFFER_SIZE = 2048U; //needs to be a power of 2 !
const uint16_t BUFFER_MASK = BUFFER_SIZE - 1;
class CSTMUARTFIFO {
public:
CSTMUARTFIFO() :
m_head(0U),
m_tail(0U)
{
}
void put(uint8_t data)
{
m_buffer[BUFFER_MASK & (m_head++)] = data;
}
uint8_t get()
{
return m_buffer[BUFFER_MASK & (m_tail++)];
}
void reset()
{
m_tail = 0U;
m_head = 0U;
}
bool isEmpty()
{
return m_tail == m_head;
}
bool isFull()
{
return ((m_head + 1U) & BUFFER_MASK) == (m_tail & BUFFER_MASK);
}
private:
volatile uint8_t m_buffer[BUFFER_SIZE];
volatile uint16_t m_head;
volatile uint16_t m_tail;
};
class CSTMUART {
public:
CSTMUART();
void init(USART_TypeDef* usart);
void write(const uint8_t * data, uint16_t length);
uint8_t read();
void handleIRQ();
void flush();
uint16_t available();
uint16_t availableForWrite();
private:
USART_TypeDef * m_usart;
CSTMUARTFIFO m_rxFifo;
CSTMUARTFIFO m_txFifo;
};
#endif
#endif
-106
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@@ -1,106 +0,0 @@
/*
TX fifo control - Copyright (C) KI6ZUM 2015
Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
You should have received a copy of the GNU Library General Public
License along with this library; if not, write to the
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#include "SampleRB.h"
CSampleRB::CSampleRB(uint16_t length) :
m_length(length),
m_head(0U),
m_tail(0U),
m_full(false),
m_overflow(false)
{
m_samples = new uint16_t[length];
m_control = new uint8_t[length];
}
uint16_t CSampleRB::getSpace() const
{
uint16_t n = 0U;
if (m_tail == m_head)
n = m_full ? 0U : m_length;
else if (m_tail < m_head)
n = m_length - m_head + m_tail;
else
n = m_tail - m_head;
if (n > m_length)
n = 0U;
return n;
}
uint16_t CSampleRB::getData() const
{
if (m_tail == m_head)
return m_full ? m_length : 0U;
else if (m_tail < m_head)
return m_head - m_tail;
else
return m_length - m_tail + m_head;
}
bool CSampleRB::put(uint16_t sample, uint8_t control)
{
if (m_full) {
m_overflow = true;
return false;
}
m_samples[m_head] = sample;
m_control[m_head] = control;
m_head++;
if (m_head >= m_length)
m_head = 0U;
if (m_head == m_tail)
m_full = true;
return true;
}
bool CSampleRB::get(uint16_t& sample, uint8_t& control)
{
if (m_head == m_tail && !m_full)
return false;
sample = m_samples[m_tail];
control = m_control[m_tail];
m_full = false;
m_tail++;
if (m_tail >= m_length)
m_tail = 0U;
return true;
}
bool CSampleRB::hasOverflowed()
{
bool overflow = m_overflow;
m_overflow = false;
return overflow;
}
-60
View File
@@ -1,60 +0,0 @@
/*
Serial fifo control - Copyright (C) KI6ZUM 2015
Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
You should have received a copy of the GNU Library General Public
License along with this library; if not, write to the
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#if !defined(SAMPLERB_H)
#define SAMPLERB_H
#if defined(STM32F4XX)
#include "stm32f4xx.h"
#elif defined(STM32F7XX)
#include "stm32f7xx.h"
#elif defined(STM32F105xC)
#include "stm32f1xx.h"
#include <cstddef>
#else
#include <Arduino.h>
#endif
class CSampleRB {
public:
CSampleRB(uint16_t length);
uint16_t getSpace() const;
uint16_t getData() const;
bool put(uint16_t sample, uint8_t control);
bool get(uint16_t& sample, uint8_t& control);
bool hasOverflowed();
private:
uint16_t m_length;
volatile uint16_t* m_samples;
volatile uint8_t* m_control;
volatile uint16_t m_head;
volatile uint16_t m_tail;
volatile bool m_full;
bool m_overflow;
};
#endif
+572 -335
View File
File diff suppressed because it is too large Load Diff
+23 -11
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,7 +21,11 @@
#include "Config.h"
#include "Globals.h"
#include "SerialRB.h"
#include "RingBuffer.h"
#if !defined(SERIAL_SPEED)
#define SERIAL_SPEED 115200
#endif
class CSerialPort {
@@ -50,6 +54,12 @@ public:
void writeNXDNData(const uint8_t* data, uint8_t length);
void writeNXDNLost();
void writeAX25Data(const uint8_t* data, uint16_t length);
void writeFMData(const uint8_t* data, uint16_t length);
void writeFMStatus(uint8_t status);
void writeFMEOT();
void writeCalData(const uint8_t* data, uint8_t length);
void writeRSSIData(const uint8_t* data, uint8_t length);
@@ -60,22 +70,24 @@ public:
void writeDebug(const char* text, int16_t n1, int16_t n2, int16_t n3, int16_t n4);
private:
uint8_t m_buffer[256U];
uint8_t m_ptr;
uint8_t m_len;
uint8_t m_buffer[512U];
uint16_t m_ptr;
uint16_t m_len;
bool m_debug;
CSerialRB m_repeat;
CRingBuffer<uint8_t> m_repeat;
void sendACK();
void sendNAK(uint8_t err);
void getStatus();
void getVersion();
uint8_t setConfig(const uint8_t* data, uint8_t length);
uint8_t setMode(const uint8_t* data, uint8_t length);
uint8_t setConfig(const uint8_t* data, uint16_t length);
uint8_t setMode(const uint8_t* data, uint16_t length);
void setMode(MMDVM_STATE modemState);
uint8_t setFMParams1(const uint8_t* data, uint8_t length);
uint8_t setFMParams2(const uint8_t* data, uint8_t length);
uint8_t setFMParams3(const uint8_t* data, uint8_t length);
uint8_t setFMParams1(const uint8_t* data, uint16_t length);
uint8_t setFMParams2(const uint8_t* data, uint16_t length);
uint8_t setFMParams3(const uint8_t* data, uint16_t length);
uint8_t setFMParams4(const uint8_t* data, uint16_t length);
void processMessage(const uint8_t* data, uint16_t length);
// Hardware versions
void beginInt(uint8_t n, int speed);
-100
View File
@@ -1,100 +0,0 @@
/*
Serial RB control - Copyright (C) KI6ZUM 2015
Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
You should have received a copy of the GNU Library General Public
License along with this library; if not, write to the
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#include "SerialRB.h"
CSerialRB::CSerialRB(uint16_t length) :
m_length(length),
m_head(0U),
m_tail(0U),
m_full(false)
{
m_buffer = new uint8_t[length];
}
void CSerialRB::reset()
{
m_head = 0U;
m_tail = 0U;
m_full = false;
}
uint16_t CSerialRB::getSpace() const
{
uint16_t n = 0U;
if (m_tail == m_head)
n = m_full ? 0U : m_length;
else if (m_tail < m_head)
n = m_length - m_head + m_tail;
else
n = m_tail - m_head;
if (n > m_length)
n = 0U;
return n;
}
uint16_t CSerialRB::getData() const
{
if (m_tail == m_head)
return m_full ? m_length : 0U;
else if (m_tail < m_head)
return m_head - m_tail;
else
return m_length - m_tail + m_head;
}
bool CSerialRB::put(uint8_t c)
{
if (m_full)
return false;
m_buffer[m_head] = c;
m_head++;
if (m_head >= m_length)
m_head = 0U;
if (m_head == m_tail)
m_full = true;
return true;
}
uint8_t CSerialRB::peek() const
{
return m_buffer[m_tail];
}
uint8_t CSerialRB::get()
{
uint8_t value = m_buffer[m_tail];
m_full = false;
m_tail++;
if (m_tail >= m_length)
m_tail = 0U;
return value;
}
-62
View File
@@ -1,62 +0,0 @@
/*
Serial fifo control - Copyright (C) KI6ZUM 2015
Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
You should have received a copy of the GNU Library General Public
License along with this library; if not, write to the
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#if !defined(SERIALRB_H)
#define SERIALRB_H
#if defined(STM32F4XX)
#include "stm32f4xx.h"
#elif defined(STM32F7XX)
#include "stm32f7xx.h"
#elif defined(STM32F105xC)
#include "stm32f1xx.h"
#include <cstddef>
#else
#include <Arduino.h>
#endif
const uint16_t SERIAL_RINGBUFFER_SIZE = 370U;
class CSerialRB {
public:
CSerialRB(uint16_t length = SERIAL_RINGBUFFER_SIZE);
uint16_t getSpace() const;
uint16_t getData() const;
void reset();
bool put(uint8_t c);
uint8_t peek() const;
uint8_t get();
private:
uint16_t m_length;
volatile uint8_t* m_buffer;
volatile uint16_t m_head;
volatile uint16_t m_tail;
volatile bool m_full;
};
#endif
+70 -581
View File
@@ -39,9 +39,7 @@ UART5 - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M
#if defined(STM32F4XX) || defined(STM32F7XX)
#define TX_SERIAL_FIFO_SIZE 512U
#define RX_SERIAL_FIFO_SIZE 512U
#include "STMUART.h"
extern "C" {
void USART1_IRQHandler();
void USART2_IRQHandler();
@@ -50,113 +48,14 @@ extern "C" {
}
/* ************* USART1 ***************** */
#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
volatile uint16_t TXSerialfifohead1, TXSerialfifotail1;
volatile uint16_t RXSerialfifohead1, RXSerialfifotail1;
// Init queues
void TXSerialfifoinit1()
{
TXSerialfifohead1 = 0U;
TXSerialfifotail1 = 0U;
}
void RXSerialfifoinit1()
{
RXSerialfifohead1 = 0U;
RXSerialfifotail1 = 0U;
}
// How full is queue
// TODO decide if how full or how empty is preferred info to return
uint16_t TXSerialfifolevel1()
{
uint32_t tail = TXSerialfifotail1;
uint32_t head = TXSerialfifohead1;
if (tail > head)
return TX_SERIAL_FIFO_SIZE + head - tail;
else
return head - tail;
}
uint16_t RXSerialfifolevel1()
{
uint32_t tail = RXSerialfifotail1;
uint32_t head = RXSerialfifohead1;
if (tail > head)
return RX_SERIAL_FIFO_SIZE + head - tail;
else
return head - tail;
}
// Flushes the transmit shift register
// warning: this call is blocking
void TXSerialFlush1()
{
// wait until the TXE shows the shift register is empty
while (USART_GetITStatus(USART1, USART_FLAG_TXE))
;
}
uint8_t TXSerialfifoput1(uint8_t next)
{
if (TXSerialfifolevel1() < TX_SERIAL_FIFO_SIZE) {
TXSerialfifo1[TXSerialfifohead1] = next;
TXSerialfifohead1++;
if (TXSerialfifohead1 >= TX_SERIAL_FIFO_SIZE)
TXSerialfifohead1 = 0U;
// make sure transmit interrupts are enabled as long as there is data to send
USART_ITConfig(USART1, USART_IT_TXE, ENABLE);
return 1U;
} else {
return 0U; // signal an overflow occurred by returning a zero count
}
}
static CSTMUART m_USART1;
void USART1_IRQHandler()
{
uint8_t c;
if (USART_GetITStatus(USART1, USART_IT_RXNE)) {
c = (uint8_t) USART_ReceiveData(USART1);
if (RXSerialfifolevel1() < RX_SERIAL_FIFO_SIZE) {
RXSerialfifo1[RXSerialfifohead1] = c;
RXSerialfifohead1++;
if (RXSerialfifohead1 >= RX_SERIAL_FIFO_SIZE)
RXSerialfifohead1 = 0U;
} else {
// TODO - do something if rx fifo is full?
}
USART_ClearITPendingBit(USART1, USART_IT_RXNE);
}
if (USART_GetITStatus(USART1, USART_IT_TXE)) {
c = 0U;
if (TXSerialfifohead1 != TXSerialfifotail1) { // if the fifo is not empty
c = TXSerialfifo1[TXSerialfifotail1];
TXSerialfifotail1++;
if (TXSerialfifotail1 >= TX_SERIAL_FIFO_SIZE)
TXSerialfifotail1 = 0U;
USART_SendData(USART1, c);
} else { // if there's no more data to transmit then turn off TX interrupts
USART_ITConfig(USART1, USART_IT_TXE, DISABLE);
}
USART_ClearITPendingBit(USART1, USART_IT_TXE);
}
m_USART1.handleIRQ();
}
void InitUSART1(int speed)
@@ -201,153 +100,20 @@ void InitUSART1(int speed)
USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
// initialize the fifos
TXSerialfifoinit1();
RXSerialfifoinit1();
}
uint8_t AvailUSART1()
{
if (RXSerialfifolevel1() > 0U)
return 1U;
else
return 0U;
}
int AvailForWriteUSART1()
{
return TX_SERIAL_FIFO_SIZE - TXSerialfifolevel1();
}
uint8_t ReadUSART1()
{
uint8_t data_c = RXSerialfifo1[RXSerialfifotail1];
RXSerialfifotail1++;
if (RXSerialfifotail1 >= RX_SERIAL_FIFO_SIZE)
RXSerialfifotail1 = 0U;
return data_c;
}
void WriteUSART1(const uint8_t* data, uint16_t length)
{
for (uint16_t i = 0U; i < length; i++)
TXSerialfifoput1(data[i]);
USART_ITConfig(USART1, USART_IT_TXE, ENABLE);
m_USART1.init(USART1);
}
#endif
/* ************* USART2 ***************** */
#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) || defined(DRCC_DVM)
volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
volatile uint16_t TXSerialfifohead2, TXSerialfifotail2;
volatile uint16_t RXSerialfifohead2, RXSerialfifotail2;
static CSTMUART m_USART2;
// Init queues
void TXSerialfifoinit2()
{
TXSerialfifohead2 = 0U;
TXSerialfifotail2 = 0U;
}
void RXSerialfifoinit2()
{
RXSerialfifohead2 = 0U;
RXSerialfifotail2 = 0U;
}
// How full is queue
// TODO decide if how full or how empty is preferred info to return
uint16_t TXSerialfifolevel2()
{
uint32_t tail = TXSerialfifotail2;
uint32_t head = TXSerialfifohead2;
if (tail > head)
return TX_SERIAL_FIFO_SIZE + head - tail;
else
return head - tail;
}
uint16_t RXSerialfifolevel2()
{
uint32_t tail = RXSerialfifotail2;
uint32_t head = RXSerialfifohead2;
if (tail > head)
return RX_SERIAL_FIFO_SIZE + head - tail;
else
return head - tail;
}
// Flushes the transmit shift register
// warning: this call is blocking
void TXSerialFlush2()
{
// wait until the TXE shows the shift register is empty
while (USART_GetITStatus(USART2, USART_FLAG_TXE))
;
}
uint8_t TXSerialfifoput2(uint8_t next)
{
if (TXSerialfifolevel2() < TX_SERIAL_FIFO_SIZE) {
TXSerialfifo2[TXSerialfifohead2] = next;
TXSerialfifohead2++;
if (TXSerialfifohead2 >= TX_SERIAL_FIFO_SIZE)
TXSerialfifohead2 = 0U;
// make sure transmit interrupts are enabled as long as there is data to send
USART_ITConfig(USART2, USART_IT_TXE, ENABLE);
return 1U;
} else {
return 0U; // signal an overflow occurred by returning a zero count
}
}
void USART2_IRQHandler()
{
uint8_t c;
if (USART_GetITStatus(USART2, USART_IT_RXNE)) {
c = (uint8_t) USART_ReceiveData(USART2);
if (RXSerialfifolevel2() < RX_SERIAL_FIFO_SIZE) {
RXSerialfifo2[RXSerialfifohead2] = c;
RXSerialfifohead2++;
if (RXSerialfifohead2 >= RX_SERIAL_FIFO_SIZE)
RXSerialfifohead2 = 0U;
} else {
// TODO - do something if rx fifo is full?
}
USART_ClearITPendingBit(USART2, USART_IT_RXNE);
}
if (USART_GetITStatus(USART2, USART_IT_TXE)) {
c = 0U;
if (TXSerialfifohead2 != TXSerialfifotail2) { // if the fifo is not empty
c = TXSerialfifo2[TXSerialfifotail2];
TXSerialfifotail2++;
if (TXSerialfifotail2 >= TX_SERIAL_FIFO_SIZE)
TXSerialfifotail2 = 0U;
USART_SendData(USART2, c);
} else { // if there's no more data to transmit then turn off TX interrupts
USART_ITConfig(USART2, USART_IT_TXE, DISABLE);
}
USART_ClearITPendingBit(USART2, USART_IT_TXE);
}
m_USART2.handleIRQ();
}
void InitUSART2(int speed)
@@ -392,41 +158,7 @@ void InitUSART2(int speed)
USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
// initialize the fifos
TXSerialfifoinit2();
RXSerialfifoinit2();
}
uint8_t AvailUSART2()
{
if (RXSerialfifolevel2() > 0U)
return 1U;
else
return 0U;
}
int AvailForWriteUSART2()
{
return TX_SERIAL_FIFO_SIZE - TXSerialfifolevel2();
}
uint8_t ReadUSART2()
{
uint8_t data_c = RXSerialfifo2[RXSerialfifotail2];
RXSerialfifotail2++;
if (RXSerialfifotail2 >= RX_SERIAL_FIFO_SIZE)
RXSerialfifotail2 = 0U;
return data_c;
}
void WriteUSART2(const uint8_t* data, uint16_t length)
{
for (uint16_t i = 0U; i < length; i++)
TXSerialfifoput2(data[i]);
USART_ITConfig(USART2, USART_IT_TXE, ENABLE);
m_USART2.init(USART2);
}
#endif
@@ -434,111 +166,11 @@ void WriteUSART2(const uint8_t* data, uint16_t length)
/* ************* USART3 ***************** */
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
volatile uint8_t TXSerialfifo3[TX_SERIAL_FIFO_SIZE];
volatile uint8_t RXSerialfifo3[RX_SERIAL_FIFO_SIZE];
volatile uint16_t TXSerialfifohead3, TXSerialfifotail3;
volatile uint16_t RXSerialfifohead3, RXSerialfifotail3;
// Init queues
void TXSerialfifoinit3()
{
TXSerialfifohead3 = 0U;
TXSerialfifotail3 = 0U;
}
void RXSerialfifoinit3()
{
RXSerialfifohead3 = 0U;
RXSerialfifotail3 = 0U;
}
// How full is queue
// TODO decide if how full or how empty is preferred info to return
uint16_t TXSerialfifolevel3()
{
uint32_t tail = TXSerialfifotail3;
uint32_t head = TXSerialfifohead3;
if (tail > head)
return TX_SERIAL_FIFO_SIZE + head - tail;
else
return head - tail;
}
uint16_t RXSerialfifolevel3()
{
uint32_t tail = RXSerialfifotail3;
uint32_t head = RXSerialfifohead3;
if (tail > head)
return RX_SERIAL_FIFO_SIZE + head - tail;
else
return head - tail;
}
// Flushes the transmit shift register
// warning: this call is blocking
void TXSerialFlush3()
{
// wait until the TXE shows the shift register is empty
while (USART_GetITStatus(USART3, USART_FLAG_TXE))
;
}
uint8_t TXSerialfifoput3(uint8_t next)
{
if (TXSerialfifolevel3() < TX_SERIAL_FIFO_SIZE) {
TXSerialfifo3[TXSerialfifohead3] = next;
TXSerialfifohead3++;
if (TXSerialfifohead3 >= TX_SERIAL_FIFO_SIZE)
TXSerialfifohead3 = 0U;
// make sure transmit interrupts are enabled as long as there is data to send
USART_ITConfig(USART3, USART_IT_TXE, ENABLE);
return 1U;
} else {
return 0U; // signal an overflow occurred by returning a zero count
}
}
static CSTMUART m_USART3;
void USART3_IRQHandler()
{
uint8_t c;
if (USART_GetITStatus(USART3, USART_IT_RXNE)) {
c = (uint8_t) USART_ReceiveData(USART3);
if (RXSerialfifolevel3() < RX_SERIAL_FIFO_SIZE) {
RXSerialfifo3[RXSerialfifohead3] = c;
RXSerialfifohead3++;
if (RXSerialfifohead3 >= RX_SERIAL_FIFO_SIZE)
RXSerialfifohead3 = 0U;
} else {
// TODO - do something if rx fifo is full?
}
USART_ClearITPendingBit(USART3, USART_IT_RXNE);
}
if (USART_GetITStatus(USART3, USART_IT_TXE)) {
c = 0U;
if (TXSerialfifohead3 != TXSerialfifotail3) { // if the fifo is not empty
c = TXSerialfifo3[TXSerialfifotail3];
TXSerialfifotail3++;
if (TXSerialfifotail3 >= TX_SERIAL_FIFO_SIZE)
TXSerialfifotail3 = 0U;
USART_SendData(USART3, c);
} else { // if there's no more data to transmit then turn off TX interrupts
USART_ITConfig(USART3, USART_IT_TXE, DISABLE);
}
USART_ClearITPendingBit(USART3, USART_IT_TXE);
}
m_USART3.handleIRQ();
}
#if defined(STM32F7_NUCLEO)
@@ -600,41 +232,7 @@ void InitUSART3(int speed)
USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
// initialize the fifos
TXSerialfifoinit3();
RXSerialfifoinit3();
}
uint8_t AvailUSART3()
{
if (RXSerialfifolevel3() > 0U)
return 1U;
else
return 0U;
}
int AvailForWriteUSART3()
{
return TX_SERIAL_FIFO_SIZE - TXSerialfifolevel3();
}
uint8_t ReadUSART3()
{
uint8_t data_c = RXSerialfifo3[RXSerialfifotail3];
RXSerialfifotail3++;
if (RXSerialfifotail3 >= RX_SERIAL_FIFO_SIZE)
RXSerialfifotail3 = 0U;
return data_c;
}
void WriteUSART3(const uint8_t* data, uint16_t length)
{
for (uint16_t i = 0U; i < length; i++)
TXSerialfifoput3(data[i]);
USART_ITConfig(USART3, USART_IT_TXE, ENABLE);
m_USART3.init(USART3);
}
#endif
@@ -642,111 +240,11 @@ void WriteUSART3(const uint8_t* data, uint16_t length)
/* ************* UART5 ***************** */
#if !(defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
volatile uint8_t TXSerialfifo5[TX_SERIAL_FIFO_SIZE];
volatile uint8_t RXSerialfifo5[RX_SERIAL_FIFO_SIZE];
volatile uint16_t TXSerialfifohead5, TXSerialfifotail5;
volatile uint16_t RXSerialfifohead5, RXSerialfifotail5;
// Init queues
void TXSerialfifoinit5()
{
TXSerialfifohead5 = 0U;
TXSerialfifotail5 = 0U;
}
void RXSerialfifoinit5()
{
RXSerialfifohead5 = 0U;
RXSerialfifotail5 = 0U;
}
// How full is queue
// TODO decide if how full or how empty is preferred info to return
uint16_t TXSerialfifolevel5()
{
uint32_t tail = TXSerialfifotail5;
uint32_t head = TXSerialfifohead5;
if (tail > head)
return TX_SERIAL_FIFO_SIZE + head - tail;
else
return head - tail;
}
uint16_t RXSerialfifolevel5()
{
uint32_t tail = RXSerialfifotail5;
uint32_t head = RXSerialfifohead5;
if (tail > head)
return RX_SERIAL_FIFO_SIZE + head - tail;
else
return head - tail;
}
// Flushes the transmit shift register
// warning: this call is blocking
void TXSerialFlush5()
{
// wait until the TXE shows the shift register is empty
while (USART_GetITStatus(UART5, USART_FLAG_TXE))
;
}
uint8_t TXSerialfifoput5(uint8_t next)
{
if (TXSerialfifolevel5() < TX_SERIAL_FIFO_SIZE) {
TXSerialfifo5[TXSerialfifohead5] = next;
TXSerialfifohead5++;
if (TXSerialfifohead5 >= TX_SERIAL_FIFO_SIZE)
TXSerialfifohead5 = 0U;
// make sure transmit interrupts are enabled as long as there is data to send
USART_ITConfig(UART5, USART_IT_TXE, ENABLE);
return 1U;
} else {
return 0U; // signal an overflow occurred by returning a zero count
}
}
static CSTMUART m_UART5;
void UART5_IRQHandler()
{
uint8_t c;
if (USART_GetITStatus(UART5, USART_IT_RXNE)) {
c = (uint8_t) USART_ReceiveData(UART5);
if (RXSerialfifolevel5() < RX_SERIAL_FIFO_SIZE) {
RXSerialfifo5[RXSerialfifohead5] = c;
RXSerialfifohead5++;
if (RXSerialfifohead5 >= RX_SERIAL_FIFO_SIZE)
RXSerialfifohead5 = 0U;
} else {
// TODO - do something if rx fifo is full?
}
USART_ClearITPendingBit(UART5, USART_IT_RXNE);
}
if (USART_GetITStatus(UART5, USART_IT_TXE)) {
c = 0U;
if (TXSerialfifohead5 != TXSerialfifotail5) { // if the fifo is not empty
c = TXSerialfifo5[TXSerialfifotail5];
TXSerialfifotail5++;
if (TXSerialfifotail5 >= TX_SERIAL_FIFO_SIZE)
TXSerialfifotail5 = 0U;
USART_SendData(UART5, c);
} else { // if there's no more data to transmit then turn off TX interrupts
USART_ITConfig(UART5, USART_IT_TXE, DISABLE);
}
USART_ClearITPendingBit(UART5, USART_IT_TXE);
}
m_UART5.handleIRQ();
}
void InitUART5(int speed)
@@ -795,41 +293,7 @@ void InitUART5(int speed)
USART_ITConfig(UART5, USART_IT_RXNE, ENABLE);
// initialize the fifos
TXSerialfifoinit5();
RXSerialfifoinit5();
}
uint8_t AvailUART5()
{
if (RXSerialfifolevel5() > 0U)
return 1U;
else
return 0U;
}
int AvailForWriteUART5()
{
return TX_SERIAL_FIFO_SIZE - TXSerialfifolevel5();
}
uint8_t ReadUART5()
{
uint8_t data_c = RXSerialfifo5[RXSerialfifotail5];
RXSerialfifotail5++;
if (RXSerialfifotail5 >= RX_SERIAL_FIFO_SIZE)
RXSerialfifotail5 = 0U;
return data_c;
}
void WriteUART5(const uint8_t* data, uint16_t length)
{
for (uint16_t i = 0U; i < length; i++)
TXSerialfifoput5(data[i]);
USART_ITConfig(UART5, USART_IT_TXE, ENABLE);
m_UART5.init(UART5);
}
#endif
@@ -841,15 +305,19 @@ void CSerialPort::beginInt(uint8_t n, int speed)
case 1U:
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
InitUSART3(speed);
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
InitUSART1(speed);
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
InitUSART2(speed);
#elif defined(DRCC_DVM)
InitUSART1(speed);
#endif
break;
case 3U:
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
InitUSART1(speed);
#elif defined(DRCC_DVM)
InitUSART2(speed);
#else
InitUART5(speed);
#endif
@@ -864,17 +332,21 @@ int CSerialPort::availableInt(uint8_t n)
switch (n) {
case 1U:
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
return AvailUSART3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
return AvailUSART1();
return m_USART3.availble();//AvailUSART3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
return m_USART1.available();//AvailUSART1();
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
return AvailUSART2();
return m_USART2.available();//AvailUSART2();
#elif defined(DRCC_DVM)
return m_USART1.available();//AvailUSART1();
#endif
case 3U:
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
return AvailUSART1();
return m_USART1.available(); //AvailUSART1();
#elif defined(DRCC_DVM)
return m_USART2.available(); //AvailUSART2();
#else
return AvailUART5();
return m_UART5.available();//AvailUART5();
#endif
default:
return 0;
@@ -886,17 +358,21 @@ int CSerialPort::availableForWriteInt(uint8_t n)
switch (n) {
case 1U:
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
return AvailForWriteUSART3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
return AvailForWriteUSART1();
return m_USART3.availableForWrite(); //AvailForWriteUSART3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
return m_USART1.availableForWrite(); //AvailForWriteUSART1();
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
return AvailForWriteUSART2();
return m_USART2.availableForWrite();//AvailForWriteUSART2();
#elif defined(DRCC_DVM)
return m_USART1.availableForWrite();//AvailForWriteUSART1();
#endif
case 3U:
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
return AvailForWriteUSART1();
return m_USART1.availableForWrite(); //AvailForWriteUSART1();
#elif defined(DRCC_DVM)
return m_USART2.availableForWrite();//AvailForWriteUSART2();
#else
return AvailForWriteUART5();
return m_UART5.availableForWrite();//AvailForWriteUART5();
#endif
default:
return 0;
@@ -908,17 +384,21 @@ uint8_t CSerialPort::readInt(uint8_t n)
switch (n) {
case 1U:
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
return ReadUSART3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
return ReadUSART1();
return m_USART3.read();//ReadUSART3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
return m_USART1.read();//ReadUSART1();
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
return ReadUSART2();
return m_USART2.read();//ReadUSART2();
#elif defined(DRCC_DVM)
return m_USART1.read();//ReadUSART1();
#endif
case 3U:
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
return ReadUSART1();
return m_USART1.read();//ReadUSART1();
#elif defined(DRCC_DVM)
return m_USART2.read();//ReadUSART2();
#else
return ReadUART5();
return m_UART5.read();//ReadUART5();
#endif
default:
return 0U;
@@ -930,28 +410,36 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
switch (n) {
case 1U:
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
WriteUSART3(data, length);
m_USART3.write(data, length); //WriteUSART3(data, length);
if (flush)
TXSerialFlush3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
WriteUSART1(data, length);
m_USART3.flush();//TXSerialFlush3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
m_USART1.write(data, length);//WriteUSART1(data, length);
if (flush)
TXSerialFlush1();
m_USART1.flush();//TXSerialFlush1();
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
WriteUSART2(data, length);
m_USART2.write(data, length);//WriteUSART2(data, length);
if (flush)
TXSerialFlush2();
m_USART2.flush();//TXSerialFlush2();
#elif defined(DRCC_DVM)
m_USART1.write(data, length);//WriteUSART1(data, length);
if (flush)
m_USART1.flush();//TXSerialFlush1();
#endif
break;
case 3U:
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
WriteUSART1(data, length);
m_USART1.write(data, length); //WriteUSART1(data, length);
if (flush)
TXSerialFlush1();
m_USART1.flush();
#elif defined(DRCC_DVM)
m_USART2.write(data, length);//WriteUSART2(data, length);
if (flush)
m_USART2.flush();//TXSerialFlush2();
#else
WriteUART5(data, length);
m_UART5.write(data, length);//WriteUART5(data, length);
if (flush)
TXSerialFlush5();
m_UART5.flush();//TXSerialFlush5();
#endif
break;
default:
@@ -960,3 +448,4 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
}
#endif
@@ -22,13 +22,14 @@ q = 15
scaling_factor = 2**q
# let's generate a sequence of 2nd order IIR filters
#sos = signal.butter(2,[f1/fs*2,f2/fs*2],'pass',output='sos')
sos = signal.cheby1(3,rp,[f1/fs*2,f2/fs*2],'bandpass', output='sos')
sos = signal.cheby1(3,rp,[f1, f2],'bandpass', output='sos', fs=fs)
#os = signal.cheby1(4, rp, f2, 'lowpass', output='sos', fs=fs) #deemphasis filter
#sos = signal.cheby1(1, rp, 2122, 'highpass', output='sos', fs=fs) #deemphasis filter
sos = np.round((sos) * scaling_factor)
sosrounded = np.round((sos) * scaling_factor)
# print coefficients
for biquad in sos:
for biquad in sosrounded:
for coeff in biquad:
print(int(coeff),",",sep="",end="")
#print((coeff),",",sep="",end="")
@@ -36,10 +37,10 @@ for biquad in sos:
# plot the frequency response
b,a = signal.sos2tf(sos)
w,h = signal.freqz(b,a)
w,h = signal.freqz(b,a, worN=2048)
pl.plot(w/np.pi/2*fs,20*np.log(np.abs(h)))
pl.xlabel('frequency/Hz');
pl.ylabel('gain/dB');
pl.ylim(top=1,bottom=-20);
pl.ylim(top=1,bottom=-30);
pl.xlim(left=250, right=12000);
pl.show()
+58
View File
@@ -0,0 +1,58 @@
% GNU Octave script to generate pre and deemphasis filters
% https://dsp.stackexchange.com/questions/34605/biquad-cookbook-formula-for-broadcast-fm-de-emphasis
% PACKAGES
pkg load control
pkg load signal
clear all;
clc;
fs = 24000;
samplingtime = 1/fs;
% analog prototype
A2 = [1];
B2 = [0.000075 1];
% Pre
Ds = tf(B2, A2);
% De
% Ds = tf(A2, B2);
Ds = Ds/dcgain(Ds);
% MZT
T1 = 0.000075; % 75us
z1 = -exp(-1.0/(fs*T1));
p1 = 1+z1;
a0 = 1.0;
a1 = p1;
a2 = 0;
b0 = 1.0;
b1 = z1;
b2 = 0;
% swap between a1, b1 to select pre- or de-emphasis
# Pre
Bmzt = [b0 a1 b2]
Amzt = [a0 b1 a2]
% De
% Bmzt = [b0 b1 b2]
% Amzt = [a0 a1 a2]
DzMZT = tf(Amzt, Bmzt, samplingtime);
DzMZT = DzMZT/dcgain(DzMZT);
%% Plot
wmin = 2 * pi * 20.0; % 20Hz
wmax = 2 * pi * ((fs/2.0) - (fs/2 - 20000)); %20kHz
figure(1);
bode(Ds, 'b', DzMZT, 'c', {wmin, wmax});
legend('Analog prototype', 'MZT 2nd order','location', 'northwest');
grid on;
pause();
+1 -1
View File
@@ -36,7 +36,7 @@ const uint8_t NOAVEPTR = 99U;
const uint16_t NOENDPTR = 9999U;
const unsigned int MAX_SYNC_FRAMES = 4U + 1U;
const unsigned int MAX_SYNC_FRAMES = 1U + 1U;
CYSFRX::CYSFRX() :
m_state(YSFRXS_NONE),
+4 -7
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2009-2018 by Jonathan Naylor G4KLX
* Copyright (C) 2009-2018,2020 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU
*
* This program is free software; you can redistribute it and/or modify
@@ -66,9 +66,6 @@ m_txCount(0U)
void CYSFTX::process()
{
if (m_buffer.getData() == 0U && m_poLen == 0U && m_txCount == 0U)
return;
// If we have YSF data to transmit, do so.
if (m_poLen == 0U && m_buffer.getData() > 0U) {
if (!m_tx) {
@@ -76,7 +73,8 @@ void CYSFTX::process()
m_poBuffer[m_poLen++] = YSF_START_SYNC;
} else {
for (uint8_t i = 0U; i < YSF_FRAME_LENGTH_BYTES; i++) {
uint8_t c = m_buffer.get();
uint8_t c = 0U;
m_buffer.get(c);
m_poBuffer[m_poLen++] = c;
}
}
@@ -119,7 +117,7 @@ void CYSFTX::process()
}
}
uint8_t CYSFTX::writeData(const uint8_t* data, uint8_t length)
uint8_t CYSFTX::writeData(const uint8_t* data, uint16_t length)
{
if (length != (YSF_FRAME_LENGTH_BYTES + 1U))
return 4U;
@@ -191,4 +189,3 @@ void CYSFTX::setParams(bool on, uint8_t txHang)
m_loDev = on;
m_txHang = txHang * 1200U;
}
+4 -4
View File
@@ -1,5 +1,5 @@
/*
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2015,2016,2017,2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,13 +21,13 @@
#include "Config.h"
#include "SerialRB.h"
#include "RingBuffer.h"
class CYSFTX {
public:
CYSFTX();
uint8_t writeData(const uint8_t* data, uint8_t length);
uint8_t writeData(const uint8_t* data, uint16_t length);
void process();
@@ -38,7 +38,7 @@ public:
void setParams(bool on, uint8_t txHang);
private:
CSerialRB m_buffer;
CRingBuffer<uint8_t> m_buffer;
arm_fir_interpolate_instance_q15 m_modFilter;
q15_t m_modState[16U]; // blockSize + phaseLength - 1, 4 + 9 - 1 plus some spare
uint8_t m_poBuffer[1200U];
+96
View File
@@ -0,0 +1,96 @@
/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_DISCOVERY_H
#define _PINS_F4_DISCOVERY_H
/*
Pin definitions for STM32F4 Discovery Board:
PTT PB13 output P1 Pin37
COSLED PA7 output P1 Pin17
LED PD15 output P1 Pin47
COS PA5 input P1 Pin15
DSTAR PD12 output P1 Pin44
DMR PD13 output P1 Pin45
YSF PD14 output P1 Pin46
P25 PD11 output P1 Pin43
NXDN PD10 output P1 Pin42
RX PA0 analog input P1 Pin12
RSSI PA1 analog input P1 Pin11
TX PA4 analog output P1 Pin16
EXT_CLK PA15 input P2 Pin40
*/
#define PIN_COS GPIO_Pin_5
#define PORT_COS GPIOA
#define RCC_Per_COS RCC_AHB1Periph_GPIOA
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_7
#define PORT_COSLED GPIOA
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOA
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOD
#define RCC_Per_LED RCC_AHB1Periph_GPIOD
#define PIN_P25 GPIO_Pin_11
#define PORT_P25 GPIOD
#define RCC_Per_P25 RCC_AHB1Periph_GPIOD
#define PIN_NXDN GPIO_Pin_10
#define PORT_NXDN GPIOD
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOD
#define PIN_DSTAR GPIO_Pin_12
#define PORT_DSTAR GPIOD
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOD
#define PIN_DMR GPIO_Pin_13
#define PORT_DMR GPIOD
#define RCC_Per_DMR RCC_AHB1Periph_GPIOD
#define PIN_YSF GPIO_Pin_14
#define PORT_YSF GPIOD
#define RCC_Per_YSF RCC_AHB1Periph_GPIOD
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
+144
View File
@@ -0,0 +1,144 @@
/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_DRCC_NQF_H
#define _PINS_F4_DRCC_NQF_H
/*
Pin definitions for DRCC_DVM BG7NQF board rev1
TX/PTT_LED PB12 output
RX/COS_LED PB5 output
STATUS_LED PB10 output
COS_IN PB13 input
DSTAR N/A
DMR N/A
YSF N/A
P25 N/A
NXDN N/A
POCSAG N/A
MDMR/BIT0 PB8 output
MYSF/BIT1 PB9 output
MDSTAR/BIT2 PB14 output
MP25/BIT3 PB15 output Generic Mode Pins
MNXDN N/A
MPOCSAG N/A
RX PA0 analog input
RSSI PA1 analog input
TX PA4 analog output
EXT_CLK PA15 input
UART1_TX PA9 output
UART1_RX PA10 output Host Data Communication
UART2_TX PA2 output
UART2_RX PA3 output Nextion Data Communication
I2C1_SCL PB6 output
I2C1_SDA PB7 output OLED Data Communication as master
*/
#define PIN_COS GPIO_Pin_13
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_12
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_5
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_10
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_TXLED GPIO_Pin_4
#define PORT_TXLED GPIOB
#define RCC_Per_TXLED RCC_AHB1Periph_GPIOB
// #define PIN_P25 GPIO_Pin_3
// #define PORT_P25 GPIOB
// #define RCC_Per_P25 RCC_AHB1Periph_GPIOB
// #define PIN_NXDN GPIO_Pin_10
// #define PORT_NXDN GPIOA
// #define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
// #define PIN_POCSAG GPIO_Pin_12
// #define PORT_POCSAG GPIOB
// #define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
// #define PIN_DSTAR GPIO_Pin_10
// #define PORT_DSTAR GPIOB
// #define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
// #define PIN_DMR GPIO_Pin_4
// #define PORT_DMR GPIOB
// #define RCC_Per_DMR RCC_AHB1Periph_GPIOB
// #define PIN_YSF GPIO_Pin_5
// #define PORT_YSF GPIOB
// #define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#if defined(MODE_PINS)
#define PIN_MP25 GPIO_Pin_15
#define PORT_MP25 GPIOB
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOB
#define PIN_MDSTAR GPIO_Pin_9
#define PORT_MDSTAR GPIOB
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOB
#define PIN_MDMR GPIO_Pin_8
#define PORT_MDMR GPIOB
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOB
#define PIN_MYSF GPIO_Pin_14
#define PORT_MYSF GPIOB
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOB
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#define PORT_TX GPIOA
#define RCC_Per_TX RCC_AHB1Periph_GPIOA
#endif
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_F4M_H
#define _PINS_F4_F4M_H
/*
Pin definitions for MMDVM-F4M Pi-Hat F0DEI board:
PTT PB13 output
COSLED PB14 output
LED PB15 output
COS PC0 input
DSTAR PC7 output
DMR PC8 output
YSF PA8 output
P25 PC9 output
NXDN PB1 output
POCSAG PB12 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_9
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_1
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_7
#define PORT_DSTAR GPIOC
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
#define PIN_DMR GPIO_Pin_8
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_8
#define PORT_YSF GPIOA
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_NUCLEO_ARDUINO_H
#define _PINS_F4_NUCLEO_ARDUINO_H
/*
Pin definitions for STM32F4 Nucleo boards (Arduino header):
PTT PB10 output CN9 Pin7
COSLED PB3 output CN9 Pin4
LED PB5 output CN9 Pin5
COS PB4 input CN9 Pin6
DSTAR PA1 output CN8 Pin2
DMR PA4 output CN8 Pin3
YSF PB0 output CN8 Pin4
P25 PC1 output CN8 Pin5
NXDN PA3 output CN9 Pin1
POCSAG PB12 output
RX PA0 analog input CN8 Pin1
RSSI PC0 analog input CN8 Pin6
TX PA5 analog output CN5 Pin6
EXT_CLK PB8 input CN5 Pin10
*/
#define PIN_COS GPIO_Pin_4
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_10
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_3
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_5
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_1
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_3
#define PORT_NXDN GPIOA
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_1
#define PORT_DSTAR GPIOA
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOA
#define PIN_DMR GPIO_Pin_4
#define PORT_DMR GPIOA
#define RCC_Per_DMR RCC_AHB1Periph_GPIOA
#define PIN_YSF GPIO_Pin_0
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#define PIN_EXT_CLK GPIO_Pin_8
#define SRC_EXT_CLK GPIO_PinSource8
#define PORT_EXT_CLK GPIOB
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_0
#define PIN_RSSI_CH ADC_Channel_10
#define PORT_RSSI GPIOC
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOC
#define PIN_TX GPIO_Pin_5
#define PIN_TX_CH DAC_Channel_2
#endif
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_NUCLEO_MORPHO_H
#define _PINS_F4_NUCLEO_MORPHO_H
/*
Pin definitions for STM32F4 Nucleo boards (ST Morpho header):
PTT PB13 output CN10 Pin30
COSLED PB14 output CN10 Pin28
LED PA5 output CN10 Pin11
COS PB15 input CN10 Pin26
DSTAR PB10 output CN10 Pin25
DMR PB4 output CN10 Pin27
YSF PB5 output CN10 Pin29
P25 PB3 output CN10 Pin31
NXDN PA10 output CN10 Pin33
POCSAG PB12 output CN10 Pin16
MDSTAR PC4 output CN10 Pin34
MDMR PC5 output CN10 Pin6
MYSF PC2 output CN7 Pin35
MP25 PC3 output CN7 Pin37
MNXDN PC6 output CN10 Pin4
MPOCSAG PC8 output CN10 Pin2
RX PA0 analog input CN7 Pin28
RSSI PA1 analog input CN7 Pin30
TX PA4 analog output CN7 Pin32
EXT_CLK PA15 input CN7 Pin17
*/
#define PIN_COS GPIO_Pin_15
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_5
#define PORT_LED GPIOA
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
#define PIN_P25 GPIO_Pin_3
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_10
#define PORT_NXDN GPIOA
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_10
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_4
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_5
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#if defined(MODE_PINS)
#define PIN_MP25 GPIO_Pin_3
#define PORT_MP25 GPIOC
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
#define PIN_MNXDN GPIO_Pin_6
#define PORT_MNXDN GPIOC
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
#define PIN_MDSTAR GPIO_Pin_4
#define PORT_MDSTAR GPIOC
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
#define PIN_MDMR GPIO_Pin_5
#define PORT_MDMR GPIOC
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
#define PIN_MYSF GPIO_Pin_2
#define PORT_MYSF GPIOC
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
#define PIN_MPOCSAG GPIO_Pin_8
#define PORT_MPOCSAG GPIOC
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_PI_H
#define _PINS_F4_PI_H
/*
Pin definitions for STM32F4 Pi Board:
PTT PB13 output
COSLED PB14 output
LED PB15 output
COS PC0 input
DSTAR PC7 output
DMR PC8 output
YSF PA8 output
P25 PC9 output
NXDN PB1 output
POCSAG PB12 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_9
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_1
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_7
#define PORT_DSTAR GPIOC
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
#define PIN_DMR GPIO_Pin_8
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_8
#define PORT_YSF GPIOA
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_RPT_TGO_H
#define _PINS_F4_RPT_TGO_H
/*
Pin definitions for MMDVM_RPT_Hat Pi-Hat BG4TGO board::
PTT PB13 output CN10 Pin30
COSLED PB14 output CN10 Pin28
LED PA5 output CN10 Pin11
COS PB15 input CN10 Pin26
DSTAR PB10 output CN10 Pin25
DMR PB4 output CN10 Pin27
YSF PB5 output CN10 Pin29
P25 PB3 output CN10 Pin31
NXDN PA10 output CN10 Pin33
POCSAG PB12 output CN10 Pin16
MDSTAR PC4 output CN10 Pin34
MDMR PC5 output CN10 Pin6
MYSF PC2 output CN7 Pin35
MP25 PC3 output CN7 Pin37
MNXDN PC6 output CN10 Pin4
MPOCSAG PC8 output CN10 Pin2
RX PA0 analog input CN7 Pin28
RSSI PA1 analog input CN7 Pin30
TX PA4 analog output CN7 Pin32
EXT_CLK PA15 input CN7 Pin17
*/
#define PIN_COS GPIO_Pin_15
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_5
#define PORT_LED GPIOA
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
#define PIN_P25 GPIO_Pin_3
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_10
#define PORT_NXDN GPIOA
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_10
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_4
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_5
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#if defined(MODE_PINS)
#define PIN_MP25 GPIO_Pin_3
#define PORT_MP25 GPIOC
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
#define PIN_MNXDN GPIO_Pin_6
#define PORT_MNXDN GPIOC
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
#define PIN_MDSTAR GPIO_Pin_4
#define PORT_MDSTAR GPIOC
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
#define PIN_MDMR GPIO_Pin_5
#define PORT_MDMR GPIOC
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
#define PIN_MYSF GPIO_Pin_2
#define PORT_MYSF GPIOC
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
#define PIN_MPOCSAG GPIO_Pin_8
#define PORT_MPOCSAG GPIOC
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_STM32DVM_V3_H
#define _PINS_F4_STM32DVM_V3_H
/*
Pin definitions for STM32F4 STM32-DVM rev 3 Board:
COS PB13 input
PTT PB12 output
COSLED PB4 output
LED PB3 output
P25 PB8 output
NXDN PB9 output
DSTAR PB6 output
DMR PB5 output
YSF PB7 output
POCSAG PC10 output
RX PB0 analog input
RSSI PB1 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_13
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_12
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_4
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_3
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_8
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_9
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_6
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_5
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_7
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#define PIN_POCSAG GPIO_Pin_10
#define PORT_POCSAG GPIOC
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOC
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_8
#define PORT_RX GPIOB
#define RCC_Per_RX RCC_AHB1Periph_GPIOB
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_9
#define PORT_RSSI GPIOB
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOB
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_STM32EDA
#define _PINS_F4_STM32EDA
/*
Pin definitions for STM32F4 STM32-DVM-MTR2K & STM32-DVM-MASTR3:
COS PB13 input
PTT PB12 output
COSLED PB4 output
LED PB3 output
P25 PB8 output
NXDN PB9 output
DSTAR PB6 output
DMR PB5 output
YSF PB7 output
POCSAG PC10 output
FM PC11 output
RX PB0 analog input
RSSI PB1 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_13
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_12
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_4
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_3
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_8
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_9
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_6
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_5
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_7
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#define PIN_POCSAG GPIO_Pin_10
#define PORT_POCSAG GPIOC
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOC
#define PIN_FM GPIO_Pin_11
#define PORT_FM GPIOC
#define RCC_Per_FM RCC_AHB1Periph_GPIOC
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_8
#define PORT_RX GPIOB
#define RCC_Per_RX RCC_AHB1Periph_GPIOB
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_9
#define PORT_RSSI GPIOB
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOB
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F7_F7M_H
#define _PINS_F7_F7M_H
/*
Pin definitions for MMDVM-F7M Pi-Hat F0DEI board:
PTT PB13 output
COSLED PB14 output
LED PB15 output
COS PC0 input
DSTAR PC7 output
DMR PC8 output
YSF PA8 output
P25 PC9 output
NXDN PB1 output
POCSAG PB12 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_9
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_1
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_7
#define PORT_DSTAR GPIOC
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
#define PIN_DMR GPIO_Pin_8
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_8
#define PORT_YSF GPIOA
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F7_NUCLEO_H
#define _PINS_F7_NUCLEO_H
/*
Pin definitions for STM32F7 Nucleo boards (ST Morpho header):
PTT PB13 output CN12 Pin30
COSLED PB14 output CN12 Pin28
LED PA5 output CN12 Pin11
COS PB15 input CN12 Pin26
DSTAR PB10 output CN12 Pin25
DMR PB4 output CN12 Pin27
YSF PB5 output CN12 Pin29
P25 PB3 output CN12 Pin31
NXDN PA10 output CN12 Pin33
POCSAG PB12 output CN12 Pin16
MDSTAR PC4 output CN12 Pin34
MDMR PC5 output CN12 Pin6
MYSF PC2 output CN11 Pin35
MP25 PC3 output CN11 Pin37
MNXDN PC6 output CN12 Pin4
RX PA0 analog input CN11 Pin28
RSSI PA1 analog input CN11 Pin30
TX PA4 analog output CN11 Pin32
EXT_CLK PA15 input CN11 Pin17
*/
#define PIN_COS GPIO_Pin_15
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_5
#define PORT_LED GPIOA
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
#define PIN_P25 GPIO_Pin_3
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_10
#define PORT_NXDN GPIOA
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_10
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_4
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_5
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#if defined(MODE_PINS)
#define PIN_MP25 GPIO_Pin_3
#define PORT_MP25 GPIOC
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
#define PIN_MNXDN GPIO_Pin_6
#define PORT_MNXDN GPIOC
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
#define PIN_MDSTAR GPIO_Pin_4
#define PORT_MDSTAR GPIOC
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
#define PIN_MDMR GPIO_Pin_5
#define PORT_MDMR GPIOC
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
#define PIN_MYSF GPIO_Pin_2
#define PORT_MYSF GPIOC
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F7_PI_H
#define _PINS_F7_PI_H
/*
Pin definitions for STM32F722 Pi Board:
PTT PB13 output
COSLED PB14 output
LED PB15 output
COS PC0 input
DSTAR PC7 output
DMR PC8 output
YSF PA8 output
P25 PC9 output
NXDN PB1 output
POCSAG PB12 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_9
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_1
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_7
#define PORT_DSTAR GPIOC
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
#define PIN_DMR GPIO_Pin_8
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_8
#define PORT_YSF GPIOA
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F7_RPT_HAT_H
#define _PINS_F7_RPT_HAT_H
/*
Pin definitions for MMDVM_RPT_Hat Pi-Hat F0DEI DB9MAT DF2ET board:
PTT PB14 output
COSLED PB13 output
LED PB12 output
COS PC0 input
DSTAR PB15 output
DMR PC6 output
YSF PC7 output
P25 PC8 output
NXDN PC9 output
POCSAG PA8 output
FM PA11 output
MDSTAR PC1 output
MDMR PC2 output
MYSF PC3 output
MP25 PC4 output
MNXDN PC10 output
MPOCSAG PC11 output
MFM PC13 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_14
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_13
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_12
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_8
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_9
#define PORT_NXDN GPIOC
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOC
#define PIN_POCSAG GPIO_Pin_8
#define PORT_POCSAG GPIOA
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOA
#define PIN_FM GPIO_Pin_11
#define PORT_FM GPIOA
#define RCC_Per_FM RCC_AHB1Periph_GPIOA
#define PIN_DSTAR GPIO_Pin_15
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_6
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_7
#define PORT_YSF GPIOC
#define RCC_Per_YSF RCC_AHB1Periph_GPIOC
#if defined(MODE_PINS)
#define PIN_MP25 GPIO_Pin_4
#define PORT_MP25 GPIOC
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
#define PIN_MNXDN GPIO_Pin_10
#define PORT_MNXDN GPIOC
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
#define PIN_MDSTAR GPIO_Pin_1
#define PORT_MDSTAR GPIOC
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
#define PIN_MDMR GPIO_Pin_2
#define PORT_MDMR GPIOC
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
#define PIN_MYSF GPIO_Pin_3
#define PORT_MYSF GPIOC
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
#define PIN_MPOCSAG GPIO_Pin_11
#define PORT_MPOCSAG GPIOC
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
#define PIN_MFM GPIO_Pin_13
#define PORT_MFM GPIOC
#define RCC_Per_MFM RCC_AHB1Periph_GPIOC
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif