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+3
-5
@@ -1,5 +1,3 @@
|
||||
*.o
|
||||
obj/
|
||||
bin/
|
||||
GitVersion.h
|
||||
build/
|
||||
.pio
|
||||
.vscode
|
||||
|
||||
|
||||
@@ -1,9 +0,0 @@
|
||||
[submodule "STM32F4XX_Lib"]
|
||||
path = STM32F4XX_Lib
|
||||
url = https://github.com/juribeparada/STM32F4XX_Lib.git
|
||||
[submodule "STM32F7XX_Lib"]
|
||||
path = STM32F7XX_Lib
|
||||
url = https://github.com/juribeparada/STM32F7XX_Lib.git
|
||||
[submodule "STM32F10X_Lib"]
|
||||
path = STM32F10X_Lib
|
||||
url = https://github.com/shawnchain/STM32F10X_Lib.git
|
||||
|
||||
-120
@@ -1,120 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
#include "AX25RX.h"
|
||||
|
||||
/*
|
||||
* Generated with Scipy Filter, 152 coefficients, 1100-2300Hz bandpass,
|
||||
* Hann window, starting and ending 0 value coefficients removed.
|
||||
*
|
||||
* np.array(
|
||||
* firwin2(152,
|
||||
* [
|
||||
* 0.0,
|
||||
* 1000.0/(sample_rate/2),
|
||||
* 1100.0/(sample_rate/2),
|
||||
* 2350.0/(sample_rate/2),
|
||||
* 2500.0/(sample_rate/2),
|
||||
* 1.0
|
||||
* ],
|
||||
* [0,0,1,1,0,0],
|
||||
* antisymmetric = False,
|
||||
* window='hann') * 32768,
|
||||
* dtype=int)[10:-10]
|
||||
*/
|
||||
const uint32_t FILTER_LEN = 132;
|
||||
q15_t FILTER_COEFFS[] = {
|
||||
0, 5, 12, 18, 21, 19, 11, -2, -15, -25,
|
||||
-27, -21, -11, -3, -5, -19, -43, -69, -83, -73,
|
||||
-35, 27, 98, 155, 180, 163, 109, 39, -20, -45,
|
||||
-26, 23, 74, 89, 39, -81, -247, -407, -501, -480,
|
||||
-334, -92, 175, 388, 479, 429, 275, 99, 5, 68,
|
||||
298, 626, 913, 994, 740, 115, -791, -1770, -2544, -2847,
|
||||
-2509, -1527, -76, 1518, 2875, 3653, 3653, 2875, 1518, -76,
|
||||
-1527, -2509, -2847, -2544, -1770, -791, 115, 740, 994, 913,
|
||||
626, 298, 68, 5, 99, 275, 429, 479, 388, 175,
|
||||
-92, -334, -480, -501, -407, -247, -81, 39, 89, 74,
|
||||
23, -26, -45, -20, 39, 109, 163, 180, 155, 98,
|
||||
27, -35, -73, -83, -69, -43, -19, -5, -3, -11,
|
||||
-21, -27, -25, -15, -2, 11, 19, 21, 18, 12,
|
||||
5, 0
|
||||
};
|
||||
|
||||
CAX25RX::CAX25RX() :
|
||||
m_filter(),
|
||||
m_state(),
|
||||
m_demod1(3),
|
||||
m_demod2(6),
|
||||
m_demod3(9),
|
||||
m_lastFCS(0U),
|
||||
m_count(0U)
|
||||
{
|
||||
m_filter.numTaps = FILTER_LEN;
|
||||
m_filter.pState = m_state;
|
||||
m_filter.pCoeffs = FILTER_COEFFS;
|
||||
}
|
||||
|
||||
void CAX25RX::samples(q15_t* samples, uint8_t length)
|
||||
{
|
||||
q15_t output[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_filter, samples, output, RX_BLOCK_SIZE);
|
||||
|
||||
m_count++;
|
||||
|
||||
CAX25Frame frame;
|
||||
|
||||
bool ret = m_demod1.process(output, length, frame);
|
||||
if (ret) {
|
||||
if (frame.m_fcs != m_lastFCS || m_count > 2U) {
|
||||
m_lastFCS = frame.m_fcs;
|
||||
m_count = 0U;
|
||||
serial.writeAX25Data(frame.m_data, frame.m_length - 2U);
|
||||
}
|
||||
DEBUG1("Decoder 1 reported");
|
||||
}
|
||||
|
||||
ret = m_demod2.process(output, length, frame);
|
||||
if (ret) {
|
||||
if (frame.m_fcs != m_lastFCS || m_count > 2U) {
|
||||
m_lastFCS = frame.m_fcs;
|
||||
m_count = 0U;
|
||||
serial.writeAX25Data(frame.m_data, frame.m_length - 2U);
|
||||
}
|
||||
DEBUG1("Decoder 2 reported");
|
||||
}
|
||||
|
||||
ret = m_demod3.process(output, length, frame);
|
||||
if (ret) {
|
||||
if (frame.m_fcs != m_lastFCS || m_count > 2U) {
|
||||
m_lastFCS = frame.m_fcs;
|
||||
m_count = 0U;
|
||||
serial.writeAX25Data(frame.m_data, frame.m_length - 2U);
|
||||
}
|
||||
DEBUG1("Decoder 3 reported");
|
||||
}
|
||||
}
|
||||
|
||||
void CAX25RX::setParams(int8_t twist)
|
||||
{
|
||||
m_demod1.setTwist(twist - 3);
|
||||
m_demod2.setTwist(twist);
|
||||
m_demod3.setTwist(twist + 3);
|
||||
}
|
||||
|
||||
@@ -1,125 +0,0 @@
|
||||
In order to build MMDVM, you need to tell the Arduino GUI to link with the
|
||||
CMSIS DSP library, which is doesn't do by default.
|
||||
|
||||
My development is on Windows and so I can vouch for the following instructions.
|
||||
|
||||
For Arduino 1.6.3 with SAM 1.6.4
|
||||
--------------------------------
|
||||
|
||||
1. Go to the where the platform.txt file is located. On my Windows machine it's
|
||||
in:
|
||||
|
||||
C:\Users\Jonathan\AppData\Roaming\Arduino15\packages\arduino\hardware\sam\1.6.4
|
||||
|
||||
On Mac OS X it's located in:
|
||||
|
||||
/Applications/Arduino.app/Contents/Resources/Java/hardware/arduino/sam
|
||||
Or
|
||||
~/Library/Arduino15/packages/arduino/hardware/sam/1.6.6
|
||||
|
||||
2. You'll need to open the file in a text editor and find the line:
|
||||
|
||||
## Combine gc-sections, archives, and objects
|
||||
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} -mcpu={build.mcu} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols -Wl,--start-group "{build.path}/syscalls_sam3.c.o" {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
|
||||
|
||||
In my version it's line 73.
|
||||
|
||||
3. Modify it to read as follows:
|
||||
|
||||
## Combine gc-sections, archives, and objects
|
||||
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} -mcpu={build.mcu} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols -Wl,--start-group "{build.path}/syscalls_sam3.c.o" {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.system.path}/CMSIS/CMSIS/Lib/ARM/arm_cortexM3l_math.lib" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
|
||||
|
||||
The change is near the end, and is the addition of:
|
||||
|
||||
"{build.system.path}/CMSIS/CMSIS/Lib/ARM/arm_cortexM3l_math.lib"
|
||||
|
||||
Which is the CMSIS AMR3 DSP library for little-endian operation.
|
||||
|
||||
4. Save the file and start up the Arduino GUI and build MMDVM.
|
||||
|
||||
I would like to get instructions for doing the same on a Linux platform. As a
|
||||
starter find the relevent platform.txt and try adding:
|
||||
|
||||
"{build.system.path}/CMSIS/CMSIS/Lib/ARM/libarm_cortexM3l_math.a"
|
||||
|
||||
or maybe:
|
||||
|
||||
"{build.variant.path}/libarm_cortexM3l_math.a"
|
||||
|
||||
Likely on Linux
|
||||
|
||||
"{build.system.path}/CMSIS/CMSIS/Lib/GCC/libarm_cortexM3l_math.a"
|
||||
|
||||
As with Arduino 1.6.7 with SAM 1.6.6, see below.
|
||||
|
||||
|
||||
For Arduino 1.6.7 with SAM 1.6.6
|
||||
--------------------------------
|
||||
(checked OK on Arduino 1.6.11 and SAM 1.6.9)
|
||||
|
||||
1. Go to the where the platform.txt file is located. On my Windows machine it's
|
||||
in:
|
||||
|
||||
C:\Users\Jonathan\AppData\Local\Arduino15\packages\arduino\hardware\sam\1.6.6
|
||||
|
||||
On Mac OS X it's located in:
|
||||
|
||||
/Applications/Arduino.app/Contents/Resources/Java/hardware/arduino/sam
|
||||
|
||||
On Linux, it's located in my home directory, downloaded and extracted from Arduino website, but must be installed.
|
||||
|
||||
/home/m1geo/arduino-1.6.7/hardware/arduino/sam
|
||||
|
||||
or
|
||||
|
||||
/home/m1geo/.arduino15/packages/arduino/hardware/sam/1.6.9 (if you let the board/library manager install SAM)
|
||||
|
||||
|
||||
I (M1GEO) found it was necessary to download SAM-1.6.6 outside of the Arduino IDE, and manually extract the files.
|
||||
The Board Manager didn't seem to install the SAM files correctly. Here's how I did it:
|
||||
|
||||
a) wget http://downloads.arduino.cc/cores/sam-1.6.6.tar.bz2 -O /tmp/sam-1.6.6.tar.bz2 (download and save in /tmp)
|
||||
b) cd arduino-1.6.7/hardware/arduino/ (Arduino root, here, in my home directory)
|
||||
c) tar xvfj /tmp/sam-1.6.6.tar.bz2
|
||||
|
||||
2. You'll need to open the file (platform.txt) in a text editor and find the line:
|
||||
|
||||
## Combine gc-sections, archives, and objects
|
||||
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mcpu={build.mcu} -mthumb {compiler.c.elf.flags} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group "{build.path}/core/syscalls_sam3.c.o" {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
|
||||
|
||||
In my version it's line 73.
|
||||
|
||||
3. Modify it to read as follows:
|
||||
|
||||
## Combine gc-sections, archives, and objects
|
||||
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mcpu={build.mcu} -mthumb {compiler.c.elf.flags} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group "{build.path}/core/syscalls_sam3.c.o" {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.system.path}/CMSIS/CMSIS/Lib/ARM/arm_cortexM3l_math.lib" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
|
||||
|
||||
The change is near the end, and is the addition of:
|
||||
|
||||
"{build.system.path}/CMSIS/CMSIS/Lib/ARM/arm_cortexM3l_math.lib"
|
||||
|
||||
On Linux, the path was found to differ slightly (GCC instead of ARM):
|
||||
|
||||
"{build.system.path}/CMSIS/CMSIS/Lib/GCC/libarm_cortexM3l_math.a"
|
||||
|
||||
Which is the CMSIS AMR3 DSP library for little-endian operation.
|
||||
|
||||
4. Save the file and start up the Arduino GUI and build MMDVM.
|
||||
|
||||
For Arduino 1.6.9 with SAM 1.6.8
|
||||
--------------------------------
|
||||
|
||||
1. Locate platform.txt. On Ubuntu 14.04 LTS x86_64 OS it is in:
|
||||
|
||||
/home/$user/.arduino15/packages/arduino/hardware/sam/1.6.8/
|
||||
|
||||
2. Open the file in a text editor and change the line:
|
||||
|
||||
## Combine gc-sections, archives, and objects
|
||||
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mcpu={build.mcu} -mthumb {compiler.c.elf.flags} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group {compiler.combine.flags} {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
|
||||
|
||||
to
|
||||
|
||||
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mcpu={build.mcu} -mthumb {compiler.c.elf.flags} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group {compiler.combine.flags} {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.system.path}/CMSIS/CMSIS/Lib/GCC/libarm_cortexM3l_math.a" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
|
||||
|
||||
3. Save the file, open the Arduino IDE and build MMDVM
|
||||
@@ -1,87 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if !defined(CONFIG_H)
|
||||
#define CONFIG_H
|
||||
|
||||
// Allow for the use of high quality external clock oscillators
|
||||
// The number is the frequency of the oscillator in Hertz.
|
||||
//
|
||||
// The frequency of the TCXO must be an integer multiple of 48000.
|
||||
// Frequencies such as 12.0 Mhz (48000 * 250) and 14.4 Mhz (48000 * 300) are suitable.
|
||||
// Frequencies such as 10.0 Mhz (48000 * 208.333) or 20 Mhz (48000 * 416.666) are not suitable.
|
||||
//
|
||||
// For 12 MHz
|
||||
#define EXTERNAL_OSC 12000000
|
||||
// For 12.288 MHz
|
||||
// #define EXTERNAL_OSC 12288000
|
||||
// For 14.4 MHz
|
||||
// #define EXTERNAL_OSC 14400000
|
||||
// For 19.2 MHz
|
||||
// #define EXTERNAL_OSC 19200000
|
||||
|
||||
// Use pins to output the current mode via LEDs
|
||||
#define MODE_LEDS
|
||||
|
||||
// For the original Arduino Due pin layout
|
||||
// #define ARDUINO_DUE_PAPA
|
||||
|
||||
#if defined(STM32F1)
|
||||
// For the SQ6POG board
|
||||
#define STM32F1_POG
|
||||
#else
|
||||
// For the ZUM V1.0 and V1.0.1 boards pin layout
|
||||
#define ARDUINO_DUE_ZUM_V10
|
||||
#endif
|
||||
|
||||
// For the SP8NTH board
|
||||
// #define ARDUINO_DUE_NTH
|
||||
|
||||
// For ST Nucleo-64 STM32F446RE board
|
||||
// #define STM32F4_NUCLEO_MORPHO_HEADER
|
||||
// #define STM32F4_NUCLEO_ARDUINO_HEADER
|
||||
|
||||
// Use separate mode pins to switch external channel/filters/bandwidth for example
|
||||
// #define MODE_PINS
|
||||
|
||||
// For the VK6MST Pi3 Shield communicating over i2c. i2c address & speed defined in i2cTeensy.cpp
|
||||
// #define VK6MST_TEENSY_PI3_SHIELD_I2C
|
||||
|
||||
// Pass RSSI information to the host
|
||||
// #define SEND_RSSI_DATA
|
||||
|
||||
// Use the modem as a serial repeater for Nextion displays
|
||||
// #define SERIAL_REPEATER
|
||||
|
||||
// To reduce CPU load, you can remove the DC blocker by commenting out the next line
|
||||
#define USE_DCBLOCKER
|
||||
|
||||
// Constant Service LED once repeater is running
|
||||
// Do not use if employing an external hardware watchdog
|
||||
// #define CONSTANT_SRV_LED
|
||||
|
||||
// Use the YSF and P25 LEDs for NXDN
|
||||
// #define USE_ALTERNATE_NXDN_LEDS
|
||||
|
||||
// Use the D-Star and DMR LEDs for POCSAG
|
||||
// #define USE_ALTERNATE_POCSAG_LEDS
|
||||
|
||||
// Use the D-Star and YSF LEDs for FM
|
||||
#define USE_ALTERNATE_FM_LEDS
|
||||
|
||||
#endif
|
||||
@@ -1,48 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if !defined(DSTARDEFINES_H)
|
||||
#define DSTARDEFINES_H
|
||||
|
||||
const unsigned int DSTAR_RADIO_BIT_LENGTH = 5U; // At 24 kHz sample rate
|
||||
|
||||
const unsigned int DSTAR_HEADER_LENGTH_BYTES = 41U;
|
||||
const unsigned int DSTAR_HEADER_LENGTH_BITS = DSTAR_HEADER_LENGTH_BYTES * 8U;
|
||||
|
||||
const unsigned int DSTAR_FEC_SECTION_LENGTH_BYTES = 83U;
|
||||
const unsigned int DSTAR_FEC_SECTION_LENGTH_BITS = 660U;
|
||||
|
||||
const unsigned int DSTAR_DATA_LENGTH_BYTES = 12U;
|
||||
const unsigned int DSTAR_DATA_LENGTH_BITS = DSTAR_DATA_LENGTH_BYTES * 8U;
|
||||
|
||||
const uint8_t DSTAR_EOT_BYTES[] = {0x55, 0x55, 0x55, 0x55, 0xC8, 0x7A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
|
||||
const unsigned int DSTAR_EOT_LENGTH_BYTES = 6U;
|
||||
const unsigned int DSTAR_EOT_LENGTH_BITS = DSTAR_EOT_LENGTH_BYTES * 8U;
|
||||
|
||||
const uint8_t DSTAR_DATA_SYNC_LENGTH_BYTES = 3U;
|
||||
const uint8_t DSTAR_DATA_SYNC_LENGTH_BITS = DSTAR_DATA_SYNC_LENGTH_BYTES * 8U;
|
||||
|
||||
const uint8_t DSTAR_DATA_SYNC_BYTES[] = {0x9E, 0x8D, 0x32, 0x88, 0x26, 0x1A, 0x3F, 0x61, 0xE8, 0x55, 0x2D, 0x16};
|
||||
|
||||
const uint8_t DSTAR_SLOW_DATA_TYPE_TEXT = 0x40U;
|
||||
const uint8_t DSTAR_SLOW_DATA_TYPE_HEADER = 0x50U;
|
||||
|
||||
const uint8_t DSTAR_SCRAMBLER_BYTES[] = {0x70U, 0x4FU, 0x93U};
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,523 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
#include "FM.h"
|
||||
|
||||
/*
|
||||
* Access Mode values are:
|
||||
* 0 - Carrier access with COS
|
||||
* 1 - CTCSS only access without COS
|
||||
* 2 - CTCSS only access with COS
|
||||
* 3 - CTCSS only access with COS to start, then carrier access with COS
|
||||
*/
|
||||
|
||||
CFM::CFM() :
|
||||
m_callsign(),
|
||||
m_rfAck(),
|
||||
m_ctcssRX(),
|
||||
m_ctcssTX(),
|
||||
m_timeoutTone(),
|
||||
m_state(FS_LISTENING),
|
||||
m_callsignAtStart(false),
|
||||
m_callsignAtEnd(false),
|
||||
m_callsignAtLatch(false),
|
||||
m_callsignTimer(),
|
||||
m_timeoutTimer(),
|
||||
m_holdoffTimer(),
|
||||
m_kerchunkTimer(),
|
||||
m_ackMinTimer(),
|
||||
m_ackDelayTimer(),
|
||||
m_hangTimer(),
|
||||
m_reverseTimer(),
|
||||
m_filterStage1( 724, 1448, 724, 32768, -37895, 21352),//3rd order Cheby Filter 300 to 2700Hz, 0.2dB passband ripple, sampling rate 24kHz
|
||||
m_filterStage2(32768, 0,-32768, 32768, -50339, 19052),
|
||||
m_filterStage3(32768, -65536, 32768, 32768, -64075, 31460),
|
||||
m_blanking(),
|
||||
m_accessMode(1U),
|
||||
m_cosInvert(false),
|
||||
m_rfAudioBoost(1U),
|
||||
m_downsampler(128U),//Size might need adjustement
|
||||
m_rxLevel(1),
|
||||
m_inputRB(4800U), // 200ms of audio
|
||||
m_outputRB(2400U) // 100ms of audio
|
||||
{
|
||||
m_reverseTimer.setTimeout(0U, 150U);
|
||||
|
||||
insertDelay(100U);
|
||||
}
|
||||
|
||||
void CFM::samples(bool cos, const q15_t* samples, uint8_t length)
|
||||
{
|
||||
if (m_cosInvert)
|
||||
cos = !cos;
|
||||
|
||||
clock(length);
|
||||
|
||||
uint8_t i = 0U;
|
||||
for (; i < length; i++) {
|
||||
// ARMv7-M has hardware integer division
|
||||
q15_t currentSample = q15_t((q31_t(samples[i]) << 8) / m_rxLevel);
|
||||
|
||||
switch (m_accessMode) {
|
||||
case 0U:
|
||||
stateMachine(cos);
|
||||
break;
|
||||
|
||||
case 1U: {
|
||||
uint8_t ctcssState = m_ctcssRX.process(currentSample);
|
||||
|
||||
// Delay the audio by 100ms to better match the CTCSS detector output
|
||||
m_inputRB.put(currentSample);
|
||||
m_inputRB.get(currentSample);
|
||||
|
||||
if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
|
||||
// Not enough samples to determine if you have CTCSS, just carry on
|
||||
} else {
|
||||
bool validCTCSS = CTCSS_VALID(ctcssState);
|
||||
stateMachine(validCTCSS);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 2U: {
|
||||
uint8_t ctcssState = m_ctcssRX.process(currentSample);
|
||||
if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
|
||||
// Not enough samples to determine if you have CTCSS, just carry on
|
||||
} else {
|
||||
bool validCTCSS = CTCSS_VALID(ctcssState);
|
||||
stateMachine(validCTCSS && cos);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
default: {
|
||||
uint8_t ctcssState = m_ctcssRX.process(currentSample);
|
||||
if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
|
||||
// Not enough samples to determine if you have CTCSS, just carry on
|
||||
} else if (CTCSS_READY(ctcssState) && m_modemState != STATE_FM) {
|
||||
// We had enough samples for CTCSS and we are in some other mode than FM
|
||||
bool validCTCSS = CTCSS_VALID(ctcssState);
|
||||
stateMachine(validCTCSS && cos);
|
||||
} else {
|
||||
stateMachine(cos);
|
||||
}
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
if (m_modemState != STATE_FM)
|
||||
continue;
|
||||
|
||||
// Only let audio through when relaying audio
|
||||
if (m_state == FS_RELAYING || m_state == FS_KERCHUNK) {
|
||||
// m_downsampler.addSample(currentSample);
|
||||
currentSample = m_blanking.process(currentSample);
|
||||
currentSample *= m_rfAudioBoost;
|
||||
} else {
|
||||
currentSample = 0;
|
||||
}
|
||||
|
||||
if (!m_callsign.isRunning())
|
||||
currentSample += m_rfAck.getHighAudio();
|
||||
|
||||
if (!m_rfAck.isRunning()) {
|
||||
if (m_state == FS_LISTENING)
|
||||
currentSample += m_callsign.getHighAudio();
|
||||
else
|
||||
currentSample += m_callsign.getLowAudio();
|
||||
}
|
||||
|
||||
currentSample = m_filterStage3.filter(m_filterStage2.filter(m_filterStage1.filter(currentSample)));
|
||||
|
||||
if (!m_callsign.isRunning() && !m_rfAck.isRunning())
|
||||
currentSample += m_timeoutTone.getAudio();
|
||||
|
||||
currentSample += m_ctcssTX.getAudio(m_reverseTimer.isRunning());
|
||||
|
||||
m_outputRB.put(currentSample);
|
||||
}
|
||||
}
|
||||
|
||||
void CFM::process()
|
||||
{
|
||||
q15_t sample;
|
||||
while (io.getSpace() >= 3U && m_outputRB.get(sample))
|
||||
io.write(STATE_FM, &sample, 1U);
|
||||
}
|
||||
|
||||
void CFM::reset()
|
||||
{
|
||||
m_state = FS_LISTENING;
|
||||
|
||||
m_callsignTimer.stop();
|
||||
m_timeoutTimer.stop();
|
||||
m_kerchunkTimer.stop();
|
||||
m_ackMinTimer.stop();
|
||||
m_ackDelayTimer.stop();
|
||||
m_hangTimer.stop();
|
||||
m_reverseTimer.stop();
|
||||
|
||||
m_ctcssRX.reset();
|
||||
m_rfAck.stop();
|
||||
m_callsign.stop();
|
||||
m_timeoutTone.stop();
|
||||
|
||||
m_outputRB.reset();
|
||||
}
|
||||
|
||||
uint8_t CFM::setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd, bool callsignAtLatch)
|
||||
{
|
||||
m_callsignAtStart = callsignAtStart;
|
||||
m_callsignAtEnd = callsignAtEnd;
|
||||
m_callsignAtLatch = callsignAtLatch;
|
||||
|
||||
uint16_t holdoffTime = holdoff * 60U;
|
||||
uint16_t callsignTime = time * 60U;
|
||||
|
||||
m_holdoffTimer.setTimeout(holdoffTime, 0U);
|
||||
m_callsignTimer.setTimeout(callsignTime, 0U);
|
||||
|
||||
if (holdoffTime > 0U)
|
||||
m_holdoffTimer.start();
|
||||
|
||||
return m_callsign.setParams(callsign, speed, frequency, highLevel, lowLevel);
|
||||
}
|
||||
|
||||
uint8_t CFM::setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_t minTime, uint16_t delay, uint8_t level)
|
||||
{
|
||||
m_ackDelayTimer.setTimeout(0U, delay);
|
||||
|
||||
if (minTime > 0U)
|
||||
m_ackMinTimer.setTimeout(minTime, delay);
|
||||
|
||||
return m_rfAck.setParams(rfAck, speed, frequency, level, level);
|
||||
}
|
||||
|
||||
uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, uint8_t accessMode, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel)
|
||||
{
|
||||
m_accessMode = accessMode;
|
||||
m_cosInvert = cosInvert;
|
||||
|
||||
m_rfAudioBoost = q15_t(rfAudioBoost);
|
||||
|
||||
m_timeoutTimer.setTimeout(timeout, 0U);
|
||||
m_kerchunkTimer.setTimeout(kerchunkTime, 0U);
|
||||
m_hangTimer.setTimeout(hangTime, 0U);
|
||||
|
||||
m_timeoutTone.setParams(timeoutLevel);
|
||||
m_blanking.setParams(maxDev, timeoutLevel);
|
||||
|
||||
m_rxLevel = rxLevel; //q15_t(255)/q15_t(rxLevel >> 1);
|
||||
|
||||
uint8_t ret = m_ctcssRX.setParams(ctcssFrequency, ctcssHighThreshold, ctcssLowThreshold);
|
||||
if (ret != 0U)
|
||||
return ret;
|
||||
|
||||
return m_ctcssTX.setParams(ctcssFrequency, ctcssLevel);
|
||||
}
|
||||
|
||||
void CFM::stateMachine(bool validSignal)
|
||||
{
|
||||
switch (m_state) {
|
||||
case FS_LISTENING:
|
||||
listeningState(validSignal);
|
||||
break;
|
||||
case FS_KERCHUNK:
|
||||
kerchunkState(validSignal);
|
||||
break;
|
||||
case FS_RELAYING:
|
||||
relayingState(validSignal);
|
||||
break;
|
||||
case FS_RELAYING_WAIT:
|
||||
relayingWaitState(validSignal);
|
||||
break;
|
||||
case FS_TIMEOUT:
|
||||
timeoutState(validSignal);
|
||||
break;
|
||||
case FS_TIMEOUT_WAIT:
|
||||
timeoutWaitState(validSignal);
|
||||
break;
|
||||
case FS_HANG:
|
||||
hangState(validSignal);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (m_state == FS_LISTENING && m_modemState == STATE_FM) {
|
||||
if (!m_callsign.isWanted() && !m_rfAck.isWanted() && !m_reverseTimer.isRunning())
|
||||
m_reverseTimer.start();
|
||||
|
||||
if (!m_callsign.isWanted() && !m_rfAck.isWanted() && m_reverseTimer.isRunning() && m_reverseTimer.hasExpired()) {
|
||||
DEBUG1("Change to STATE_IDLE");
|
||||
m_modemState = STATE_IDLE;
|
||||
m_callsignTimer.stop();
|
||||
m_timeoutTimer.stop();
|
||||
m_kerchunkTimer.stop();
|
||||
m_ackMinTimer.stop();
|
||||
m_ackDelayTimer.stop();
|
||||
m_hangTimer.stop();
|
||||
m_reverseTimer.stop();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void CFM::clock(uint8_t length)
|
||||
{
|
||||
m_callsignTimer.clock(length);
|
||||
m_timeoutTimer.clock(length);
|
||||
m_holdoffTimer.clock(length);
|
||||
m_kerchunkTimer.clock(length);
|
||||
m_ackMinTimer.clock(length);
|
||||
m_ackDelayTimer.clock(length);
|
||||
m_hangTimer.clock(length);
|
||||
m_reverseTimer.clock(length);
|
||||
}
|
||||
|
||||
void CFM::listeningState(bool validSignal)
|
||||
{
|
||||
if (validSignal) {
|
||||
if (m_kerchunkTimer.getTimeout() > 0U) {
|
||||
DEBUG1("State to KERCHUNK");
|
||||
m_state = FS_KERCHUNK;
|
||||
m_kerchunkTimer.start();
|
||||
if (m_callsignAtStart && !m_callsignAtLatch)
|
||||
sendCallsign();
|
||||
} else {
|
||||
DEBUG1("State to RELAYING");
|
||||
m_state = FS_RELAYING;
|
||||
if (m_callsignAtStart)
|
||||
sendCallsign();
|
||||
}
|
||||
|
||||
insertSilence(50U);
|
||||
|
||||
beginRelaying();
|
||||
|
||||
m_callsignTimer.start();
|
||||
m_reverseTimer.stop();
|
||||
|
||||
io.setDecode(true);
|
||||
io.setADCDetection(true);
|
||||
|
||||
DEBUG1("Change to STATE_FM");
|
||||
m_modemState = STATE_FM;
|
||||
}
|
||||
}
|
||||
|
||||
void CFM::kerchunkState(bool validSignal)
|
||||
{
|
||||
if (validSignal) {
|
||||
if (m_kerchunkTimer.hasExpired()) {
|
||||
DEBUG1("State to RELAYING");
|
||||
m_state = FS_RELAYING;
|
||||
m_kerchunkTimer.stop();
|
||||
if (m_callsignAtStart && m_callsignAtLatch) {
|
||||
sendCallsign();
|
||||
m_callsignTimer.start();
|
||||
}
|
||||
}
|
||||
} else {
|
||||
io.setDecode(false);
|
||||
io.setADCDetection(false);
|
||||
|
||||
DEBUG1("State to LISTENING");
|
||||
m_state = FS_LISTENING;
|
||||
m_kerchunkTimer.stop();
|
||||
m_timeoutTimer.stop();
|
||||
m_ackMinTimer.stop();
|
||||
m_callsignTimer.stop();
|
||||
}
|
||||
}
|
||||
|
||||
void CFM::relayingState(bool validSignal)
|
||||
{
|
||||
if (validSignal) {
|
||||
if (m_timeoutTimer.isRunning() && m_timeoutTimer.hasExpired()) {
|
||||
DEBUG1("State to TIMEOUT");
|
||||
m_state = FS_TIMEOUT;
|
||||
m_ackMinTimer.stop();
|
||||
m_timeoutTimer.stop();
|
||||
m_timeoutTone.start();
|
||||
}
|
||||
} else {
|
||||
io.setDecode(false);
|
||||
io.setADCDetection(false);
|
||||
|
||||
DEBUG1("State to RELAYING_WAIT");
|
||||
m_state = FS_RELAYING_WAIT;
|
||||
m_ackDelayTimer.start();
|
||||
}
|
||||
|
||||
if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
|
||||
sendCallsign();
|
||||
m_callsignTimer.start();
|
||||
}
|
||||
}
|
||||
|
||||
void CFM::relayingWaitState(bool validSignal)
|
||||
{
|
||||
if (validSignal) {
|
||||
io.setDecode(true);
|
||||
io.setADCDetection(true);
|
||||
|
||||
DEBUG1("State to RELAYING");
|
||||
m_state = FS_RELAYING;
|
||||
m_ackDelayTimer.stop();
|
||||
} else {
|
||||
if (m_ackDelayTimer.isRunning() && m_ackDelayTimer.hasExpired()) {
|
||||
DEBUG1("State to HANG");
|
||||
m_state = FS_HANG;
|
||||
|
||||
if (m_ackMinTimer.isRunning()) {
|
||||
if (m_ackMinTimer.hasExpired()) {
|
||||
DEBUG1("Send ack");
|
||||
m_rfAck.start();
|
||||
m_ackMinTimer.stop();
|
||||
}
|
||||
} else {
|
||||
DEBUG1("Send ack");
|
||||
m_rfAck.start();
|
||||
m_ackMinTimer.stop();
|
||||
}
|
||||
|
||||
m_ackDelayTimer.stop();
|
||||
m_timeoutTimer.stop();
|
||||
m_hangTimer.start();
|
||||
}
|
||||
}
|
||||
|
||||
if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
|
||||
sendCallsign();
|
||||
m_callsignTimer.start();
|
||||
}
|
||||
}
|
||||
|
||||
void CFM::hangState(bool validSignal)
|
||||
{
|
||||
if (validSignal) {
|
||||
io.setDecode(true);
|
||||
io.setADCDetection(true);
|
||||
|
||||
DEBUG1("State to RELAYING");
|
||||
m_state = FS_RELAYING;
|
||||
DEBUG1("Stop ack");
|
||||
m_rfAck.stop();
|
||||
beginRelaying();
|
||||
} else {
|
||||
if (m_hangTimer.isRunning() && m_hangTimer.hasExpired()) {
|
||||
DEBUG1("State to LISTENING");
|
||||
m_state = FS_LISTENING;
|
||||
m_hangTimer.stop();
|
||||
|
||||
if (m_callsignAtEnd)
|
||||
sendCallsign();
|
||||
|
||||
m_callsignTimer.stop();
|
||||
}
|
||||
}
|
||||
|
||||
if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
|
||||
sendCallsign();
|
||||
m_callsignTimer.start();
|
||||
}
|
||||
}
|
||||
|
||||
void CFM::timeoutState(bool validSignal)
|
||||
{
|
||||
if (!validSignal) {
|
||||
io.setDecode(false);
|
||||
io.setADCDetection(false);
|
||||
|
||||
DEBUG1("State to TIMEOUT_WAIT");
|
||||
m_state = FS_TIMEOUT_WAIT;
|
||||
m_ackDelayTimer.start();
|
||||
}
|
||||
|
||||
if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
|
||||
sendCallsign();
|
||||
m_callsignTimer.start();
|
||||
}
|
||||
}
|
||||
|
||||
void CFM::timeoutWaitState(bool validSignal)
|
||||
{
|
||||
if (validSignal) {
|
||||
io.setDecode(true);
|
||||
io.setADCDetection(true);
|
||||
|
||||
DEBUG1("State to TIMEOUT");
|
||||
m_state = FS_TIMEOUT;
|
||||
m_ackDelayTimer.stop();
|
||||
} else {
|
||||
if (m_ackDelayTimer.isRunning() && m_ackDelayTimer.hasExpired()) {
|
||||
DEBUG1("State to HANG");
|
||||
m_state = FS_HANG;
|
||||
m_timeoutTone.stop();
|
||||
DEBUG1("Send ack");
|
||||
m_rfAck.start();
|
||||
m_ackDelayTimer.stop();
|
||||
m_ackMinTimer.stop();
|
||||
m_timeoutTimer.stop();
|
||||
m_hangTimer.start();
|
||||
}
|
||||
}
|
||||
|
||||
if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
|
||||
sendCallsign();
|
||||
m_callsignTimer.start();
|
||||
}
|
||||
}
|
||||
|
||||
void CFM::sendCallsign()
|
||||
{
|
||||
if (m_holdoffTimer.isRunning()) {
|
||||
if (m_holdoffTimer.hasExpired()) {
|
||||
DEBUG1("Send callsign");
|
||||
m_callsign.start();
|
||||
m_holdoffTimer.start();
|
||||
}
|
||||
} else {
|
||||
DEBUG1("Send callsign");
|
||||
m_callsign.start();
|
||||
}
|
||||
}
|
||||
|
||||
void CFM::beginRelaying()
|
||||
{
|
||||
m_timeoutTimer.start();
|
||||
m_ackMinTimer.start();
|
||||
}
|
||||
|
||||
void CFM::insertDelay(uint16_t ms)
|
||||
{
|
||||
uint32_t nSamples = ms * 24U;
|
||||
|
||||
for (uint32_t i = 0U; i < nSamples; i++)
|
||||
m_inputRB.put(0);
|
||||
}
|
||||
|
||||
void CFM::insertSilence(uint16_t ms)
|
||||
{
|
||||
uint32_t nSamples = ms * 24U;
|
||||
|
||||
for (uint32_t i = 0U; i < nSamples; i++)
|
||||
m_outputRB.put(0);
|
||||
}
|
||||
@@ -1,109 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if !defined(FM_H)
|
||||
#define FM_H
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#include "FMBlanking.h"
|
||||
#include "FMCTCSSRX.h"
|
||||
#include "FMCTCSSTX.h"
|
||||
#include "FMTimeout.h"
|
||||
#include "FMKeyer.h"
|
||||
#include "FMTimer.h"
|
||||
#include "FMRB.h"
|
||||
#include "FMDirectForm1.h"
|
||||
#include "FMDownsampler.h"
|
||||
|
||||
enum FM_STATE {
|
||||
FS_LISTENING,
|
||||
FS_KERCHUNK,
|
||||
FS_RELAYING,
|
||||
FS_RELAYING_WAIT,
|
||||
FS_TIMEOUT,
|
||||
FS_TIMEOUT_WAIT,
|
||||
FS_HANG
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
class CFM {
|
||||
public:
|
||||
CFM();
|
||||
|
||||
void samples(bool cos, const q15_t* samples, uint8_t length);
|
||||
|
||||
void process();
|
||||
|
||||
void reset();
|
||||
|
||||
uint8_t setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd, bool callsignAtLatch);
|
||||
uint8_t setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_t minTime, uint16_t delay, uint8_t level);
|
||||
uint8_t setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, uint8_t accessMode, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel);
|
||||
|
||||
private:
|
||||
CFMKeyer m_callsign;
|
||||
CFMKeyer m_rfAck;
|
||||
CFMCTCSSRX m_ctcssRX;
|
||||
CFMCTCSSTX m_ctcssTX;
|
||||
CFMTimeout m_timeoutTone;
|
||||
FM_STATE m_state;
|
||||
bool m_callsignAtStart;
|
||||
bool m_callsignAtEnd;
|
||||
bool m_callsignAtLatch;
|
||||
CFMTimer m_callsignTimer;
|
||||
CFMTimer m_timeoutTimer;
|
||||
CFMTimer m_holdoffTimer;
|
||||
CFMTimer m_kerchunkTimer;
|
||||
CFMTimer m_ackMinTimer;
|
||||
CFMTimer m_ackDelayTimer;
|
||||
CFMTimer m_hangTimer;
|
||||
CFMTimer m_reverseTimer;
|
||||
CFMDirectFormI m_filterStage1;
|
||||
CFMDirectFormI m_filterStage2;
|
||||
CFMDirectFormI m_filterStage3;
|
||||
CFMBlanking m_blanking;
|
||||
uint8_t m_accessMode;
|
||||
bool m_cosInvert;
|
||||
q15_t m_rfAudioBoost;
|
||||
CFMDownsampler m_downsampler;
|
||||
q15_t m_rxLevel;
|
||||
CFMRB m_inputRB;
|
||||
CFMRB m_outputRB;
|
||||
|
||||
void stateMachine(bool validSignal);
|
||||
void listeningState(bool validSignal);
|
||||
void kerchunkState(bool validSignal);
|
||||
void relayingState(bool validSignal);
|
||||
void relayingWaitState(bool validSignal);
|
||||
void timeoutState(bool validSignal);
|
||||
void timeoutWaitState(bool validSignal);
|
||||
void hangState(bool validSignal);
|
||||
|
||||
void clock(uint8_t length);
|
||||
|
||||
void sendCallsign();
|
||||
void beginRelaying();
|
||||
|
||||
void insertDelay(uint16_t ms);
|
||||
void insertSilence(uint16_t ms);
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -1,63 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2020 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2020 by Geoffrey Merck F4FXL - KC3FRA
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "FMDownsampler.h"
|
||||
|
||||
|
||||
CFMDownsampler::CFMDownsampler(uint16_t length) :
|
||||
m_ringBuffer(length),//length might need tweaking
|
||||
m_packIndex(0),
|
||||
m_downSampleIndex(0)
|
||||
{
|
||||
m_samplePack = 0;
|
||||
}
|
||||
|
||||
void CFMDownsampler::addSample(q15_t sample)
|
||||
{
|
||||
//only take one of three samples
|
||||
if(m_downSampleIndex == 0) {
|
||||
switch(m_packIndex){
|
||||
case 0:
|
||||
m_samplePack = int32_t(sample) << 12;
|
||||
break;
|
||||
case 1:{
|
||||
m_samplePack |= int32_t(sample);
|
||||
|
||||
//we did not use MSB; skip it
|
||||
m_ringBuffer.put(m_samplePackBytes[1]);
|
||||
m_ringBuffer.put(m_samplePackBytes[2]);
|
||||
m_ringBuffer.put(m_samplePackBytes[3]);
|
||||
|
||||
m_samplePack = 0;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
//should never happen
|
||||
break;
|
||||
}
|
||||
m_packIndex++;
|
||||
if(m_packIndex >= 2)
|
||||
m_packIndex = 0;
|
||||
}
|
||||
|
||||
m_downSampleIndex++;
|
||||
if(m_downSampleIndex >= 3)
|
||||
m_downSampleIndex = 0;
|
||||
}
|
||||
@@ -1,110 +0,0 @@
|
||||
/*
|
||||
TX fifo control - Copyright (C) KI6ZUM 2015
|
||||
Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Library General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Library General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Library General Public
|
||||
License along with this library; if not, write to the
|
||||
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
|
||||
Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#include "FMRB.h"
|
||||
|
||||
CFMRB::CFMRB(uint16_t length) :
|
||||
m_length(length),
|
||||
m_head(0U),
|
||||
m_tail(0U),
|
||||
m_full(false),
|
||||
m_overflow(false)
|
||||
{
|
||||
m_samples = new q15_t[length];
|
||||
}
|
||||
|
||||
uint16_t CFMRB::getSpace() const
|
||||
{
|
||||
uint16_t n = 0U;
|
||||
|
||||
if (m_tail == m_head)
|
||||
n = m_full ? 0U : m_length;
|
||||
else if (m_tail < m_head)
|
||||
n = m_length - m_head + m_tail;
|
||||
else
|
||||
n = m_tail - m_head;
|
||||
|
||||
if (n > m_length)
|
||||
n = 0U;
|
||||
|
||||
return n;
|
||||
}
|
||||
|
||||
uint16_t CFMRB::getData() const
|
||||
{
|
||||
if (m_tail == m_head)
|
||||
return m_full ? m_length : 0U;
|
||||
else if (m_tail < m_head)
|
||||
return m_head - m_tail;
|
||||
else
|
||||
return m_length - m_tail + m_head;
|
||||
}
|
||||
|
||||
bool CFMRB::put(q15_t sample)
|
||||
{
|
||||
if (m_full) {
|
||||
m_overflow = true;
|
||||
return false;
|
||||
}
|
||||
|
||||
m_samples[m_head] = sample;
|
||||
|
||||
m_head++;
|
||||
if (m_head >= m_length)
|
||||
m_head = 0U;
|
||||
|
||||
if (m_head == m_tail)
|
||||
m_full = true;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool CFMRB::get(q15_t& sample)
|
||||
{
|
||||
if (m_head == m_tail && !m_full)
|
||||
return false;
|
||||
|
||||
sample = m_samples[m_tail];
|
||||
|
||||
m_full = false;
|
||||
|
||||
m_tail++;
|
||||
if (m_tail >= m_length)
|
||||
m_tail = 0U;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool CFMRB::hasOverflowed()
|
||||
{
|
||||
bool overflow = m_overflow;
|
||||
|
||||
m_overflow = false;
|
||||
|
||||
return overflow;
|
||||
}
|
||||
|
||||
void CFMRB::reset()
|
||||
{
|
||||
m_head = 0U;
|
||||
m_tail = 0U;
|
||||
m_full = false;
|
||||
m_overflow = false;
|
||||
}
|
||||
@@ -1,72 +0,0 @@
|
||||
/*
|
||||
Serial fifo control - Copyright (C) KI6ZUM 2015
|
||||
Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Library General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Library General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Library General Public
|
||||
License along with this library; if not, write to the
|
||||
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
|
||||
Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#if !defined(FMRB_H)
|
||||
#define FMRB_H
|
||||
|
||||
#if defined(STM32F4XX)
|
||||
#include "stm32f4xx.h"
|
||||
#elif defined(STM32F7XX)
|
||||
#include "stm32f7xx.h"
|
||||
#elif defined(STM32F105xC)
|
||||
#include "stm32f1xx.h"
|
||||
#include <cstddef>
|
||||
#else
|
||||
#include <Arduino.h>
|
||||
#endif
|
||||
|
||||
#if defined(__SAM3X8E__) || defined(STM32F105xC)
|
||||
#define ARM_MATH_CM3
|
||||
#elif defined(STM32F7XX)
|
||||
#define ARM_MATH_CM7
|
||||
#elif defined(STM32F4XX) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
|
||||
#define ARM_MATH_CM4
|
||||
#else
|
||||
#error "Unknown processor type"
|
||||
#endif
|
||||
|
||||
#include <arm_math.h>
|
||||
|
||||
class CFMRB {
|
||||
public:
|
||||
CFMRB(uint16_t length);
|
||||
|
||||
uint16_t getSpace() const;
|
||||
|
||||
uint16_t getData() const;
|
||||
|
||||
bool put(q15_t sample);
|
||||
|
||||
bool get(q15_t& sample);
|
||||
|
||||
bool hasOverflowed();
|
||||
|
||||
void reset();
|
||||
|
||||
private:
|
||||
uint16_t m_length;
|
||||
volatile q15_t* m_samples;
|
||||
volatile uint16_t m_head;
|
||||
volatile uint16_t m_tail;
|
||||
volatile bool m_full;
|
||||
bool m_overflow;
|
||||
};
|
||||
|
||||
#endif
|
||||
-235
@@ -1,235 +0,0 @@
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
* 28-4-2017 Created for MMDVM Pi shield for Teensy by Chris Huitema
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
|
||||
#if defined(VK6MST_TEENSY_PI3_SHIELD_I2C)
|
||||
|
||||
#include <i2c_t3.h> //available here https://github.com/nox771/i2c_t3 or maybe the normal wire will work #include <wire.h> justs need to test i guess
|
||||
|
||||
#define I2C_ADDRESS 0x22
|
||||
#define I2C_SPEED 100000
|
||||
|
||||
// Function prototypes
|
||||
void receiveEvent(size_t count);
|
||||
void requestEvent(void);
|
||||
|
||||
#define TX_FIFO_SIZE 512U
|
||||
#define RX_FIFO_SIZE 512U
|
||||
|
||||
volatile uint8_t TXfifo[TX_FIFO_SIZE];
|
||||
volatile uint8_t RXfifo[RX_FIFO_SIZE];
|
||||
volatile uint16_t TXfifohead, TXfifotail;
|
||||
volatile uint16_t RXfifohead, RXfifotail;
|
||||
|
||||
// Init queues
|
||||
void TXfifoinit(void)
|
||||
{
|
||||
TXfifohead = 0U;
|
||||
TXfifotail = 0U;
|
||||
}
|
||||
|
||||
void RXfifoinit()
|
||||
{
|
||||
RXfifohead = 0U;
|
||||
RXfifotail = 0U;
|
||||
}
|
||||
|
||||
// How full is queue
|
||||
|
||||
uint16_t TXfifolevel(void)
|
||||
{
|
||||
uint32_t tail = TXfifotail;
|
||||
uint32_t head = TXfifohead;
|
||||
|
||||
if (tail > head)
|
||||
return TX_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
uint16_t RXfifolevel(void)
|
||||
{
|
||||
uint32_t tail = RXfifotail;
|
||||
uint32_t head = RXfifohead;
|
||||
|
||||
if (tail > head)
|
||||
return RX_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
|
||||
uint8_t TXfifoput(uint8_t next)
|
||||
{
|
||||
if (TXfifolevel() < TX_FIFO_SIZE) {
|
||||
TXfifo[TXfifohead] = next;
|
||||
|
||||
TXfifohead++;
|
||||
if (TXfifohead >= TX_FIFO_SIZE)
|
||||
TXfifohead = 0U;
|
||||
return 1U;
|
||||
} else {
|
||||
return 0U; // signal an overflow occurred by returning a zero count
|
||||
}
|
||||
}
|
||||
|
||||
void I2Cbegin(void)
|
||||
{
|
||||
// Setup for Slave mode, address 0x22, pins 18/19, external pullups, speed in hz
|
||||
Wire.begin(I2C_SLAVE, I2C_ADDRESS, I2C_PINS_18_19, I2C_PULLUP_EXT, I2C_SPEED);
|
||||
|
||||
// register events
|
||||
Wire.onReceive(receiveEvent);
|
||||
Wire.onRequest(requestEvent);
|
||||
|
||||
// initialize the fifos
|
||||
TXfifoinit();
|
||||
RXfifoinit();
|
||||
}
|
||||
|
||||
|
||||
int I2Cavailable(void)
|
||||
{
|
||||
if (RXfifolevel() > 0U)
|
||||
return 1U;
|
||||
else
|
||||
return 0U;
|
||||
}
|
||||
|
||||
|
||||
uint8_t I2Cread(void)
|
||||
{
|
||||
uint8_t data_c = RXfifo[RXfifotail];
|
||||
|
||||
RXfifotail++;
|
||||
if (RXfifotail >= RX_FIFO_SIZE)
|
||||
RXfifotail = 0U;
|
||||
|
||||
return data_c;
|
||||
}
|
||||
|
||||
|
||||
void I2Cwrite(const uint8_t* data, uint16_t length)
|
||||
{
|
||||
for (uint16_t i = 0U; i < length; i++)
|
||||
TXfifoput(data[i]); //puts it in the fifo
|
||||
}
|
||||
|
||||
//
|
||||
// handle Rx Event (incoming I2C data)
|
||||
//
|
||||
void receiveEvent(size_t count)
|
||||
{
|
||||
for (uint16_t i = 0U; i < count; i++)
|
||||
{
|
||||
if (RXfifolevel() < RX_FIFO_SIZE) {
|
||||
RXfifo[RXfifohead] = Wire.readByte();
|
||||
if (RXfifo[RXfifohead] != -1){
|
||||
RXfifohead++;
|
||||
if (RXfifohead >= RX_FIFO_SIZE) RXfifohead = 0U;
|
||||
}
|
||||
} else {
|
||||
Wire.readByte(); // drop data if mem full.
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// handle Tx Event (outgoing I2C data)
|
||||
//
|
||||
void requestEvent(void)
|
||||
{
|
||||
if (TXfifolevel() > 0) {
|
||||
if (Wire.write(TXfifo[TXfifotail])){ //write to i2c
|
||||
TXfifotail++;
|
||||
if (TXfifotail >= TX_FIFO_SIZE) TXfifotail = 0U;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/************************************/
|
||||
|
||||
void CSerialPort::beginInt(uint8_t n, int speed)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return I2Cbegin();
|
||||
case 3U:
|
||||
Serial3.begin(speed);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
int CSerialPort::availableInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return I2Cavailable();
|
||||
case 3U:
|
||||
return Serial3.available();
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
int CSerialPort::availableForWriteInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 3U:
|
||||
return Serial3.availableForWrite();
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t CSerialPort::readInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return I2Cread();
|
||||
case 3U:
|
||||
return Serial3.read();
|
||||
default:
|
||||
return 0U;
|
||||
}
|
||||
}
|
||||
|
||||
void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
I2Cwrite(data, length);
|
||||
break;
|
||||
case 3U:
|
||||
Serial3.write(data, length);
|
||||
if (flush)
|
||||
Serial3.flush();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -1,613 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015 by Jim Mclaughlin KI6ZUM
|
||||
* Copyright (C) 2016 by Colin Durbridge G4EML
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
#include "IO.h"
|
||||
|
||||
// Generated using [b, a] = butter(1, 0.001) in MATLAB
|
||||
static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2}
|
||||
const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
|
||||
|
||||
// Generated using rcosdesign(0.2, 8, 5, 'sqrt') in MATLAB
|
||||
static q15_t RRC_0_2_FILTER[] = {401, 104, -340, -731, -847, -553, 112, 909, 1472, 1450, 683, -675, -2144, -3040, -2706, -770, 2667, 6995,
|
||||
11237, 14331, 15464, 14331, 11237, 6995, 2667, -770, -2706, -3040, -2144, -675, 683, 1450, 1472, 909, 112,
|
||||
-553, -847, -731, -340, 104, 401, 0};
|
||||
const uint16_t RRC_0_2_FILTER_LEN = 42U;
|
||||
|
||||
// Generated using rcosdesign(0.2, 8, 10, 'sqrt') in MATLAB
|
||||
static q15_t NXDN_0_2_FILTER[] = {284, 198, 73, -78, -240, -393, -517, -590, -599, -533, -391, -181, 79, 364, 643, 880, 1041, 1097, 1026, 819,
|
||||
483, 39, -477, -1016, -1516, -1915, -2150, -2164, -1914, -1375, -545, 557, 1886, 3376, 4946, 6502, 7946, 9184,
|
||||
10134, 10731, 10935, 10731, 10134, 9184, 7946, 6502, 4946, 3376, 1886, 557, -545, -1375, -1914, -2164, -2150,
|
||||
-1915, -1516, -1016, -477, 39, 483, 819, 1026, 1097, 1041, 880, 643, 364, 79, -181, -391, -533, -599, -590,
|
||||
-517, -393, -240, -78, 73, 198, 284, 0};
|
||||
const uint16_t NXDN_0_2_FILTER_LEN = 82U;
|
||||
|
||||
static q15_t NXDN_ISINC_FILTER[] = {790, -1085, -1073, -553, 747, 2341, 3156, 2152, -893, -4915, -7834, -7536, -3102, 4441, 12354, 17394, 17394,
|
||||
12354, 4441, -3102, -7536, -7834, -4915, -893, 2152, 3156, 2341, 747, -553, -1073, -1085, 790};
|
||||
const uint16_t NXDN_ISINC_FILTER_LEN = 32U;
|
||||
|
||||
// Generated using gaussfir(0.5, 4, 5) in MATLAB
|
||||
static q15_t GAUSSIAN_0_5_FILTER[] = {8, 104, 760, 3158, 7421, 9866, 7421, 3158, 760, 104, 8, 0};
|
||||
const uint16_t GAUSSIAN_0_5_FILTER_LEN = 12U;
|
||||
|
||||
// One symbol boxcar filter
|
||||
static q15_t BOXCAR_FILTER[] = {12000, 12000, 12000, 12000, 12000, 0};
|
||||
const uint16_t BOXCAR_FILTER_LEN = 6U;
|
||||
|
||||
const uint16_t DC_OFFSET = 2048U;
|
||||
|
||||
CIO::CIO() :
|
||||
m_started(false),
|
||||
m_rxBuffer(RX_RINGBUFFER_SIZE),
|
||||
m_txBuffer(TX_RINGBUFFER_SIZE),
|
||||
m_rssiBuffer(RX_RINGBUFFER_SIZE),
|
||||
m_dcFilter(),
|
||||
m_dcState(),
|
||||
m_rrcFilter(),
|
||||
m_gaussianFilter(),
|
||||
m_boxcarFilter(),
|
||||
m_nxdnFilter(),
|
||||
m_nxdnISincFilter(),
|
||||
m_rrcState(),
|
||||
m_gaussianState(),
|
||||
m_boxcarState(),
|
||||
m_nxdnState(),
|
||||
m_nxdnISincState(),
|
||||
m_pttInvert(false),
|
||||
m_rxLevel(128 * 128),
|
||||
m_cwIdTXLevel(128 * 128),
|
||||
m_dstarTXLevel(128 * 128),
|
||||
m_dmrTXLevel(128 * 128),
|
||||
m_ysfTXLevel(128 * 128),
|
||||
m_p25TXLevel(128 * 128),
|
||||
m_nxdnTXLevel(128 * 128),
|
||||
m_pocsagTXLevel(128 * 128),
|
||||
m_fmTXLevel(128 * 128),
|
||||
m_ax25TXLevel(128 * 128),
|
||||
m_rxDCOffset(DC_OFFSET),
|
||||
m_txDCOffset(DC_OFFSET),
|
||||
m_useCOSAsLockout(false),
|
||||
m_ledCount(0U),
|
||||
m_ledValue(true),
|
||||
m_detect(false),
|
||||
m_adcOverflow(0U),
|
||||
m_dacOverflow(0U),
|
||||
m_watchdog(0U),
|
||||
m_lockout(false)
|
||||
{
|
||||
::memset(m_rrcState, 0x00U, 70U * sizeof(q15_t));
|
||||
::memset(m_gaussianState, 0x00U, 40U * sizeof(q15_t));
|
||||
::memset(m_boxcarState, 0x00U, 30U * sizeof(q15_t));
|
||||
::memset(m_nxdnState, 0x00U, 110U * sizeof(q15_t));
|
||||
::memset(m_nxdnISincState, 0x00U, 60U * sizeof(q15_t));
|
||||
::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
|
||||
|
||||
m_dcFilter.numStages = DC_FILTER_STAGES;
|
||||
m_dcFilter.pState = m_dcState;
|
||||
m_dcFilter.pCoeffs = DC_FILTER;
|
||||
m_dcFilter.postShift = 0;
|
||||
|
||||
m_rrcFilter.numTaps = RRC_0_2_FILTER_LEN;
|
||||
m_rrcFilter.pState = m_rrcState;
|
||||
m_rrcFilter.pCoeffs = RRC_0_2_FILTER;
|
||||
|
||||
m_gaussianFilter.numTaps = GAUSSIAN_0_5_FILTER_LEN;
|
||||
m_gaussianFilter.pState = m_gaussianState;
|
||||
m_gaussianFilter.pCoeffs = GAUSSIAN_0_5_FILTER;
|
||||
|
||||
m_boxcarFilter.numTaps = BOXCAR_FILTER_LEN;
|
||||
m_boxcarFilter.pState = m_boxcarState;
|
||||
m_boxcarFilter.pCoeffs = BOXCAR_FILTER;
|
||||
|
||||
m_nxdnFilter.numTaps = NXDN_0_2_FILTER_LEN;
|
||||
m_nxdnFilter.pState = m_nxdnState;
|
||||
m_nxdnFilter.pCoeffs = NXDN_0_2_FILTER;
|
||||
|
||||
m_nxdnISincFilter.numTaps = NXDN_ISINC_FILTER_LEN;
|
||||
m_nxdnISincFilter.pState = m_nxdnISincState;
|
||||
m_nxdnISincFilter.pCoeffs = NXDN_ISINC_FILTER;
|
||||
|
||||
initInt();
|
||||
|
||||
selfTest();
|
||||
}
|
||||
|
||||
void CIO::selfTest()
|
||||
{
|
||||
bool ledValue = false;
|
||||
|
||||
for (uint8_t i = 0; i < 6; i++) {
|
||||
ledValue = !ledValue;
|
||||
|
||||
// We exclude PTT to avoid trigger the transmitter
|
||||
setLEDInt(ledValue);
|
||||
setCOSInt(ledValue);
|
||||
#if defined(MODE_LEDS)
|
||||
setDStarInt(ledValue);
|
||||
setDMRInt(ledValue);
|
||||
setYSFInt(ledValue);
|
||||
setP25Int(ledValue);
|
||||
setNXDNInt(ledValue);
|
||||
setPOCSAGInt(ledValue);
|
||||
setFMInt(ledValue);
|
||||
#endif
|
||||
delayInt(250);
|
||||
}
|
||||
|
||||
#if defined(MODE_LEDS)
|
||||
setDStarInt(true);
|
||||
setDMRInt(false);
|
||||
setYSFInt(false);
|
||||
setP25Int(false);
|
||||
setNXDNInt(false);
|
||||
setPOCSAGInt(false);
|
||||
setFMInt(false);
|
||||
|
||||
delayInt(250);
|
||||
setDMRInt(true);
|
||||
|
||||
delayInt(250);
|
||||
setYSFInt(true);
|
||||
|
||||
delayInt(250);
|
||||
setP25Int(true);
|
||||
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
delayInt(250);
|
||||
setNXDNInt(true);
|
||||
#endif
|
||||
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
delayInt(250);
|
||||
setPOCSAGInt(true);
|
||||
#endif
|
||||
|
||||
#if !defined(USE_ALTERNATE_FM_LEDS)
|
||||
delayInt(250);
|
||||
setFMInt(true);
|
||||
|
||||
delayInt(250);
|
||||
setFMInt(false);
|
||||
#endif
|
||||
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
delayInt(250);
|
||||
setPOCSAGInt(false);
|
||||
#endif
|
||||
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
delayInt(250);
|
||||
setNXDNInt(false);
|
||||
#endif
|
||||
|
||||
delayInt(250);
|
||||
setP25Int(false);
|
||||
|
||||
delayInt(250);
|
||||
setYSFInt(false);
|
||||
|
||||
delayInt(250);
|
||||
setDMRInt(false);
|
||||
|
||||
delayInt(250);
|
||||
setDStarInt(false);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::start()
|
||||
{
|
||||
if (m_started)
|
||||
return;
|
||||
|
||||
startInt();
|
||||
|
||||
m_started = true;
|
||||
|
||||
setMode();
|
||||
}
|
||||
|
||||
void CIO::process()
|
||||
{
|
||||
m_ledCount++;
|
||||
if (m_started) {
|
||||
// Two seconds timeout
|
||||
if (m_watchdog >= 48000U) {
|
||||
if (m_modemState == STATE_DSTAR || m_modemState == STATE_DMR || m_modemState == STATE_YSF || m_modemState == STATE_P25 || m_modemState == STATE_NXDN || m_modemState == STATE_POCSAG) {
|
||||
if (m_modemState == STATE_DMR && m_tx)
|
||||
dmrTX.setStart(false);
|
||||
m_modemState = STATE_IDLE;
|
||||
setMode();
|
||||
}
|
||||
|
||||
m_watchdog = 0U;
|
||||
}
|
||||
|
||||
#if defined(CONSTANT_SRV_LED)
|
||||
setLEDInt(true);
|
||||
#else
|
||||
if (m_ledCount >= 24000U) {
|
||||
m_ledCount = 0U;
|
||||
m_ledValue = !m_ledValue;
|
||||
setLEDInt(m_ledValue);
|
||||
}
|
||||
#endif
|
||||
} else {
|
||||
if (m_ledCount >= 240000U) {
|
||||
m_ledCount = 0U;
|
||||
m_ledValue = !m_ledValue;
|
||||
setLEDInt(m_ledValue);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
if (m_useCOSAsLockout)
|
||||
m_lockout = getCOSInt();
|
||||
|
||||
// Switch off the transmitter if needed
|
||||
if (m_txBuffer.getData() == 0U && m_tx) {
|
||||
m_tx = false;
|
||||
setPTTInt(m_pttInvert ? true : false);
|
||||
}
|
||||
|
||||
if (m_rxBuffer.getData() >= RX_BLOCK_SIZE) {
|
||||
q15_t samples[RX_BLOCK_SIZE];
|
||||
uint8_t control[RX_BLOCK_SIZE];
|
||||
uint16_t rssi[RX_BLOCK_SIZE];
|
||||
|
||||
for (uint16_t i = 0U; i < RX_BLOCK_SIZE; i++) {
|
||||
uint16_t sample;
|
||||
m_rxBuffer.get(sample, control[i]);
|
||||
m_rssiBuffer.get(rssi[i]);
|
||||
|
||||
// Detect ADC overflow
|
||||
if (m_detect && (sample == 0U || sample == 4095U))
|
||||
m_adcOverflow++;
|
||||
|
||||
q15_t res1 = q15_t(sample) - m_rxDCOffset;
|
||||
q31_t res2 = res1 * m_rxLevel;
|
||||
samples[i] = q15_t(__SSAT((res2 >> 15), 16));
|
||||
}
|
||||
|
||||
if (m_lockout)
|
||||
return;
|
||||
|
||||
#if defined(USE_DCBLOCKER)
|
||||
q31_t q31Samples[RX_BLOCK_SIZE];
|
||||
::arm_q15_to_q31(samples, q31Samples, RX_BLOCK_SIZE);
|
||||
|
||||
q31_t dcValues[RX_BLOCK_SIZE];
|
||||
::arm_biquad_cascade_df1_q31(&m_dcFilter, q31Samples, dcValues, RX_BLOCK_SIZE);
|
||||
|
||||
q31_t dcLevel = 0;
|
||||
for (uint8_t i = 0U; i < RX_BLOCK_SIZE; i++)
|
||||
dcLevel += dcValues[i];
|
||||
dcLevel /= RX_BLOCK_SIZE;
|
||||
|
||||
q15_t offset = q15_t(__SSAT((dcLevel >> 16), 16));;
|
||||
|
||||
q15_t dcSamples[RX_BLOCK_SIZE];
|
||||
for (uint8_t i = 0U; i < RX_BLOCK_SIZE; i++)
|
||||
dcSamples[i] = samples[i] - offset;
|
||||
#endif
|
||||
|
||||
if (m_modemState == STATE_IDLE) {
|
||||
if (m_dstarEnable) {
|
||||
q15_t GMSKVals[RX_BLOCK_SIZE];
|
||||
#if defined(USE_DCBLOCKER)
|
||||
::arm_fir_fast_q15(&m_gaussianFilter, dcSamples, GMSKVals, RX_BLOCK_SIZE);
|
||||
#else
|
||||
::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
|
||||
#endif
|
||||
dstarRX.samples(GMSKVals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
|
||||
if (m_p25Enable) {
|
||||
q15_t P25Vals[RX_BLOCK_SIZE];
|
||||
#if defined(USE_DCBLOCKER)
|
||||
::arm_fir_fast_q15(&m_boxcarFilter, dcSamples, P25Vals, RX_BLOCK_SIZE);
|
||||
#else
|
||||
::arm_fir_fast_q15(&m_boxcarFilter, samples, P25Vals, RX_BLOCK_SIZE);
|
||||
#endif
|
||||
p25RX.samples(P25Vals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
|
||||
if (m_nxdnEnable) {
|
||||
q15_t NXDNValsTmp[RX_BLOCK_SIZE];
|
||||
#if defined(USE_DCBLOCKER)
|
||||
::arm_fir_fast_q15(&m_nxdnFilter, dcSamples, NXDNValsTmp, RX_BLOCK_SIZE);
|
||||
#else
|
||||
::arm_fir_fast_q15(&m_nxdnFilter, samples, NXDNValsTmp, RX_BLOCK_SIZE);
|
||||
#endif
|
||||
q15_t NXDNVals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_nxdnISincFilter, NXDNValsTmp, NXDNVals, RX_BLOCK_SIZE);
|
||||
|
||||
nxdnRX.samples(NXDNVals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
|
||||
if (m_dmrEnable || m_ysfEnable) {
|
||||
q15_t RRCVals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_rrcFilter, samples, RRCVals, RX_BLOCK_SIZE);
|
||||
|
||||
if (m_ysfEnable)
|
||||
ysfRX.samples(RRCVals, rssi, RX_BLOCK_SIZE);
|
||||
|
||||
if (m_dmrEnable) {
|
||||
if (m_duplex)
|
||||
dmrIdleRX.samples(RRCVals, RX_BLOCK_SIZE);
|
||||
else
|
||||
dmrDMORX.samples(RRCVals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
}
|
||||
|
||||
if (m_fmEnable) {
|
||||
bool cos = getCOSInt();
|
||||
#if defined(USE_DCBLOCKER)
|
||||
fm.samples(cos, dcSamples, RX_BLOCK_SIZE);
|
||||
#else
|
||||
fm.samples(cos, samples, RX_BLOCK_SIZE);
|
||||
#endif
|
||||
}
|
||||
|
||||
if (m_ax25Enable) {
|
||||
#if defined(USE_DCBLOCKER)
|
||||
ax25RX.samples(dcSamples, RX_BLOCK_SIZE);
|
||||
#else
|
||||
ax25RX.samples(samples, RX_BLOCK_SIZE);
|
||||
#endif
|
||||
}
|
||||
} else if (m_modemState == STATE_DSTAR) {
|
||||
if (m_dstarEnable) {
|
||||
q15_t GMSKVals[RX_BLOCK_SIZE];
|
||||
#if defined(USE_DCBLOCKER)
|
||||
::arm_fir_fast_q15(&m_gaussianFilter, dcSamples, GMSKVals, RX_BLOCK_SIZE);
|
||||
#else
|
||||
::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
|
||||
#endif
|
||||
dstarRX.samples(GMSKVals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
} else if (m_modemState == STATE_DMR) {
|
||||
if (m_dmrEnable) {
|
||||
q15_t DMRVals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_rrcFilter, samples, DMRVals, RX_BLOCK_SIZE);
|
||||
|
||||
if (m_duplex) {
|
||||
// If the transmitter isn't on, use the DMR idle RX to detect the wakeup CSBKs
|
||||
if (m_tx)
|
||||
dmrRX.samples(DMRVals, rssi, control, RX_BLOCK_SIZE);
|
||||
else
|
||||
dmrIdleRX.samples(DMRVals, RX_BLOCK_SIZE);
|
||||
} else {
|
||||
dmrDMORX.samples(DMRVals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
}
|
||||
} else if (m_modemState == STATE_YSF) {
|
||||
if (m_ysfEnable) {
|
||||
q15_t YSFVals[RX_BLOCK_SIZE];
|
||||
#if defined(USE_DCBLOCKER)
|
||||
::arm_fir_fast_q15(&m_rrcFilter, dcSamples, YSFVals, RX_BLOCK_SIZE);
|
||||
#else
|
||||
::arm_fir_fast_q15(&m_rrcFilter, samples, YSFVals, RX_BLOCK_SIZE);
|
||||
#endif
|
||||
ysfRX.samples(YSFVals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
} else if (m_modemState == STATE_P25) {
|
||||
if (m_p25Enable) {
|
||||
q15_t P25Vals[RX_BLOCK_SIZE];
|
||||
#if defined(USE_DCBLOCKER)
|
||||
::arm_fir_fast_q15(&m_boxcarFilter, dcSamples, P25Vals, RX_BLOCK_SIZE);
|
||||
#else
|
||||
::arm_fir_fast_q15(&m_boxcarFilter, samples, P25Vals, RX_BLOCK_SIZE);
|
||||
#endif
|
||||
p25RX.samples(P25Vals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
} else if (m_modemState == STATE_NXDN) {
|
||||
if (m_nxdnEnable) {
|
||||
q15_t NXDNValsTmp[RX_BLOCK_SIZE];
|
||||
#if defined(USE_DCBLOCKER)
|
||||
::arm_fir_fast_q15(&m_nxdnFilter, dcSamples, NXDNValsTmp, RX_BLOCK_SIZE);
|
||||
#else
|
||||
::arm_fir_fast_q15(&m_nxdnFilter, samples, NXDNValsTmp, RX_BLOCK_SIZE);
|
||||
#endif
|
||||
q15_t NXDNVals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_nxdnISincFilter, NXDNValsTmp, NXDNVals, RX_BLOCK_SIZE);
|
||||
|
||||
nxdnRX.samples(NXDNVals, rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
} else if (m_modemState == STATE_FM) {
|
||||
bool cos = getCOSInt();
|
||||
#if defined(USE_DCBLOCKER)
|
||||
fm.samples(cos, dcSamples, RX_BLOCK_SIZE);
|
||||
if (m_ax25Enable)
|
||||
ax25RX.samples(dcSamples, RX_BLOCK_SIZE);
|
||||
#else
|
||||
fm.samples(cos, samples, RX_BLOCK_SIZE);
|
||||
if (m_ax25Enable)
|
||||
ax25RX.samples(samples, RX_BLOCK_SIZE);
|
||||
#endif
|
||||
} else if (m_modemState == STATE_DSTARCAL) {
|
||||
q15_t GMSKVals[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
|
||||
|
||||
calDStarRX.samples(GMSKVals, RX_BLOCK_SIZE);
|
||||
} else if (m_modemState == STATE_RSSICAL) {
|
||||
calRSSI.samples(rssi, RX_BLOCK_SIZE);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void CIO::write(MMDVM_STATE mode, q15_t* samples, uint16_t length, const uint8_t* control)
|
||||
{
|
||||
if (!m_started)
|
||||
return;
|
||||
|
||||
if (m_lockout)
|
||||
return;
|
||||
|
||||
// Switch the transmitter on if needed
|
||||
if (!m_tx) {
|
||||
m_tx = true;
|
||||
setPTTInt(m_pttInvert ? false : true);
|
||||
}
|
||||
|
||||
q15_t txLevel = 0;
|
||||
switch (mode) {
|
||||
case STATE_DSTAR:
|
||||
txLevel = m_dstarTXLevel;
|
||||
break;
|
||||
case STATE_DMR:
|
||||
txLevel = m_dmrTXLevel;
|
||||
break;
|
||||
case STATE_YSF:
|
||||
txLevel = m_ysfTXLevel;
|
||||
break;
|
||||
case STATE_P25:
|
||||
txLevel = m_p25TXLevel;
|
||||
break;
|
||||
case STATE_NXDN:
|
||||
txLevel = m_nxdnTXLevel;
|
||||
break;
|
||||
case STATE_POCSAG:
|
||||
txLevel = m_pocsagTXLevel;
|
||||
break;
|
||||
case STATE_FM:
|
||||
txLevel = m_fmTXLevel;
|
||||
break;
|
||||
case STATE_AX25:
|
||||
txLevel = m_ax25TXLevel;
|
||||
break;
|
||||
default:
|
||||
txLevel = m_cwIdTXLevel;
|
||||
break;
|
||||
}
|
||||
|
||||
for (uint16_t i = 0U; i < length; i++) {
|
||||
q31_t res1 = samples[i] * txLevel;
|
||||
q15_t res2 = q15_t(__SSAT((res1 >> 15), 16));
|
||||
uint16_t res3 = uint16_t(res2 + m_txDCOffset);
|
||||
|
||||
// Detect DAC overflow
|
||||
if (res3 > 4095U)
|
||||
m_dacOverflow++;
|
||||
|
||||
if (control == NULL)
|
||||
m_txBuffer.put(res3, MARK_NONE);
|
||||
else
|
||||
m_txBuffer.put(res3, control[i]);
|
||||
}
|
||||
}
|
||||
|
||||
uint16_t CIO::getSpace() const
|
||||
{
|
||||
return m_txBuffer.getSpace();
|
||||
}
|
||||
|
||||
void CIO::setDecode(bool dcd)
|
||||
{
|
||||
if (dcd != m_dcd)
|
||||
setCOSInt(dcd ? true : false);
|
||||
|
||||
m_dcd = dcd;
|
||||
}
|
||||
|
||||
void CIO::setADCDetection(bool detect)
|
||||
{
|
||||
m_detect = detect;
|
||||
}
|
||||
|
||||
void CIO::setMode()
|
||||
{
|
||||
#if defined(MODE_LEDS)
|
||||
setDStarInt(m_modemState == STATE_DSTAR);
|
||||
setDMRInt(m_modemState == STATE_DMR);
|
||||
setYSFInt(m_modemState == STATE_YSF);
|
||||
setP25Int(m_modemState == STATE_P25);
|
||||
setNXDNInt(m_modemState == STATE_NXDN);
|
||||
setPOCSAGInt(m_modemState == STATE_POCSAG);
|
||||
setFMInt(m_modemState == STATE_FM);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, uint8_t ax25TXLevel, int16_t txDCOffset, int16_t rxDCOffset, bool useCOSAsLockout)
|
||||
{
|
||||
m_pttInvert = pttInvert;
|
||||
|
||||
m_rxLevel = q15_t(rxLevel * 128);
|
||||
m_cwIdTXLevel = q15_t(cwIdTXLevel * 128);
|
||||
m_dstarTXLevel = q15_t(dstarTXLevel * 128);
|
||||
m_dmrTXLevel = q15_t(dmrTXLevel * 128);
|
||||
m_ysfTXLevel = q15_t(ysfTXLevel * 128);
|
||||
m_p25TXLevel = q15_t(p25TXLevel * 128);
|
||||
m_nxdnTXLevel = q15_t(nxdnTXLevel * 128);
|
||||
m_pocsagTXLevel = q15_t(pocsagTXLevel * 128);
|
||||
m_fmTXLevel = q15_t(fmTXLevel * 128);
|
||||
m_ax25TXLevel = q15_t(ax25TXLevel * 128);
|
||||
|
||||
m_rxDCOffset = DC_OFFSET + rxDCOffset;
|
||||
m_txDCOffset = DC_OFFSET + txDCOffset;
|
||||
|
||||
m_useCOSAsLockout = useCOSAsLockout;
|
||||
|
||||
if (rxInvert)
|
||||
m_rxLevel = -m_rxLevel;
|
||||
|
||||
if (txInvert) {
|
||||
m_dstarTXLevel = -m_dstarTXLevel;
|
||||
m_dmrTXLevel = -m_dmrTXLevel;
|
||||
m_ysfTXLevel = -m_ysfTXLevel;
|
||||
m_p25TXLevel = -m_p25TXLevel;
|
||||
m_nxdnTXLevel = -m_nxdnTXLevel;
|
||||
m_pocsagTXLevel = -m_pocsagTXLevel;
|
||||
}
|
||||
}
|
||||
|
||||
void CIO::getOverflow(bool& adcOverflow, bool& dacOverflow)
|
||||
{
|
||||
adcOverflow = m_adcOverflow > 0U;
|
||||
dacOverflow = m_dacOverflow > 0U;
|
||||
|
||||
m_adcOverflow = 0U;
|
||||
m_dacOverflow = 0U;
|
||||
}
|
||||
|
||||
bool CIO::hasTXOverflow()
|
||||
{
|
||||
return m_txBuffer.hasOverflowed();
|
||||
}
|
||||
|
||||
bool CIO::hasRXOverflow()
|
||||
{
|
||||
return m_rxBuffer.hasOverflowed();
|
||||
}
|
||||
|
||||
void CIO::resetWatchdog()
|
||||
{
|
||||
m_watchdog = 0U;
|
||||
}
|
||||
|
||||
uint32_t CIO::getWatchdog()
|
||||
{
|
||||
return m_watchdog;
|
||||
}
|
||||
|
||||
bool CIO::hasLockout() const
|
||||
{
|
||||
return m_lockout;
|
||||
}
|
||||
@@ -1,282 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015 by Jim Mclaughlin KI6ZUM
|
||||
* Copyright (C) 2016 by Colin Durbridge G4EML
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
#include "IO.h"
|
||||
|
||||
#if defined(__SAM3X8E__)
|
||||
|
||||
// An Arduino Due
|
||||
#if defined(ARDUINO_DUE_PAPA)
|
||||
#define PIN_COS 7
|
||||
#define PIN_PTT 8
|
||||
#define PIN_COSLED 11
|
||||
#define PIN_DSTAR 16
|
||||
#define PIN_DMR 17
|
||||
#define PIN_YSF 18
|
||||
#define PIN_P25 19
|
||||
#define PIN_NXDN 20
|
||||
#define PIN_POCSAG 4
|
||||
#define PIN_FM 5
|
||||
#define ADC_CHER_Chan (1<<7) // ADC on Due pin A0 - Due AD7 - (1 << 7)
|
||||
#define ADC_ISR_EOC_Chan ADC_ISR_EOC7
|
||||
#define ADC_CDR_Chan 7
|
||||
#define DACC_MR_USER_SEL_Chan DACC_MR_USER_SEL_CHANNEL0 // DAC on Due DAC0
|
||||
#define DACC_CHER_Chan DACC_CHER_CH0
|
||||
#elif defined(ARDUINO_DUE_ZUM_V10)
|
||||
#define PIN_COS 52
|
||||
#define PIN_PTT 23
|
||||
#define PIN_COSLED 22
|
||||
#define PIN_DSTAR 9
|
||||
#define PIN_DMR 8
|
||||
#define PIN_YSF 7
|
||||
#define PIN_P25 6
|
||||
#define PIN_NXDN 5
|
||||
#define PIN_POCSAG 4
|
||||
#define PIN_FM 3
|
||||
#define ADC_CHER_Chan (1<<13) // ADC on Due pin A11 - Due AD13 - (1 << 13)
|
||||
#define ADC_ISR_EOC_Chan ADC_ISR_EOC13
|
||||
#define ADC_CDR_Chan 13
|
||||
#define DACC_MR_USER_SEL_Chan DACC_MR_USER_SEL_CHANNEL1 // DAC on Due DAC1
|
||||
#define DACC_CHER_Chan DACC_CHER_CH1
|
||||
#define RSSI_CHER_Chan (1<<1) // ADC on Due pin A6 - Due AD1 - (1 << 1)
|
||||
#define RSSI_CDR_Chan 1
|
||||
#elif defined(ARDUINO_DUE_NTH)
|
||||
#define PIN_COS A7
|
||||
#define PIN_PTT A8
|
||||
#define PIN_COSLED A11
|
||||
#define PIN_DSTAR 9
|
||||
#define PIN_DMR 8
|
||||
#define PIN_YSF 7
|
||||
#define PIN_P25 6
|
||||
#define PIN_NXDN 5
|
||||
#define PIN_POCSAG 4
|
||||
#define PIN_FM 3
|
||||
#define ADC_CHER_Chan (1<<7) // ADC on Due pin A0 - Due AD7 - (1 << 7)
|
||||
#define ADC_ISR_EOC_Chan ADC_ISR_EOC7
|
||||
#define ADC_CDR_Chan 7
|
||||
#define DACC_MR_USER_SEL_Chan DACC_MR_USER_SEL_CHANNEL0 // DAC on Due DAC0
|
||||
#define DACC_CHER_Chan DACC_CHER_CH0
|
||||
#define RSSI_CHER_Chan (1<<1) // ADC on Due pin A6 - Due AD1 - (1 << 1)
|
||||
#define RSSI_CDR_Chan 1
|
||||
#else
|
||||
#error "Either ARDUINO_DUE_PAPA, ARDUINO_DUE_ZUM_V10, or ARDUINO_DUE_NTH need to be defined"
|
||||
#endif
|
||||
|
||||
const uint16_t DC_OFFSET = 2048U;
|
||||
|
||||
extern "C" {
|
||||
void ADC_Handler()
|
||||
{
|
||||
io.interrupt();
|
||||
}
|
||||
}
|
||||
|
||||
void CIO::initInt()
|
||||
{
|
||||
// Set up the TX, COS and LED pins
|
||||
pinMode(PIN_PTT, OUTPUT);
|
||||
pinMode(PIN_COSLED, OUTPUT);
|
||||
pinMode(PIN_LED, OUTPUT);
|
||||
pinMode(PIN_COS, INPUT);
|
||||
|
||||
#if defined(MODE_LEDS)
|
||||
// Set up the mode output pins
|
||||
pinMode(PIN_DSTAR, OUTPUT);
|
||||
pinMode(PIN_DMR, OUTPUT);
|
||||
pinMode(PIN_YSF, OUTPUT);
|
||||
pinMode(PIN_P25, OUTPUT);
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
pinMode(PIN_NXDN, OUTPUT);
|
||||
#endif
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
pinMode(PIN_POCSAG, OUTPUT);
|
||||
#endif
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
pinMode(PIN_FM, OUTPUT);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::startInt()
|
||||
{
|
||||
if (ADC->ADC_ISR & ADC_ISR_EOC_Chan) // Ensure there was an End-of-Conversion and we read the ISR reg
|
||||
io.interrupt();
|
||||
|
||||
// Set up the ADC
|
||||
NVIC_EnableIRQ(ADC_IRQn); // Enable ADC interrupt vector
|
||||
ADC->ADC_IDR = 0xFFFFFFFF; // Disable interrupts
|
||||
ADC->ADC_IER = ADC_CHER_Chan; // Enable End-Of-Conv interrupt
|
||||
ADC->ADC_CHDR = 0xFFFF; // Disable all channels
|
||||
ADC->ADC_CHER = ADC_CHER_Chan; // Enable rx input channel
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
ADC->ADC_CHER |= RSSI_CHER_Chan; // and RSSI input
|
||||
#endif
|
||||
ADC->ADC_CGR = 0x15555555; // All gains set to x1
|
||||
ADC->ADC_COR = 0x00000000; // All offsets off
|
||||
ADC->ADC_MR = (ADC->ADC_MR & 0xFFFFFFF0) | (1 << 1) | ADC_MR_TRGEN; // 1 = trig source TIO from TC0
|
||||
|
||||
#if defined(EXTERNAL_OSC)
|
||||
// Set up the external clock input on PA4 = AI5
|
||||
REG_PIOA_ODR = 0x10; // Set pin as input
|
||||
REG_PIOA_PDR = 0x10; // Disable PIO A bit 4
|
||||
REG_PIOA_ABSR &= ~0x10; // Select A peripheral = TCLK1 Input
|
||||
#endif
|
||||
|
||||
// Set up the timer
|
||||
pmc_enable_periph_clk(TC_INTERFACE_ID + 0*3+0) ; // Clock the TC0 channel 0
|
||||
TcChannel* t = &(TC0->TC_CHANNEL)[0]; // Pointer to TC0 registers for its channel 0
|
||||
t->TC_CCR = TC_CCR_CLKDIS; // Disable internal clocking while setup regs
|
||||
t->TC_IDR = 0xFFFFFFFF; // Disable interrupts
|
||||
t->TC_SR; // Read int status reg to clear pending
|
||||
#if defined(EXTERNAL_OSC)
|
||||
t->TC_CMR = TC_CMR_TCCLKS_XC1 | // Use XC1 = TCLK1 external clock
|
||||
#else
|
||||
t->TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1 | // Use TCLK1 (prescale by 2, = 42MHz)
|
||||
#endif
|
||||
TC_CMR_WAVE | // Waveform mode
|
||||
TC_CMR_WAVSEL_UP_RC | // Count-up PWM using RC as threshold
|
||||
TC_CMR_EEVT_XC0 | // Set external events from XC0 (this setup TIOB as output)
|
||||
TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_CLEAR |
|
||||
TC_CMR_BCPB_CLEAR | TC_CMR_BCPC_CLEAR;
|
||||
#if defined(EXTERNAL_OSC)
|
||||
t->TC_RC = EXTERNAL_OSC / 24000; // Counter resets on RC, so sets period in terms of the external clock
|
||||
t->TC_RA = EXTERNAL_OSC / 48000; // Roughly square wave
|
||||
#else
|
||||
t->TC_RC = 1750; // Counter resets on RC, so sets period in terms of 42MHz internal clock
|
||||
t->TC_RA = 880; // Roughly square wave
|
||||
#endif
|
||||
t->TC_CMR = (t->TC_CMR & 0xFFF0FFFF) | TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_SET; // Set clear and set from RA and RC compares
|
||||
t->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG; // re-enable local clocking and switch to hardware trigger source.
|
||||
|
||||
// Set up the DAC
|
||||
pmc_enable_periph_clk(DACC_INTERFACE_ID); // Start clocking DAC
|
||||
DACC->DACC_CR = DACC_CR_SWRST; // Reset DAC
|
||||
DACC->DACC_MR =
|
||||
DACC_MR_TRGEN_EN | DACC_MR_TRGSEL(1) | // Trigger 1 = TIO output of TC0
|
||||
DACC_MR_USER_SEL_Chan | // Select channel
|
||||
(24 << DACC_MR_STARTUP_Pos); // 24 = 1536 cycles which I think is in range 23..45us since DAC clock = 42MHz
|
||||
DACC->DACC_IDR = 0xFFFFFFFF; // No interrupts
|
||||
DACC->DACC_CHER = DACC_CHER_Chan; // Enable channel
|
||||
|
||||
digitalWrite(PIN_PTT, m_pttInvert ? HIGH : LOW);
|
||||
digitalWrite(PIN_COSLED, LOW);
|
||||
digitalWrite(PIN_LED, HIGH);
|
||||
}
|
||||
|
||||
void CIO::interrupt()
|
||||
{
|
||||
if ((ADC->ADC_ISR & ADC_ISR_EOC_Chan) == ADC_ISR_EOC_Chan) { // Ensure there was an End-of-Conversion and we read the ISR reg
|
||||
uint8_t control = MARK_NONE;
|
||||
uint16_t sample = DC_OFFSET;
|
||||
|
||||
m_txBuffer.get(sample, control);
|
||||
DACC->DACC_CDR = sample;
|
||||
|
||||
sample = ADC->ADC_CDR[ADC_CDR_Chan];
|
||||
m_rxBuffer.put(sample, control);
|
||||
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
m_rssiBuffer.put(ADC->ADC_CDR[RSSI_CDR_Chan]);
|
||||
#else
|
||||
m_rssiBuffer.put(0U);
|
||||
#endif
|
||||
|
||||
m_watchdog++;
|
||||
}
|
||||
}
|
||||
|
||||
bool CIO::getCOSInt()
|
||||
{
|
||||
return digitalRead(PIN_COS) == HIGH;
|
||||
}
|
||||
|
||||
void CIO::setLEDInt(bool on)
|
||||
{
|
||||
digitalWrite(PIN_LED, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setPTTInt(bool on)
|
||||
{
|
||||
digitalWrite(PIN_PTT, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setCOSInt(bool on)
|
||||
{
|
||||
digitalWrite(PIN_COSLED, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setDStarInt(bool on)
|
||||
{
|
||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setDMRInt(bool on)
|
||||
{
|
||||
digitalWrite(PIN_DMR, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setYSFInt(bool on)
|
||||
{
|
||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setP25Int(bool on)
|
||||
{
|
||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setNXDNInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
||||
#else
|
||||
digitalWrite(PIN_NXDN, on ? HIGH : LOW);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setPOCSAGInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
||||
digitalWrite(PIN_DMR, on ? HIGH : LOW);
|
||||
#else
|
||||
digitalWrite(PIN_POCSAG, on ? HIGH : LOW);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setFMInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_FM_LEDS)
|
||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
||||
#else
|
||||
digitalWrite(PIN_FM, on ? HIGH : LOW);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::delayInt(unsigned int dly)
|
||||
{
|
||||
delay(dly);
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -1,73 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _IO_PINS_H
|
||||
#define _IO_PINS_H
|
||||
|
||||
#if !defined(CONFIG_H)
|
||||
#error "Requires Config.h to be included first!"
|
||||
#endif
|
||||
|
||||
#if defined(STM32F4_RPT_HAT_TGO)
|
||||
#include "pins/pins_f4_rpt_tgo.h"
|
||||
|
||||
#elif defined(STM32F4_DISCOVERY)
|
||||
#include "pins/pins_f4_discovery.h"
|
||||
|
||||
#elif defined(STM32F4_PI)
|
||||
#include "pins/pins_f4_pi.h"
|
||||
|
||||
#elif defined(STM32F722_PI)
|
||||
#include "pins/pins_f7_pi.h"
|
||||
|
||||
#elif defined(STM32F4_F4M)
|
||||
#include "pins/pins_f4_f4m.h"
|
||||
|
||||
#elif defined(STM32F722_F7M)
|
||||
#include "pins/pins_f7_f7m.h"
|
||||
|
||||
#elif defined(STM32F722_RPT_HAT)
|
||||
#include "pins/pins_f7_rpt_hat.h"
|
||||
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
#if defined(STM32F4_NUCLEO_MORPHO_HEADER)
|
||||
#include "pins/pins_f4_nucleo_morpho.h"
|
||||
#elif defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
||||
#include "pins/pins_f4_nucleo_arduino.h"
|
||||
#else
|
||||
#error "Either STM32F4_NUCLEO_MORPHO_HEADER or STM32F4_NUCLEO_ARDUINO_HEADER need to be defined"
|
||||
#endif
|
||||
|
||||
#elif defined(STM32F7_NUCLEO)
|
||||
#include "pins/pins_f7_nucleo.h"
|
||||
|
||||
#elif defined(STM32F4_DVM)
|
||||
#include "pins/pins_f4_stm32dvm_v3.h"
|
||||
|
||||
#elif defined(DRCC_DVM_NQF)
|
||||
#include "pins/pins_f4_drcc_nqf.h"
|
||||
|
||||
#elif defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
|
||||
#include "pins/pins_f4_stm32eda.h"
|
||||
|
||||
#else
|
||||
#error "A valid board type macro need to be defined."
|
||||
|
||||
#endif
|
||||
|
||||
#endif //#ifndef _IO_PINS_H
|
||||
@@ -1,512 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2016 by Jim McLaughlin KI6ZUM
|
||||
* Copyright (C) 2016,2017,2018 by Andy Uribe CA6JAU
|
||||
* Copyright (C) 2017,2018,2020 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
#include "IO.h"
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F7XX)
|
||||
#include "IOPins.h"
|
||||
|
||||
|
||||
const uint16_t DC_OFFSET = 2048U;
|
||||
|
||||
// Sampling frequency
|
||||
#define SAMP_FREQ 24000
|
||||
|
||||
extern "C" {
|
||||
void TIM2_IRQHandler() {
|
||||
if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET) {
|
||||
TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
|
||||
io.interrupt();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void CIO::initInt()
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
GPIO_StructInit(&GPIO_InitStruct);
|
||||
GPIO_InitStruct.GPIO_Speed = GPIO_Fast_Speed;
|
||||
GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN;
|
||||
|
||||
// PTT pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_PTT, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_PTT;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_PTT, &GPIO_InitStruct);
|
||||
|
||||
// COSLED pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_COSLED, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_COSLED;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_COSLED, &GPIO_InitStruct);
|
||||
|
||||
// LED pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_LED, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_LED;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_LED, &GPIO_InitStruct);
|
||||
|
||||
// Init the input pins PIN_COS
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_COS, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_COS;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
|
||||
GPIO_Init(PORT_COS, &GPIO_InitStruct);
|
||||
|
||||
#if defined(MODE_LEDS)
|
||||
// DSTAR pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_DSTAR, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_DSTAR;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_DSTAR, &GPIO_InitStruct);
|
||||
|
||||
// DMR pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_DMR, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_DMR;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_DMR, &GPIO_InitStruct);
|
||||
|
||||
// YSF pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_YSF, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_YSF;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_YSF, &GPIO_InitStruct);
|
||||
|
||||
// P25 pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_P25, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_P25;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_P25, &GPIO_InitStruct);
|
||||
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
// NXDN pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_NXDN, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_NXDN;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_NXDN, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
// POCSAG pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_POCSAG, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_POCSAG;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_POCSAG, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
#if !defined(USE_ALTERNATE_FM_LEDS)
|
||||
// FM pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_FM, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_FM;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_FM, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
// DSTAR mode pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_MDSTAR, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_MDSTAR;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_MDSTAR, &GPIO_InitStruct);
|
||||
|
||||
// DMR mode pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_MDMR, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_MDMR;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_MDMR, &GPIO_InitStruct);
|
||||
|
||||
// YSF mode pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_MYSF, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_MYSF;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_MYSF, &GPIO_InitStruct);
|
||||
|
||||
// P25 mode pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_MP25, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_MP25;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_MP25, &GPIO_InitStruct);
|
||||
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
// NXDN mode pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_MNXDN, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_MNXDN;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_MNXDN, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
// POCSAG mode pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_MPOCSAG, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_MPOCSAG;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_MPOCSAG, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
#if !defined(USE_ALTERNATE_FM_LEDS)
|
||||
// FM mode pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_MFM, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_MFM;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_MFM, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::startInt()
|
||||
{
|
||||
if ((ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC) != RESET))
|
||||
io.interrupt();
|
||||
|
||||
// Init the ADC
|
||||
GPIO_InitTypeDef GPIO_InitStruct;
|
||||
ADC_InitTypeDef ADC_InitStructure;
|
||||
ADC_CommonInitTypeDef ADC_CommonInitStructure;
|
||||
|
||||
GPIO_StructInit(&GPIO_InitStruct);
|
||||
ADC_CommonStructInit(&ADC_CommonInitStructure);
|
||||
ADC_StructInit(&ADC_InitStructure);
|
||||
|
||||
// Enable ADC1 clock
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_RX, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
|
||||
// Enable ADC1 GPIO
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_RX;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN;
|
||||
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL ;
|
||||
GPIO_Init(PORT_RX, &GPIO_InitStruct);
|
||||
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
// Enable ADC2 clock
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_RSSI, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE);
|
||||
// Enable ADC2 GPIO
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_RSSI;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN;
|
||||
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL ;
|
||||
GPIO_Init(PORT_RSSI, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
// Init ADCs in dual mode (RSSI), div clock by two
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
ADC_CommonInitStructure.ADC_Mode = ADC_DualMode_RegSimult;
|
||||
#else
|
||||
ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent;
|
||||
#endif
|
||||
ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div2;
|
||||
ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled;
|
||||
ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
|
||||
ADC_CommonInit(&ADC_CommonInitStructure);
|
||||
|
||||
// Init ADC1 and ADC2: 12bit, single-conversion
|
||||
ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b;
|
||||
ADC_InitStructure.ADC_ScanConvMode = DISABLE;
|
||||
ADC_InitStructure.ADC_ContinuousConvMode = DISABLE;
|
||||
ADC_InitStructure.ADC_ExternalTrigConvEdge = 0;
|
||||
ADC_InitStructure.ADC_ExternalTrigConv = 0;
|
||||
ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
|
||||
ADC_InitStructure.ADC_NbrOfConversion = 1;
|
||||
|
||||
ADC_Init(ADC1, &ADC_InitStructure);
|
||||
|
||||
ADC_EOCOnEachRegularChannelCmd(ADC1, ENABLE);
|
||||
ADC_RegularChannelConfig(ADC1, PIN_RX_CH, 1, ADC_SampleTime_3Cycles);
|
||||
|
||||
// Enable ADC1
|
||||
ADC_Cmd(ADC1, ENABLE);
|
||||
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
ADC_Init(ADC2, &ADC_InitStructure);
|
||||
|
||||
ADC_EOCOnEachRegularChannelCmd(ADC2, ENABLE);
|
||||
ADC_RegularChannelConfig(ADC2, PIN_RSSI_CH, 1, ADC_SampleTime_3Cycles);
|
||||
|
||||
// Enable ADC2
|
||||
ADC_Cmd(ADC2, ENABLE);
|
||||
#endif
|
||||
|
||||
// Init the DAC
|
||||
DAC_InitTypeDef DAC_InitStructure;
|
||||
|
||||
GPIO_StructInit(&GPIO_InitStruct);
|
||||
DAC_StructInit(&DAC_InitStructure);
|
||||
|
||||
// GPIOA clock enable
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
|
||||
|
||||
// DAC Periph clock enable
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE);
|
||||
|
||||
// GPIO CONFIGURATION of DAC Pin
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_TX;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN;
|
||||
GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
DAC_InitStructure.DAC_Trigger = DAC_Trigger_None;
|
||||
DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
|
||||
DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
|
||||
DAC_Init(PIN_TX_CH, &DAC_InitStructure);
|
||||
DAC_Cmd(PIN_TX_CH, ENABLE);
|
||||
|
||||
// Init the timer
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
|
||||
|
||||
#if defined(EXTERNAL_OSC) && !(defined(STM32F4_PI) || defined(STM32F722_PI))
|
||||
// Configure a GPIO as external TIM2 clock source
|
||||
GPIO_PinAFConfig(PORT_EXT_CLK, SRC_EXT_CLK, GPIO_AF_TIM2);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_EXT_CLK;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_Init(PORT_EXT_CLK, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
TIM_TimeBaseInitTypeDef timerInitStructure;
|
||||
TIM_TimeBaseStructInit (&timerInitStructure);
|
||||
|
||||
// TIM2 output frequency
|
||||
#if defined(EXTERNAL_OSC) && !(defined(STM32F4_PI) || defined(STM32F722_PI))
|
||||
timerInitStructure.TIM_Prescaler = (uint16_t) ((EXTERNAL_OSC/(2*SAMP_FREQ)) - 1);
|
||||
timerInitStructure.TIM_Period = 1;
|
||||
#else
|
||||
timerInitStructure.TIM_Prescaler = (uint16_t) ((SystemCoreClock/(6*SAMP_FREQ)) - 1);
|
||||
timerInitStructure.TIM_Period = 2;
|
||||
#endif
|
||||
|
||||
timerInitStructure.TIM_CounterMode = TIM_CounterMode_Up;
|
||||
timerInitStructure.TIM_ClockDivision = TIM_CKD_DIV1;
|
||||
timerInitStructure.TIM_RepetitionCounter = 0;
|
||||
TIM_TimeBaseInit(TIM2, &timerInitStructure);
|
||||
|
||||
#if defined(EXTERNAL_OSC) && !(defined(STM32F4_PI) || defined(STM32F722_PI))
|
||||
// Enable external clock
|
||||
TIM_ETRClockMode2Config(TIM2, TIM_ExtTRGPSC_OFF, TIM_ExtTRGPolarity_NonInverted, 0x00);
|
||||
#else
|
||||
// Enable internal clock
|
||||
TIM_InternalClockConfig(TIM2);
|
||||
#endif
|
||||
|
||||
// Enable TIM2
|
||||
TIM_Cmd(TIM2, ENABLE);
|
||||
// Enable TIM2 interrupt
|
||||
TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE);
|
||||
|
||||
NVIC_InitTypeDef nvicStructure;
|
||||
nvicStructure.NVIC_IRQChannel = TIM2_IRQn;
|
||||
nvicStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
||||
nvicStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
nvicStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&nvicStructure);
|
||||
|
||||
GPIO_ResetBits(PORT_COSLED, PIN_COSLED);
|
||||
GPIO_SetBits(PORT_LED, PIN_LED);
|
||||
}
|
||||
|
||||
void CIO::interrupt()
|
||||
{
|
||||
uint8_t control = MARK_NONE;
|
||||
uint16_t sample = DC_OFFSET;
|
||||
uint16_t rawRSSI = 0U;
|
||||
|
||||
m_txBuffer.get(sample, control);
|
||||
|
||||
// Send the value to the DAC
|
||||
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
||||
DAC_SetChannel2Data(DAC_Align_12b_R, sample);
|
||||
#else
|
||||
DAC_SetChannel1Data(DAC_Align_12b_R, sample);
|
||||
#endif
|
||||
|
||||
// Read value from ADC1 and ADC2
|
||||
if ((ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC) == RESET)) {
|
||||
// shouldn't be still in reset at this point so null the sample value?
|
||||
sample = 0U;
|
||||
} else {
|
||||
sample = ADC_GetConversionValue(ADC1);
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
rawRSSI = ADC_GetConversionValue(ADC2);
|
||||
#endif
|
||||
}
|
||||
|
||||
// trigger next ADC1
|
||||
ADC_ClearFlag(ADC1, ADC_FLAG_EOC);
|
||||
ADC_SoftwareStartConv(ADC1);
|
||||
|
||||
m_rxBuffer.put(sample, control);
|
||||
m_rssiBuffer.put(rawRSSI);
|
||||
|
||||
m_watchdog++;
|
||||
}
|
||||
|
||||
bool CIO::getCOSInt()
|
||||
{
|
||||
return GPIO_ReadInputDataBit(PORT_COS, PIN_COS) == Bit_SET;
|
||||
}
|
||||
|
||||
void CIO::setLEDInt(bool on)
|
||||
{
|
||||
GPIO_WriteBit(PORT_LED, PIN_LED, on ? Bit_SET : Bit_RESET);
|
||||
}
|
||||
|
||||
void CIO::setPTTInt(bool on)
|
||||
{
|
||||
GPIO_WriteBit(PORT_PTT, PIN_PTT, on ? Bit_SET : Bit_RESET);
|
||||
}
|
||||
|
||||
void CIO::setCOSInt(bool on)
|
||||
{
|
||||
GPIO_WriteBit(PORT_COSLED, PIN_COSLED, on ? Bit_SET : Bit_RESET);
|
||||
}
|
||||
|
||||
void CIO::setDStarInt(bool on)
|
||||
{
|
||||
#if defined(MODE_LEDS)
|
||||
GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setDMRInt(bool on)
|
||||
{
|
||||
#if defined(MODE_LEDS)
|
||||
GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setYSFInt(bool on)
|
||||
{
|
||||
#if defined(MODE_LEDS)
|
||||
GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setP25Int(bool on)
|
||||
{
|
||||
#if defined(MODE_LEDS)
|
||||
GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setNXDNInt(bool on)
|
||||
{
|
||||
#if defined(MODE_LEDS)
|
||||
#if defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
|
||||
#else
|
||||
GPIO_WriteBit(PORT_NXDN, PIN_NXDN, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
#if defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
|
||||
#else
|
||||
GPIO_WriteBit(PORT_MNXDN, PIN_MNXDN, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setPOCSAGInt(bool on)
|
||||
{
|
||||
#if defined(MODE_LEDS)
|
||||
#if defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
|
||||
#else
|
||||
GPIO_WriteBit(PORT_POCSAG, PIN_POCSAG, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
#if defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET);
|
||||
#else
|
||||
GPIO_WriteBit(PORT_MPOCSAG, PIN_MPOCSAG, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setFMInt(bool on)
|
||||
{
|
||||
#if defined(MODE_LEDS)
|
||||
#if defined(USE_ALTERNATE_FM_LEDS)
|
||||
GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
|
||||
#else
|
||||
GPIO_WriteBit(PORT_FM, PIN_FM, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
#if defined(USE_ALTERNATE_FM_LEDS)
|
||||
GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
|
||||
#else
|
||||
GPIO_WriteBit(PORT_MFM, PIN_MFM, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
// Simple delay function for STM32
|
||||
// Example from: http://thehackerworkshop.com/?p=1209
|
||||
void CIO::delayInt(unsigned int dly)
|
||||
{
|
||||
#if defined(STM32F7XX)
|
||||
unsigned int loopsPerMillisecond = (SystemCoreClock/1000);
|
||||
#else
|
||||
unsigned int loopsPerMillisecond = (SystemCoreClock/1000) / 3;
|
||||
#endif
|
||||
|
||||
for (; dly > 0; dly--)
|
||||
{
|
||||
asm volatile //this routine waits (approximately) one millisecond
|
||||
(
|
||||
"mov r3, %[loopsPerMillisecond] \n\t" //load the initial loop counter
|
||||
"loop: \n\t"
|
||||
"subs r3, #1 \n\t"
|
||||
"bne loop \n\t"
|
||||
|
||||
: //empty output list
|
||||
: [loopsPerMillisecond] "r" (loopsPerMillisecond) //input to the asm routine
|
||||
: "r3", "cc" //clobber list
|
||||
);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
-476
@@ -1,476 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2016 by Jim McLaughlin KI6ZUM
|
||||
* Copyright (C) 2016, 2017 by Andy Uribe CA6JAU
|
||||
* Copyright (C) 2017,2018,2020 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2017 by Wojciech Krutnik N0CALL
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
#include "IO.h"
|
||||
|
||||
|
||||
#if defined(STM32F1)
|
||||
|
||||
#if defined(STM32F1_POG)
|
||||
/*
|
||||
Pin definitions for STM32F1 POG Board:
|
||||
|
||||
PTT PB12 output
|
||||
COSLED PB5 output
|
||||
LED PB4 output
|
||||
COS PB13 input/PD
|
||||
|
||||
DSTAR PB7 output
|
||||
DMR PB6 output
|
||||
YSF PB8 output
|
||||
P25 PB9 output
|
||||
NXDN PB10 output
|
||||
POCSAG PB11 output
|
||||
|
||||
RX PB0 analog input (ADC1_8)
|
||||
RSSI PB1 analog input (ADC2_9)
|
||||
TX PA4 analog output (DAC_OUT1)
|
||||
|
||||
EXT_CLK PA15 input (AF: TIM2_CH1_ETR)
|
||||
|
||||
USART1_TXD PA9 output (AF)
|
||||
USART1_RXD PA10 input (AF)
|
||||
|
||||
*/
|
||||
|
||||
#define PIN_PTT 12
|
||||
#define PORT_PTT GPIOB
|
||||
#define BB_PTT *((bitband_t)BITBAND_PERIPH(&PORT_PTT->ODR, PIN_PTT))
|
||||
#define PIN_COSLED 5
|
||||
#define PORT_COSLED GPIOB
|
||||
#define BB_COSLED *((bitband_t)BITBAND_PERIPH(&PORT_COSLED->ODR, PIN_COSLED))
|
||||
#define PIN_LED 4
|
||||
#define PORT_LED GPIOB
|
||||
#define BB_LED *((bitband_t)BITBAND_PERIPH(&PORT_LED->ODR, PIN_LED))
|
||||
#define PIN_COS 13
|
||||
#define PORT_COS GPIOB
|
||||
#define BB_COS *((bitband_t)BITBAND_PERIPH(&PORT_COS->IDR, PIN_COS))
|
||||
|
||||
#define PIN_DSTAR 7
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define BB_DSTAR *((bitband_t)BITBAND_PERIPH(&PORT_DSTAR->ODR, PIN_DSTAR))
|
||||
#define PIN_DMR 6
|
||||
#define PORT_DMR GPIOB
|
||||
#define BB_DMR *((bitband_t)BITBAND_PERIPH(&PORT_DMR->ODR, PIN_DMR))
|
||||
#define PIN_YSF 8
|
||||
#define PORT_YSF GPIOB
|
||||
#define BB_YSF *((bitband_t)BITBAND_PERIPH(&PORT_YSF->ODR, PIN_YSF))
|
||||
#define PIN_P25 9
|
||||
#define PORT_P25 GPIOB
|
||||
#define BB_P25 *((bitband_t)BITBAND_PERIPH(&PORT_P25->ODR, PIN_P25))
|
||||
#define PIN_NXDN 10
|
||||
#define PORT_NXDN GPIOB
|
||||
#define BB_NXDN *((bitband_t)BITBAND_PERIPH(&PORT_NXDN->ODR, PIN_NXDN))
|
||||
#define PIN_POCSAG 11
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define BB_POCSAG *((bitband_t)BITBAND_PERIPH(&PORT_POCSAG->ODR, PIN_POCSAG))
|
||||
|
||||
#define PIN_RX 0
|
||||
#define PIN_RX_ADC_CH 8
|
||||
#define PORT_RX GPIOB
|
||||
#define PIN_RSSI 1
|
||||
#define PIN_RSSI_ADC_CH 9
|
||||
#define PORT_RSSI GPIOB
|
||||
#define PIN_TX 4
|
||||
#define PIN_TX_DAC_CH 1
|
||||
#define PORT_TX GPIOA
|
||||
|
||||
#define PIN_EXT_CLK 15
|
||||
#define SRC_EXT_CLK 15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_USART1_TXD 9
|
||||
#define PORT_USART1_TXD GPIOA
|
||||
#define PIN_USART1_RXD 10
|
||||
#define PORT_USART1_RXD GPIOA
|
||||
|
||||
#else // defined(STM32F1_POG)
|
||||
#error "Either STM32F1_POG, or sth need to be defined"
|
||||
#endif // defined(STM32F1_POG)
|
||||
|
||||
const uint16_t DC_OFFSET = 2048U;
|
||||
|
||||
// Sampling frequency
|
||||
#define SAMP_FREQ 24000
|
||||
|
||||
extern "C" {
|
||||
void TIM2_IRQHandler() {
|
||||
if ((TIM2->SR & TIM_SR_UIF) == TIM_SR_UIF) {
|
||||
TIM2->SR = ~TIM_SR_UIF; // clear UI flag
|
||||
io.interrupt();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void delay(uint32_t cnt)
|
||||
{
|
||||
while(cnt--)
|
||||
asm("nop");
|
||||
}
|
||||
|
||||
// source: http://www.freddiechopin.info/
|
||||
void GPIOConfigPin(GPIO_TypeDef *port_ptr, uint32_t pin, uint32_t mode_cnf_value)
|
||||
{
|
||||
volatile uint32_t *cr_ptr;
|
||||
uint32_t cr_value;
|
||||
|
||||
cr_ptr = &port_ptr->CRL; // configuration of pins [0,7] is in CRL
|
||||
|
||||
if (pin >= 8) // is pin in [8; 15]?
|
||||
{ // configuration of pins [8,15] is in CRH
|
||||
cr_ptr++; // advance to next struct element CRL -> CRH
|
||||
pin -= 8; // crop the pin number
|
||||
}
|
||||
|
||||
cr_value = *cr_ptr; // localize the CRL / CRH value
|
||||
|
||||
cr_value &= ~(0xF << (pin * 4)); // clear the MODE and CNF fields (now that pin is an analog input)
|
||||
cr_value |= (mode_cnf_value << (pin * 4)); // save new MODE and CNF value for desired pin
|
||||
|
||||
*cr_ptr = cr_value; // save localized value to CRL / CRL
|
||||
}
|
||||
|
||||
#if defined(STM32F1_POG)
|
||||
void FancyLEDEffect()
|
||||
{
|
||||
bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25};
|
||||
|
||||
for(int i=0; i<7; i++){
|
||||
*foo[i] = 0x01;
|
||||
}
|
||||
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1);
|
||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
|
||||
delay(SystemCoreClock/1000*100);
|
||||
for(int i=0; i<7; i++){
|
||||
*foo[i] = 0x00;
|
||||
}
|
||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
|
||||
delay(SystemCoreClock/1000*20);
|
||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
|
||||
delay(SystemCoreClock/1000*10);
|
||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
|
||||
|
||||
*foo[0] = 0x01;
|
||||
for(int i=1; i<7; i++){
|
||||
delay(SystemCoreClock/1000*10);
|
||||
*foo[i-1] = 0x00;
|
||||
*foo[i] = 0x01;
|
||||
}
|
||||
for(int i=5; i>=0; i--){
|
||||
delay(SystemCoreClock/1000*10);
|
||||
*foo[i+1] = 0x00;
|
||||
*foo[i] = 0x01;
|
||||
}
|
||||
delay(SystemCoreClock/1000*10);
|
||||
*foo[5+1-6] = 0x00;
|
||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
|
||||
delay(SystemCoreClock/1000*10);
|
||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
|
||||
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1|GPIO_CRL_CNF0_1);
|
||||
delay(SystemCoreClock/1000*50);
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline void GPIOInit()
|
||||
{
|
||||
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN
|
||||
| RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN
|
||||
| RCC_APB2ENR_AFIOEN; // enable all GPIOs
|
||||
|
||||
// set all ports to input with pull-down
|
||||
GPIOA->CRL = 0x88888888;
|
||||
GPIOA->CRH = 0x88888888;
|
||||
GPIOA->ODR = 0;
|
||||
GPIOB->CRL = 0x88888888;
|
||||
GPIOB->CRH = 0x88888888;
|
||||
GPIOB->ODR = 0;
|
||||
GPIOC->CRL = 0x88888888;
|
||||
GPIOC->CRH = 0x88888888;
|
||||
GPIOC->ODR = 0;
|
||||
GPIOD->CRL = 0x88888888;
|
||||
GPIOD->CRH = 0x88888888;
|
||||
GPIOD->ODR = 0;
|
||||
|
||||
// configure ports
|
||||
GPIOConfigPin(PORT_PTT, PIN_PTT, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_COSLED, PIN_COSLED, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_LED, PIN_LED, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_COS, PIN_COS, GPIO_CRL_CNF0_1);
|
||||
|
||||
GPIOConfigPin(PORT_DSTAR, PIN_DSTAR, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_DMR, PIN_DMR, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_YSF, PIN_YSF, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_P25, PIN_P25, GPIO_CRL_MODE0_1);
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
GPIOConfigPin(PORT_NXDN, PIN_NXDN, GPIO_CRL_MODE0_1);
|
||||
#endif
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
GPIOConfigPin(PORT_POCSAG, PIN_POCSAG, GPIO_CRL_MODE0_1);
|
||||
#endif
|
||||
|
||||
GPIOConfigPin(PORT_RX, PIN_RX, 0);
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
GPIOConfigPin(PORT_RSSI, PIN_RSSI, 0);
|
||||
#endif
|
||||
GPIOConfigPin(PORT_TX, PIN_TX, 0);
|
||||
|
||||
#if defined(EXTERNAL_OSC)
|
||||
#if defined(STM32F1_POG)
|
||||
GPIOConfigPin(PORT_EXT_CLK, PIN_EXT_CLK, GPIO_CRL_CNF0_0);
|
||||
AFIO->MAPR = (AFIO->MAPR & ~AFIO_MAPR_TIM2_REMAP) | AFIO_MAPR_TIM2_REMAP_0;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1|GPIO_CRL_CNF0_1);
|
||||
GPIOConfigPin(PORT_USART1_RXD, PIN_USART1_RXD, GPIO_CRL_CNF0_0);
|
||||
|
||||
AFIO->MAPR = (AFIO->MAPR & ~AFIO_MAPR_SWJ_CFG) | AFIO_MAPR_SWJ_CFG_1;
|
||||
}
|
||||
|
||||
|
||||
static inline void ADCInit()
|
||||
{
|
||||
RCC->CFGR = (RCC->CFGR & ~RCC_CFGR_ADCPRE_Msk)
|
||||
| RCC_CFGR_ADCPRE_DIV6; // ADC clock divided by 6 (72MHz/6 = 12MHz)
|
||||
RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
RCC->APB2ENR |= RCC_APB2ENR_ADC2EN;
|
||||
#endif
|
||||
|
||||
// Init ADCs in dual mode (RSSI)
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
ADC1->CR1 = ADC_CR1_DUALMOD_1|ADC_CR1_DUALMOD_2; // Regular simultaneous mode
|
||||
#endif
|
||||
|
||||
// Set sampling time to 7.5 cycles
|
||||
if (PIN_RX_ADC_CH < 10) {
|
||||
ADC1->SMPR2 = ADC_SMPR2_SMP0_0 << (3*PIN_RX_ADC_CH);
|
||||
} else {
|
||||
ADC1->SMPR1 = ADC_SMPR1_SMP10_0 << (3*PIN_RX_ADC_CH);
|
||||
}
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
if (PIN_RSSI_ADC_CH < 10) {
|
||||
ADC2->SMPR2 = ADC_SMPR2_SMP0_0 << (3*PIN_RSSI_ADC_CH);
|
||||
} else {
|
||||
ADC2->SMPR1 = ADC_SMPR1_SMP10_0 << (3*PIN_RSSI_ADC_CH);
|
||||
}
|
||||
#endif
|
||||
|
||||
// Set conversion channel (single conversion)
|
||||
ADC1->SQR3 = PIN_RX_ADC_CH;
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
ADC2->SQR3 = PIN_RSSI_ADC_CH;
|
||||
#endif
|
||||
|
||||
// Enable ADC
|
||||
ADC1->CR2 |= ADC_CR2_ADON;
|
||||
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
// Enable ADC2
|
||||
ADC2->CR2 |= ADC_CR2_ADON;
|
||||
#endif
|
||||
|
||||
// Start calibration
|
||||
delay(6*2);
|
||||
ADC1->CR2 |= ADC_CR2_CAL;
|
||||
while((ADC1->CR2 & ADC_CR2_CAL) == ADC_CR2_CAL)
|
||||
;
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
ADC2->CR2 |= ADC_CR2_CAL;
|
||||
while((ADC2->CR2 & ADC_CR2_CAL) == ADC_CR2_CAL)
|
||||
;
|
||||
#endif
|
||||
|
||||
// Trigger first conversion
|
||||
ADC1->CR2 |= ADC_CR2_ADON;
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
ADC2->CR2 |= ADC_CR2_ADON;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
static inline void DACInit()
|
||||
{
|
||||
RCC->APB1ENR |= RCC_APB1ENR_DACEN;
|
||||
|
||||
DAC->CR = DAC_CR_EN1;
|
||||
}
|
||||
|
||||
|
||||
static inline void TimerInit()
|
||||
{
|
||||
RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
|
||||
|
||||
#if defined(EXTERNAL_OSC)
|
||||
// Enable external clock, prescaler /4
|
||||
TIM2->SMCR = TIM_SMCR_ECE | TIM_SMCR_ETPS_1;
|
||||
#endif
|
||||
|
||||
// TIM2 output frequency
|
||||
TIM2->PSC = 0;
|
||||
#if defined(EXTERNAL_OSC)
|
||||
// TimerCount = ExternalOsc
|
||||
// /4 (external clock prescaler)
|
||||
// /SAMP_FREQ
|
||||
TIM2->ARR = (uint16_t) ((EXTERNAL_OSC/(4*SAMP_FREQ)) - 1);
|
||||
#else
|
||||
TIM2->ARR = (uint16_t) ((SystemCoreClock/(SAMP_FREQ)) - 1);
|
||||
#endif
|
||||
|
||||
// Enable TIse 1%-tolerance comM2 interrupt
|
||||
TIM2->DIER = TIM_DIER_UIE;
|
||||
NVIC_EnableIRQ(TIM2_IRQn);
|
||||
|
||||
// Enable TIM2
|
||||
TIM2->CR1 |= TIM_CR1_CEN;
|
||||
}
|
||||
|
||||
|
||||
void CIO::initInt()
|
||||
{
|
||||
GPIOInit();
|
||||
ADCInit();
|
||||
DACInit();
|
||||
#if defined(STM32F1_POG)
|
||||
FancyLEDEffect();
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::startInt()
|
||||
{
|
||||
TimerInit();
|
||||
|
||||
BB_COSLED = 0;
|
||||
BB_LED = 1;
|
||||
}
|
||||
|
||||
void CIO::interrupt()
|
||||
{
|
||||
uint8_t control = MARK_NONE;
|
||||
uint16_t sample = DC_OFFSET;
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
uint16_t rawRSSI = 0U;
|
||||
#endif
|
||||
bitband_t eoc = (bitband_t)BITBAND_PERIPH(&ADC1->SR, ADC_SR_EOS_Pos);
|
||||
bitband_t adon = (bitband_t)BITBAND_PERIPH(&ADC1->CR2, ADC_CR2_ADON_Pos);
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
bitband_t rssi_adon = (bitband_t)BITBAND_PERIPH(&ADC2->CR2, ADC_CR2_ADON_Pos);
|
||||
#endif
|
||||
|
||||
if (*eoc) {
|
||||
// trigger next conversion
|
||||
*adon = 1;
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
*rssi_adon = 1;
|
||||
#endif
|
||||
|
||||
m_txBuffer.get(sample, control);
|
||||
DAC->DHR12R1 = sample; // Send the value to the DAC
|
||||
|
||||
// Read value from ADC1 and ADC2
|
||||
sample = ADC1->DR; // read conversion result; EOC is cleared by this read
|
||||
m_rxBuffer.put(sample, control);
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
rawRSSI = ADC2->DR;
|
||||
m_rssiBuffer.put(rawRSSI);
|
||||
#endif
|
||||
|
||||
m_watchdog++;
|
||||
}
|
||||
}
|
||||
|
||||
bool CIO::getCOSInt()
|
||||
{
|
||||
return BB_COS;
|
||||
}
|
||||
|
||||
void CIO::setLEDInt(bool on)
|
||||
{
|
||||
BB_LED = !!on;
|
||||
}
|
||||
|
||||
void CIO::setPTTInt(bool on)
|
||||
{
|
||||
BB_PTT = !!on;
|
||||
}
|
||||
|
||||
void CIO::setCOSInt(bool on)
|
||||
{
|
||||
BB_COSLED = !!on;
|
||||
}
|
||||
|
||||
void CIO::setDStarInt(bool on)
|
||||
{
|
||||
BB_DSTAR = !!on;
|
||||
}
|
||||
|
||||
void CIO::setDMRInt(bool on)
|
||||
{
|
||||
BB_DMR = !!on;
|
||||
}
|
||||
|
||||
void CIO::setYSFInt(bool on)
|
||||
{
|
||||
BB_YSF = !!on;
|
||||
}
|
||||
|
||||
void CIO::setP25Int(bool on)
|
||||
{
|
||||
BB_P25 = !!on;
|
||||
}
|
||||
|
||||
void CIO::setNXDNInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
BB_YSF = !!on;
|
||||
BB_P25 = !!on;
|
||||
#else
|
||||
BB_NXDN = !!on;
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setPOCSAGInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
BB_DSTAR = !!on;
|
||||
BB_DMR = !!on;
|
||||
#else
|
||||
BB_POCSAG = !!on;
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setFMInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_FM_LEDS)
|
||||
BB_DSTAR = !!on;
|
||||
BB_YSF = !!on;
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::delayInt(unsigned int dly)
|
||||
{
|
||||
delay(dly);
|
||||
}
|
||||
|
||||
#endif
|
||||
-266
@@ -1,266 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2016,2017,2018,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
#include "IO.h"
|
||||
|
||||
#if defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
|
||||
|
||||
#if defined(EXTERNAL_OSC)
|
||||
#define PIN_LED 3
|
||||
#else
|
||||
#define PIN_LED 13
|
||||
#endif
|
||||
#define PIN_COS 4
|
||||
#define PIN_PTT 5
|
||||
#define PIN_COSLED 6
|
||||
#define PIN_DSTAR 9
|
||||
#define PIN_DMR 10
|
||||
#define PIN_YSF 11
|
||||
#define PIN_P25 12
|
||||
#if defined(__MK20DX256__)
|
||||
#define PIN_NXDN 2
|
||||
#define PIN_POCSAG 3
|
||||
#define PIN_FM 4
|
||||
#else
|
||||
#define PIN_NXDN 24
|
||||
#define PIN_POCSAG 25
|
||||
#define PIN_FM 26
|
||||
#endif
|
||||
#define PIN_ADC 5 // A0, Pin 14
|
||||
#define PIN_RSSI 4 // Teensy 3.5/3.6, A16, Pin 35. Teensy 3.1/3.2, A17, Pin 28
|
||||
|
||||
#define PDB_CHnC1_TOS 0x0100
|
||||
#define PDB_CHnC1_EN 0x0001
|
||||
|
||||
const uint16_t DC_OFFSET = 2048U;
|
||||
|
||||
extern "C" {
|
||||
void adc0_isr()
|
||||
{
|
||||
io.interrupt();
|
||||
}
|
||||
}
|
||||
|
||||
void CIO::initInt()
|
||||
{
|
||||
// Set up the TX, COS and LED pins
|
||||
pinMode(PIN_PTT, OUTPUT);
|
||||
pinMode(PIN_COSLED, OUTPUT);
|
||||
pinMode(PIN_LED, OUTPUT);
|
||||
pinMode(PIN_COS, INPUT);
|
||||
|
||||
#if defined(MODE_LEDS)
|
||||
// Set up the mode output pins
|
||||
pinMode(PIN_DSTAR, OUTPUT);
|
||||
pinMode(PIN_DMR, OUTPUT);
|
||||
pinMode(PIN_YSF, OUTPUT);
|
||||
pinMode(PIN_P25, OUTPUT);
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
pinMode(PIN_NXDN, OUTPUT);
|
||||
#endif
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
pinMode(PIN_POCSAG, OUTPUT);
|
||||
#endif
|
||||
#if !defined(USE_ALTERNATE_FM_LEDS)
|
||||
pinMode(PIN_FM, OUTPUT);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::startInt()
|
||||
{
|
||||
// Initialise the DAC
|
||||
SIM_SCGC2 |= SIM_SCGC2_DAC0;
|
||||
DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 3.3V VDDA is DACREF_2
|
||||
|
||||
// Initialise ADC0
|
||||
SIM_SCGC6 |= SIM_SCGC6_ADC0;
|
||||
ADC0_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
|
||||
ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
|
||||
ADC0_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
|
||||
ADC0_SC2 = ADC_SC2_REFSEL(0) | ADC_SC2_ADTRG; // Voltage ref external, hardware trigger
|
||||
ADC0_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
|
||||
|
||||
ADC0_SC3 |= ADC_SC3_CAL;
|
||||
while (ADC0_SC3 & ADC_SC3_CAL) // Wait for calibration
|
||||
;
|
||||
|
||||
uint16_t sum0 = ADC0_CLPS + ADC0_CLP4 + ADC0_CLP3 + // Plus side gain
|
||||
ADC0_CLP2 + ADC0_CLP1 + ADC0_CLP0;
|
||||
sum0 = (sum0 / 2U) | 0x8000U;
|
||||
ADC0_PG = sum0;
|
||||
|
||||
ADC0_SC1A = ADC_SC1_AIEN | PIN_ADC; // Enable ADC interrupt, use A0
|
||||
NVIC_ENABLE_IRQ(IRQ_ADC0);
|
||||
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
// Initialise ADC1
|
||||
SIM_SCGC3 |= SIM_SCGC3_ADC1;
|
||||
ADC1_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
|
||||
ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
|
||||
ADC1_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
|
||||
ADC1_SC2 = ADC_SC2_REFSEL(0); // Voltage ref external, software trigger
|
||||
ADC1_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
|
||||
|
||||
ADC1_SC3 |= ADC_SC3_CAL;
|
||||
while (ADC1_SC3 & ADC_SC3_CAL) // Wait for calibration
|
||||
;
|
||||
|
||||
uint16_t sum1 = ADC1_CLPS + ADC1_CLP4 + ADC1_CLP3 + // Plus side gain
|
||||
ADC1_CLP2 + ADC1_CLP1 + ADC1_CLP0;
|
||||
sum1 = (sum1 / 2U) | 0x8000U;
|
||||
ADC1_PG = sum1;
|
||||
#endif
|
||||
|
||||
#if defined(EXTERNAL_OSC)
|
||||
// Set ADC0 to trigger from the LPTMR at 24 kHz
|
||||
SIM_SOPT7 = SIM_SOPT7_ADC0ALTTRGEN | // Enable ADC0 alternate trigger
|
||||
SIM_SOPT7_ADC0TRGSEL(14); // Trigger ADC0 by LPTMR0
|
||||
|
||||
CORE_PIN13_CONFIG = PORT_PCR_MUX(3);
|
||||
|
||||
SIM_SCGC5 |= SIM_SCGC5_LPTIMER; // Enable Low Power Timer Access
|
||||
LPTMR0_CSR = 0; // Disable
|
||||
LPTMR0_PSR = LPTMR_PSR_PBYP; // Bypass prescaler/filter
|
||||
LPTMR0_CMR = (EXTERNAL_OSC / 24000) - 1; // Frequency divided by CMR + 1
|
||||
LPTMR0_CSR = LPTMR_CSR_TPS(2) | // Pin: 0=CMP0, 1=xtal, 2=pin13
|
||||
LPTMR_CSR_TMS; // Mode Select, 0=timer, 1=counter
|
||||
LPTMR0_CSR |= LPTMR_CSR_TEN; // Enable
|
||||
#else
|
||||
// Setup PDB for ADC0 at 24 kHz
|
||||
SIM_SCGC6 |= SIM_SCGC6_PDB; // Enable PDB clock
|
||||
PDB0_MOD = (F_BUS / 24000) - 1; // Timer period - 1
|
||||
PDB0_IDLY = 0; // Interrupt delay
|
||||
PDB0_CH0C1 = PDB_CHnC1_TOS | PDB_CHnC1_EN; // Enable pre-trigger for ADC0
|
||||
PDB0_SC = PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | // SW trigger, enable interrupts, continuous mode
|
||||
PDB_SC_PDBIE | PDB_SC_CONT | PDB_SC_LDOK; // No prescaling
|
||||
PDB0_SC |= PDB_SC_SWTRIG; // Software trigger (reset and restart counter)
|
||||
#endif
|
||||
|
||||
digitalWrite(PIN_PTT, m_pttInvert ? HIGH : LOW);
|
||||
digitalWrite(PIN_COSLED, LOW);
|
||||
digitalWrite(PIN_LED, HIGH);
|
||||
}
|
||||
|
||||
void CIO::interrupt()
|
||||
{
|
||||
uint8_t control = MARK_NONE;
|
||||
uint16_t sample = DC_OFFSET;
|
||||
|
||||
m_txBuffer.get(sample, control);
|
||||
*(int16_t *)&(DAC0_DAT0L) = sample;
|
||||
|
||||
if ((ADC0_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
|
||||
sample = ADC0_RA;
|
||||
m_rxBuffer.put(sample, control);
|
||||
}
|
||||
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
if ((ADC1_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
|
||||
uint16_t rssi = ADC1_RA;
|
||||
m_rssiBuffer.put(rssi);
|
||||
} else {
|
||||
m_rssiBuffer.put(0U);
|
||||
}
|
||||
|
||||
ADC1_SC1A = PIN_RSSI; // Start the next RSSI conversion
|
||||
#else
|
||||
m_rssiBuffer.put(0U);
|
||||
#endif
|
||||
|
||||
m_watchdog++;
|
||||
}
|
||||
|
||||
bool CIO::getCOSInt()
|
||||
{
|
||||
return digitalRead(PIN_COS) == HIGH;
|
||||
}
|
||||
|
||||
void CIO::setLEDInt(bool on)
|
||||
{
|
||||
digitalWrite(PIN_LED, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setPTTInt(bool on)
|
||||
{
|
||||
digitalWrite(PIN_PTT, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setCOSInt(bool on)
|
||||
{
|
||||
digitalWrite(PIN_COSLED, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setDStarInt(bool on)
|
||||
{
|
||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setDMRInt(bool on)
|
||||
{
|
||||
digitalWrite(PIN_DMR, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setYSFInt(bool on)
|
||||
{
|
||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setP25Int(bool on)
|
||||
{
|
||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
||||
}
|
||||
|
||||
void CIO::setNXDNInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
||||
#else
|
||||
digitalWrite(PIN_NXDN, on ? HIGH : LOW);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setPOCSAGInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
||||
digitalWrite(PIN_DMR, on ? HIGH : LOW);
|
||||
#else
|
||||
digitalWrite(PIN_POCSAG, on ? HIGH : LOW);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setFMInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_FM_LEDS)
|
||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
||||
#else
|
||||
digitalWrite(PIN_FM, on ? HIGH : LOW);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::delayInt(unsigned int dly)
|
||||
{
|
||||
delay(dly);
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -1,152 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2016 by Mathis Schmieder DB9MAT
|
||||
* Copyright (C) 2016 by Colin Durbridge G4EML
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F7XX) || defined(STM32F105xC)
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
|
||||
// Global variables
|
||||
MMDVM_STATE m_modemState = STATE_IDLE;
|
||||
|
||||
bool m_dstarEnable = true;
|
||||
bool m_dmrEnable = true;
|
||||
bool m_ysfEnable = true;
|
||||
bool m_p25Enable = true;
|
||||
bool m_nxdnEnable = true;
|
||||
bool m_pocsagEnable = true;
|
||||
bool m_fmEnable = true;
|
||||
bool m_ax25Enable = true;
|
||||
|
||||
bool m_duplex = true;
|
||||
|
||||
bool m_tx = false;
|
||||
bool m_dcd = false;
|
||||
|
||||
CDStarRX dstarRX;
|
||||
CDStarTX dstarTX;
|
||||
|
||||
CDMRIdleRX dmrIdleRX;
|
||||
CDMRRX dmrRX;
|
||||
CDMRTX dmrTX;
|
||||
|
||||
CDMRDMORX dmrDMORX;
|
||||
CDMRDMOTX dmrDMOTX;
|
||||
|
||||
CYSFRX ysfRX;
|
||||
CYSFTX ysfTX;
|
||||
|
||||
CP25RX p25RX;
|
||||
CP25TX p25TX;
|
||||
|
||||
CNXDNRX nxdnRX;
|
||||
CNXDNTX nxdnTX;
|
||||
|
||||
CPOCSAGTX pocsagTX;
|
||||
|
||||
CFM fm;
|
||||
CAX25RX ax25RX;
|
||||
CAX25TX ax25TX;
|
||||
|
||||
CCalDStarRX calDStarRX;
|
||||
CCalDStarTX calDStarTX;
|
||||
CCalDMR calDMR;
|
||||
CCalP25 calP25;
|
||||
CCalNXDN calNXDN;
|
||||
CCalFM calFM;
|
||||
CCalPOCSAG calPOCSAG;
|
||||
CCalRSSI calRSSI;
|
||||
|
||||
CCWIdTX cwIdTX;
|
||||
|
||||
CSerialPort serial;
|
||||
CIO io;
|
||||
|
||||
void setup()
|
||||
{
|
||||
serial.start();
|
||||
}
|
||||
|
||||
void loop()
|
||||
{
|
||||
serial.process();
|
||||
|
||||
io.process();
|
||||
|
||||
// The following is for transmitting
|
||||
if (m_dstarEnable && m_modemState == STATE_DSTAR)
|
||||
dstarTX.process();
|
||||
|
||||
if (m_dmrEnable && m_modemState == STATE_DMR) {
|
||||
if (m_duplex)
|
||||
dmrTX.process();
|
||||
else
|
||||
dmrDMOTX.process();
|
||||
}
|
||||
|
||||
if (m_ysfEnable && m_modemState == STATE_YSF)
|
||||
ysfTX.process();
|
||||
|
||||
if (m_p25Enable && m_modemState == STATE_P25)
|
||||
p25TX.process();
|
||||
|
||||
if (m_nxdnEnable && m_modemState == STATE_NXDN)
|
||||
nxdnTX.process();
|
||||
|
||||
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
|
||||
pocsagTX.process();
|
||||
|
||||
if (m_ax25Enable && (m_modemState == STATE_IDLE || m_modemState == STATE_FM))
|
||||
ax25TX.process();
|
||||
|
||||
if (m_fmEnable && m_modemState == STATE_FM)
|
||||
fm.process();
|
||||
|
||||
if (m_modemState == STATE_DSTARCAL)
|
||||
calDStarTX.process();
|
||||
|
||||
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K || m_modemState == STATE_DMRDMO1K)
|
||||
calDMR.process();
|
||||
|
||||
if (m_modemState == STATE_P25CAL1K)
|
||||
calP25.process();
|
||||
|
||||
if (m_modemState == STATE_NXDNCAL1K)
|
||||
calNXDN.process();
|
||||
|
||||
if (m_modemState == STATE_POCSAGCAL)
|
||||
calPOCSAG.process();
|
||||
|
||||
if (m_modemState == STATE_FMCAL10K || m_modemState == STATE_FMCAL12K || m_modemState == STATE_FMCAL15K || m_modemState == STATE_FMCAL20K || m_modemState == STATE_FMCAL25K ||m_modemState == STATE_FMCAL30K)
|
||||
calFM.process();
|
||||
|
||||
if (m_modemState == STATE_IDLE)
|
||||
cwIdTX.process();
|
||||
}
|
||||
|
||||
int main()
|
||||
{
|
||||
setup();
|
||||
|
||||
for (;;)
|
||||
loop();
|
||||
}
|
||||
|
||||
#endif
|
||||
Binary file not shown.
@@ -1,401 +0,0 @@
|
||||
# Copyright (C) 2016,2017,2018 by Andy Uribe CA6JAU
|
||||
# Copyright (C) 2016 by Jim McLaughlin KI6ZUM
|
||||
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
|
||||
# MMDVM source files
|
||||
MMDVM_PATH=.
|
||||
|
||||
# STM32 library paths
|
||||
F4_LIB_PATH=./STM32F4XX_Lib
|
||||
F7_LIB_PATH=./STM32F7XX_Lib
|
||||
|
||||
# MCU external clock frequency (Hz)
|
||||
CLK_MMDVM_PI=12000000
|
||||
CLK_NUCLEO=8000000
|
||||
CLK_12MHZ=12000000
|
||||
|
||||
# Directory Structure
|
||||
BINDIR=bin
|
||||
OBJDIR_F4=obj_f4
|
||||
OBJDIR_F7=obj_f7
|
||||
|
||||
# Output files
|
||||
BINELF_F4=mmdvm_f4.elf
|
||||
BINHEX_F4=mmdvm_f4.hex
|
||||
BINBIN_F4=mmdvm_f4.bin
|
||||
BINELF_F7=mmdvm_f7.elf
|
||||
BINHEX_F7=mmdvm_f7.hex
|
||||
BINBIN_F7=mmdvm_f7.bin
|
||||
|
||||
# Header directories
|
||||
INC_F4= . $(F4_LIB_PATH)/CMSIS/Include/ $(F4_LIB_PATH)/Device/ $(F4_LIB_PATH)/STM32F4xx_StdPeriph_Driver/include/
|
||||
INCLUDES_F4=$(INC_F4:%=-I%)
|
||||
INC_F7= . $(F7_LIB_PATH)/CMSIS/Include/ $(F7_LIB_PATH)/Device/ $(F7_LIB_PATH)/STM32F7xx_StdPeriph_Driver/inc/
|
||||
INCLUDES_F7=$(INC_F7:%=-I%)
|
||||
|
||||
# CMSIS libraries
|
||||
INCLUDES_LIBS_F4=$(F4_LIB_PATH)/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a
|
||||
INCLUDES_LIBS_F7=$(F7_LIB_PATH)/CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a
|
||||
|
||||
# STM32F4 Standard Peripheral Libraries source path
|
||||
STD_LIB_F4=$(F4_LIB_PATH)/STM32F4xx_StdPeriph_Driver/source
|
||||
|
||||
# STM32F7 Standard Peripheral Libraries source path
|
||||
STD_LIB_F7=$(F7_LIB_PATH)/STM32F7xx_StdPeriph_Driver/src
|
||||
|
||||
# STM32F4 system source path
|
||||
SYS_DIR_F4=$(F4_LIB_PATH)/Device
|
||||
STARTUP_DIR_F4=$(F4_LIB_PATH)/Device/startup
|
||||
|
||||
# STM32F7 system source path
|
||||
SYS_DIR_F7=$(F7_LIB_PATH)/Device
|
||||
STARTUP_DIR_F7=$(F7_LIB_PATH)/Device/startup
|
||||
|
||||
# GNU ARM Embedded Toolchain
|
||||
CC=arm-none-eabi-gcc
|
||||
CXX=arm-none-eabi-g++
|
||||
LD=arm-none-eabi-ld
|
||||
AR=arm-none-eabi-ar
|
||||
AS=arm-none-eabi-as
|
||||
CP=arm-none-eabi-objcopy
|
||||
OD=arm-none-eabi-objdump
|
||||
NM=arm-none-eabi-nm
|
||||
SIZE=arm-none-eabi-size
|
||||
A2L=arm-none-eabi-addr2line
|
||||
|
||||
# "SystemRoot" is only defined in Windows
|
||||
ifdef SYSTEMROOT
|
||||
CLEANCMD=del /S *.o *.hex *.bin *.elf GitVersion.h
|
||||
MDDIRS=md $@
|
||||
else ifdef SystemRoot
|
||||
CLEANCMD=del /S *.o *.hex *.bin *.elf GitVersion.h
|
||||
MDDIRS=md $@
|
||||
else
|
||||
CLEANCMD=rm -f $(OBJ_F4) $(OBJ_F7) $(BINDIR)/*.hex $(BINDIR)/*.bin $(BINDIR)/*.elf GitVersion.h
|
||||
MDDIRS=mkdir $@
|
||||
endif
|
||||
|
||||
# Default reference oscillator frequencies
|
||||
ifndef $(OSC)
|
||||
ifeq ($(MAKECMDGOALS),pi)
|
||||
OSC=$(CLK_MMDVM_PI)
|
||||
else ifeq ($(MAKECMDGOALS),pi-f722)
|
||||
OSC=$(CLK_MMDVM_PI)
|
||||
else ifeq ($(MAKECMDGOALS),drcc_nqf)
|
||||
OSC=$(CLK_12MHZ)
|
||||
else
|
||||
OSC=$(CLK_NUCLEO)
|
||||
endif
|
||||
endif
|
||||
|
||||
# Build object lists
|
||||
CXXSRC=$(wildcard $(MMDVM_PATH)/*.cpp)
|
||||
CSRC_STD_F4=$(wildcard $(STD_LIB_F4)/*.c)
|
||||
SYS_F4=$(wildcard $(SYS_DIR_F4)/*.c)
|
||||
STARTUP_F4=$(wildcard $(STARTUP_DIR_F4)/*.c)
|
||||
CSRC_STD_F7=$(wildcard $(STD_LIB_F7)/*.c)
|
||||
SYS_F7=$(wildcard $(SYS_DIR_F7)/*.c)
|
||||
STARTUP_F7=$(wildcard $(STARTUP_DIR_F7)/*.c)
|
||||
OBJ_F4=$(CXXSRC:$(MMDVM_PATH)/%.cpp=$(OBJDIR_F4)/%.o) $(CSRC_STD_F4:$(STD_LIB_F4)/%.c=$(OBJDIR_F4)/%.o) $(SYS_F4:$(SYS_DIR_F4)/%.c=$(OBJDIR_F4)/%.o) $(STARTUP_F4:$(STARTUP_DIR_F4)/%.c=$(OBJDIR_F4)/%.o)
|
||||
OBJ_F7=$(CXXSRC:$(MMDVM_PATH)/%.cpp=$(OBJDIR_F7)/%.o) $(CSRC_STD_F7:$(STD_LIB_F7)/%.c=$(OBJDIR_F7)/%.o) $(SYS_F7:$(SYS_DIR_F7)/%.c=$(OBJDIR_F7)/%.o) $(STARTUP_F7:$(STARTUP_DIR_F7)/%.c=$(OBJDIR_F7)/%.o)
|
||||
|
||||
# MCU flags
|
||||
MCFLAGS_F4=-mcpu=cortex-m4 -mthumb -mlittle-endian -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb-interwork
|
||||
MCFLAGS_F7=-mcpu=cortex-m7 -mthumb -mlittle-endian -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb-interwork
|
||||
|
||||
# Compile flags
|
||||
# STM32F4 Discovery board:
|
||||
DEFS_DIS=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_DISCOVERY -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# MMDVM-Pi board:
|
||||
DEFS_PI=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_PI -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# MMDVM-F4M F0DEI board:
|
||||
DEFS_F4M=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_F4M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# STM32F4 Nucleo-64 F446RE board:
|
||||
DEFS_NUCLEO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_NUCLEO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# STM32F7 Nucleo-144 F767ZI board:
|
||||
DEFS_NUCLEO_F767=-DUSE_HAL_DRIVER -DSTM32F767xx -DSTM32F7XX -DSTM32F7_NUCLEO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# MMDVM-Pi F722 board:
|
||||
DEFS_PI_F722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_PI -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# MMDVM-F7M F0DEI board:
|
||||
DEFS_F7M=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_F7M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# MMDVM_RPT_Hat F0DEI, DB9MAT, DF2ET board:
|
||||
DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# STM32F4 DVM board:
|
||||
DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# MMDVM_RPT_Hat BG4TGO, BG5HHP board:
|
||||
DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# DRCC_DVM BG7NQF board:
|
||||
DEFS_DRCC_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DDRCC_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# WA0EDA F405 MTR2K, MASTR3 board:
|
||||
DEFS_EDA_405=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_EDA_405 -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# WA0EDA F446 MTR2K, MASTR3 board:
|
||||
DEFS_EDA_446=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_EDA_446 -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
|
||||
|
||||
# Build compiler flags
|
||||
CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
|
||||
CXXFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
|
||||
CFLAGS_F7=-c $(MCFLAGS_F7) $(INCLUDES_F7)
|
||||
CXXFLAGS_F7=-c $(MCFLAGS_F7) $(INCLUDES_F7)
|
||||
|
||||
# Linker flags
|
||||
LDFLAGS_F4 =-T stm32f4xx_link.ld $(MCFLAGS_F4) --specs=nosys.specs $(INCLUDES_LIBS_F4)
|
||||
LDFLAGS_F767 =-T stm32f767_link.ld $(MCFLAGS_F7) --specs=nosys.specs $(INCLUDES_LIBS_F7)
|
||||
LDFLAGS_F722 =-T stm32f722_link.ld $(MCFLAGS_F7) --specs=nosys.specs $(INCLUDES_LIBS_F7)
|
||||
|
||||
# Common flags
|
||||
CFLAGS=-Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
|
||||
CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
|
||||
LDFLAGS=-Os --specs=nano.specs -Wl,-Map=bin/mmdvm.map
|
||||
|
||||
# Build Rules
|
||||
.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm drcc_nqf clean
|
||||
|
||||
# Default target: Nucleo-64 F446RE board
|
||||
all: nucleo
|
||||
|
||||
pi: GitVersion.h
|
||||
pi: CFLAGS+=$(CFLAGS_F4) $(DEFS_PI)
|
||||
pi: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_PI)
|
||||
pi: LDFLAGS+=$(LDFLAGS_F4)
|
||||
pi: release_f4
|
||||
|
||||
pi-f722: GitVersion.h
|
||||
pi-f722: CFLAGS+=$(CFLAGS_F7) $(DEFS_PI_F722)
|
||||
pi-f722: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_PI_F722)
|
||||
pi-f722: LDFLAGS+=$(LDFLAGS_F722)
|
||||
pi-f722: release_f7
|
||||
|
||||
f4m: GitVersion.h
|
||||
f4m: CFLAGS+=$(CFLAGS_F4) $(DEFS_F4M)
|
||||
f4m: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_F4M)
|
||||
f4m: LDFLAGS+=$(LDFLAGS_F4)
|
||||
f4m: release_f4
|
||||
|
||||
f7m: GitVersion.h
|
||||
f7m: CFLAGS+=$(CFLAGS_F7) $(DEFS_F7M)
|
||||
f7m: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_F7M)
|
||||
f7m: LDFLAGS+=$(LDFLAGS_F722)
|
||||
f7m: release_f7
|
||||
|
||||
rpt_hat: GitVersion.h
|
||||
rpt_hat: CFLAGS+=$(CFLAGS_F7) $(DEFS_RPT_HAT)
|
||||
rpt_hat: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_RPT_HAT)
|
||||
rpt_hat: LDFLAGS+=$(LDFLAGS_F722)
|
||||
rpt_hat: release_f7
|
||||
|
||||
rpt_hat_tgo: GitVersion.h
|
||||
rpt_hat_tgo: CFLAGS+=$(CFLAGS_F4) $(DEFS_RPT_HAT_TGO)
|
||||
rpt_hat_tgo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_RPT_HAT_TGO)
|
||||
rpt_hat_tgo: LDFLAGS+=$(LDFLAGS_F4)
|
||||
rpt_hat_tgo: release_f4
|
||||
|
||||
nucleo: GitVersion.h
|
||||
nucleo: CFLAGS+=$(CFLAGS_F4) $(DEFS_NUCLEO)
|
||||
nucleo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_NUCLEO)
|
||||
nucleo: LDFLAGS+=$(LDFLAGS_F4)
|
||||
nucleo: release_f4
|
||||
|
||||
dis: GitVersion.h
|
||||
dis: CFLAGS+=$(CFLAGS_F4) $(DEFS_DIS)
|
||||
dis: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DIS)
|
||||
dis: LDFLAGS+=$(LDFLAGS_F4)
|
||||
dis: release_f4
|
||||
|
||||
f767: GitVersion.h
|
||||
f767: CFLAGS+=$(CFLAGS_F7) $(DEFS_NUCLEO_F767)
|
||||
f767: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_NUCLEO_F767)
|
||||
f767: LDFLAGS+=$(LDFLAGS_F767)
|
||||
f767: release_f7
|
||||
|
||||
dvm: GitVersion.h
|
||||
dvm: CFLAGS+=$(CFLAGS_F4) $(DEFS_DVM)
|
||||
dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM)
|
||||
dvm: LDFLAGS+=$(LDFLAGS_F4)
|
||||
dvm: release_f4
|
||||
|
||||
drcc_nqf: GitVersion.h
|
||||
drcc_nqf: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
|
||||
drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
|
||||
drcc_nqf: LDFLAGS+=$(LDFLAGS_F4)
|
||||
drcc_nqf: release_f4
|
||||
|
||||
eda405: GitVersion.h
|
||||
eda405: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_405)
|
||||
eda405: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_405)
|
||||
eda405: LDFLAGS+=$(LDFLAGS_F4)
|
||||
eda405: release_f4
|
||||
|
||||
eda446: GitVersion.h
|
||||
eda446: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_446)
|
||||
eda446: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_446)
|
||||
eda446: LDFLAGS+=$(LDFLAGS_F4)
|
||||
eda446: release_f4
|
||||
|
||||
release_f4: $(BINDIR)
|
||||
release_f4: $(OBJDIR_F4)
|
||||
release_f4: $(BINDIR)/$(BINHEX_F4)
|
||||
release_f4: $(BINDIR)/$(BINBIN_F4)
|
||||
|
||||
release_f7: $(BINDIR)
|
||||
release_f7: $(OBJDIR_F7)
|
||||
release_f7: $(BINDIR)/$(BINHEX_F7)
|
||||
release_f7: $(BINDIR)/$(BINBIN_F7)
|
||||
|
||||
$(BINDIR):
|
||||
$(MDDIRS)
|
||||
|
||||
$(OBJDIR_F4):
|
||||
$(MDDIRS)
|
||||
|
||||
$(OBJDIR_F7):
|
||||
$(MDDIRS)
|
||||
|
||||
$(BINDIR)/$(BINHEX_F4): $(BINDIR)/$(BINELF_F4)
|
||||
$(CP) -O ihex $< $@
|
||||
@echo "Objcopy from ELF to IHEX complete!\n"
|
||||
|
||||
$(BINDIR)/$(BINBIN_F4): $(BINDIR)/$(BINELF_F4)
|
||||
$(CP) -O binary $< $@
|
||||
@echo "Objcopy from ELF to BINARY complete!\n"
|
||||
|
||||
$(BINDIR)/$(BINELF_F4): $(OBJ_F4)
|
||||
$(CXX) $(OBJ_F4) $(LDFLAGS) -o $@
|
||||
@echo "Linking complete!\n"
|
||||
$(SIZE) $(BINDIR)/$(BINELF_F4)
|
||||
|
||||
$(BINDIR)/$(BINHEX_F7): $(BINDIR)/$(BINELF_F7)
|
||||
$(CP) -O ihex $< $@
|
||||
@echo "Objcopy from ELF to IHEX complete!\n"
|
||||
|
||||
$(BINDIR)/$(BINBIN_F7): $(BINDIR)/$(BINELF_F7)
|
||||
$(CP) -O binary $< $@
|
||||
@echo "Objcopy from ELF to BINARY complete!\n"
|
||||
|
||||
$(BINDIR)/$(BINELF_F7): $(OBJ_F7)
|
||||
$(CXX) $(OBJ_F7) $(LDFLAGS) -o $@
|
||||
@echo "Linking complete!\n"
|
||||
$(SIZE) $(BINDIR)/$(BINELF_F7)
|
||||
|
||||
$(OBJDIR_F4)/%.o: $(MMDVM_PATH)/%.cpp
|
||||
$(CXX) $(CXXFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
$(OBJDIR_F7)/%.o: $(MMDVM_PATH)/%.cpp
|
||||
$(CXX) $(CXXFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
$(OBJDIR_F4)/%.o: $(STD_LIB_F4)/%.c
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
$(OBJDIR_F7)/%.o: $(STD_LIB_F7)/%.c
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
$(OBJDIR_F4)/%.o: $(SYS_DIR_F4)/%.c
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
$(OBJDIR_F4)/%.o: $(STARTUP_DIR_F4)/%.c
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
$(OBJDIR_F7)/%.o: $(SYS_DIR_F7)/%.c
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
$(OBJDIR_F7)/%.o: $(STARTUP_DIR_F7)/%.c
|
||||
$(CC) $(CFLAGS) $< -o $@
|
||||
@echo "Compiled "$<"!\n"
|
||||
|
||||
clean:
|
||||
$(CLEANCMD)
|
||||
|
||||
deploy:
|
||||
ifneq ($(wildcard /usr/bin/openocd),)
|
||||
/usr/bin/openocd -f /usr/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/share/openocd/scripts/target/stm32f4x.cfg -c "program bin/$(BINELF_F4) verify reset exit"
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /usr/local/bin/openocd),)
|
||||
/usr/local/bin/openocd -f /usr/local/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/local/share/openocd/scripts/target/stm32f4x.cfg -c "program bin/$(BINELF_F4) verify reset exit"
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /opt/openocd/bin/openocd),)
|
||||
/opt/openocd/bin/openocd -f /opt/openocd/share/openocd/scripts/interface/stlink-v2-1.cfg -f /opt/openocd/share/openocd/scripts/target/stm32f4x.cfg -c "program bin/$(BINELF_F4) verify reset exit"
|
||||
endif
|
||||
|
||||
deploy-f7:
|
||||
ifneq ($(wildcard /usr/bin/openocd),)
|
||||
/usr/bin/openocd -f /usr/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/share/openocd/scripts/target/stm32f7x.cfg -c "program bin/$(BINELF_F7) verify reset exit"
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /usr/local/bin/openocd),)
|
||||
/usr/local/bin/openocd -f /usr/local/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/local/share/openocd/scripts/target/stm32f7x.cfg -c "program bin/$(BINELF_F7) verify reset exit"
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /opt/openocd/bin/openocd),)
|
||||
/opt/openocd/bin/openocd -f /opt/openocd/share/openocd/scripts/interface/stlink-v2-1.cfg -f /opt/openocd/share/openocd/scripts/target/stm32f7x.cfg -c "program bin/$(BINELF_F7) verify reset exit"
|
||||
endif
|
||||
|
||||
deploy-pi:
|
||||
ifneq ($(wildcard /usr/local/bin/stm32flash),)
|
||||
-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
|
||||
-/usr/local/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F4)
|
||||
/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R -c /dev/ttyAMA0
|
||||
endif
|
||||
|
||||
ifneq ($(wildcard /usr/bin/stm32flash),)
|
||||
-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
|
||||
-/usr/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F4)
|
||||
/usr/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R -c /dev/ttyAMA0
|
||||
endif
|
||||
|
||||
deploy-f4m: deploy-pi
|
||||
deploy-dvm: deploy-pi
|
||||
deploy-eda405: deploy-pi
|
||||
deploy-eda446: deploy-pi
|
||||
|
||||
deploy-pi-f7:
|
||||
ifneq ($(wildcard /usr/local/bin/stm32flash),)
|
||||
-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
|
||||
/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
|
||||
|
||||
else ifneq ($(wildcard /usr/bin/stm32flash),)
|
||||
-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
|
||||
/usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
|
||||
endif
|
||||
|
||||
deploy-f7m: deploy-pi-f7
|
||||
deploy-rpt_hat: deploy-pi-f7
|
||||
|
||||
# Export the current git version if the index file exists, else 000...
|
||||
GitVersion.h:
|
||||
ifdef SYSTEMROOT
|
||||
echo #define GITVERSION "0000000" > $@
|
||||
else ifdef SystemRoot
|
||||
echo #define GITVERSION "0000000" > $@
|
||||
else
|
||||
ifneq ("$(wildcard .git/index)","")
|
||||
echo "#define GITVERSION \"$(shell git rev-parse --short HEAD)\"" > $@
|
||||
else
|
||||
echo "#define GITVERSION \"0000000\"" > $@
|
||||
endif
|
||||
endif
|
||||
|
||||
flash_f4:
|
||||
@echo "flashing firmware..."
|
||||
st-flash write bin/$(BINBIN_F4) 0x8000000
|
||||
@@ -1,189 +0,0 @@
|
||||
#!/usr/bin/make
|
||||
# makefile for the arduino due (works with arduino IDE 1.6.11)
|
||||
#
|
||||
# The original file can be found at https://github.com/pauldreik/arduino-due-makefile
|
||||
#
|
||||
# USAGE: put this file in the same dir as your .ino file is.
|
||||
# configure the PORT variable and ADIR at the top of the file
|
||||
# to match your local configuration.
|
||||
# Type make upload to compile and upload.
|
||||
#
|
||||
|
||||
#user specific settings:
|
||||
#where to find the IDE
|
||||
ADIR:=$(HOME)/.arduino15
|
||||
#which serial port to use (add a file with SUBSYSTEMS=="usb",
|
||||
#ATTRS{product}=="Arduino Due Prog. Port", ATTRS{idProduct}=="003d",
|
||||
#ATTRS{idVendor}=="2341", SYMLINK+="arduino_due" in /etc/udev/rules.d/
|
||||
#to get this working). Do not prefix the port with /dev/, just take
|
||||
#the basename.
|
||||
PORT:=ttyACM0
|
||||
#if you want to verify the bossac upload, define this to -v
|
||||
VERIFY:=-v
|
||||
|
||||
|
||||
#end of user configuration.
|
||||
|
||||
|
||||
#then some general settings. They should not be necessary to modify.
|
||||
#CXX:=$(ADIR)/tools/g++_arm_none_eabi/bin/arm-none-eabi-g++
|
||||
CXX:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-g++
|
||||
#CC:=$(ADIR)/tools/g++_arm_none_eabi/bin/arm-none-eabi-gcc
|
||||
CC:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-gcc
|
||||
OBJCOPY:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-objcopy
|
||||
|
||||
C:=$(CC)
|
||||
#SAM:=arduino/sam/
|
||||
SAM:=$(ADIR)/packages/arduino/hardware/sam/1.6.11
|
||||
#CMSIS:=arduino/sam/system/CMSIS/
|
||||
#LIBSAM:=arduino/sam/system/libsam
|
||||
TMPDIR:=$(PWD)/build
|
||||
AR:=$(ADIR)/tools/g++_arm_none_eabi/bin/arm-none-eabi-ar
|
||||
AR:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-ar
|
||||
|
||||
|
||||
#all these values are hard coded and should maybe be configured somehow else,
|
||||
#like olikraus does in his makefile.
|
||||
DEFINES:=-Dprintf=iprintf -DF_CPU=84000000 -DARDUINO=10611 -D__SAM3X8E__ -DUSB_PID=0x003e -DUSB_VID=0x2341 -DUSBCON \
|
||||
-DARDUINO_SAM_DUE -DARDUINO_ARCH_SAM '-DUSB_MANUFACTURER="Arduino LLC"' '-DUSB_PRODUCT="Arduino Due"' \
|
||||
-DMADEBYMAKEFILE
|
||||
|
||||
INCLUDES:=-I$(SAM)/system/libsam -I$(SAM)/system/CMSIS/CMSIS/Include/ \
|
||||
-I$(SAM)/system/CMSIS/Device/ATMEL/ -I$(SAM)/cores/arduino \
|
||||
-I$(SAM)/variants/arduino_due_x
|
||||
|
||||
#also include the current dir for convenience
|
||||
INCLUDES += -I.
|
||||
|
||||
#compilation flags common to both c and c++
|
||||
COMMON_FLAGS:=-g -Os -w -ffunction-sections -fdata-sections -nostdlib \
|
||||
--param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb \
|
||||
-fno-threadsafe-statics
|
||||
#for compiling c (do not warn, this is not our code)
|
||||
CFLAGS:=$(COMMON_FLAGS) -std=gnu11
|
||||
#for compiling c++
|
||||
CXXFLAGS:=$(COMMON_FLAGS) -fno-rtti -fno-exceptions -std=gnu++11 -Wall -Wextra
|
||||
|
||||
#let the results be named after the project
|
||||
PROJNAME:=$(shell basename *.ino .ino)
|
||||
|
||||
#we will make a new mainfile from the ino file.
|
||||
NEWMAINFILE:=$(TMPDIR)/$(PROJNAME).ino.cpp
|
||||
|
||||
#our own sourcefiles is the (converted) ino file and any local cpp files
|
||||
MYSRCFILES:=$(NEWMAINFILE) $(shell ls *.cpp 2>/dev/null)
|
||||
MYOBJFILES:=$(addsuffix .o,$(addprefix $(TMPDIR)/,$(notdir $(MYSRCFILES))))
|
||||
|
||||
#These source files are the ones forming core.a
|
||||
CORESRCXX:=$(shell ls ${SAM}/cores/arduino/*.cpp ${SAM}/cores/arduino/USB/*.cpp ${SAM}/variants/arduino_due_x/variant.cpp)
|
||||
CORESRC:=$(shell ls ${SAM}/cores/arduino/*.c)
|
||||
|
||||
#hey this one is needed too: $(SAM)/cores/arduino/wiring_pulse_asm.S" add -x assembler-with-cpp
|
||||
#and this one: /1.6.11/cores/arduino/avr/dtostrf.c but it seems to work
|
||||
#anyway, probably because I do not use that functionality.
|
||||
|
||||
#convert the core source files to object files. assume no clashes.
|
||||
COREOBJSXX:=$(addprefix $(TMPDIR)/core/,$(notdir $(CORESRCXX)) )
|
||||
COREOBJSXX:=$(addsuffix .o,$(COREOBJSXX))
|
||||
COREOBJS:=$(addprefix $(TMPDIR)/core/,$(notdir $(CORESRC)) )
|
||||
COREOBJS:=$(addsuffix .o,$(COREOBJS))
|
||||
|
||||
default:
|
||||
@echo default rule, does nothing. Try make compile or make upload.
|
||||
|
||||
#This rule is good to just make sure stuff compiles, without having to wait
|
||||
#for bossac.
|
||||
compile: GitVersion.h $(TMPDIR)/$(PROJNAME).elf $(TMPDIR)/$(PROJNAME).bin
|
||||
|
||||
#This is a make rule template to create object files from the source files.
|
||||
# arg 1=src file
|
||||
# arg 2=object file
|
||||
# arg 3= XX if c++, empty if c
|
||||
define OBJ_template
|
||||
$(2): $(1)
|
||||
$(C$(3)) -MD -c $(C$(3)FLAGS) $(DEFINES) $(INCLUDES) $(1) -o $(2)
|
||||
endef
|
||||
#now invoke the template both for c++ sources
|
||||
$(foreach src,$(CORESRCXX), $(eval $(call OBJ_template,$(src),$(addsuffix .o,$(addprefix $(TMPDIR)/core/,$(notdir $(src)))),XX) ) )
|
||||
#...and for c sources:
|
||||
$(foreach src,$(CORESRC), $(eval $(call OBJ_template,$(src),$(addsuffix .o,$(addprefix $(TMPDIR)/core/,$(notdir $(src)))),) ) )
|
||||
|
||||
#and our own c++ sources
|
||||
$(foreach src,$(MYSRCFILES), $(eval $(call OBJ_template,$(src),$(addsuffix .o,$(addprefix $(TMPDIR)/,$(notdir $(src)))),XX) ) )
|
||||
|
||||
|
||||
clean:
|
||||
test ! -d $(TMPDIR) || rm -rf $(TMPDIR)
|
||||
$(RM) GitVersion.h
|
||||
|
||||
.PHONY: .FORCE upload default
|
||||
|
||||
$(TMPDIR):
|
||||
mkdir -p $(TMPDIR)
|
||||
|
||||
$(TMPDIR)/core:
|
||||
mkdir -p $(TMPDIR)/core
|
||||
|
||||
#creates the cpp file from the .ino file
|
||||
$(NEWMAINFILE): $(PROJNAME).ino
|
||||
cat $(SAM)/cores/arduino/main.cpp > $(NEWMAINFILE)
|
||||
cat $(PROJNAME).ino >> $(NEWMAINFILE)
|
||||
echo 'extern "C" void __cxa_pure_virtual() {while (true);}' >> $(NEWMAINFILE)
|
||||
|
||||
#include the dependencies for our own files
|
||||
-include $(MYOBJFILES:.o=.d)
|
||||
|
||||
#create the core library from the core objects. Do this EXACTLY as the
|
||||
#arduino IDE does it, seems *really* picky about this.
|
||||
#Sorry for the hard coding.
|
||||
$(TMPDIR)/core.a: $(TMPDIR)/core $(COREOBJS) $(COREOBJSXX)
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_shift.c.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_analog.c.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/itoa.c.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/cortex_handlers.c.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/hooks.c.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring.c.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/WInterrupts.c.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/syscalls_sam3.c.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/iar_calls_sam3.c.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_digital.c.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/Print.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/USARTClass.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/WString.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/PluggableUSB.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/USBCore.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/CDC.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_pulse.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/UARTClass.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/main.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/new.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/watchdog.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/Stream.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/RingBuffer.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/IPAddress.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/Reset.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/WMath.cpp.o
|
||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/variant.cpp.o
|
||||
|
||||
#link our own object files with core to form the elf file
|
||||
$(TMPDIR)/$(PROJNAME).elf: $(TMPDIR)/core.a $(TMPDIR)/core/syscalls_sam3.c.o $(MYOBJFILES)
|
||||
$(CC) -mcpu=cortex-m3 -mthumb -Os -Wl,--gc-sections -T$(SAM)/variants/arduino_due_x/linker_scripts/gcc/flash.ld -Wl,-Map,$(NEWMAINFILE).map -o $@ -L$(TMPDIR) -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group -u _sbrk -u link -u _close -u _fstat -u _isatty -u _lseek -u _read -u _write -u _exit -u kill -u _getpid $(MYOBJFILES) $(TMPDIR)/core/variant.cpp.o $(SAM)/variants/arduino_due_x/libsam_sam3x8e_gcc_rel.a $(SAM)/system/CMSIS/CMSIS/Lib/GCC/libarm_cortexM3l_math.a $(TMPDIR)/core.a -Wl,--end-group -lm -gcc
|
||||
|
||||
#copy from the hex to our bin file (why?)
|
||||
$(TMPDIR)/$(PROJNAME).bin: $(TMPDIR)/$(PROJNAME).elf
|
||||
$(OBJCOPY) -O binary $< $@
|
||||
|
||||
#upload to the arduino by first resetting it (stty) and the running bossac
|
||||
upload: compile
|
||||
stty -F /dev/$(PORT) cs8 1200 hupcl
|
||||
$(ADIR)/packages/arduino/tools/bossac/1.6.1-arduino/bossac -i --port=$(PORT) -U false -e -w $(VERIFY) -b $(TMPDIR)/$(PROJNAME).bin -R
|
||||
|
||||
# Export the current git version if the index file exists, else 000...
|
||||
GitVersion.h: .FORCE
|
||||
ifneq ("$(wildcard .git/index)","")
|
||||
echo "#define GITVERSION \"$(shell git rev-parse --short HEAD)\"" > $@
|
||||
else
|
||||
echo "#define GITVERSION \"0000000\"" > $@
|
||||
endif
|
||||
|
||||
.FORCE:
|
||||
-165
@@ -1,165 +0,0 @@
|
||||
# The name for the project
|
||||
TARGET:=mmdvm
|
||||
|
||||
# The CPU architecture (will be used for -mcpu)
|
||||
MCPU:=cortex-m3
|
||||
MCU:=STM32F105xC
|
||||
|
||||
# The source files of the project
|
||||
CSRC:=
|
||||
CXXSRC:=$(wildcard *.cpp)
|
||||
|
||||
# Include directory for the system include files and system source file
|
||||
SYSDIR:=system_stm32f1xx
|
||||
SYSSRC:=$(SYSDIR)/system_stm32f1xx.c
|
||||
|
||||
# Other include directories
|
||||
INCDIR:=
|
||||
|
||||
# Definitions
|
||||
CDEFS:=
|
||||
CXXDEFS:=
|
||||
|
||||
# The name of the startup file which matches to the architecture (MCPU)
|
||||
STARTUP:=$(SYSDIR)/startup_stm32f105xc.S
|
||||
STARTUP_DEFS=
|
||||
|
||||
# Include directory for CMSIS
|
||||
CMSISDIR:=STM32F10X_Lib/CMSIS
|
||||
|
||||
# Libraries
|
||||
LIBDIR:=
|
||||
LIBS:=-larm_cortexM3l_math
|
||||
|
||||
# Name of the linker script
|
||||
LDSCRIPT:=$(SYSDIR)/gcc.ld
|
||||
|
||||
# Target objects and binaries directory
|
||||
OBJDIR:=obj
|
||||
BINDIR:=bin
|
||||
|
||||
# Port definition for programming via bootloader (using stm32flash)
|
||||
BL_PORT:=ttyUSB0
|
||||
|
||||
|
||||
|
||||
# Internal Variables
|
||||
ELF:=$(BINDIR)/$(TARGET).elf
|
||||
HEX:=$(BINDIR)/$(TARGET).hex
|
||||
DIS:=$(BINDIR)/$(TARGET).dis
|
||||
MAP:=$(BINDIR)/$(TARGET).map
|
||||
OBJ:=$(CSRC:%.c=$(OBJDIR)/%.o) $(CXXSRC:%.cpp=$(OBJDIR)/%.o)
|
||||
OBJ+=$(SYSSRC:$(SYSDIR)/%.c=$(OBJDIR)/%.o) $(STARTUP:$(SYSDIR)/%.S=$(OBJDIR)/%.o)
|
||||
|
||||
# Replace standard build tools by arm tools
|
||||
CC:=arm-none-eabi-gcc
|
||||
CXX:=arm-none-eabi-g++
|
||||
AS:=arm-none-eabi-gcc
|
||||
LD:=arm-none-eabi-g++
|
||||
OBJCOPY:=arm-none-eabi-objcopy
|
||||
OBJDUMP:=arm-none-eabi-objdump
|
||||
SIZE:=arm-none-eabi-size
|
||||
|
||||
# Common flags
|
||||
COMMON_FLAGS =-mthumb -mlittle-endian -mcpu=$(MCPU)
|
||||
COMMON_FLAGS+= -Wall
|
||||
COMMON_FLAGS+= -I. -I$(CMSISDIR)/Include -I$(CMSISDIR)/Device/ST/STM32F1xx/Include -I$(SYSDIR)
|
||||
COMMON_FLAGS+= $(addprefix -I,$(INCDIR))
|
||||
COMMON_FLAGS+= -D$(MCU) -DMADEBYMAKEFILE -DSTM32F1
|
||||
COMMON_FLAGS+= -Os -flto -ffunction-sections -fdata-sections
|
||||
COMMON_FLAGS+= -g
|
||||
# Assembler flags
|
||||
ASFLAGS:=$(COMMON_FLAGS)
|
||||
# C flags
|
||||
CFLAGS:=$(COMMON_FLAGS) $(addprefix -D,$(CDEFS))
|
||||
CFLAGS+= -std=gnu11 -nostdlib
|
||||
# CXX flags
|
||||
CXXFLAGS:=$(COMMON_FLAGS) $(addprefix -D,$(CXXDEFS))
|
||||
CXXFLAGS+= -nostdlib -fno-exceptions -fno-rtti
|
||||
# LD flags
|
||||
LDFLAGS:=$(COMMON_FLAGS) -Wl,--gc-sections -Wl,-Map=$(MAP) -Wl,--no-wchar-size-warning
|
||||
LDFLAGS+= --specs=nosys.specs --specs=nano.specs
|
||||
LDFLAGS+= -L$(CMSISDIR)/Lib/GCC/ $(addprefix -L,$(LIBDIR))
|
||||
LDLIBS:=-T$(LDSCRIPT) $(LIBS)
|
||||
|
||||
# Dependecies
|
||||
DEPENDS:=$(CSRC:%.c=$(OBJDIR)/%.d) $(CXXSRC:%.cpp=$(OBJDIR)/%.d)
|
||||
|
||||
|
||||
# Additional Suffixes
|
||||
.SUFFIXES: .elf .hex
|
||||
|
||||
# Targets
|
||||
.PHONY: all
|
||||
all: GitVersion.h $(DIS) $(HEX)
|
||||
$(SIZE) $(ELF)
|
||||
|
||||
.PHONY: program
|
||||
program: $(HEX) $(ELF)
|
||||
openocd -f openocd.cfg \
|
||||
-c "program $(HEX) verify reset exit"
|
||||
$(SIZE) $(ELF)
|
||||
|
||||
.PHONY: program_bl
|
||||
program_bl: $(HEX) $(ELF)
|
||||
stm32flash -w $(HEX) -v /dev/$(BL_PORT)
|
||||
$(SIZE) $(ELF)
|
||||
|
||||
.PHONY: run
|
||||
run: $(HEX) $(ELF)
|
||||
openocd -f openocd.cfg \
|
||||
-c "init" -c "reset" -c "exit"
|
||||
|
||||
.PHONY: debug
|
||||
debug: $(ELF)
|
||||
./debug.sh $(ELF)
|
||||
|
||||
.PHONY: clean
|
||||
clean:
|
||||
$(RM) $(OBJ) $(HEX) $(ELF) $(DIS) $(MAP) $(DEPENDS) GitVersion.h
|
||||
|
||||
# implicit rules
|
||||
.elf.hex:
|
||||
$(OBJCOPY) -O ihex $< $@
|
||||
|
||||
$(OBJDIR)/%.o: %.c
|
||||
$(CC) -MMD $(CFLAGS) -c $< -o $@
|
||||
|
||||
$(OBJDIR)/%.o: %.cpp
|
||||
$(CXX) -MMD $(CXXFLAGS) -c $< -o $@
|
||||
|
||||
$(OBJDIR)/%.o: $(SYSDIR)/%.c
|
||||
$(CC) $(CFLAGS) -c $< -o $@
|
||||
|
||||
$(OBJDIR)/%.o: $(SYSDIR)/%.S
|
||||
$(AS) $(ASFLAGS) -c $< -o $@
|
||||
|
||||
# explicit rules
|
||||
$(OBJDIR):
|
||||
mkdir -p $(OBJDIR)
|
||||
|
||||
$(BINDIR):
|
||||
mkdir -p $(BINDIR)
|
||||
|
||||
$(ELF): $(OBJDIR) $(BINDIR) $(OBJ)
|
||||
$(LD) $(OBJ) $(LDFLAGS) $(LDLIBS) -o $@
|
||||
|
||||
$(DIS): $(ELF)
|
||||
$(OBJDUMP) -S $< > $@
|
||||
|
||||
# include dependecies
|
||||
-include $(DEPENDS)
|
||||
|
||||
# Export the current git version if the index file exists, else 000...
|
||||
GitVersion.h:
|
||||
ifdef SYSTEMROOT
|
||||
echo #define GITVERSION "0000000" > $@
|
||||
else ifdef SystemRoot
|
||||
echo #define GITVERSION "0000000" > $@
|
||||
else
|
||||
ifneq ("$(wildcard .git/index)","")
|
||||
echo "#define GITVERSION \"$(shell git rev-parse --short HEAD)\"" > $@
|
||||
else
|
||||
echo "#define GITVERSION \"0000000\"" > $@
|
||||
endif
|
||||
endif
|
||||
@@ -1,17 +1,35 @@
|
||||
This is the source code of the MMDVM firmware that supports D-Star, DMR,
|
||||
System Fusion, P25, NXDN, POCSAG, and FM modes.
|
||||
This is the source code of the MMDVM firmware that supports D-Star, DMR, System Fusion, P25, NXDN, M17, POCSAG, AX.25, and FM modes.
|
||||
|
||||
It runs on the Arduino Due, the ST-Micro STM32F1xxx, STM32F4xxx and STM32F7xxx
|
||||
processors, as well as the Teensy 3.1/3.2/3.5/3.6. What these platforms have in
|
||||
common is the use of an ARM Cortex-M3, M4, or M7 processors with a clock speed
|
||||
greater than 70 MHz, and access to at least one analogue to digital converter
|
||||
and one digital to analogue converter.
|
||||
It runs on the Arduino Due, the ST-Micro STM32F4xxx and STM32F7xxx processors, as well as the Teensy 3.5/3.6. What these platforms have in common is the use of an ARM Cortex-M3, M4, or M7 processors with a minimum clock speed greater of 80 MHz, and access to at least one analogue to digital converter, one digital to analogue converter, as well as a number of GPIO pins.
|
||||
|
||||
In order to build this software for the Arduino Due, you will need to edit a
|
||||
file within the Arduino GUI and that is detailed in the BUILD.txt file. The
|
||||
STM32 support is being supplied via the ARM GCC compiler. The Teensy support
|
||||
uses Teensyduino.
|
||||
In order to build this software for the Arduino Due, you will need to edit a file within the Arduino GUI and that is detailed in the BUILD.txt file. The STM32 support is supplied via the ARM GCC compiler. The Teensy support uses Teensyduino.
|
||||
|
||||
This software is licenced under the GPL v2 and is intended for amateur and
|
||||
educational use only. Use of this software for commercial purposes is strictly
|
||||
forbidden.
|
||||
This software is licenced under the GPL v2 and is primarily intended for amateur and educational use.
|
||||
|
||||
Portions of the ARM support code include the following copyright:
|
||||
|
||||
Copyright (c) 2011 - 2013 ARM LIMITED
|
||||
|
||||
All rights reserved.
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are met:
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
- Neither the name of ARM nor the names of its contributors may be used
|
||||
to endorse or promote products derived from this software without
|
||||
specific prior written permission.
|
||||
|
||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
POSSIBILITY OF SUCH DAMAGE.
|
||||
|
||||
-102
@@ -1,102 +0,0 @@
|
||||
/*
|
||||
TX fifo control - Copyright (C) KI6ZUM 2015
|
||||
Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Library General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Library General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Library General Public
|
||||
License along with this library; if not, write to the
|
||||
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
|
||||
Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#include "RSSIRB.h"
|
||||
|
||||
CRSSIRB::CRSSIRB(uint16_t length) :
|
||||
m_length(length),
|
||||
m_head(0U),
|
||||
m_tail(0U),
|
||||
m_full(false),
|
||||
m_overflow(false)
|
||||
{
|
||||
m_rssi = new uint16_t[length];
|
||||
}
|
||||
|
||||
uint16_t CRSSIRB::getSpace() const
|
||||
{
|
||||
uint16_t n = 0U;
|
||||
|
||||
if (m_tail == m_head)
|
||||
n = m_full ? 0U : m_length;
|
||||
else if (m_tail < m_head)
|
||||
n = m_length - m_head + m_tail;
|
||||
else
|
||||
n = m_tail - m_head;
|
||||
|
||||
if (n > m_length)
|
||||
n = 0U;
|
||||
|
||||
return n;
|
||||
}
|
||||
|
||||
uint16_t CRSSIRB::getData() const
|
||||
{
|
||||
if (m_tail == m_head)
|
||||
return m_full ? m_length : 0U;
|
||||
else if (m_tail < m_head)
|
||||
return m_head - m_tail;
|
||||
else
|
||||
return m_length - m_tail + m_head;
|
||||
}
|
||||
|
||||
bool CRSSIRB::put(uint16_t rssi)
|
||||
{
|
||||
if (m_full) {
|
||||
m_overflow = true;
|
||||
return false;
|
||||
}
|
||||
|
||||
m_rssi[m_head] = rssi;
|
||||
|
||||
m_head++;
|
||||
if (m_head >= m_length)
|
||||
m_head = 0U;
|
||||
|
||||
if (m_head == m_tail)
|
||||
m_full = true;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool CRSSIRB::get(uint16_t& rssi)
|
||||
{
|
||||
if (m_head == m_tail && !m_full)
|
||||
return false;
|
||||
|
||||
rssi = m_rssi[m_tail];
|
||||
|
||||
m_full = false;
|
||||
|
||||
m_tail++;
|
||||
if (m_tail >= m_length)
|
||||
m_tail = 0U;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool CRSSIRB::hasOverflowed()
|
||||
{
|
||||
bool overflow = m_overflow;
|
||||
|
||||
m_overflow = false;
|
||||
|
||||
return overflow;
|
||||
}
|
||||
@@ -1,59 +0,0 @@
|
||||
/*
|
||||
Serial fifo control - Copyright (C) KI6ZUM 2015
|
||||
Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Library General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Library General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Library General Public
|
||||
License along with this library; if not, write to the
|
||||
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
|
||||
Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#if !defined(RSSIRB_H)
|
||||
#define RSSIRB_H
|
||||
|
||||
#if defined(STM32F4XX)
|
||||
#include "stm32f4xx.h"
|
||||
#elif defined(STM32F7XX)
|
||||
#include "stm32f7xx.h"
|
||||
#elif defined(STM32F105xC)
|
||||
#include "stm32f1xx.h"
|
||||
#include <cstddef>
|
||||
#else
|
||||
#include <Arduino.h>
|
||||
#endif
|
||||
|
||||
class CRSSIRB {
|
||||
public:
|
||||
CRSSIRB(uint16_t length);
|
||||
|
||||
uint16_t getSpace() const;
|
||||
|
||||
uint16_t getData() const;
|
||||
|
||||
bool put(uint16_t rssi);
|
||||
|
||||
bool get(uint16_t& rssi);
|
||||
|
||||
bool hasOverflowed();
|
||||
|
||||
private:
|
||||
uint16_t m_length;
|
||||
volatile uint16_t* m_rssi;
|
||||
volatile uint16_t m_head;
|
||||
volatile uint16_t m_tail;
|
||||
volatile bool m_full;
|
||||
bool m_overflow;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
-47
@@ -1,47 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2017 Wojciech Krutnik N0CALL
|
||||
*
|
||||
* This program is free software: you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation, either version 3 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*
|
||||
* FIFO ring buffer
|
||||
* source:
|
||||
* http://stackoverflow.com/questions/6822548/correct-way-of-implementing-a-uart-receive-buffer-in-a-small-arm-microcontroller
|
||||
* (modified)
|
||||
*
|
||||
*/
|
||||
|
||||
#if !defined(RINGBUFF_H)
|
||||
#define RINGBUFF_H
|
||||
|
||||
#define RINGBUFF_SIZE(ringBuff) (ringBuff.size) /* serial buffer in bytes (power 2) */
|
||||
#define RINGBUFF_MASK(ringBuff) (ringBuff.size-1U) /* buffer size mask */
|
||||
|
||||
/* Buffer read / write macros */
|
||||
#define RINGBUFF_RESET(ringBuff) (ringBuff).rdIdx = ringBuff.wrIdx = 0
|
||||
#define RINGBUFF_WRITE(ringBuff, dataIn) (ringBuff).data[RINGBUFF_MASK(ringBuff) & ringBuff.wrIdx++] = (dataIn)
|
||||
#define RINGBUFF_READ(ringBuff) ((ringBuff).data[RINGBUFF_MASK(ringBuff) & ((ringBuff).rdIdx++)])
|
||||
#define RINGBUFF_EMPTY(ringBuff) ((ringBuff).rdIdx == (ringBuff).wrIdx)
|
||||
#define RINGBUFF_FULL(ringBuff) ((RINGBUFF_MASK(ringBuff) & ringFifo.rdIdx) == (RINGBUFF_MASK(ringBuff) & ringFifo.wrIdx))
|
||||
#define RINGBUFF_COUNT(ringBuff) (RINGBUFF_MASK(ringBuff) & ((ringBuff).wrIdx - (ringBuff).rdIdx))
|
||||
|
||||
/* Buffer type */
|
||||
#define DECLARE_RINGBUFFER_TYPE(name, _size) \
|
||||
typedef struct{ \
|
||||
uint32_t size; \
|
||||
uint32_t wrIdx; \
|
||||
uint32_t rdIdx; \
|
||||
uint8_t data[_size]; \
|
||||
}name##_t
|
||||
|
||||
#endif
|
||||
Submodule STM32F10X_Lib deleted from 417e0c2f4a
Submodule STM32F4XX_Lib deleted from bcd346f530
Submodule STM32F7XX_Lib deleted from 2d5f4236fa
@@ -1,50 +0,0 @@
|
||||
/*
|
||||
* source: http://mightydevices.com/?p=144
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if !defined(STM32UTILS_H)
|
||||
#define STM32UTILS_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/* ram function */
|
||||
#define RAMFUNC __attribute__ ((long_call, section (".data")))
|
||||
/* eeprom data */
|
||||
/* for placing variables in eeprom memory */
|
||||
#define EEMEM __attribute__((section(".eeprom")))
|
||||
|
||||
/* bitband type */
|
||||
typedef volatile uint32_t * const bitband_t;
|
||||
|
||||
/* base address for bit banding */
|
||||
#define BITBAND_SRAM_REF (0x20000000)
|
||||
/* base address for bit banding */
|
||||
#define BITBAND_SRAM_BASE (0x22000000)
|
||||
/* base address for bit banding */
|
||||
#define BITBAND_PERIPH_REF (0x40000000)
|
||||
/* base address for bit banding */
|
||||
#define BITBAND_PERIPH_BASE (0x42000000)
|
||||
|
||||
/* sram bit band */
|
||||
#define BITBAND_SRAM(address, bit) ((void*)(BITBAND_SRAM_BASE + \
|
||||
(((uint32_t)address) - BITBAND_SRAM_REF) * 32 + (bit) * 4))
|
||||
|
||||
/* periph bit band */
|
||||
#define BITBAND_PERIPH(address, bit) ((void *)(BITBAND_PERIPH_BASE + \
|
||||
(((uint32_t)address) - BITBAND_PERIPH_REF) * 32 + (bit) * 4))
|
||||
|
||||
#endif
|
||||
-106
@@ -1,106 +0,0 @@
|
||||
/*
|
||||
TX fifo control - Copyright (C) KI6ZUM 2015
|
||||
Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Library General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Library General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Library General Public
|
||||
License along with this library; if not, write to the
|
||||
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
|
||||
Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#include "SampleRB.h"
|
||||
|
||||
CSampleRB::CSampleRB(uint16_t length) :
|
||||
m_length(length),
|
||||
m_head(0U),
|
||||
m_tail(0U),
|
||||
m_full(false),
|
||||
m_overflow(false)
|
||||
{
|
||||
m_samples = new uint16_t[length];
|
||||
m_control = new uint8_t[length];
|
||||
}
|
||||
|
||||
uint16_t CSampleRB::getSpace() const
|
||||
{
|
||||
uint16_t n = 0U;
|
||||
|
||||
if (m_tail == m_head)
|
||||
n = m_full ? 0U : m_length;
|
||||
else if (m_tail < m_head)
|
||||
n = m_length - m_head + m_tail;
|
||||
else
|
||||
n = m_tail - m_head;
|
||||
|
||||
if (n > m_length)
|
||||
n = 0U;
|
||||
|
||||
return n;
|
||||
}
|
||||
|
||||
uint16_t CSampleRB::getData() const
|
||||
{
|
||||
if (m_tail == m_head)
|
||||
return m_full ? m_length : 0U;
|
||||
else if (m_tail < m_head)
|
||||
return m_head - m_tail;
|
||||
else
|
||||
return m_length - m_tail + m_head;
|
||||
}
|
||||
|
||||
bool CSampleRB::put(uint16_t sample, uint8_t control)
|
||||
{
|
||||
if (m_full) {
|
||||
m_overflow = true;
|
||||
return false;
|
||||
}
|
||||
|
||||
m_samples[m_head] = sample;
|
||||
m_control[m_head] = control;
|
||||
|
||||
m_head++;
|
||||
if (m_head >= m_length)
|
||||
m_head = 0U;
|
||||
|
||||
if (m_head == m_tail)
|
||||
m_full = true;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool CSampleRB::get(uint16_t& sample, uint8_t& control)
|
||||
{
|
||||
if (m_head == m_tail && !m_full)
|
||||
return false;
|
||||
|
||||
sample = m_samples[m_tail];
|
||||
control = m_control[m_tail];
|
||||
|
||||
m_full = false;
|
||||
|
||||
m_tail++;
|
||||
if (m_tail >= m_length)
|
||||
m_tail = 0U;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
bool CSampleRB::hasOverflowed()
|
||||
{
|
||||
bool overflow = m_overflow;
|
||||
|
||||
m_overflow = false;
|
||||
|
||||
return overflow;
|
||||
}
|
||||
|
||||
-60
@@ -1,60 +0,0 @@
|
||||
/*
|
||||
Serial fifo control - Copyright (C) KI6ZUM 2015
|
||||
Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Library General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Library General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Library General Public
|
||||
License along with this library; if not, write to the
|
||||
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
|
||||
Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#if !defined(SAMPLERB_H)
|
||||
#define SAMPLERB_H
|
||||
|
||||
#if defined(STM32F4XX)
|
||||
#include "stm32f4xx.h"
|
||||
#elif defined(STM32F7XX)
|
||||
#include "stm32f7xx.h"
|
||||
#elif defined(STM32F105xC)
|
||||
#include "stm32f1xx.h"
|
||||
#include <cstddef>
|
||||
#else
|
||||
#include <Arduino.h>
|
||||
#endif
|
||||
|
||||
class CSampleRB {
|
||||
public:
|
||||
CSampleRB(uint16_t length);
|
||||
|
||||
uint16_t getSpace() const;
|
||||
|
||||
uint16_t getData() const;
|
||||
|
||||
bool put(uint16_t sample, uint8_t control);
|
||||
|
||||
bool get(uint16_t& sample, uint8_t& control);
|
||||
|
||||
bool hasOverflowed();
|
||||
|
||||
private:
|
||||
uint16_t m_length;
|
||||
volatile uint16_t* m_samples;
|
||||
volatile uint8_t* m_control;
|
||||
volatile uint16_t m_head;
|
||||
volatile uint16_t m_tail;
|
||||
volatile bool m_full;
|
||||
bool m_overflow;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,112 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
|
||||
#include "SerialPort.h"
|
||||
|
||||
#if defined(VK6MST_TEENSY_PI3_SHIELD_I2C)
|
||||
//it will load I2CTeensy.cpp
|
||||
|
||||
#elif defined(__SAM3X8E__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
|
||||
|
||||
void CSerialPort::beginInt(uint8_t n, int speed)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
Serial.begin(speed);
|
||||
break;
|
||||
case 2U:
|
||||
Serial2.begin(speed);
|
||||
break;
|
||||
case 3U:
|
||||
Serial3.begin(speed);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
int CSerialPort::availableInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return Serial.available();
|
||||
case 2U:
|
||||
return Serial2.available();
|
||||
case 3U:
|
||||
return Serial3.available();
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
int CSerialPort::availableForWriteInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return Serial.availableForWrite();
|
||||
case 2U:
|
||||
return Serial2.availableForWrite();
|
||||
case 3U:
|
||||
return Serial3.availableForWrite();
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t CSerialPort::readInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return Serial.read();
|
||||
case 2U:
|
||||
return Serial2.read();
|
||||
case 3U:
|
||||
return Serial3.read();
|
||||
default:
|
||||
return 0U;
|
||||
}
|
||||
}
|
||||
|
||||
void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
Serial.write(data, length);
|
||||
if (flush)
|
||||
Serial.flush();
|
||||
break;
|
||||
case 2U:
|
||||
Serial2.write(data, length);
|
||||
if (flush)
|
||||
Serial2.flush();
|
||||
break;
|
||||
case 3U:
|
||||
Serial3.write(data, length);
|
||||
if (flush)
|
||||
Serial3.flush();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
-100
@@ -1,100 +0,0 @@
|
||||
/*
|
||||
Serial RB control - Copyright (C) KI6ZUM 2015
|
||||
Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Library General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Library General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Library General Public
|
||||
License along with this library; if not, write to the
|
||||
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
|
||||
Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#include "SerialRB.h"
|
||||
|
||||
CSerialRB::CSerialRB(uint16_t length) :
|
||||
m_length(length),
|
||||
m_head(0U),
|
||||
m_tail(0U),
|
||||
m_full(false)
|
||||
{
|
||||
m_buffer = new uint8_t[length];
|
||||
}
|
||||
|
||||
void CSerialRB::reset()
|
||||
{
|
||||
m_head = 0U;
|
||||
m_tail = 0U;
|
||||
m_full = false;
|
||||
}
|
||||
|
||||
uint16_t CSerialRB::getSpace() const
|
||||
{
|
||||
uint16_t n = 0U;
|
||||
|
||||
if (m_tail == m_head)
|
||||
n = m_full ? 0U : m_length;
|
||||
else if (m_tail < m_head)
|
||||
n = m_length - m_head + m_tail;
|
||||
else
|
||||
n = m_tail - m_head;
|
||||
|
||||
if (n > m_length)
|
||||
n = 0U;
|
||||
|
||||
return n;
|
||||
}
|
||||
|
||||
uint16_t CSerialRB::getData() const
|
||||
{
|
||||
if (m_tail == m_head)
|
||||
return m_full ? m_length : 0U;
|
||||
else if (m_tail < m_head)
|
||||
return m_head - m_tail;
|
||||
else
|
||||
return m_length - m_tail + m_head;
|
||||
}
|
||||
|
||||
bool CSerialRB::put(uint8_t c)
|
||||
{
|
||||
if (m_full)
|
||||
return false;
|
||||
|
||||
m_buffer[m_head] = c;
|
||||
|
||||
m_head++;
|
||||
if (m_head >= m_length)
|
||||
m_head = 0U;
|
||||
|
||||
if (m_head == m_tail)
|
||||
m_full = true;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
uint8_t CSerialRB::peek() const
|
||||
{
|
||||
return m_buffer[m_tail];
|
||||
}
|
||||
|
||||
uint8_t CSerialRB::get()
|
||||
{
|
||||
uint8_t value = m_buffer[m_tail];
|
||||
|
||||
m_full = false;
|
||||
|
||||
m_tail++;
|
||||
if (m_tail >= m_length)
|
||||
m_tail = 0U;
|
||||
|
||||
return value;
|
||||
}
|
||||
|
||||
-62
@@ -1,62 +0,0 @@
|
||||
/*
|
||||
Serial fifo control - Copyright (C) KI6ZUM 2015
|
||||
Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Library General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Library General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Library General Public
|
||||
License along with this library; if not, write to the
|
||||
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
|
||||
Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#if !defined(SERIALRB_H)
|
||||
#define SERIALRB_H
|
||||
|
||||
#if defined(STM32F4XX)
|
||||
#include "stm32f4xx.h"
|
||||
#elif defined(STM32F7XX)
|
||||
#include "stm32f7xx.h"
|
||||
#elif defined(STM32F105xC)
|
||||
#include "stm32f1xx.h"
|
||||
#include <cstddef>
|
||||
#else
|
||||
#include <Arduino.h>
|
||||
#endif
|
||||
|
||||
const uint16_t SERIAL_RINGBUFFER_SIZE = 370U;
|
||||
|
||||
class CSerialRB {
|
||||
public:
|
||||
CSerialRB(uint16_t length = SERIAL_RINGBUFFER_SIZE);
|
||||
|
||||
uint16_t getSpace() const;
|
||||
|
||||
uint16_t getData() const;
|
||||
|
||||
void reset();
|
||||
|
||||
bool put(uint8_t c);
|
||||
|
||||
uint8_t peek() const;
|
||||
|
||||
uint8_t get();
|
||||
|
||||
private:
|
||||
uint16_t m_length;
|
||||
volatile uint8_t* m_buffer;
|
||||
volatile uint16_t m_head;
|
||||
volatile uint16_t m_tail;
|
||||
volatile bool m_full;
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
-986
@@ -1,986 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2016 by Jim McLaughlin KI6ZUM
|
||||
* Copyright (C) 2016,2017,2018 by Andy Uribe CA6JAU
|
||||
* Copyright (c) 2017 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
|
||||
#include "SerialPort.h"
|
||||
|
||||
/*
|
||||
Pin definitions:
|
||||
|
||||
- Host communication:
|
||||
USART1 - TXD PA9 - RXD PA10 (MMDVM-Pi board, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board)
|
||||
USART2 - TXD PA2 - RXD PA3 (Nucleo64 F446RE board, Morpho or Arduino header, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
|
||||
USART3 - TXD PC10 - RXD PC11 (Discovery board)
|
||||
USART3 - TXD PD8 - RXD PD9 (Nucleo144 F767ZI board)
|
||||
|
||||
- Serial repeater:
|
||||
USART1 - TXD PA9 - RXD PA10 (Nucleo with Arduino header)
|
||||
UART5 - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
|
||||
*/
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F7XX)
|
||||
|
||||
#define TX_SERIAL_FIFO_SIZE 512U
|
||||
#define RX_SERIAL_FIFO_SIZE 512U
|
||||
|
||||
extern "C" {
|
||||
void USART1_IRQHandler();
|
||||
void USART2_IRQHandler();
|
||||
void USART3_IRQHandler();
|
||||
void UART5_IRQHandler();
|
||||
}
|
||||
|
||||
/* ************* USART1 ***************** */
|
||||
#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
|
||||
|
||||
volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead1, TXSerialfifotail1;
|
||||
volatile uint16_t RXSerialfifohead1, RXSerialfifotail1;
|
||||
|
||||
// Init queues
|
||||
void TXSerialfifoinit1()
|
||||
{
|
||||
TXSerialfifohead1 = 0U;
|
||||
TXSerialfifotail1 = 0U;
|
||||
}
|
||||
|
||||
void RXSerialfifoinit1()
|
||||
{
|
||||
RXSerialfifohead1 = 0U;
|
||||
RXSerialfifotail1 = 0U;
|
||||
}
|
||||
|
||||
// How full is queue
|
||||
// TODO decide if how full or how empty is preferred info to return
|
||||
uint16_t TXSerialfifolevel1()
|
||||
{
|
||||
uint32_t tail = TXSerialfifotail1;
|
||||
uint32_t head = TXSerialfifohead1;
|
||||
|
||||
if (tail > head)
|
||||
return TX_SERIAL_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
uint16_t RXSerialfifolevel1()
|
||||
{
|
||||
uint32_t tail = RXSerialfifotail1;
|
||||
uint32_t head = RXSerialfifohead1;
|
||||
|
||||
if (tail > head)
|
||||
return RX_SERIAL_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
// Flushes the transmit shift register
|
||||
// warning: this call is blocking
|
||||
void TXSerialFlush1()
|
||||
{
|
||||
// wait until the TXE shows the shift register is empty
|
||||
while (USART_GetITStatus(USART1, USART_FLAG_TXE))
|
||||
;
|
||||
}
|
||||
|
||||
uint8_t TXSerialfifoput1(uint8_t next)
|
||||
{
|
||||
if (TXSerialfifolevel1() < TX_SERIAL_FIFO_SIZE) {
|
||||
TXSerialfifo1[TXSerialfifohead1] = next;
|
||||
|
||||
TXSerialfifohead1++;
|
||||
if (TXSerialfifohead1 >= TX_SERIAL_FIFO_SIZE)
|
||||
TXSerialfifohead1 = 0U;
|
||||
|
||||
// make sure transmit interrupts are enabled as long as there is data to send
|
||||
USART_ITConfig(USART1, USART_IT_TXE, ENABLE);
|
||||
return 1U;
|
||||
} else {
|
||||
return 0U; // signal an overflow occurred by returning a zero count
|
||||
}
|
||||
}
|
||||
|
||||
void USART1_IRQHandler()
|
||||
{
|
||||
uint8_t c;
|
||||
|
||||
if (USART_GetITStatus(USART1, USART_IT_RXNE)) {
|
||||
c = (uint8_t) USART_ReceiveData(USART1);
|
||||
|
||||
if (RXSerialfifolevel1() < RX_SERIAL_FIFO_SIZE) {
|
||||
RXSerialfifo1[RXSerialfifohead1] = c;
|
||||
|
||||
RXSerialfifohead1++;
|
||||
if (RXSerialfifohead1 >= RX_SERIAL_FIFO_SIZE)
|
||||
RXSerialfifohead1 = 0U;
|
||||
} else {
|
||||
// TODO - do something if rx fifo is full?
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(USART1, USART_IT_RXNE);
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(USART1, USART_IT_TXE)) {
|
||||
c = 0U;
|
||||
|
||||
if (TXSerialfifohead1 != TXSerialfifotail1) { // if the fifo is not empty
|
||||
c = TXSerialfifo1[TXSerialfifotail1];
|
||||
|
||||
TXSerialfifotail1++;
|
||||
if (TXSerialfifotail1 >= TX_SERIAL_FIFO_SIZE)
|
||||
TXSerialfifotail1 = 0U;
|
||||
|
||||
USART_SendData(USART1, c);
|
||||
} else { // if there's no more data to transmit then turn off TX interrupts
|
||||
USART_ITConfig(USART1, USART_IT_TXE, DISABLE);
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(USART1, USART_IT_TXE);
|
||||
}
|
||||
}
|
||||
|
||||
void InitUSART1(int speed)
|
||||
{
|
||||
// USART1 - TXD PA9 - RXD PA10 - pins on mmdvm pi board
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
USART_InitTypeDef USART_InitStructure;
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
|
||||
GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1);
|
||||
GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1);
|
||||
|
||||
// USART IRQ init
|
||||
NVIC_InitStructure.NVIC_IRQChannel = USART1_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
|
||||
// Configure USART as alternate function
|
||||
GPIO_StructInit(&GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9 | GPIO_Pin_10; // Tx | Rx
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Fast_Speed;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
|
||||
// Configure USART baud rate
|
||||
USART_StructInit(&USART_InitStructure);
|
||||
USART_InitStructure.USART_BaudRate = speed;
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No;
|
||||
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
USART_Init(USART1, &USART_InitStructure);
|
||||
|
||||
USART_Cmd(USART1, ENABLE);
|
||||
|
||||
USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
|
||||
|
||||
// initialize the fifos
|
||||
TXSerialfifoinit1();
|
||||
RXSerialfifoinit1();
|
||||
}
|
||||
|
||||
uint8_t AvailUSART1()
|
||||
{
|
||||
if (RXSerialfifolevel1() > 0U)
|
||||
return 1U;
|
||||
else
|
||||
return 0U;
|
||||
}
|
||||
|
||||
int AvailForWriteUSART1()
|
||||
{
|
||||
return TX_SERIAL_FIFO_SIZE - TXSerialfifolevel1();
|
||||
}
|
||||
|
||||
uint8_t ReadUSART1()
|
||||
{
|
||||
uint8_t data_c = RXSerialfifo1[RXSerialfifotail1];
|
||||
|
||||
RXSerialfifotail1++;
|
||||
if (RXSerialfifotail1 >= RX_SERIAL_FIFO_SIZE)
|
||||
RXSerialfifotail1 = 0U;
|
||||
|
||||
return data_c;
|
||||
}
|
||||
|
||||
void WriteUSART1(const uint8_t* data, uint16_t length)
|
||||
{
|
||||
for (uint16_t i = 0U; i < length; i++)
|
||||
TXSerialfifoput1(data[i]);
|
||||
|
||||
USART_ITConfig(USART1, USART_IT_TXE, ENABLE);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/* ************* USART2 ***************** */
|
||||
#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) || defined(DRCC_DVM)
|
||||
|
||||
volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead2, TXSerialfifotail2;
|
||||
volatile uint16_t RXSerialfifohead2, RXSerialfifotail2;
|
||||
|
||||
// Init queues
|
||||
void TXSerialfifoinit2()
|
||||
{
|
||||
TXSerialfifohead2 = 0U;
|
||||
TXSerialfifotail2 = 0U;
|
||||
}
|
||||
|
||||
void RXSerialfifoinit2()
|
||||
{
|
||||
RXSerialfifohead2 = 0U;
|
||||
RXSerialfifotail2 = 0U;
|
||||
}
|
||||
|
||||
// How full is queue
|
||||
// TODO decide if how full or how empty is preferred info to return
|
||||
uint16_t TXSerialfifolevel2()
|
||||
{
|
||||
uint32_t tail = TXSerialfifotail2;
|
||||
uint32_t head = TXSerialfifohead2;
|
||||
|
||||
if (tail > head)
|
||||
return TX_SERIAL_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
uint16_t RXSerialfifolevel2()
|
||||
{
|
||||
uint32_t tail = RXSerialfifotail2;
|
||||
uint32_t head = RXSerialfifohead2;
|
||||
|
||||
if (tail > head)
|
||||
return RX_SERIAL_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
// Flushes the transmit shift register
|
||||
// warning: this call is blocking
|
||||
void TXSerialFlush2()
|
||||
{
|
||||
// wait until the TXE shows the shift register is empty
|
||||
while (USART_GetITStatus(USART2, USART_FLAG_TXE))
|
||||
;
|
||||
}
|
||||
|
||||
uint8_t TXSerialfifoput2(uint8_t next)
|
||||
{
|
||||
if (TXSerialfifolevel2() < TX_SERIAL_FIFO_SIZE) {
|
||||
TXSerialfifo2[TXSerialfifohead2] = next;
|
||||
|
||||
TXSerialfifohead2++;
|
||||
if (TXSerialfifohead2 >= TX_SERIAL_FIFO_SIZE)
|
||||
TXSerialfifohead2 = 0U;
|
||||
|
||||
// make sure transmit interrupts are enabled as long as there is data to send
|
||||
USART_ITConfig(USART2, USART_IT_TXE, ENABLE);
|
||||
return 1U;
|
||||
} else {
|
||||
return 0U; // signal an overflow occurred by returning a zero count
|
||||
}
|
||||
}
|
||||
|
||||
void USART2_IRQHandler()
|
||||
{
|
||||
uint8_t c;
|
||||
|
||||
if (USART_GetITStatus(USART2, USART_IT_RXNE)) {
|
||||
c = (uint8_t) USART_ReceiveData(USART2);
|
||||
|
||||
if (RXSerialfifolevel2() < RX_SERIAL_FIFO_SIZE) {
|
||||
RXSerialfifo2[RXSerialfifohead2] = c;
|
||||
|
||||
RXSerialfifohead2++;
|
||||
if (RXSerialfifohead2 >= RX_SERIAL_FIFO_SIZE)
|
||||
RXSerialfifohead2 = 0U;
|
||||
} else {
|
||||
// TODO - do something if rx fifo is full?
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(USART2, USART_IT_RXNE);
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(USART2, USART_IT_TXE)) {
|
||||
c = 0U;
|
||||
|
||||
if (TXSerialfifohead2 != TXSerialfifotail2) { // if the fifo is not empty
|
||||
c = TXSerialfifo2[TXSerialfifotail2];
|
||||
|
||||
TXSerialfifotail2++;
|
||||
if (TXSerialfifotail2 >= TX_SERIAL_FIFO_SIZE)
|
||||
TXSerialfifotail2 = 0U;
|
||||
|
||||
USART_SendData(USART2, c);
|
||||
} else { // if there's no more data to transmit then turn off TX interrupts
|
||||
USART_ITConfig(USART2, USART_IT_TXE, DISABLE);
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(USART2, USART_IT_TXE);
|
||||
}
|
||||
}
|
||||
|
||||
void InitUSART2(int speed)
|
||||
{
|
||||
// USART2 - TXD PA2 - RXD PA3
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
USART_InitTypeDef USART_InitStructure;
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
|
||||
GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_USART2);
|
||||
GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_USART2);
|
||||
|
||||
// USART IRQ init
|
||||
NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
|
||||
// Configure USART as alternate function
|
||||
GPIO_StructInit(&GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3; // Tx | Rx
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Fast_Speed;
|
||||
GPIO_Init(GPIOA, &GPIO_InitStructure);
|
||||
|
||||
// Configure USART baud rate
|
||||
USART_StructInit(&USART_InitStructure);
|
||||
USART_InitStructure.USART_BaudRate = speed;
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No;
|
||||
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
USART_Init(USART2, &USART_InitStructure);
|
||||
|
||||
USART_Cmd(USART2, ENABLE);
|
||||
|
||||
USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
|
||||
|
||||
// initialize the fifos
|
||||
TXSerialfifoinit2();
|
||||
RXSerialfifoinit2();
|
||||
}
|
||||
|
||||
uint8_t AvailUSART2()
|
||||
{
|
||||
if (RXSerialfifolevel2() > 0U)
|
||||
return 1U;
|
||||
else
|
||||
return 0U;
|
||||
}
|
||||
|
||||
int AvailForWriteUSART2()
|
||||
{
|
||||
return TX_SERIAL_FIFO_SIZE - TXSerialfifolevel2();
|
||||
}
|
||||
|
||||
uint8_t ReadUSART2()
|
||||
{
|
||||
uint8_t data_c = RXSerialfifo2[RXSerialfifotail2];
|
||||
|
||||
RXSerialfifotail2++;
|
||||
if (RXSerialfifotail2 >= RX_SERIAL_FIFO_SIZE)
|
||||
RXSerialfifotail2 = 0U;
|
||||
|
||||
return data_c;
|
||||
}
|
||||
|
||||
void WriteUSART2(const uint8_t* data, uint16_t length)
|
||||
{
|
||||
for (uint16_t i = 0U; i < length; i++)
|
||||
TXSerialfifoput2(data[i]);
|
||||
|
||||
USART_ITConfig(USART2, USART_IT_TXE, ENABLE);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/* ************* USART3 ***************** */
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
|
||||
volatile uint8_t TXSerialfifo3[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo3[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead3, TXSerialfifotail3;
|
||||
volatile uint16_t RXSerialfifohead3, RXSerialfifotail3;
|
||||
|
||||
// Init queues
|
||||
void TXSerialfifoinit3()
|
||||
{
|
||||
TXSerialfifohead3 = 0U;
|
||||
TXSerialfifotail3 = 0U;
|
||||
}
|
||||
|
||||
void RXSerialfifoinit3()
|
||||
{
|
||||
RXSerialfifohead3 = 0U;
|
||||
RXSerialfifotail3 = 0U;
|
||||
}
|
||||
|
||||
// How full is queue
|
||||
// TODO decide if how full or how empty is preferred info to return
|
||||
uint16_t TXSerialfifolevel3()
|
||||
{
|
||||
uint32_t tail = TXSerialfifotail3;
|
||||
uint32_t head = TXSerialfifohead3;
|
||||
|
||||
if (tail > head)
|
||||
return TX_SERIAL_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
uint16_t RXSerialfifolevel3()
|
||||
{
|
||||
uint32_t tail = RXSerialfifotail3;
|
||||
uint32_t head = RXSerialfifohead3;
|
||||
|
||||
if (tail > head)
|
||||
return RX_SERIAL_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
// Flushes the transmit shift register
|
||||
// warning: this call is blocking
|
||||
void TXSerialFlush3()
|
||||
{
|
||||
// wait until the TXE shows the shift register is empty
|
||||
while (USART_GetITStatus(USART3, USART_FLAG_TXE))
|
||||
;
|
||||
}
|
||||
|
||||
uint8_t TXSerialfifoput3(uint8_t next)
|
||||
{
|
||||
if (TXSerialfifolevel3() < TX_SERIAL_FIFO_SIZE) {
|
||||
TXSerialfifo3[TXSerialfifohead3] = next;
|
||||
|
||||
TXSerialfifohead3++;
|
||||
if (TXSerialfifohead3 >= TX_SERIAL_FIFO_SIZE)
|
||||
TXSerialfifohead3 = 0U;
|
||||
|
||||
// make sure transmit interrupts are enabled as long as there is data to send
|
||||
USART_ITConfig(USART3, USART_IT_TXE, ENABLE);
|
||||
return 1U;
|
||||
} else {
|
||||
return 0U; // signal an overflow occurred by returning a zero count
|
||||
}
|
||||
}
|
||||
|
||||
void USART3_IRQHandler()
|
||||
{
|
||||
uint8_t c;
|
||||
|
||||
if (USART_GetITStatus(USART3, USART_IT_RXNE)) {
|
||||
c = (uint8_t) USART_ReceiveData(USART3);
|
||||
|
||||
if (RXSerialfifolevel3() < RX_SERIAL_FIFO_SIZE) {
|
||||
RXSerialfifo3[RXSerialfifohead3] = c;
|
||||
|
||||
RXSerialfifohead3++;
|
||||
if (RXSerialfifohead3 >= RX_SERIAL_FIFO_SIZE)
|
||||
RXSerialfifohead3 = 0U;
|
||||
} else {
|
||||
// TODO - do something if rx fifo is full?
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(USART3, USART_IT_RXNE);
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(USART3, USART_IT_TXE)) {
|
||||
c = 0U;
|
||||
|
||||
if (TXSerialfifohead3 != TXSerialfifotail3) { // if the fifo is not empty
|
||||
c = TXSerialfifo3[TXSerialfifotail3];
|
||||
|
||||
TXSerialfifotail3++;
|
||||
if (TXSerialfifotail3 >= TX_SERIAL_FIFO_SIZE)
|
||||
TXSerialfifotail3 = 0U;
|
||||
|
||||
USART_SendData(USART3, c);
|
||||
} else { // if there's no more data to transmit then turn off TX interrupts
|
||||
USART_ITConfig(USART3, USART_IT_TXE, DISABLE);
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(USART3, USART_IT_TXE);
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(STM32F7_NUCLEO)
|
||||
// USART3 - TXD PD8 - RXD PD9
|
||||
#define USART3_GPIO_PinSource_TX GPIO_PinSource8
|
||||
#define USART3_GPIO_PinSource_RX GPIO_PinSource9
|
||||
#define USART3_GPIO_Pin_TX GPIO_Pin_8
|
||||
#define USART3_GPIO_Pin_RX GPIO_Pin_9
|
||||
#define USART3_GPIO_PORT GPIOD
|
||||
#define USART3_RCC_Periph RCC_AHB1Periph_GPIOD
|
||||
#else
|
||||
// USART3 - TXD PC10 - RXD PC11
|
||||
#define USART3_GPIO_PinSource_TX GPIO_PinSource10
|
||||
#define USART3_GPIO_PinSource_RX GPIO_PinSource11
|
||||
#define USART3_GPIO_Pin_TX GPIO_Pin_10
|
||||
#define USART3_GPIO_Pin_RX GPIO_Pin_11
|
||||
#define USART3_GPIO_PORT GPIOC
|
||||
#define USART3_RCC_Periph RCC_AHB1Periph_GPIOC
|
||||
#endif
|
||||
|
||||
void InitUSART3(int speed)
|
||||
{
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
USART_InitTypeDef USART_InitStructure;
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
RCC_AHB1PeriphClockCmd(USART3_RCC_Periph, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
|
||||
GPIO_PinAFConfig(USART3_GPIO_PORT, USART3_GPIO_PinSource_TX, GPIO_AF_USART3);
|
||||
GPIO_PinAFConfig(USART3_GPIO_PORT, USART3_GPIO_PinSource_RX, GPIO_AF_USART3);
|
||||
|
||||
// USART IRQ init
|
||||
NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
|
||||
// Configure USART as alternate function
|
||||
GPIO_StructInit(&GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_Pin = USART3_GPIO_Pin_TX | USART3_GPIO_Pin_RX; // Tx | Rx
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Fast_Speed;
|
||||
GPIO_Init(USART3_GPIO_PORT, &GPIO_InitStructure);
|
||||
|
||||
// Configure USART baud rate
|
||||
USART_StructInit(&USART_InitStructure);
|
||||
USART_InitStructure.USART_BaudRate = speed;
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No;
|
||||
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
USART_Init(USART3, &USART_InitStructure);
|
||||
|
||||
USART_Cmd(USART3, ENABLE);
|
||||
|
||||
USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
|
||||
|
||||
// initialize the fifos
|
||||
TXSerialfifoinit3();
|
||||
RXSerialfifoinit3();
|
||||
}
|
||||
|
||||
uint8_t AvailUSART3()
|
||||
{
|
||||
if (RXSerialfifolevel3() > 0U)
|
||||
return 1U;
|
||||
else
|
||||
return 0U;
|
||||
}
|
||||
|
||||
int AvailForWriteUSART3()
|
||||
{
|
||||
return TX_SERIAL_FIFO_SIZE - TXSerialfifolevel3();
|
||||
}
|
||||
|
||||
uint8_t ReadUSART3()
|
||||
{
|
||||
uint8_t data_c = RXSerialfifo3[RXSerialfifotail3];
|
||||
|
||||
RXSerialfifotail3++;
|
||||
if (RXSerialfifotail3 >= RX_SERIAL_FIFO_SIZE)
|
||||
RXSerialfifotail3 = 0U;
|
||||
|
||||
return data_c;
|
||||
}
|
||||
|
||||
void WriteUSART3(const uint8_t* data, uint16_t length)
|
||||
{
|
||||
for (uint16_t i = 0U; i < length; i++)
|
||||
TXSerialfifoput3(data[i]);
|
||||
|
||||
USART_ITConfig(USART3, USART_IT_TXE, ENABLE);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/* ************* UART5 ***************** */
|
||||
#if !(defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
|
||||
|
||||
volatile uint8_t TXSerialfifo5[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo5[RX_SERIAL_FIFO_SIZE];
|
||||
volatile uint16_t TXSerialfifohead5, TXSerialfifotail5;
|
||||
volatile uint16_t RXSerialfifohead5, RXSerialfifotail5;
|
||||
|
||||
// Init queues
|
||||
void TXSerialfifoinit5()
|
||||
{
|
||||
TXSerialfifohead5 = 0U;
|
||||
TXSerialfifotail5 = 0U;
|
||||
}
|
||||
|
||||
void RXSerialfifoinit5()
|
||||
{
|
||||
RXSerialfifohead5 = 0U;
|
||||
RXSerialfifotail5 = 0U;
|
||||
}
|
||||
|
||||
// How full is queue
|
||||
// TODO decide if how full or how empty is preferred info to return
|
||||
uint16_t TXSerialfifolevel5()
|
||||
{
|
||||
uint32_t tail = TXSerialfifotail5;
|
||||
uint32_t head = TXSerialfifohead5;
|
||||
|
||||
if (tail > head)
|
||||
return TX_SERIAL_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
uint16_t RXSerialfifolevel5()
|
||||
{
|
||||
uint32_t tail = RXSerialfifotail5;
|
||||
uint32_t head = RXSerialfifohead5;
|
||||
|
||||
if (tail > head)
|
||||
return RX_SERIAL_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
// Flushes the transmit shift register
|
||||
// warning: this call is blocking
|
||||
void TXSerialFlush5()
|
||||
{
|
||||
// wait until the TXE shows the shift register is empty
|
||||
while (USART_GetITStatus(UART5, USART_FLAG_TXE))
|
||||
;
|
||||
}
|
||||
|
||||
uint8_t TXSerialfifoput5(uint8_t next)
|
||||
{
|
||||
if (TXSerialfifolevel5() < TX_SERIAL_FIFO_SIZE) {
|
||||
TXSerialfifo5[TXSerialfifohead5] = next;
|
||||
|
||||
TXSerialfifohead5++;
|
||||
if (TXSerialfifohead5 >= TX_SERIAL_FIFO_SIZE)
|
||||
TXSerialfifohead5 = 0U;
|
||||
|
||||
// make sure transmit interrupts are enabled as long as there is data to send
|
||||
USART_ITConfig(UART5, USART_IT_TXE, ENABLE);
|
||||
return 1U;
|
||||
} else {
|
||||
return 0U; // signal an overflow occurred by returning a zero count
|
||||
}
|
||||
}
|
||||
|
||||
void UART5_IRQHandler()
|
||||
{
|
||||
uint8_t c;
|
||||
|
||||
if (USART_GetITStatus(UART5, USART_IT_RXNE)) {
|
||||
c = (uint8_t) USART_ReceiveData(UART5);
|
||||
|
||||
if (RXSerialfifolevel5() < RX_SERIAL_FIFO_SIZE) {
|
||||
RXSerialfifo5[RXSerialfifohead5] = c;
|
||||
|
||||
RXSerialfifohead5++;
|
||||
if (RXSerialfifohead5 >= RX_SERIAL_FIFO_SIZE)
|
||||
RXSerialfifohead5 = 0U;
|
||||
} else {
|
||||
// TODO - do something if rx fifo is full?
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(UART5, USART_IT_RXNE);
|
||||
}
|
||||
|
||||
if (USART_GetITStatus(UART5, USART_IT_TXE)) {
|
||||
c = 0U;
|
||||
|
||||
if (TXSerialfifohead5 != TXSerialfifotail5) { // if the fifo is not empty
|
||||
c = TXSerialfifo5[TXSerialfifotail5];
|
||||
|
||||
TXSerialfifotail5++;
|
||||
if (TXSerialfifotail5 >= TX_SERIAL_FIFO_SIZE)
|
||||
TXSerialfifotail5 = 0U;
|
||||
|
||||
USART_SendData(UART5, c);
|
||||
} else { // if there's no more data to transmit then turn off TX interrupts
|
||||
USART_ITConfig(UART5, USART_IT_TXE, DISABLE);
|
||||
}
|
||||
|
||||
USART_ClearITPendingBit(UART5, USART_IT_TXE);
|
||||
}
|
||||
}
|
||||
|
||||
void InitUART5(int speed)
|
||||
{
|
||||
// UART5 - TXD PC12 - RXD PD2
|
||||
GPIO_InitTypeDef GPIO_InitStructure;
|
||||
USART_InitTypeDef USART_InitStructure;
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART5, ENABLE);
|
||||
GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_UART5);
|
||||
GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_UART5);
|
||||
|
||||
// USART IRQ init
|
||||
NVIC_InitStructure.NVIC_IRQChannel = UART5_IRQn;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
|
||||
// Configure USART as alternate function
|
||||
GPIO_StructInit(&GPIO_InitStructure);
|
||||
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
|
||||
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; // Tx
|
||||
GPIO_InitStructure.GPIO_Speed = GPIO_Fast_Speed;
|
||||
GPIO_Init(GPIOC, &GPIO_InitStructure);
|
||||
|
||||
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; // Rx
|
||||
GPIO_Init(GPIOD, &GPIO_InitStructure);
|
||||
|
||||
// Configure USART baud rate
|
||||
USART_StructInit(&USART_InitStructure);
|
||||
USART_InitStructure.USART_BaudRate = speed;
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No;
|
||||
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
USART_Init(UART5, &USART_InitStructure);
|
||||
|
||||
USART_Cmd(UART5, ENABLE);
|
||||
|
||||
USART_ITConfig(UART5, USART_IT_RXNE, ENABLE);
|
||||
|
||||
// initialize the fifos
|
||||
TXSerialfifoinit5();
|
||||
RXSerialfifoinit5();
|
||||
}
|
||||
|
||||
uint8_t AvailUART5()
|
||||
{
|
||||
if (RXSerialfifolevel5() > 0U)
|
||||
return 1U;
|
||||
else
|
||||
return 0U;
|
||||
}
|
||||
|
||||
int AvailForWriteUART5()
|
||||
{
|
||||
return TX_SERIAL_FIFO_SIZE - TXSerialfifolevel5();
|
||||
}
|
||||
|
||||
uint8_t ReadUART5()
|
||||
{
|
||||
uint8_t data_c = RXSerialfifo5[RXSerialfifotail5];
|
||||
|
||||
RXSerialfifotail5++;
|
||||
if (RXSerialfifotail5 >= RX_SERIAL_FIFO_SIZE)
|
||||
RXSerialfifotail5 = 0U;
|
||||
|
||||
return data_c;
|
||||
}
|
||||
|
||||
void WriteUART5(const uint8_t* data, uint16_t length)
|
||||
{
|
||||
for (uint16_t i = 0U; i < length; i++)
|
||||
TXSerialfifoput5(data[i]);
|
||||
|
||||
USART_ITConfig(UART5, USART_IT_TXE, ENABLE);
|
||||
}
|
||||
|
||||
#endif
|
||||
/////////////////////////////////////////////////////////////////
|
||||
|
||||
void CSerialPort::beginInt(uint8_t n, int speed)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
InitUSART3(speed);
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
|
||||
InitUSART1(speed);
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
InitUSART2(speed);
|
||||
#elif defined(DRCC_DVM)
|
||||
InitUSART1(speed);
|
||||
#endif
|
||||
break;
|
||||
case 3U:
|
||||
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
||||
InitUSART1(speed);
|
||||
#elif defined(DRCC_DVM)
|
||||
InitUSART2(speed);
|
||||
#else
|
||||
InitUART5(speed);
|
||||
#endif
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
int CSerialPort::availableInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
return AvailUSART3();
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
|
||||
return AvailUSART1();
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
return AvailUSART2();
|
||||
#elif defined(DRCC_DVM)
|
||||
return AvailUSART1();
|
||||
#endif
|
||||
case 3U:
|
||||
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
||||
return AvailUSART1();
|
||||
#elif defined(DRCC_DVM)
|
||||
return AvailUSART2();
|
||||
#else
|
||||
return AvailUART5();
|
||||
#endif
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
int CSerialPort::availableForWriteInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
return AvailForWriteUSART3();
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
|
||||
return AvailForWriteUSART1();
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
return AvailForWriteUSART2();
|
||||
#elif defined(DRCC_DVM)
|
||||
return AvailForWriteUSART1();
|
||||
#endif
|
||||
case 3U:
|
||||
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
||||
return AvailForWriteUSART1();
|
||||
#elif defined(DRCC_DVM)
|
||||
return AvailForWriteUSART2();
|
||||
#else
|
||||
return AvailForWriteUART5();
|
||||
#endif
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t CSerialPort::readInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
return ReadUSART3();
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
|
||||
return ReadUSART1();
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
return ReadUSART2();
|
||||
#elif defined(DRCC_DVM)
|
||||
return ReadUSART1();
|
||||
#endif
|
||||
case 3U:
|
||||
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
||||
return ReadUSART1();
|
||||
#elif defined(DRCC_DVM)
|
||||
return ReadUSART2();
|
||||
#else
|
||||
return ReadUART5();
|
||||
#endif
|
||||
default:
|
||||
return 0U;
|
||||
}
|
||||
}
|
||||
|
||||
void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
WriteUSART3(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush3();
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
|
||||
WriteUSART1(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush1();
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
WriteUSART2(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush2();
|
||||
#elif defined(DRCC_DVM)
|
||||
WriteUSART1(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush1();
|
||||
#endif
|
||||
break;
|
||||
case 3U:
|
||||
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
||||
WriteUSART1(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush1();
|
||||
#elif defined(DRCC_DVM)
|
||||
WriteUSART2(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush2();
|
||||
#else
|
||||
WriteUART5(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush5();
|
||||
#endif
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -1,160 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2017 by Wojciech Krutnik N0CALL
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
#include "RingBuff.h"
|
||||
|
||||
#include "SerialPort.h"
|
||||
|
||||
/*
|
||||
Pin definitions (configuration in IOSTM_CMSIS.c):
|
||||
|
||||
- Host communication:
|
||||
USART1 - TXD PA9 - RXD PA10
|
||||
|
||||
*/
|
||||
|
||||
|
||||
#if defined(STM32F1)
|
||||
|
||||
// BaudRate calculator macro
|
||||
// source: STM32 HAL Library (stm32f1xx_hal_usart.h)
|
||||
#define USART_DIV(__PCLK__, __BAUD__) (((__PCLK__)*25)/(4*(__BAUD__)))
|
||||
#define USART_DIVMANT(__PCLK__, __BAUD__) (USART_DIV((__PCLK__), (__BAUD__))/100)
|
||||
#define USART_DIVFRAQ(__PCLK__, __BAUD__) (((USART_DIV((__PCLK__), (__BAUD__)) - (USART_DIVMANT((__PCLK__), (__BAUD__)) * 100)) * 16 + 50) / 100)
|
||||
#define USART_BRR(__PCLK__, __BAUD__) ((USART_DIVMANT((__PCLK__), (__BAUD__)) << 4)|(USART_DIVFRAQ((__PCLK__), (__BAUD__)) & 0x0F))
|
||||
|
||||
#define USART_BUFFER_SIZE 256U
|
||||
DECLARE_RINGBUFFER_TYPE(USARTBuffer, USART_BUFFER_SIZE);
|
||||
|
||||
/* ************* USART1 ***************** */
|
||||
static volatile USARTBuffer_t txBuffer1={.size=USART_BUFFER_SIZE};
|
||||
static volatile USARTBuffer_t rxBuffer1={.size=USART_BUFFER_SIZE};
|
||||
|
||||
|
||||
extern "C" {
|
||||
bitband_t txe = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_TXE_Pos);
|
||||
bitband_t rxne = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_RXNE_Pos);
|
||||
bitband_t txeie = (bitband_t)BITBAND_PERIPH(&USART1->CR1, USART_CR1_TXEIE_Pos);
|
||||
|
||||
RAMFUNC void USART1_IRQHandler()
|
||||
{
|
||||
/* Transmitting data */
|
||||
if(*txe){
|
||||
if(!(RINGBUFF_EMPTY(txBuffer1))){
|
||||
USART1->DR = RINGBUFF_READ(txBuffer1);
|
||||
}else{ /* Buffer empty */
|
||||
*txeie = 0; /* Don't send further data */
|
||||
}
|
||||
}
|
||||
|
||||
/* Receiving data */
|
||||
if(*rxne){
|
||||
RINGBUFF_WRITE(rxBuffer1, USART1->DR);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void USART1Init(int speed)
|
||||
{
|
||||
RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
|
||||
|
||||
USART1->BRR = USART_BRR(72000000UL, speed);
|
||||
|
||||
USART1->CR1 = USART_CR1_UE | USART_CR1_TE |
|
||||
USART_CR1_RE | USART_CR1_RXNEIE; // Enable USART and RX interrupt
|
||||
NVIC_EnableIRQ(USART1_IRQn);
|
||||
}
|
||||
|
||||
RAMFUNC void USART1TxData(const uint8_t* data, uint16_t length)
|
||||
{
|
||||
NVIC_DisableIRQ(USART1_IRQn);
|
||||
|
||||
/* Check remaining space in buffer */
|
||||
if(RINGBUFF_COUNT(txBuffer1) + length > RINGBUFF_SIZE(txBuffer1)){
|
||||
NVIC_EnableIRQ(USART1_IRQn);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Append data to buffer */
|
||||
while(length--){
|
||||
RINGBUFF_WRITE(txBuffer1, *(data++));
|
||||
}
|
||||
|
||||
/* Start sending data */
|
||||
USART1->CR1 |= USART_CR1_TXEIE;
|
||||
|
||||
NVIC_EnableIRQ(USART1_IRQn);
|
||||
}
|
||||
|
||||
|
||||
/////////////////////////////////////////////////////////////////
|
||||
|
||||
void CSerialPort::beginInt(uint8_t n, int speed)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
USART1Init(speed);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
int CSerialPort::availableInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return !RINGBUFF_EMPTY(rxBuffer1);
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t CSerialPort::readInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return RINGBUFF_READ(rxBuffer1);
|
||||
default:
|
||||
return 0U;
|
||||
}
|
||||
}
|
||||
|
||||
void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
|
||||
{
|
||||
bitband_t tc = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_TC_Pos);
|
||||
|
||||
switch (n) {
|
||||
case 1U:
|
||||
USART1TxData(data, length);
|
||||
*tc = 0;
|
||||
|
||||
if (flush) {
|
||||
while (!RINGBUFF_EMPTY(txBuffer1) || !tc)
|
||||
;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -1,46 +0,0 @@
|
||||
# based on https://github.com/berndporr/iir_fixed_point/blob/master/gen_coeff.py
|
||||
|
||||
import numpy as np
|
||||
import scipy.signal as signal
|
||||
import pylab as pl
|
||||
|
||||
# Calculate the coefficients for a pure fixed point
|
||||
# integer filter
|
||||
|
||||
# sampling rate
|
||||
fs = 24000
|
||||
|
||||
# cutoffs
|
||||
f1 = 300
|
||||
f2 = 2700
|
||||
# ripple
|
||||
rp = 0.2
|
||||
|
||||
# scaling factor in bits, do not change !
|
||||
q = 0
|
||||
# scaling factor as facor...
|
||||
scaling_factor = 2**q
|
||||
|
||||
# let's generate a sequence of 2nd order IIR filters
|
||||
sos = signal.cheby1(3,rp,[f1, f2],'bandpass', output='sos', fs=fs)
|
||||
#sos = signal.cheby1(1, rp, 2122, 'lowpass', output='sos', fs=fs) #deemphasis filter
|
||||
#sos = signal.cheby1(1, rp, 2122, 'highpass', output='sos', fs=fs) #deemphasis filter
|
||||
|
||||
#sos = np.round((sos) * scaling_factor)
|
||||
|
||||
# print coefficients
|
||||
for biquad in sos:
|
||||
for coeff in biquad:
|
||||
#print(int(coeff),",",sep="",end="")
|
||||
print((coeff),",",sep="",end="")
|
||||
print("")
|
||||
|
||||
# plot the frequency response
|
||||
b,a = signal.sos2tf(sos)
|
||||
w,h = signal.freqz(b,a)
|
||||
pl.plot(w/np.pi/2*fs,20*np.log(np.abs(h)))
|
||||
pl.xlabel('frequency/Hz');
|
||||
pl.ylabel('gain/dB');
|
||||
pl.ylim(top=1,bottom=-20);
|
||||
pl.xlim(left=250, right=12000);
|
||||
pl.show()
|
||||
@@ -1,58 +0,0 @@
|
||||
% GNU Octave script to generate pre and deemphasis filters
|
||||
% https://dsp.stackexchange.com/questions/34605/biquad-cookbook-formula-for-broadcast-fm-de-emphasis
|
||||
% PACKAGES
|
||||
|
||||
pkg load control
|
||||
pkg load signal
|
||||
|
||||
clear all;
|
||||
clc;
|
||||
|
||||
fs = 24000;
|
||||
samplingtime = 1/fs;
|
||||
|
||||
% analog prototype
|
||||
A2 = [1];
|
||||
B2 = [0.000075 1];
|
||||
|
||||
% Pre
|
||||
Ds = tf(B2, A2);
|
||||
% De
|
||||
% Ds = tf(A2, B2);
|
||||
|
||||
Ds = Ds/dcgain(Ds);
|
||||
|
||||
% MZT
|
||||
T1 = 0.000075; % 75us
|
||||
z1 = -exp(-1.0/(fs*T1));
|
||||
p1 = 1+z1;
|
||||
|
||||
a0 = 1.0;
|
||||
a1 = p1;
|
||||
a2 = 0;
|
||||
|
||||
b0 = 1.0;
|
||||
b1 = z1;
|
||||
b2 = 0;
|
||||
|
||||
% swap between a1, b1 to select pre- or de-emphasis
|
||||
|
||||
# Pre
|
||||
Bmzt = [b0 a1 b2]
|
||||
Amzt = [a0 b1 a2]
|
||||
% De
|
||||
% Bmzt = [b0 b1 b2]
|
||||
% Amzt = [a0 a1 a2]
|
||||
|
||||
DzMZT = tf(Amzt, Bmzt, samplingtime);
|
||||
DzMZT = DzMZT/dcgain(DzMZT);
|
||||
|
||||
%% Plot
|
||||
wmin = 2 * pi * 20.0; % 20Hz
|
||||
wmax = 2 * pi * ((fs/2.0) - (fs/2 - 20000)); %20kHz
|
||||
|
||||
figure(1);
|
||||
bode(Ds, 'b', DzMZT, 'c', {wmin, wmax});
|
||||
legend('Analog prototype', 'MZT 2nd order','location', 'northwest');
|
||||
grid on;
|
||||
pause();
|
||||
@@ -1,98 +0,0 @@
|
||||
#!/bin/bash
|
||||
|
||||
###############################################################################
|
||||
#
|
||||
# mmdvmmenu.sh
|
||||
#
|
||||
# Copyright (C) 2016 by Paul Nannery KC2VRJ
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
#
|
||||
###############################################################################
|
||||
#
|
||||
# On a Linux based system, such as a Raspberry Pi, this script will perform
|
||||
# Modification of the Config.h file for most options. It makes a Back up when
|
||||
# you start the script if none is present. You must recompile and load firmware
|
||||
# onto the Arduino Due if changes are made.
|
||||
#
|
||||
###############################################################################
|
||||
#
|
||||
# CONFIGURATION
|
||||
#
|
||||
# Location of Config.h
|
||||
conf=Config.h
|
||||
#Location of backup file
|
||||
confbak=Config.h.bak
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Do not edit below here
|
||||
#
|
||||
###############################################################################
|
||||
|
||||
|
||||
|
||||
# Check for backup file and make one if not present
|
||||
|
||||
if [ ! -f $confbak ];then
|
||||
|
||||
cp -f $conf $confbak
|
||||
|
||||
fi
|
||||
|
||||
while :
|
||||
do
|
||||
clear
|
||||
cat<<EOF
|
||||
==============================================================
|
||||
MMDVM Configuration Options
|
||||
--------------------------------------------------------------
|
||||
Please enter your choice:
|
||||
|
||||
(1) Enable 12.000 MHZ Clock
|
||||
(2) Enable 12.288 MHZ Clock
|
||||
(3) Enable 14.400 MHz Clock
|
||||
(4) Enable 19.200 MHz Clock
|
||||
(5) Use the COS to lockout the modem
|
||||
(6) Use pins to output the current mode
|
||||
(7) Use layout for the PAPA board
|
||||
(8) Use layout for ZUM V1.0 and V1.0.1 boards
|
||||
(9) Use layout for SP8NTH board
|
||||
(0) Use modem as display driver
|
||||
(A) Return to Default
|
||||
|
||||
(Q)uit
|
||||
---------------------------------------------------------------
|
||||
EOF
|
||||
read -n1 -s
|
||||
case "$REPLY" in
|
||||
"1") sed -e 's/\/\/ #define EXTERNAL_OSC 12000000/#define EXTERNAL_OSC 12000000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "12.000 MHz clock enabled";;
|
||||
"2") sed -e 's/\/\/ #define EXTERNAL_OSC 12288000/#define EXTERNAL_OSC 12288000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "12.288 MHz clock enabled";;
|
||||
"3") sed -e 's/\/\/ #define EXTERNAL_OSC 14400000/#define EXTERNAL_OSC 14400000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "14.400 MHz clock enabled";;
|
||||
"4") sed -e 's/\/\/ #define EXTERNAL_OSC 19200000/#define EXTERNAL_OSC 19200000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "19.200 MHz clock enabled";;
|
||||
"5") sed -e 's/\/\/ #define USE_COS_AS_LOCKOUT /#define USE_COS_AS_LOCKOUT/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "COS as Lockout enabled";;
|
||||
"6") sed -e 's/\/\/ #define MODE_LEDS/#define MODE_LEDS/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Mode pins enabled";;
|
||||
"7") sed -e 's/\/\/ #define ARDUINO_DUE_PAPA/#define ARDUINO_DUE_PAPA/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for the PAPA board enabled";;
|
||||
"8") sed -e 's/\/\/ #define ARDUINO_DUE_ZUM_V10/#define ARDUINO_DUE_ZUM_V10/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for ZUM V1.0 and V1.0.1 boards enabled";;
|
||||
"9") sed -e 's/\/\/ #define ARDUINO_DUE_NTH/#define ARDUINO_DUE_NTH/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for SP8NTH board enabled";;
|
||||
"0") sed -e 's/\/\/ #define SERIAL_REPEATER/#define SERIAL_REPEATER/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Modem display driver enabled";;
|
||||
"A") mv -f $confbak $conf ;;
|
||||
"a") mv -f $confbak $conf ;;
|
||||
"Q") echo "If any changes are made you need to (re-)upload the firmware to MMDVM" && exit;;
|
||||
"q") echo "If any changes are made you need to (re-)upload the firmware to MMDVM" && exit;;
|
||||
* ) echo "invalid option" ;;
|
||||
esac
|
||||
sleep 1
|
||||
done
|
||||
@@ -1,2 +0,0 @@
|
||||
source [find interface/stlink-v2.cfg]
|
||||
source [find target/stm32f1x.cfg]
|
||||
@@ -1,96 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _PINS_F4_DISCOVERY_H
|
||||
#define _PINS_F4_DISCOVERY_H
|
||||
|
||||
/*
|
||||
Pin definitions for STM32F4 Discovery Board:
|
||||
|
||||
PTT PB13 output P1 Pin37
|
||||
COSLED PA7 output P1 Pin17
|
||||
LED PD15 output P1 Pin47
|
||||
COS PA5 input P1 Pin15
|
||||
|
||||
DSTAR PD12 output P1 Pin44
|
||||
DMR PD13 output P1 Pin45
|
||||
YSF PD14 output P1 Pin46
|
||||
P25 PD11 output P1 Pin43
|
||||
NXDN PD10 output P1 Pin42
|
||||
|
||||
RX PA0 analog input P1 Pin12
|
||||
RSSI PA1 analog input P1 Pin11
|
||||
TX PA4 analog output P1 Pin16
|
||||
|
||||
EXT_CLK PA15 input P2 Pin40
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_5
|
||||
#define PORT_COS GPIOA
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_PTT GPIO_Pin_13
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_7
|
||||
#define PORT_COSLED GPIOA
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_LED GPIO_Pin_15
|
||||
#define PORT_LED GPIOD
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOD
|
||||
|
||||
#define PIN_P25 GPIO_Pin_11
|
||||
#define PORT_P25 GPIOD
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOD
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_10
|
||||
#define PORT_NXDN GPIOD
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOD
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_12
|
||||
#define PORT_DSTAR GPIOD
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOD
|
||||
|
||||
#define PIN_DMR GPIO_Pin_13
|
||||
#define PORT_DMR GPIOD
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOD
|
||||
|
||||
#define PIN_YSF GPIO_Pin_14
|
||||
#define PORT_YSF GPIOD
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOD
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_1
|
||||
#define PIN_RSSI_CH ADC_Channel_1
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#endif
|
||||
@@ -1,144 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _PINS_F4_DRCC_NQF_H
|
||||
#define _PINS_F4_DRCC_NQF_H
|
||||
|
||||
/*
|
||||
Pin definitions for DRCC_DVM BG7NQF board rev1
|
||||
|
||||
TX/PTT_LED PB12 output
|
||||
RX/COS_LED PB5 output
|
||||
STATUS_LED PB10 output
|
||||
|
||||
COS_IN PB13 input
|
||||
|
||||
DSTAR N/A
|
||||
DMR N/A
|
||||
YSF N/A
|
||||
P25 N/A
|
||||
NXDN N/A
|
||||
POCSAG N/A
|
||||
|
||||
MDMR/BIT0 PB8 output
|
||||
MYSF/BIT1 PB9 output
|
||||
MDSTAR/BIT2 PB14 output
|
||||
MP25/BIT3 PB15 output Generic Mode Pins
|
||||
MNXDN N/A
|
||||
MPOCSAG N/A
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA1 analog input
|
||||
TX PA4 analog output
|
||||
|
||||
EXT_CLK PA15 input
|
||||
|
||||
UART1_TX PA9 output
|
||||
UART1_RX PA10 output Host Data Communication
|
||||
|
||||
UART2_TX PA2 output
|
||||
UART2_RX PA3 output Nextion Data Communication
|
||||
|
||||
I2C1_SCL PB6 output
|
||||
I2C1_SDA PB7 output OLED Data Communication as master
|
||||
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_13
|
||||
#define PORT_COS GPIOB
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_PTT GPIO_Pin_12
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_5
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_10
|
||||
#define PORT_LED GPIOB
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_TXLED GPIO_Pin_4
|
||||
#define PORT_TXLED GPIOB
|
||||
#define RCC_Per_TXLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
// #define PIN_P25 GPIO_Pin_3
|
||||
// #define PORT_P25 GPIOB
|
||||
// #define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||
|
||||
// #define PIN_NXDN GPIO_Pin_10
|
||||
// #define PORT_NXDN GPIOA
|
||||
// #define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||
|
||||
// #define PIN_POCSAG GPIO_Pin_12
|
||||
// #define PORT_POCSAG GPIOB
|
||||
// #define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
// #define PIN_DSTAR GPIO_Pin_10
|
||||
// #define PORT_DSTAR GPIOB
|
||||
// #define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
|
||||
// #define PIN_DMR GPIO_Pin_4
|
||||
// #define PORT_DMR GPIOB
|
||||
// #define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||
|
||||
// #define PIN_YSF GPIO_Pin_5
|
||||
// #define PORT_YSF GPIOB
|
||||
// #define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#if defined(MODE_PINS)
|
||||
#define PIN_MP25 GPIO_Pin_15
|
||||
#define PORT_MP25 GPIOB
|
||||
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_MDSTAR GPIO_Pin_9
|
||||
#define PORT_MDSTAR GPIOB
|
||||
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_MDMR GPIO_Pin_8
|
||||
#define PORT_MDMR GPIOB
|
||||
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_MYSF GPIO_Pin_14
|
||||
#define PORT_MYSF GPIOB
|
||||
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#endif
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_1
|
||||
#define PIN_RSSI_CH ADC_Channel_1
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
#define PORT_TX GPIOA
|
||||
#define RCC_Per_TX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#endif
|
||||
@@ -1,101 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _PINS_F4_F4M_H
|
||||
#define _PINS_F4_F4M_H
|
||||
|
||||
/*
|
||||
Pin definitions for MMDVM-F4M Pi-Hat F0DEI board:
|
||||
|
||||
PTT PB13 output
|
||||
COSLED PB14 output
|
||||
LED PB15 output
|
||||
COS PC0 input
|
||||
|
||||
DSTAR PC7 output
|
||||
DMR PC8 output
|
||||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
NXDN PB1 output
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
TX PA4 analog output
|
||||
|
||||
EXT_CLK PA15 input
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_0
|
||||
#define PORT_COS GPIOC
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_PTT GPIO_Pin_13
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_14
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_15
|
||||
#define PORT_LED GPIOB
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_P25 GPIO_Pin_9
|
||||
#define PORT_P25 GPIOC
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_1
|
||||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_DMR GPIO_Pin_8
|
||||
#define PORT_DMR GPIOC
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_YSF GPIO_Pin_8
|
||||
#define PORT_YSF GPIOA
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_7
|
||||
#define PIN_RSSI_CH ADC_Channel_7
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#endif
|
||||
@@ -1,101 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _PINS_F4_NUCLEO_ARDUINO_H
|
||||
#define _PINS_F4_NUCLEO_ARDUINO_H
|
||||
|
||||
/*
|
||||
Pin definitions for STM32F4 Nucleo boards (Arduino header):
|
||||
|
||||
PTT PB10 output CN9 Pin7
|
||||
COSLED PB3 output CN9 Pin4
|
||||
LED PB5 output CN9 Pin5
|
||||
COS PB4 input CN9 Pin6
|
||||
|
||||
DSTAR PA1 output CN8 Pin2
|
||||
DMR PA4 output CN8 Pin3
|
||||
YSF PB0 output CN8 Pin4
|
||||
P25 PC1 output CN8 Pin5
|
||||
NXDN PA3 output CN9 Pin1
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input CN8 Pin1
|
||||
RSSI PC0 analog input CN8 Pin6
|
||||
TX PA5 analog output CN5 Pin6
|
||||
|
||||
EXT_CLK PB8 input CN5 Pin10
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_4
|
||||
#define PORT_COS GPIOB
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_PTT GPIO_Pin_10
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_3
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_5
|
||||
#define PORT_LED GPIOB
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_P25 GPIO_Pin_1
|
||||
#define PORT_P25 GPIOC
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_3
|
||||
#define PORT_NXDN GPIOA
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_1
|
||||
#define PORT_DSTAR GPIOA
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_DMR GPIO_Pin_4
|
||||
#define PORT_DMR GPIOA
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_YSF GPIO_Pin_0
|
||||
#define PORT_YSF GPIOB
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_8
|
||||
#define SRC_EXT_CLK GPIO_PinSource8
|
||||
#define PORT_EXT_CLK GPIOB
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_0
|
||||
#define PIN_RSSI_CH ADC_Channel_10
|
||||
#define PORT_RSSI GPIOC
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_TX GPIO_Pin_5
|
||||
#define PIN_TX_CH DAC_Channel_2
|
||||
|
||||
#endif
|
||||
@@ -1,134 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _PINS_F4_NUCLEO_MORPHO_H
|
||||
#define _PINS_F4_NUCLEO_MORPHO_H
|
||||
|
||||
/*
|
||||
Pin definitions for STM32F4 Nucleo boards (ST Morpho header):
|
||||
|
||||
PTT PB13 output CN10 Pin30
|
||||
COSLED PB14 output CN10 Pin28
|
||||
LED PA5 output CN10 Pin11
|
||||
COS PB15 input CN10 Pin26
|
||||
|
||||
DSTAR PB10 output CN10 Pin25
|
||||
DMR PB4 output CN10 Pin27
|
||||
YSF PB5 output CN10 Pin29
|
||||
P25 PB3 output CN10 Pin31
|
||||
NXDN PA10 output CN10 Pin33
|
||||
POCSAG PB12 output CN10 Pin16
|
||||
|
||||
MDSTAR PC4 output CN10 Pin34
|
||||
MDMR PC5 output CN10 Pin6
|
||||
MYSF PC2 output CN7 Pin35
|
||||
MP25 PC3 output CN7 Pin37
|
||||
MNXDN PC6 output CN10 Pin4
|
||||
MPOCSAG PC8 output CN10 Pin2
|
||||
|
||||
RX PA0 analog input CN7 Pin28
|
||||
RSSI PA1 analog input CN7 Pin30
|
||||
TX PA4 analog output CN7 Pin32
|
||||
|
||||
EXT_CLK PA15 input CN7 Pin17
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_15
|
||||
#define PORT_COS GPIOB
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_PTT GPIO_Pin_13
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_14
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_5
|
||||
#define PORT_LED GPIOA
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_P25 GPIO_Pin_3
|
||||
#define PORT_P25 GPIOB
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_10
|
||||
#define PORT_NXDN GPIOA
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_10
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DMR GPIO_Pin_4
|
||||
#define PORT_DMR GPIOB
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_YSF GPIO_Pin_5
|
||||
#define PORT_YSF GPIOB
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#if defined(MODE_PINS)
|
||||
#define PIN_MP25 GPIO_Pin_3
|
||||
#define PORT_MP25 GPIOC
|
||||
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MNXDN GPIO_Pin_6
|
||||
#define PORT_MNXDN GPIOC
|
||||
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDSTAR GPIO_Pin_4
|
||||
#define PORT_MDSTAR GPIOC
|
||||
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDMR GPIO_Pin_5
|
||||
#define PORT_MDMR GPIOC
|
||||
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MYSF GPIO_Pin_2
|
||||
#define PORT_MYSF GPIOC
|
||||
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MPOCSAG GPIO_Pin_8
|
||||
#define PORT_MPOCSAG GPIOC
|
||||
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
|
||||
#endif
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_1
|
||||
#define PIN_RSSI_CH ADC_Channel_1
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#endif
|
||||
@@ -1,101 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _PINS_F4_PI_H
|
||||
#define _PINS_F4_PI_H
|
||||
|
||||
/*
|
||||
Pin definitions for STM32F4 Pi Board:
|
||||
|
||||
PTT PB13 output
|
||||
COSLED PB14 output
|
||||
LED PB15 output
|
||||
COS PC0 input
|
||||
|
||||
DSTAR PC7 output
|
||||
DMR PC8 output
|
||||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
NXDN PB1 output
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
TX PA4 analog output
|
||||
|
||||
EXT_CLK PA15 input
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_0
|
||||
#define PORT_COS GPIOC
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_PTT GPIO_Pin_13
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_14
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_15
|
||||
#define PORT_LED GPIOB
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_P25 GPIO_Pin_9
|
||||
#define PORT_P25 GPIOC
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_1
|
||||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_DMR GPIO_Pin_8
|
||||
#define PORT_DMR GPIOC
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_YSF GPIO_Pin_8
|
||||
#define PORT_YSF GPIOA
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_7
|
||||
#define PIN_RSSI_CH ADC_Channel_7
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#endif
|
||||
@@ -1,134 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _PINS_F4_RPT_TGO_H
|
||||
#define _PINS_F4_RPT_TGO_H
|
||||
|
||||
/*
|
||||
Pin definitions for MMDVM_RPT_Hat Pi-Hat BG4TGO board::
|
||||
|
||||
PTT PB13 output CN10 Pin30
|
||||
COSLED PB14 output CN10 Pin28
|
||||
LED PA5 output CN10 Pin11
|
||||
COS PB15 input CN10 Pin26
|
||||
|
||||
DSTAR PB10 output CN10 Pin25
|
||||
DMR PB4 output CN10 Pin27
|
||||
YSF PB5 output CN10 Pin29
|
||||
P25 PB3 output CN10 Pin31
|
||||
NXDN PA10 output CN10 Pin33
|
||||
POCSAG PB12 output CN10 Pin16
|
||||
|
||||
MDSTAR PC4 output CN10 Pin34
|
||||
MDMR PC5 output CN10 Pin6
|
||||
MYSF PC2 output CN7 Pin35
|
||||
MP25 PC3 output CN7 Pin37
|
||||
MNXDN PC6 output CN10 Pin4
|
||||
MPOCSAG PC8 output CN10 Pin2
|
||||
|
||||
RX PA0 analog input CN7 Pin28
|
||||
RSSI PA1 analog input CN7 Pin30
|
||||
TX PA4 analog output CN7 Pin32
|
||||
|
||||
EXT_CLK PA15 input CN7 Pin17
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_15
|
||||
#define PORT_COS GPIOB
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_PTT GPIO_Pin_13
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_14
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_5
|
||||
#define PORT_LED GPIOA
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_P25 GPIO_Pin_3
|
||||
#define PORT_P25 GPIOB
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_10
|
||||
#define PORT_NXDN GPIOA
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_10
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DMR GPIO_Pin_4
|
||||
#define PORT_DMR GPIOB
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_YSF GPIO_Pin_5
|
||||
#define PORT_YSF GPIOB
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#if defined(MODE_PINS)
|
||||
#define PIN_MP25 GPIO_Pin_3
|
||||
#define PORT_MP25 GPIOC
|
||||
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MNXDN GPIO_Pin_6
|
||||
#define PORT_MNXDN GPIOC
|
||||
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDSTAR GPIO_Pin_4
|
||||
#define PORT_MDSTAR GPIOC
|
||||
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDMR GPIO_Pin_5
|
||||
#define PORT_MDMR GPIOC
|
||||
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MYSF GPIO_Pin_2
|
||||
#define PORT_MYSF GPIOC
|
||||
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MPOCSAG GPIO_Pin_8
|
||||
#define PORT_MPOCSAG GPIOC
|
||||
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
|
||||
#endif
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_1
|
||||
#define PIN_RSSI_CH ADC_Channel_1
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#endif
|
||||
@@ -1,102 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _PINS_F4_STM32DVM_V3_H
|
||||
#define _PINS_F4_STM32DVM_V3_H
|
||||
|
||||
/*
|
||||
Pin definitions for STM32F4 STM32-DVM rev 3 Board:
|
||||
|
||||
COS PB13 input
|
||||
PTT PB12 output
|
||||
COSLED PB4 output
|
||||
LED PB3 output
|
||||
|
||||
P25 PB8 output
|
||||
NXDN PB9 output
|
||||
DSTAR PB6 output
|
||||
DMR PB5 output
|
||||
YSF PB7 output
|
||||
POCSAG PC10 output
|
||||
|
||||
RX PB0 analog input
|
||||
RSSI PB1 analog input
|
||||
TX PA4 analog output
|
||||
|
||||
EXT_CLK PA15 input
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_13
|
||||
#define PORT_COS GPIOB
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||
|
||||
|
||||
#define PIN_PTT GPIO_Pin_12
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_4
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_3
|
||||
#define PORT_LED GPIOB
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_P25 GPIO_Pin_8
|
||||
#define PORT_P25 GPIOB
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_9
|
||||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_6
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DMR GPIO_Pin_5
|
||||
#define PORT_DMR GPIOB
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_YSF GPIO_Pin_7
|
||||
#define PORT_YSF GPIOB
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_10
|
||||
#define PORT_POCSAG GPIOC
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_8
|
||||
#define PORT_RX GPIOB
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_1
|
||||
#define PIN_RSSI_CH ADC_Channel_9
|
||||
#define PORT_RSSI GPIOB
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#endif
|
||||
@@ -1,108 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _PINS_F4_STM32EDA
|
||||
#define _PINS_F4_STM32EDA
|
||||
|
||||
/*
|
||||
Pin definitions for STM32F4 STM32-DVM-MTR2K & STM32-DVM-MASTR3:
|
||||
|
||||
COS PB13 input
|
||||
PTT PB12 output
|
||||
COSLED PB4 output
|
||||
LED PB3 output
|
||||
|
||||
P25 PB8 output
|
||||
NXDN PB9 output
|
||||
DSTAR PB6 output
|
||||
DMR PB5 output
|
||||
YSF PB7 output
|
||||
POCSAG PC10 output
|
||||
FM PC11 output
|
||||
|
||||
RX PB0 analog input
|
||||
RSSI PB1 analog input
|
||||
TX PA4 analog output
|
||||
|
||||
EXT_CLK PA15 input
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_13
|
||||
#define PORT_COS GPIOB
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||
|
||||
|
||||
#define PIN_PTT GPIO_Pin_12
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_4
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_3
|
||||
#define PORT_LED GPIOB
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_P25 GPIO_Pin_8
|
||||
#define PORT_P25 GPIOB
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_9
|
||||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_6
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DMR GPIO_Pin_5
|
||||
#define PORT_DMR GPIOB
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_YSF GPIO_Pin_7
|
||||
#define PORT_YSF GPIOB
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_10
|
||||
#define PORT_POCSAG GPIOC
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_FM GPIO_Pin_11
|
||||
#define PORT_FM GPIOC
|
||||
#define RCC_Per_FM RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_8
|
||||
#define PORT_RX GPIOB
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_1
|
||||
#define PIN_RSSI_CH ADC_Channel_9
|
||||
#define PORT_RSSI GPIOB
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,101 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _PINS_F7_F7M_H
|
||||
#define _PINS_F7_F7M_H
|
||||
|
||||
/*
|
||||
Pin definitions for MMDVM-F7M Pi-Hat F0DEI board:
|
||||
|
||||
PTT PB13 output
|
||||
COSLED PB14 output
|
||||
LED PB15 output
|
||||
COS PC0 input
|
||||
|
||||
DSTAR PC7 output
|
||||
DMR PC8 output
|
||||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
NXDN PB1 output
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
TX PA4 analog output
|
||||
|
||||
EXT_CLK PA15 input
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_0
|
||||
#define PORT_COS GPIOC
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_PTT GPIO_Pin_13
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_14
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_15
|
||||
#define PORT_LED GPIOB
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_P25 GPIO_Pin_9
|
||||
#define PORT_P25 GPIOC
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_1
|
||||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_DMR GPIO_Pin_8
|
||||
#define PORT_DMR GPIOC
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_YSF GPIO_Pin_8
|
||||
#define PORT_YSF GPIOA
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_7
|
||||
#define PIN_RSSI_CH ADC_Channel_7
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#endif
|
||||
@@ -1,129 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _PINS_F7_NUCLEO_H
|
||||
#define _PINS_F7_NUCLEO_H
|
||||
|
||||
/*
|
||||
Pin definitions for STM32F7 Nucleo boards (ST Morpho header):
|
||||
|
||||
PTT PB13 output CN12 Pin30
|
||||
COSLED PB14 output CN12 Pin28
|
||||
LED PA5 output CN12 Pin11
|
||||
COS PB15 input CN12 Pin26
|
||||
|
||||
DSTAR PB10 output CN12 Pin25
|
||||
DMR PB4 output CN12 Pin27
|
||||
YSF PB5 output CN12 Pin29
|
||||
P25 PB3 output CN12 Pin31
|
||||
NXDN PA10 output CN12 Pin33
|
||||
POCSAG PB12 output CN12 Pin16
|
||||
|
||||
MDSTAR PC4 output CN12 Pin34
|
||||
MDMR PC5 output CN12 Pin6
|
||||
MYSF PC2 output CN11 Pin35
|
||||
MP25 PC3 output CN11 Pin37
|
||||
MNXDN PC6 output CN12 Pin4
|
||||
|
||||
RX PA0 analog input CN11 Pin28
|
||||
RSSI PA1 analog input CN11 Pin30
|
||||
TX PA4 analog output CN11 Pin32
|
||||
|
||||
EXT_CLK PA15 input CN11 Pin17
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_15
|
||||
#define PORT_COS GPIOB
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_PTT GPIO_Pin_13
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_14
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_5
|
||||
#define PORT_LED GPIOA
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_P25 GPIO_Pin_3
|
||||
#define PORT_P25 GPIOB
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_10
|
||||
#define PORT_NXDN GPIOA
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_10
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DMR GPIO_Pin_4
|
||||
#define PORT_DMR GPIOB
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_YSF GPIO_Pin_5
|
||||
#define PORT_YSF GPIOB
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#if defined(MODE_PINS)
|
||||
#define PIN_MP25 GPIO_Pin_3
|
||||
#define PORT_MP25 GPIOC
|
||||
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MNXDN GPIO_Pin_6
|
||||
#define PORT_MNXDN GPIOC
|
||||
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDSTAR GPIO_Pin_4
|
||||
#define PORT_MDSTAR GPIOC
|
||||
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDMR GPIO_Pin_5
|
||||
#define PORT_MDMR GPIOC
|
||||
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MYSF GPIO_Pin_2
|
||||
#define PORT_MYSF GPIOC
|
||||
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
|
||||
#endif
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_1
|
||||
#define PIN_RSSI_CH ADC_Channel_1
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#endif
|
||||
@@ -1,101 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _PINS_F7_PI_H
|
||||
#define _PINS_F7_PI_H
|
||||
|
||||
/*
|
||||
Pin definitions for STM32F722 Pi Board:
|
||||
|
||||
PTT PB13 output
|
||||
COSLED PB14 output
|
||||
LED PB15 output
|
||||
COS PC0 input
|
||||
|
||||
DSTAR PC7 output
|
||||
DMR PC8 output
|
||||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
NXDN PB1 output
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
TX PA4 analog output
|
||||
|
||||
EXT_CLK PA15 input
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_0
|
||||
#define PORT_COS GPIOC
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_PTT GPIO_Pin_13
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_14
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_15
|
||||
#define PORT_LED GPIOB
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_P25 GPIO_Pin_9
|
||||
#define PORT_P25 GPIOC
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_1
|
||||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_DMR GPIO_Pin_8
|
||||
#define PORT_DMR GPIOC
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_YSF GPIO_Pin_8
|
||||
#define PORT_YSF GPIOA
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_7
|
||||
#define PIN_RSSI_CH ADC_Channel_7
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#endif
|
||||
@@ -1,144 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019,2020 by BG5HHP
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef _PINS_F7_RPT_HAT_H
|
||||
#define _PINS_F7_RPT_HAT_H
|
||||
|
||||
/*
|
||||
Pin definitions for MMDVM_RPT_Hat Pi-Hat F0DEI DB9MAT DF2ET board:
|
||||
|
||||
PTT PB14 output
|
||||
COSLED PB13 output
|
||||
LED PB12 output
|
||||
COS PC0 input
|
||||
|
||||
DSTAR PB15 output
|
||||
DMR PC6 output
|
||||
YSF PC7 output
|
||||
P25 PC8 output
|
||||
NXDN PC9 output
|
||||
POCSAG PA8 output
|
||||
FM PA11 output
|
||||
|
||||
MDSTAR PC1 output
|
||||
MDMR PC2 output
|
||||
MYSF PC3 output
|
||||
MP25 PC4 output
|
||||
MNXDN PC10 output
|
||||
MPOCSAG PC11 output
|
||||
MFM PC13 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
TX PA4 analog output
|
||||
|
||||
EXT_CLK PA15 input
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_0
|
||||
#define PORT_COS GPIOC
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_PTT GPIO_Pin_14
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_13
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_12
|
||||
#define PORT_LED GPIOB
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_P25 GPIO_Pin_8
|
||||
#define PORT_P25 GPIOC
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_9
|
||||
#define PORT_NXDN GPIOC
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_8
|
||||
#define PORT_POCSAG GPIOA
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_FM GPIO_Pin_11
|
||||
#define PORT_FM GPIOA
|
||||
#define RCC_Per_FM RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_15
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DMR GPIO_Pin_6
|
||||
#define PORT_DMR GPIOC
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_YSF GPIO_Pin_7
|
||||
#define PORT_YSF GPIOC
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOC
|
||||
|
||||
#if defined(MODE_PINS)
|
||||
#define PIN_MP25 GPIO_Pin_4
|
||||
#define PORT_MP25 GPIOC
|
||||
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MNXDN GPIO_Pin_10
|
||||
#define PORT_MNXDN GPIOC
|
||||
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDSTAR GPIO_Pin_1
|
||||
#define PORT_MDSTAR GPIOC
|
||||
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDMR GPIO_Pin_2
|
||||
#define PORT_MDMR GPIOC
|
||||
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MYSF GPIO_Pin_3
|
||||
#define PORT_MYSF GPIOC
|
||||
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MPOCSAG GPIO_Pin_11
|
||||
#define PORT_MPOCSAG GPIOC
|
||||
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MFM GPIO_Pin_13
|
||||
#define PORT_MFM GPIOC
|
||||
#define RCC_Per_MFM RCC_AHB1Periph_GPIOC
|
||||
#endif
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_7
|
||||
#define PIN_RSSI_CH ADC_Channel_7
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,25 @@
|
||||
; PlatformIO Project Configuration File
|
||||
;
|
||||
; Build options: build flags, source filter
|
||||
; Upload options: custom upload port, speed and extra flags
|
||||
; Library options: dependencies, extra library storages
|
||||
; Advanced options: extra scripting
|
||||
;
|
||||
; Please visit documentation for the other options and examples
|
||||
; https://docs.platformio.org/page/projectconf.html
|
||||
|
||||
[env:MMDVM]
|
||||
platform = ststm32
|
||||
board = genericSTM32F446RE
|
||||
framework = arduino
|
||||
build_unflags = -O0
|
||||
monitor_speed = 460800
|
||||
build_flags =
|
||||
-O3
|
||||
-Wall
|
||||
-D HSE_VALUE=12000000U
|
||||
-D ARM_MATH_CM4
|
||||
-mfpu=fpv4-sp-d16
|
||||
-mfloat-abi=hard
|
||||
-D SERIAL_RX_BUFFER_SIZE=2048
|
||||
-D SERIAL_TX_BUFFER_SIZE=2048
|
||||
@@ -18,33 +18,43 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_AX25)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "AX25Demodulator.h"
|
||||
#include "AX25Defines.h"
|
||||
|
||||
const float32_t SAMPLE_RATE = 24000.0F;
|
||||
const float32_t SYMBOL_RATE = 1200.0F;
|
||||
const uint32_t SYMBOL_RATE = 1200U;
|
||||
|
||||
const uint16_t DELAY_LEN = 11U;
|
||||
|
||||
const float32_t SAMPLES_PER_SYMBOL = SAMPLE_RATE / SYMBOL_RATE;
|
||||
const float32_t SAMPLES_PER_SYMBOL = float32_t(SAMPLE_RATE / SYMBOL_RATE);
|
||||
const float32_t PLL_LIMIT = SAMPLES_PER_SYMBOL / 2.0F;
|
||||
|
||||
const uint32_t LPF_FILTER_LEN = 96U;
|
||||
const uint32_t LPF_FILTER_LEN = 48U;
|
||||
|
||||
q15_t LPF_FILTER_COEFFS[] = {
|
||||
0, 0, 0, 1, 2, 5, 8, 12, 18, 23,
|
||||
29, 33, 36, 36, 33, 25, 13, -5, -28, -57,
|
||||
-89, -123, -159, -194, -225, -249, -264, -267, -254, -224,
|
||||
-175, -104, -12, 102, 236, 389, 557, 738, 926, 1117,
|
||||
1306, 1486, 1654, 1802, 1927, 2025, 2092, 2126, 2126, 2092,
|
||||
2025, 1927, 1802, 1654, 1486, 1306, 1117, 926, 738, 557,
|
||||
389, 236, 102, -12, -104, -175, -224, -254, -267, -264,
|
||||
-249, -225, -194, -159, -123, -89, -57, -28, -5, 13,
|
||||
25, 33, 36, 36, 33, 29, 23, 18, 12, 8,
|
||||
5, 2, 1, 0, 0, 0
|
||||
-2, -8, -17, -28, -40, -47, -47, -34,
|
||||
-5, 46, 122, 224, 354, 510, 689, 885,
|
||||
1092, 1302, 1506, 1693, 1856, 1987, 2077, 2124,
|
||||
2124, 2077, 1987, 1856, 1693, 1506, 1302, 1092,
|
||||
885, 689, 510, 354, 224, 122, 46, -5,
|
||||
-34, -47, -47, -40, -28, -17, -8, -2
|
||||
};
|
||||
|
||||
// Lock low-pass filter taps (80Hz Bessel)
|
||||
// scipy.signal:
|
||||
// b, a = bessel(4, [80.0/(1200/2)], 'lowpass')
|
||||
//
|
||||
const uint8_t PLL_IIR_SIZE = 5U;
|
||||
|
||||
const float32_t PLL_LOCK_B[] = {
|
||||
1.077063e-03,4.308253e-03,6.462379e-03,4.308253e-03,1.077063e-03};
|
||||
|
||||
const float32_t PLL_LOCK_A[] = {
|
||||
1.000000e+00,-2.774567e+00,2.962960e+00,-1.437990e+00,2.668296e-01};
|
||||
|
||||
// 64 Hz loop filter.
|
||||
// scipy.signal:
|
||||
// loop_coeffs = firwin(9, [64.0/(1200/2)], width = None,
|
||||
@@ -67,6 +77,9 @@ m_pllState(),
|
||||
m_pllLast(false),
|
||||
m_pllBits(1U),
|
||||
m_pllCount(0.0F),
|
||||
m_pllJitter(0.0F),
|
||||
m_pllDCD(false),
|
||||
m_iirHistory(),
|
||||
m_hdlcOnes(0U),
|
||||
m_hdlcFlag(false),
|
||||
m_hdlcBuffer(0U),
|
||||
@@ -82,6 +95,9 @@ m_hdlcState(AX25_IDLE)
|
||||
m_pllFilter.numTaps = PLL_FILTER_LEN;
|
||||
m_pllFilter.pState = m_pllState;
|
||||
m_pllFilter.pCoeffs = PLL_FILTER_COEFFS;
|
||||
|
||||
for (uint8_t i = 0U; i < PLL_IIR_SIZE; i++)
|
||||
m_iirHistory[i] = 0.0F;
|
||||
}
|
||||
|
||||
bool CAX25Demodulator::process(q15_t* samples, uint8_t length, CAX25Frame& frame)
|
||||
@@ -158,10 +174,18 @@ bool CAX25Demodulator::PLL(bool input)
|
||||
if (m_pllCount > PLL_LIMIT)
|
||||
m_pllCount -= SAMPLES_PER_SYMBOL;
|
||||
|
||||
float32_t adjust = m_pllBits > 16U ? 5.0F : 0.0F;
|
||||
float32_t offset = m_pllCount / float32_t(m_pllBits);
|
||||
float32_t jitter;
|
||||
::arm_fir_f32(&m_pllFilter, &offset, &jitter, 1U);
|
||||
|
||||
float32_t absOffset = adjust;
|
||||
if (offset < 0.0F)
|
||||
absOffset -= offset;
|
||||
else
|
||||
absOffset += offset;
|
||||
m_pllJitter = iir(absOffset);
|
||||
|
||||
m_pllCount -= jitter / 2.0F;
|
||||
m_pllBits = 1U;
|
||||
} else {
|
||||
@@ -264,3 +288,31 @@ void CAX25Demodulator::setTwist(int8_t n)
|
||||
m_twist.setTwist(n);
|
||||
}
|
||||
|
||||
bool CAX25Demodulator::isDCD()
|
||||
{
|
||||
if (m_pllJitter <= (SAMPLES_PER_SYMBOL * 0.03F))
|
||||
m_pllDCD = true;
|
||||
else if (m_pllJitter >= (SAMPLES_PER_SYMBOL * 0.15F))
|
||||
m_pllDCD = false;
|
||||
|
||||
return m_pllDCD;
|
||||
}
|
||||
|
||||
float32_t CAX25Demodulator::iir(float32_t input)
|
||||
{
|
||||
for (int8_t i = int8_t(PLL_IIR_SIZE) - 1; i != 0; i--)
|
||||
m_iirHistory[i] = m_iirHistory[i - 1];
|
||||
|
||||
m_iirHistory[0] = input;
|
||||
for (uint8_t i = 1U; i < PLL_IIR_SIZE; i++)
|
||||
m_iirHistory[0] -= PLL_LOCK_A[i] * m_iirHistory[i];
|
||||
|
||||
float32_t result = 0.0F;
|
||||
for (uint8_t i = 0U; i < PLL_IIR_SIZE; i++)
|
||||
result += PLL_LOCK_B[i] * m_iirHistory[i];
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -16,11 +16,13 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_AX25)
|
||||
|
||||
#if !defined(AX25Demodulator_H)
|
||||
#define AX25Demodulator_H
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#include "AX25Frame.h"
|
||||
#include "AX25Twist.h"
|
||||
|
||||
@@ -38,11 +40,13 @@ public:
|
||||
|
||||
void setTwist(int8_t n);
|
||||
|
||||
bool isDCD();
|
||||
|
||||
private:
|
||||
CAX25Frame m_frame;
|
||||
CAX25Twist m_twist;
|
||||
arm_fir_instance_q15 m_lpfFilter;
|
||||
q15_t m_lpfState[120U]; // NoTaps + BlockSize - 1, 96 + 20 - 1 plus some spare
|
||||
q15_t m_lpfState[70U]; // NoTaps + BlockSize - 1, 48 + 20 - 1 plus some spare
|
||||
bool* m_delayLine;
|
||||
uint16_t m_delayPos;
|
||||
bool m_nrziState;
|
||||
@@ -51,6 +55,9 @@ private:
|
||||
bool m_pllLast;
|
||||
uint8_t m_pllBits;
|
||||
float32_t m_pllCount;
|
||||
float32_t m_pllJitter;
|
||||
bool m_pllDCD;
|
||||
float32_t m_iirHistory[5U];
|
||||
uint16_t m_hdlcOnes;
|
||||
bool m_hdlcFlag;
|
||||
uint16_t m_hdlcBuffer;
|
||||
@@ -61,7 +68,10 @@ private:
|
||||
bool NRZI(bool b);
|
||||
bool PLL(bool b);
|
||||
bool HDLC(bool b);
|
||||
float32_t iir(float32_t input);
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -17,6 +17,9 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_AX25)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "AX25Frame.h"
|
||||
|
||||
@@ -120,3 +123,5 @@ void CAX25Frame::addCRC()
|
||||
m_data[m_length++] = crc8[1U];
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -16,11 +16,13 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_AX25)
|
||||
|
||||
#if !defined(AX25Frame_H)
|
||||
#define AX25Frame_H
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
const uint16_t AX25_MAX_PACKET_LEN = 300U;
|
||||
|
||||
class CAX25Frame {
|
||||
@@ -41,3 +43,5 @@ public:
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,211 @@
|
||||
/*
|
||||
* Copyright (C) 2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_AX25)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "AX25RX.h"
|
||||
|
||||
/*
|
||||
* Generated with Scipy Filter, 152 coefficients, 1100-2300Hz bandpass,
|
||||
* Hann window, starting and ending 0 value coefficients removed.
|
||||
*
|
||||
* np.array(
|
||||
* firwin2(152,
|
||||
* [
|
||||
* 0.0,
|
||||
* 1000.0/(sample_rate/2),
|
||||
* 1100.0/(sample_rate/2),
|
||||
* 2350.0/(sample_rate/2),
|
||||
* 2500.0/(sample_rate/2),
|
||||
* 1.0
|
||||
* ],
|
||||
* [0,0,1,1,0,0],
|
||||
* antisymmetric = False,
|
||||
* window='hann') * 32768,
|
||||
* dtype=int)[10:-10]
|
||||
*/
|
||||
|
||||
const uint32_t FILTER_LEN = 130U;
|
||||
|
||||
q15_t FILTER_COEFFS[] = {
|
||||
5, 12, 18, 21, 19, 11, -2, -15, -25, -27,
|
||||
-21, -11, -3, -5, -19, -43, -69, -83, -73, -35,
|
||||
27, 98, 155, 180, 163, 109, 39, -20, -45, -26,
|
||||
23, 74, 89, 39, -81, -247, -407, -501, -480, -334,
|
||||
-92, 175, 388, 479, 429, 275, 99, 5, 68, 298,
|
||||
626, 913, 994, 740, 115, -791, -1770, -2544, -2847, -2509,
|
||||
-1527, -76, 1518, 2875, 3653, 3653, 2875, 1518, -76, -1527,
|
||||
-2509, -2847, -2544, -1770, -791, 115, 740, 994, 913, 626,
|
||||
298, 68, 5, 99, 275, 429, 479, 388, 175, -92,
|
||||
-334, -480, -501, -407, -247, -81, 39, 89, 74, 23,
|
||||
-26, -45, -20, 39, 109, 163, 180, 155, 98, 27,
|
||||
-35, -73, -83, -69, -43, -19, -5, -3, -11, -21,
|
||||
-27, -25, -15, -2, 11, 19, 21, 18, 12, 5
|
||||
};
|
||||
|
||||
CAX25RX::CAX25RX() :
|
||||
m_filter(),
|
||||
m_state(),
|
||||
m_demod1(3),
|
||||
m_demod2(6),
|
||||
m_demod3(9),
|
||||
m_lastFCS(0U),
|
||||
m_count(0U),
|
||||
m_slotTime(30U),
|
||||
m_slotCount(0U),
|
||||
m_pPersist(128U),
|
||||
m_dcd(false),
|
||||
m_canTX(false),
|
||||
m_x(1U),
|
||||
m_a(0xB7U),
|
||||
m_b(0x73U),
|
||||
m_c(0xF6U)
|
||||
{
|
||||
m_filter.numTaps = FILTER_LEN;
|
||||
m_filter.pState = m_state;
|
||||
m_filter.pCoeffs = FILTER_COEFFS;
|
||||
|
||||
initRand();
|
||||
}
|
||||
|
||||
void CAX25RX::samples(q15_t* samples, uint8_t length)
|
||||
{
|
||||
q15_t output[RX_BLOCK_SIZE];
|
||||
::arm_fir_fast_q15(&m_filter, samples, output, RX_BLOCK_SIZE);
|
||||
|
||||
m_count++;
|
||||
|
||||
CAX25Frame frame;
|
||||
|
||||
bool ret = m_demod1.process(output, length, frame);
|
||||
if (ret) {
|
||||
if (frame.m_fcs != m_lastFCS || m_count > 2U) {
|
||||
m_lastFCS = frame.m_fcs;
|
||||
m_count = 0U;
|
||||
serial.writeAX25Data(frame.m_data, frame.m_length - 2U);
|
||||
}
|
||||
DEBUG1("Decoder 1 reported");
|
||||
}
|
||||
|
||||
ret = m_demod2.process(output, length, frame);
|
||||
if (ret) {
|
||||
if (frame.m_fcs != m_lastFCS || m_count > 2U) {
|
||||
m_lastFCS = frame.m_fcs;
|
||||
m_count = 0U;
|
||||
serial.writeAX25Data(frame.m_data, frame.m_length - 2U);
|
||||
}
|
||||
DEBUG1("Decoder 2 reported");
|
||||
}
|
||||
|
||||
ret = m_demod3.process(output, length, frame);
|
||||
if (ret) {
|
||||
if (frame.m_fcs != m_lastFCS || m_count > 2U) {
|
||||
m_lastFCS = frame.m_fcs;
|
||||
m_count = 0U;
|
||||
serial.writeAX25Data(frame.m_data, frame.m_length - 2U);
|
||||
}
|
||||
DEBUG1("Decoder 3 reported");
|
||||
}
|
||||
|
||||
m_slotCount += RX_BLOCK_SIZE;
|
||||
if (m_slotCount >= m_slotTime) {
|
||||
m_slotCount = 0U;
|
||||
|
||||
bool dcd1 = m_demod1.isDCD();
|
||||
bool dcd2 = m_demod2.isDCD();
|
||||
bool dcd3 = m_demod3.isDCD();
|
||||
|
||||
if (dcd1 || dcd2 || dcd3) {
|
||||
if (!m_dcd) {
|
||||
io.setDecode(true);
|
||||
io.setADCDetection(true);
|
||||
m_dcd = true;
|
||||
}
|
||||
|
||||
m_canTX = false;
|
||||
} else {
|
||||
if (m_dcd) {
|
||||
io.setDecode(false);
|
||||
io.setADCDetection(false);
|
||||
m_dcd = false;
|
||||
}
|
||||
|
||||
m_canTX = m_pPersist >= rand();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
bool CAX25RX::canTX() const
|
||||
{
|
||||
return m_canTX;
|
||||
}
|
||||
|
||||
void CAX25RX::setParams(int8_t twist, uint8_t slotTime, uint8_t pPersist)
|
||||
{
|
||||
m_demod1.setTwist(twist - 3);
|
||||
m_demod2.setTwist(twist);
|
||||
m_demod3.setTwist(twist + 3);
|
||||
|
||||
m_slotTime = slotTime * 240U; // Slot time in samples
|
||||
m_pPersist = pPersist;
|
||||
}
|
||||
|
||||
// Taken from https://www.electro-tech-online.com/threads/ultra-fast-pseudorandom-number-generator-for-8-bit.124249/
|
||||
//X ABC Algorithm Random Number Generator for 8-Bit Devices:
|
||||
//This is a small PRNG, experimentally verified to have at least a 50 million byte period
|
||||
//by generating 50 million bytes and observing that there were no overapping sequences and repeats.
|
||||
//This generator passes serial correlation, entropy , Monte Carlo Pi value, arithmetic mean,
|
||||
//And many other statistical tests. This generator may have a period of up to 2^32, but this has
|
||||
//not been verified.
|
||||
//
|
||||
// By XORing 3 bytes into the a,b, and c registers, you can add in entropy from
|
||||
//an external source easily.
|
||||
//
|
||||
//This generator is free to use, but is not suitable for cryptography due to its short period(by //cryptographic standards) and simple construction. No attempt was made to make this generator
|
||||
// suitable for cryptographic use.
|
||||
//
|
||||
//Due to the use of a constant counter, the generator should be resistant to latching up.
|
||||
//A significant performance gain is had in that the x variable is only ever incremented.
|
||||
//
|
||||
//Only 4 bytes of ram are needed for the internal state, and generating a byte requires 3 XORs , //2 ADDs, one bit shift right , and one increment. Difficult or slow operations like multiply, etc
|
||||
//were avoided for maximum speed on ultra low power devices.
|
||||
|
||||
|
||||
void CAX25RX::initRand() //Can also be used to seed the rng with more entropy during use.
|
||||
{
|
||||
m_a = (m_a ^ m_c ^ m_x);
|
||||
m_b = (m_b + m_a);
|
||||
m_c = (m_c + ((m_b >> 1) ^ m_a));
|
||||
}
|
||||
|
||||
uint8_t CAX25RX::rand()
|
||||
{
|
||||
m_x++; //x is incremented every round and is not affected by any other variable
|
||||
|
||||
m_a = (m_a ^ m_c ^ m_x); //note the mix of addition and XOR
|
||||
m_b = (m_b + m_a); //And the use of very few instructions
|
||||
m_c = (m_c + ((m_b >> 1) ^ m_a)); //the right shift is to ensure that high-order bits from b can affect
|
||||
|
||||
return uint8_t(m_c); //low order bits of other variables
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -16,11 +16,13 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_AX25)
|
||||
|
||||
#if !defined(AX25RX_H)
|
||||
#define AX25RX_H
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#include "AX25Demodulator.h"
|
||||
|
||||
class CAX25RX {
|
||||
@@ -29,17 +31,33 @@ public:
|
||||
|
||||
void samples(q15_t* samples, uint8_t length);
|
||||
|
||||
void setParams(int8_t twist);
|
||||
void setParams(int8_t twist, uint8_t slotTime, uint8_t pPersist);
|
||||
|
||||
bool canTX() const;
|
||||
|
||||
private:
|
||||
arm_fir_instance_q15 m_filter;
|
||||
q15_t m_state[160U]; // NoTaps + BlockSize - 1, 132 + 20 - 1 plus some spare
|
||||
q15_t m_state[160U]; // NoTaps + BlockSize - 1, 130 + 20 - 1 plus some spare
|
||||
CAX25Demodulator m_demod1;
|
||||
CAX25Demodulator m_demod2;
|
||||
CAX25Demodulator m_demod3;
|
||||
uint16_t m_lastFCS;
|
||||
uint32_t m_count;
|
||||
uint32_t m_slotTime;
|
||||
uint32_t m_slotCount;
|
||||
uint8_t m_pPersist;
|
||||
bool m_dcd;
|
||||
bool m_canTX;
|
||||
uint8_t m_x;
|
||||
uint8_t m_a;
|
||||
uint8_t m_b;
|
||||
uint8_t m_c;
|
||||
|
||||
void initRand();
|
||||
uint8_t rand();
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -17,6 +17,9 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_AX25)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "AX25TX.h"
|
||||
|
||||
@@ -49,11 +52,10 @@ const q15_t AUDIO_TABLE_DATA[] = {
|
||||
};
|
||||
|
||||
CAX25TX::CAX25TX() :
|
||||
m_twist(-6),
|
||||
m_poBuffer(),
|
||||
m_poLen(0U),
|
||||
m_poPtr(0U),
|
||||
m_txDelay(120U),
|
||||
m_txDelay(360U),
|
||||
m_tablePtr(0U),
|
||||
m_nrzi(false)
|
||||
{
|
||||
@@ -64,6 +66,14 @@ void CAX25TX::process()
|
||||
if (m_poLen == 0U)
|
||||
return;
|
||||
|
||||
if (!m_duplex) {
|
||||
if (m_poPtr == 0U) {
|
||||
bool tx = ax25RX.canTX();
|
||||
if (!tx)
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
uint16_t space = io.getSpace();
|
||||
|
||||
while (space > AX25_RADIO_SYMBOL_LENGTH) {
|
||||
@@ -92,9 +102,11 @@ uint8_t CAX25TX::writeData(const uint8_t* data, uint16_t length)
|
||||
m_nrzi = false;
|
||||
m_tablePtr = 0U;
|
||||
|
||||
// Add TX delay (already NRZI)
|
||||
for (uint16_t i = 0U; i < m_txDelay; i++, m_poLen++)
|
||||
WRITE_BIT1(m_poBuffer, m_poLen, false);
|
||||
// Add TX delay
|
||||
for (uint16_t i = 0U; i < m_txDelay; i++, m_poLen++) {
|
||||
bool preamble = NRZI(false);
|
||||
WRITE_BIT1(m_poBuffer, m_poLen, preamble);
|
||||
}
|
||||
|
||||
// Add the Start Flag
|
||||
for (uint16_t i = 0U; i < 8U; i++, m_poLen++) {
|
||||
@@ -136,27 +148,25 @@ uint8_t CAX25TX::writeData(const uint8_t* data, uint16_t length)
|
||||
|
||||
void CAX25TX::writeBit(bool b)
|
||||
{
|
||||
q15_t in[AX25_RADIO_SYMBOL_LENGTH];
|
||||
q15_t buffer[AX25_RADIO_SYMBOL_LENGTH];
|
||||
for (uint8_t i = 0U; i < AX25_RADIO_SYMBOL_LENGTH; i++) {
|
||||
in[i] = AUDIO_TABLE_DATA[m_tablePtr];
|
||||
if (b)
|
||||
q15_t value = AUDIO_TABLE_DATA[m_tablePtr];
|
||||
|
||||
if (b) {
|
||||
// De-emphasise the lower frequency by 6dB
|
||||
value >>= 2;
|
||||
m_tablePtr += 6U;
|
||||
else
|
||||
} else {
|
||||
m_tablePtr += 11U;
|
||||
}
|
||||
|
||||
buffer[i] = value >> 1;
|
||||
|
||||
if (m_tablePtr >= AUDIO_TABLE_LEN)
|
||||
m_tablePtr -= AUDIO_TABLE_LEN;
|
||||
}
|
||||
|
||||
q15_t out[AX25_RADIO_SYMBOL_LENGTH];
|
||||
m_twist.process(in, out, AX25_RADIO_SYMBOL_LENGTH);
|
||||
|
||||
io.write(STATE_AX25, out, AX25_RADIO_SYMBOL_LENGTH);
|
||||
}
|
||||
|
||||
void CAX25TX::setParams(int8_t twist)
|
||||
{
|
||||
m_twist.setTwist(twist);
|
||||
io.write(STATE_AX25, buffer, AX25_RADIO_SYMBOL_LENGTH);
|
||||
}
|
||||
|
||||
void CAX25TX::setTXDelay(uint8_t delay)
|
||||
@@ -171,10 +181,11 @@ uint8_t CAX25TX::getSpace() const
|
||||
|
||||
bool CAX25TX::NRZI(bool b)
|
||||
{
|
||||
bool result = (b == m_nrzi);
|
||||
if (!b)
|
||||
m_nrzi = !m_nrzi;
|
||||
|
||||
m_nrzi = b;
|
||||
|
||||
return result;
|
||||
return m_nrzi;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -16,12 +16,12 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if !defined(AX25TX_H)
|
||||
#define AX25TX_H
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#include "AX25Twist.h"
|
||||
#if defined(MODE_AX25)
|
||||
|
||||
#if !defined(AX25TX_H)
|
||||
#define AX25TX_H
|
||||
|
||||
class CAX25TX {
|
||||
public:
|
||||
@@ -31,14 +31,11 @@ public:
|
||||
|
||||
void process();
|
||||
|
||||
void setParams(int8_t twist);
|
||||
|
||||
void setTXDelay(uint8_t delay);
|
||||
|
||||
uint8_t getSpace() const;
|
||||
|
||||
private:
|
||||
CAX25Twist m_twist;
|
||||
uint8_t m_poBuffer[600U];
|
||||
uint16_t m_poLen;
|
||||
uint16_t m_poPtr;
|
||||
@@ -52,3 +49,5 @@ private:
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -17,6 +17,9 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_AX25)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "AX25Twist.h"
|
||||
|
||||
@@ -309,3 +312,5 @@ void CAX25Twist::setTwist(int8_t n)
|
||||
m_filter.pCoeffs = coeffs[twist];
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -16,11 +16,12 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if !defined(AX25Twist_H)
|
||||
#define AX25Twist_H
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_AX25)
|
||||
|
||||
#if !defined(AX25Twist_H)
|
||||
#define AX25Twist_H
|
||||
|
||||
class CAX25Twist {
|
||||
public:
|
||||
@@ -37,3 +38,5 @@ private:
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,509 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_biquad_cascade_df1_q31.c
|
||||
* Description: Processing function for the Q31 Biquad cascade filter
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/filtering_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupFilters
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup BiquadCascadeDF1
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Processing function for the Q31 Biquad cascade filter.
|
||||
@param[in] S points to an instance of the Q31 Biquad cascade structure
|
||||
@param[in] pSrc points to the block of input data
|
||||
@param[out] pDst points to the block of output data
|
||||
@param[in] blockSize number of samples to process
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The function is implemented using an internal 64-bit accumulator.
|
||||
The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
|
||||
Thus, if the accumulator result overflows it wraps around rather than clip.
|
||||
In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
|
||||
After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
|
||||
1.31 format by discarding the low 32 bits.
|
||||
@remark
|
||||
Refer to \ref arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter.
|
||||
*/
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
__STATIC_INLINE void arm_biquad_cascade_df1_q31(
|
||||
const arm_biquad_casd_df1_inst_q31 * S,
|
||||
const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
const q31_t *pIn = pSrc; /* input pointer initialization */
|
||||
q31_t *pOut = pDst; /* output pointer initialization */
|
||||
int shift;
|
||||
uint32_t stages = S->numStages; /* loop counters */
|
||||
int postShift = S->postShift;
|
||||
q31x4_t b0Coeffs, b1Coeffs, a0Coeffs, a1Coeffs; /* Coefficients vector */
|
||||
q31x4_t stateVec = { 0 };
|
||||
q31_t *pState = S->pState; /* pState pointer initialization */
|
||||
q31x4_t inVec0;
|
||||
int64_t acc;
|
||||
const q31_t *pCoeffs = S->pCoeffs; /* coeff pointer initialization */
|
||||
q31_t out, out1;
|
||||
|
||||
|
||||
shift = (postShift + 1 + 8);
|
||||
|
||||
do {
|
||||
/*
|
||||
* Reading the coefficients
|
||||
* generates :
|
||||
* Fwd0 { b2 b1 b0 0 }
|
||||
* Fwd1 { 0 b2 b1 b0 }
|
||||
* Bwd0 { 0 0 a2 a1 }
|
||||
* Bwd0 { 0 0 a1 a2 }
|
||||
* (can be moved in init)
|
||||
*/
|
||||
b0Coeffs = vdupq_n_s32(0);
|
||||
a0Coeffs = vdupq_n_s32(0);
|
||||
|
||||
b0Coeffs[0] = pCoeffs[2]; // b2
|
||||
b0Coeffs[1] = pCoeffs[1]; // b1
|
||||
b0Coeffs[2] = pCoeffs[0]; // b0
|
||||
|
||||
b1Coeffs = b0Coeffs;
|
||||
uint32_t zero = 0;
|
||||
b1Coeffs = vshlcq_s32(b1Coeffs, &zero, 32);
|
||||
|
||||
a0Coeffs[2] = pCoeffs[4];
|
||||
a0Coeffs[3] = pCoeffs[3];
|
||||
a1Coeffs = vrev64q_s32(a0Coeffs);
|
||||
|
||||
|
||||
/*
|
||||
* prologue consumes history samples
|
||||
*/
|
||||
|
||||
/* 2 first elements are garbage, will be updated with history */
|
||||
inVec0 = vld1q(pIn - 2);
|
||||
|
||||
inVec0[0] = pState[1];
|
||||
inVec0[1] = pState[0];
|
||||
|
||||
stateVec[2] = pState[3];
|
||||
stateVec[3] = pState[2];
|
||||
|
||||
acc = vrmlaldavhq(b0Coeffs, inVec0);
|
||||
acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
|
||||
acc = lsll(acc, shift);
|
||||
out = (q31_t) ((acc >> 32) & 0xffffffff);
|
||||
|
||||
stateVec[2] = out;
|
||||
acc = vrmlaldavhq(b1Coeffs, inVec0);
|
||||
acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
|
||||
|
||||
acc = lsll(acc, shift);
|
||||
out1 = (q31_t) ((acc >> 32) & 0xffffffff);
|
||||
|
||||
|
||||
inVec0 = vld1q(pIn);
|
||||
pIn += 2;
|
||||
|
||||
/*
|
||||
* main loop
|
||||
*/
|
||||
uint32_t sample = (blockSize - 2) >> 2U;
|
||||
/*
|
||||
* First part of the processing with loop unrolling.
|
||||
* Compute 4 outputs at a time.
|
||||
*/
|
||||
while (sample > 0U) {
|
||||
|
||||
stateVec[3] = out1;
|
||||
|
||||
*pOut++ = out;
|
||||
*pOut++ = out1;
|
||||
|
||||
/*
|
||||
* in { x0 x1 x2 x3 }
|
||||
* x
|
||||
* b0Coeffs { b2 b1 b0 0 }
|
||||
*/
|
||||
acc = vrmlaldavhq(b0Coeffs, inVec0);
|
||||
/*
|
||||
* out { 0 0 yn2 yn1 }
|
||||
* x
|
||||
* a0Coeffs { 0 0 a2 a1 }
|
||||
*/
|
||||
acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
|
||||
acc = lsll(acc, shift);
|
||||
out = (q31_t) ((acc >> 32) & 0xffffffff);
|
||||
|
||||
stateVec[2] = out;
|
||||
|
||||
/*
|
||||
* in { x0 x1 x2 x3 }
|
||||
* x
|
||||
* b0Coeffs { 0 b2 b1 b0 }
|
||||
*/
|
||||
acc = vrmlaldavhq(b1Coeffs, inVec0);
|
||||
/*
|
||||
* out { 0 0 y0 yn1 }
|
||||
* x
|
||||
* a0Coeffs { 0 0 a1 a2 }
|
||||
*/
|
||||
acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
|
||||
acc = lsll(acc, shift);
|
||||
out1 = (q31_t) ((acc >> 32) & 0xffffffff);
|
||||
|
||||
stateVec[3] = out1;
|
||||
|
||||
inVec0 = vld1q(pIn);
|
||||
pIn += 2;
|
||||
|
||||
/* unrolled part */
|
||||
*pOut++ = out;
|
||||
*pOut++ = out1;
|
||||
|
||||
acc = vrmlaldavhq(b0Coeffs, inVec0);
|
||||
acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
|
||||
acc = lsll(acc, shift);
|
||||
out = (q31_t) ((acc >> 32) & 0xffffffff);
|
||||
|
||||
stateVec[2] = out;
|
||||
|
||||
acc = vrmlaldavhq(b1Coeffs, inVec0);
|
||||
acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
|
||||
acc = lsll(acc, shift);
|
||||
out1 = (q31_t) ((acc >> 32) & 0xffffffff);
|
||||
|
||||
inVec0 = vld1q(pIn);
|
||||
pIn += 2;
|
||||
|
||||
sample--;
|
||||
}
|
||||
|
||||
*pOut++ = out;
|
||||
*pOut++ = out1;
|
||||
|
||||
/*
|
||||
* Tail handling
|
||||
*/
|
||||
int32_t loopRemainder = blockSize & 3;
|
||||
if (loopRemainder == 2) {
|
||||
/*
|
||||
* Store the updated state variables back into the pState array
|
||||
*/
|
||||
pState[0] = inVec0[1];
|
||||
pState[1] = inVec0[0];
|
||||
pState[3] = out;
|
||||
pState[2] = out1;
|
||||
} else if (loopRemainder == 1) {
|
||||
stateVec[3] = out1;
|
||||
|
||||
acc = vrmlaldavhq(b0Coeffs, inVec0);
|
||||
acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
|
||||
acc = lsll(acc, shift);
|
||||
out = (q31_t) ((acc >> 32) & 0xffffffff);
|
||||
|
||||
stateVec[2] = out;
|
||||
|
||||
acc = vrmlaldavhq(b1Coeffs, inVec0);
|
||||
acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
|
||||
acc = lsll(acc, shift);
|
||||
out1 = (q31_t) ((acc >> 32) & 0xffffffff);
|
||||
|
||||
stateVec[3] = out1;
|
||||
|
||||
inVec0 = vld1q(pIn);
|
||||
pIn += 2;
|
||||
|
||||
*pOut++ = out;
|
||||
*pOut++ = out1;
|
||||
|
||||
acc = vrmlaldavhq(b0Coeffs, inVec0);
|
||||
acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
|
||||
acc = lsll(acc, shift);
|
||||
out = (q31_t) ((acc >> 32) & 0xffffffff);
|
||||
|
||||
*pOut++ = out;
|
||||
|
||||
/*
|
||||
* Store the updated state variables back into the pState array
|
||||
*/
|
||||
pState[0] = inVec0[2];
|
||||
pState[1] = inVec0[1];
|
||||
pState[3] = out1;
|
||||
pState[2] = out;
|
||||
} else if (loopRemainder == 0) {
|
||||
stateVec[3] = out1;
|
||||
|
||||
acc = vrmlaldavhq(b0Coeffs, inVec0);
|
||||
acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
|
||||
acc = lsll(acc, shift);
|
||||
out = (q31_t) ((acc >> 32) & 0xffffffff);
|
||||
|
||||
stateVec[2] = out;
|
||||
|
||||
acc = vrmlaldavhq(b1Coeffs, inVec0);
|
||||
acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
|
||||
acc = lsll(acc, shift);
|
||||
out1 = (q31_t) ((acc >> 32) & 0xffffffff);
|
||||
|
||||
*pOut++ = out;
|
||||
*pOut++ = out1;
|
||||
|
||||
/*
|
||||
* Store the updated state variables back into the pState array
|
||||
*/
|
||||
pState[0] = inVec0[3];
|
||||
pState[1] = inVec0[2];
|
||||
pState[3] = out;
|
||||
pState[2] = out1;
|
||||
} else {
|
||||
stateVec[3] = out1;
|
||||
|
||||
acc = vrmlaldavhq(b0Coeffs, inVec0);
|
||||
acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
|
||||
acc = lsll(acc, shift);
|
||||
out = (q31_t) ((acc >> 32) & 0xffffffff);
|
||||
|
||||
*pOut++ = out;
|
||||
|
||||
/*
|
||||
* Store the updated state variables back into the pState array
|
||||
*/
|
||||
pState[0] = inVec0[2];
|
||||
pState[1] = inVec0[1];
|
||||
pState[3] = out1;
|
||||
pState[2] = out;
|
||||
}
|
||||
|
||||
|
||||
pCoeffs += 5;
|
||||
pState += 4;
|
||||
|
||||
/* The first stage goes from the input buffer to the output buffer. */
|
||||
/* Subsequent stages occur in-place in the output buffer */
|
||||
pIn = pDst;
|
||||
|
||||
/* Reset to destination pointer */
|
||||
pOut = pDst;
|
||||
}
|
||||
while (--stages);
|
||||
}
|
||||
#else
|
||||
void arm_biquad_cascade_df1_q31(
|
||||
const arm_biquad_casd_df1_inst_q31 * S,
|
||||
const q31_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
const q31_t *pIn = pSrc; /* Source pointer */
|
||||
q31_t *pOut = pDst; /* Destination pointer */
|
||||
q31_t *pState = S->pState; /* pState pointer */
|
||||
const q31_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
|
||||
q63_t acc; /* Accumulator */
|
||||
q31_t b0, b1, b2, a1, a2; /* Filter coefficients */
|
||||
q31_t Xn1, Xn2, Yn1, Yn2; /* Filter pState variables */
|
||||
q31_t Xn; /* Temporary input */
|
||||
uint32_t uShift = ((uint32_t) S->postShift + 1U);
|
||||
uint32_t lShift = 32U - uShift; /* Shift to be applied to the output */
|
||||
uint32_t sample, stage = S->numStages; /* Loop counters */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
q31_t acc_l, acc_h; /* temporary output variables */
|
||||
#endif
|
||||
|
||||
do
|
||||
{
|
||||
/* Reading the coefficients */
|
||||
b0 = *pCoeffs++;
|
||||
b1 = *pCoeffs++;
|
||||
b2 = *pCoeffs++;
|
||||
a1 = *pCoeffs++;
|
||||
a2 = *pCoeffs++;
|
||||
|
||||
/* Reading the pState values */
|
||||
Xn1 = pState[0];
|
||||
Xn2 = pState[1];
|
||||
Yn1 = pState[2];
|
||||
Yn2 = pState[3];
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Apply loop unrolling and compute 4 output values simultaneously. */
|
||||
/* Variable acc hold output values that are being computed:
|
||||
*
|
||||
* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
|
||||
*/
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
sample = blockSize >> 2U;
|
||||
|
||||
while (sample > 0U)
|
||||
{
|
||||
/* Read the first input */
|
||||
Xn = *pIn++;
|
||||
|
||||
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
|
||||
acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
|
||||
|
||||
/* The result is converted to 1.31 , Yn2 variable is reused */
|
||||
acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */
|
||||
acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
|
||||
|
||||
/* Apply shift for lower part of acc and upper part of acc */
|
||||
Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
|
||||
|
||||
/* Store output in destination buffer. */
|
||||
*pOut++ = Yn2;
|
||||
|
||||
/* Read the second input */
|
||||
Xn2 = *pIn++;
|
||||
|
||||
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
|
||||
acc = ((q63_t) b0 * Xn2) + ((q63_t) b1 * Xn) + ((q63_t) b2 * Xn1) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
|
||||
|
||||
/* The result is converted to 1.31, Yn1 variable is reused */
|
||||
acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */
|
||||
acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
|
||||
|
||||
/* Apply shift for lower part of acc and upper part of acc */
|
||||
Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
|
||||
|
||||
/* Store output in destination buffer. */
|
||||
*pOut++ = Yn1;
|
||||
|
||||
/* Read the third input */
|
||||
Xn1 = *pIn++;
|
||||
|
||||
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
|
||||
acc = ((q63_t) b0 * Xn1) + ((q63_t) b1 * Xn2) + ((q63_t) b2 * Xn) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
|
||||
|
||||
/* The result is converted to 1.31, Yn2 variable is reused */
|
||||
acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */
|
||||
acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
|
||||
|
||||
/* Apply shift for lower part of acc and upper part of acc */
|
||||
Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
|
||||
|
||||
/* Store output in destination buffer. */
|
||||
*pOut++ = Yn2;
|
||||
|
||||
/* Read the forth input */
|
||||
Xn = *pIn++;
|
||||
|
||||
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
|
||||
acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
|
||||
|
||||
/* The result is converted to 1.31, Yn1 variable is reused */
|
||||
acc_l = (acc ) & 0xffffffff; /* Calc lower part of acc */
|
||||
acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
|
||||
|
||||
/* Apply shift for lower part of acc and upper part of acc */
|
||||
Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
|
||||
|
||||
/* Store output in destination buffer. */
|
||||
*pOut++ = Yn1;
|
||||
|
||||
/* Every time after the output is computed state should be updated. */
|
||||
/* The states should be updated as: */
|
||||
/* Xn2 = Xn1 */
|
||||
/* Xn1 = Xn */
|
||||
/* Yn2 = Yn1 */
|
||||
/* Yn1 = acc */
|
||||
Xn2 = Xn1;
|
||||
Xn1 = Xn;
|
||||
|
||||
/* decrement loop counter */
|
||||
sample--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
sample = blockSize & 0x3U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
sample = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (sample > 0U)
|
||||
{
|
||||
/* Read the input */
|
||||
Xn = *pIn++;
|
||||
|
||||
/* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
|
||||
acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
|
||||
|
||||
/* The result is converted to 1.31 */
|
||||
acc = acc >> lShift;
|
||||
|
||||
/* Store output in destination buffer. */
|
||||
*pOut++ = (q31_t) acc;
|
||||
|
||||
/* Every time after the output is computed state should be updated. */
|
||||
/* The states should be updated as: */
|
||||
/* Xn2 = Xn1 */
|
||||
/* Xn1 = Xn */
|
||||
/* Yn2 = Yn1 */
|
||||
/* Yn1 = acc */
|
||||
Xn2 = Xn1;
|
||||
Xn1 = Xn;
|
||||
Yn2 = Yn1;
|
||||
Yn1 = (q31_t) acc;
|
||||
|
||||
/* decrement loop counter */
|
||||
sample--;
|
||||
}
|
||||
|
||||
/* Store the updated state variables back into the pState array */
|
||||
*pState++ = Xn1;
|
||||
*pState++ = Xn2;
|
||||
*pState++ = Yn1;
|
||||
*pState++ = Yn2;
|
||||
|
||||
/* The first stage goes from the input buffer to the output buffer. */
|
||||
/* Subsequent numStages occur in-place in the output buffer */
|
||||
pIn = pDst;
|
||||
|
||||
/* Reset output pointer */
|
||||
pOut = pDst;
|
||||
|
||||
/* decrement loop counter */
|
||||
stage--;
|
||||
|
||||
} while (stage > 0U);
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
/**
|
||||
@} end of BiquadCascadeDF1 group
|
||||
*/
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,332 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_fir_fast_q15.c
|
||||
* Description: Q15 Fast FIR filter processing function
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/filtering_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupFilters
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup FIR
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Processing function for the Q15 FIR filter (fast version).
|
||||
@param[in] S points to an instance of the Q15 FIR filter structure
|
||||
@param[in] pSrc points to the block of input data
|
||||
@param[out] pDst points to the block of output data
|
||||
@param[in] blockSize number of samples to process
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
This fast version uses a 32-bit accumulator with 2.30 format.
|
||||
The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
|
||||
Thus, if the accumulator result overflows it wraps around and distorts the result.
|
||||
In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
|
||||
The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
|
||||
|
||||
@remark
|
||||
Refer to \ref arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure.
|
||||
Use function \ref arm_fir_init_q15() to initialize the filter structure.
|
||||
*/
|
||||
|
||||
void arm_fir_fast_q15(
|
||||
const arm_fir_instance_q15 * S,
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
q15_t *pState = S->pState; /* State pointer */
|
||||
const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
|
||||
q15_t *pStateCurnt; /* Points to the current sample of the state */
|
||||
q15_t *px; /* Temporary pointer for state buffer */
|
||||
const q15_t *pb; /* Temporary pointer for coefficient buffer */
|
||||
q31_t acc0; /* Accumulators */
|
||||
uint32_t numTaps = S->numTaps; /* Number of filter coefficients in the filter */
|
||||
uint32_t tapCnt, blkCnt; /* Loop counters */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
q31_t acc1, acc2, acc3; /* Accumulators */
|
||||
q31_t x0, x1, x2, c0; /* Temporary variables to hold state and coefficient values */
|
||||
#endif
|
||||
|
||||
/* S->pState points to state array which contains previous frame (numTaps - 1) samples */
|
||||
/* pStateCurnt points to the location where the new input data should be written */
|
||||
pStateCurnt = &(S->pState[(numTaps - 1U)]);
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 output values simultaneously.
|
||||
* The variables acc0 ... acc3 hold output values that are being computed:
|
||||
*
|
||||
* acc0 = b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
|
||||
* acc1 = b[numTaps-1] * x[n-numTaps] + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
|
||||
* acc2 = b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
|
||||
* acc3 = b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps] +...+ b[0] * x[3]
|
||||
*/
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* Copy 4 new input samples into the state buffer. */
|
||||
*pStateCurnt++ = *pSrc++;
|
||||
*pStateCurnt++ = *pSrc++;
|
||||
*pStateCurnt++ = *pSrc++;
|
||||
*pStateCurnt++ = *pSrc++;
|
||||
|
||||
/* Set all accumulators to zero */
|
||||
acc0 = 0;
|
||||
acc1 = 0;
|
||||
acc2 = 0;
|
||||
acc3 = 0;
|
||||
|
||||
/* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
|
||||
px = pState;
|
||||
|
||||
/* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
|
||||
pb = pCoeffs;
|
||||
|
||||
/* Read the first two samples from the state buffer: x[n-N], x[n-N-1] */
|
||||
x0 = read_q15x2_ia (&px);
|
||||
|
||||
/* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
|
||||
x2 = read_q15x2_ia (&px);
|
||||
|
||||
/* Loop over the number of taps. Unroll by a factor of 4.
|
||||
Repeat until we've computed numTaps-(numTaps%4) coefficients. */
|
||||
tapCnt = numTaps >> 2U;
|
||||
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
/* Read the first two coefficients using SIMD: b[N] and b[N-1] coefficients */
|
||||
c0 = read_q15x2_ia ((q15_t **) &pb);
|
||||
|
||||
/* acc0 += b[N] * x[n-N] + b[N-1] * x[n-N-1] */
|
||||
acc0 = __SMLAD(x0, c0, acc0);
|
||||
|
||||
/* acc2 += b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
|
||||
acc2 = __SMLAD(x2, c0, acc2);
|
||||
|
||||
/* pack x[n-N-1] and x[n-N-2] */
|
||||
#ifndef ARM_MATH_BIG_ENDIAN
|
||||
x1 = __PKHBT(x2, x0, 0);
|
||||
#else
|
||||
x1 = __PKHBT(x0, x2, 0);
|
||||
#endif
|
||||
|
||||
/* Read state x[n-N-4], x[n-N-5] */
|
||||
x0 = read_q15x2_ia (&px);
|
||||
|
||||
/* acc1 += b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
|
||||
acc1 = __SMLADX(x1, c0, acc1);
|
||||
|
||||
/* pack x[n-N-3] and x[n-N-4] */
|
||||
#ifndef ARM_MATH_BIG_ENDIAN
|
||||
x1 = __PKHBT(x0, x2, 0);
|
||||
#else
|
||||
x1 = __PKHBT(x2, x0, 0);
|
||||
#endif
|
||||
|
||||
/* acc3 += b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
|
||||
acc3 = __SMLADX(x1, c0, acc3);
|
||||
|
||||
/* Read coefficients b[N-2], b[N-3] */
|
||||
c0 = read_q15x2_ia ((q15_t **) &pb);
|
||||
|
||||
/* acc0 += b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
|
||||
acc0 = __SMLAD(x2, c0, acc0);
|
||||
|
||||
/* Read state x[n-N-6], x[n-N-7] with offset */
|
||||
x2 = read_q15x2_ia (&px);
|
||||
|
||||
/* acc2 += b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
|
||||
acc2 = __SMLAD(x0, c0, acc2);
|
||||
|
||||
/* acc1 += b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
|
||||
acc1 = __SMLADX(x1, c0, acc1);
|
||||
|
||||
/* pack x[n-N-5] and x[n-N-6] */
|
||||
#ifndef ARM_MATH_BIG_ENDIAN
|
||||
x1 = __PKHBT(x2, x0, 0);
|
||||
#else
|
||||
x1 = __PKHBT(x0, x2, 0);
|
||||
#endif
|
||||
|
||||
/* acc3 += b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
|
||||
acc3 = __SMLADX(x1, c0, acc3);
|
||||
|
||||
/* Decrement tap count */
|
||||
tapCnt--;
|
||||
}
|
||||
|
||||
/* If the filter length is not a multiple of 4, compute the remaining filter taps.
|
||||
This is always be 2 taps since the filter length is even. */
|
||||
if ((numTaps & 0x3U) != 0U)
|
||||
{
|
||||
/* Read last two coefficients */
|
||||
c0 = read_q15x2_ia ((q15_t **) &pb);
|
||||
|
||||
/* Perform the multiply-accumulates */
|
||||
acc0 = __SMLAD(x0, c0, acc0);
|
||||
acc2 = __SMLAD(x2, c0, acc2);
|
||||
|
||||
/* pack state variables */
|
||||
#ifndef ARM_MATH_BIG_ENDIAN
|
||||
x1 = __PKHBT(x2, x0, 0);
|
||||
#else
|
||||
x1 = __PKHBT(x0, x2, 0);
|
||||
#endif
|
||||
|
||||
/* Read last state variables */
|
||||
x0 = read_q15x2 (px);
|
||||
|
||||
/* Perform the multiply-accumulates */
|
||||
acc1 = __SMLADX(x1, c0, acc1);
|
||||
|
||||
/* pack state variables */
|
||||
#ifndef ARM_MATH_BIG_ENDIAN
|
||||
x1 = __PKHBT(x0, x2, 0);
|
||||
#else
|
||||
x1 = __PKHBT(x2, x0, 0);
|
||||
#endif
|
||||
|
||||
/* Perform the multiply-accumulates */
|
||||
acc3 = __SMLADX(x1, c0, acc3);
|
||||
}
|
||||
|
||||
/* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
|
||||
Then store the 4 outputs in the destination buffer. */
|
||||
#ifndef ARM_MATH_BIG_ENDIAN
|
||||
write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
|
||||
write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
|
||||
#else
|
||||
write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
|
||||
write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
|
||||
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
|
||||
|
||||
/* Advance the state pointer by 4 to process the next group of 4 samples */
|
||||
pState = pState + 4U;
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining output samples */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of taps */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* Copy two samples into state buffer */
|
||||
*pStateCurnt++ = *pSrc++;
|
||||
|
||||
/* Set the accumulator to zero */
|
||||
acc0 = 0;
|
||||
|
||||
/* Use SIMD to hold states and coefficients */
|
||||
px = pState;
|
||||
pb = pCoeffs;
|
||||
|
||||
tapCnt = numTaps >> 1U;
|
||||
|
||||
do
|
||||
{
|
||||
acc0 += (q31_t) *px++ * *pb++;
|
||||
acc0 += (q31_t) *px++ * *pb++;
|
||||
|
||||
tapCnt--;
|
||||
}
|
||||
while (tapCnt > 0U);
|
||||
|
||||
/* The result is in 2.30 format. Convert to 1.15 with saturation.
|
||||
Then store the output in the destination buffer. */
|
||||
*pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
|
||||
|
||||
/* Advance state pointer by 1 for the next sample */
|
||||
pState = pState + 1U;
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Processing is complete.
|
||||
Now copy the last numTaps - 1 samples to the start of the state buffer.
|
||||
This prepares the state buffer for the next function call. */
|
||||
|
||||
/* Points to the start of the state buffer */
|
||||
pStateCurnt = S->pState;
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 taps at a time */
|
||||
tapCnt = (numTaps - 1U) >> 2U;
|
||||
|
||||
/* Copy data */
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
*pStateCurnt++ = *pState++;
|
||||
*pStateCurnt++ = *pState++;
|
||||
*pStateCurnt++ = *pState++;
|
||||
*pStateCurnt++ = *pState++;
|
||||
|
||||
/* Decrement loop counter */
|
||||
tapCnt--;
|
||||
}
|
||||
|
||||
/* Calculate remaining number of copies */
|
||||
tapCnt = (numTaps - 1U) % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize tapCnt with number of taps */
|
||||
tapCnt = (numTaps - 1U);
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
/* Copy remaining data */
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
*pStateCurnt++ = *pState++;
|
||||
|
||||
/* Decrement loop counter */
|
||||
tapCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
@} end of FIR group
|
||||
*/
|
||||
@@ -0,0 +1,774 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_fir_interpolate_q15.c
|
||||
* Description: Q15 FIR interpolation
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/filtering_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupFilters
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup FIR_Interpolate
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Processing function for the Q15 FIR interpolator.
|
||||
@param[in] S points to an instance of the Q15 FIR interpolator structure
|
||||
@param[in] pSrc points to the block of input data
|
||||
@param[out] pDst points to the block of output data
|
||||
@param[in] blockSize number of samples to process
|
||||
@return none
|
||||
|
||||
@par Scaling and Overflow Behavior
|
||||
The function is implemented using a 64-bit internal accumulator.
|
||||
Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
|
||||
The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
|
||||
There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
|
||||
After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
|
||||
Lastly, the accumulator is saturated to yield a result in 1.15 format.
|
||||
*/
|
||||
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
|
||||
#include "arm_helium_utils.h"
|
||||
__STATIC_INLINE void arm_fir_interpolate_q15(
|
||||
const arm_fir_interpolate_instance_q15 * S,
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
q15_t *pState = S->pState; /* State pointer */
|
||||
const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
|
||||
q15_t *pStateCurnt; /* Points to the current sample of the state */
|
||||
const q15_t *ptr1, *ptr2; /* Temporary pointers for state and coefficient buffers */
|
||||
|
||||
uint32_t i, blkCnt; /* Loop counters */
|
||||
uint16_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
|
||||
uint16_t strides[8] = {
|
||||
0, 1 * S->L, 2 * S->L, 3 * S->L,
|
||||
4 * S->L, 5 * S->L, 6 * S->L, 7 * S->L
|
||||
};
|
||||
uint16x8_t vec_strides0 = *(uint16x8_t *) strides;
|
||||
uint16x8_t vec_strides1 = vec_strides0 + 1;
|
||||
uint16x8_t vec_strides2 = vec_strides0 + 2;
|
||||
uint16x8_t vec_strides3 = vec_strides0 + 3;
|
||||
q15x8_t vecState, vecCoef;
|
||||
|
||||
/*
|
||||
* S->pState buffer contains previous frame (phaseLen - 1) samples
|
||||
* pStateCurnt points to the location where the new input data should be written
|
||||
*/
|
||||
pStateCurnt = S->pState + ((q15_t) phaseLen - 1);
|
||||
/*
|
||||
* Total number of intput samples
|
||||
*/
|
||||
blkCnt = blockSize;
|
||||
/*
|
||||
* Loop over the blockSize.
|
||||
*/
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/*
|
||||
* Copy new input sample into the state buffer
|
||||
*/
|
||||
*pStateCurnt++ = *pSrc++;
|
||||
/*
|
||||
* Loop over the Interpolation factor.
|
||||
*/
|
||||
i = S->L;
|
||||
while (i > 0U)
|
||||
{
|
||||
/*
|
||||
* Initialize state pointer
|
||||
*/
|
||||
ptr1 = pState;
|
||||
if (i >= 4)
|
||||
{
|
||||
/*
|
||||
* Initialize coefficient pointer
|
||||
*/
|
||||
ptr2 = pCoeffs + (i - 1 - 3U);
|
||||
|
||||
q63_t acc0 = 0LL;
|
||||
q63_t acc1 = 0LL;
|
||||
q63_t acc2 = 0LL;
|
||||
q63_t acc3 = 0LL;
|
||||
|
||||
uint32_t tapCnt = phaseLen >> 3;
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
vecState = vldrhq_s16(ptr1);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides3);
|
||||
acc0 = vmlaldavaq(acc0, vecState, vecCoef);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides2);
|
||||
acc1 = vmlaldavaq(acc1, vecState, vecCoef);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1);
|
||||
acc2 = vmlaldavaq(acc2, vecState, vecCoef);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0);
|
||||
acc3 = vmlaldavaq(acc3, vecState, vecCoef);
|
||||
|
||||
ptr1 += 8;
|
||||
ptr2 = ptr2 + S->L * 8;
|
||||
tapCnt--;
|
||||
}
|
||||
tapCnt = phaseLen & 7;
|
||||
if (tapCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(tapCnt);
|
||||
|
||||
vecState = vldrhq_z_s16(ptr1, p0);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides3, p0);
|
||||
acc0 = vmlaldavaq(acc0, vecState, vecCoef);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides2, p0);
|
||||
acc1 = vmlaldavaq(acc1, vecState, vecCoef);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0);
|
||||
acc2 = vmlaldavaq(acc2, vecState, vecCoef);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0);
|
||||
acc3 = vmlaldavaq(acc3, vecState, vecCoef);
|
||||
}
|
||||
|
||||
acc0 = asrl(acc0, 15);
|
||||
acc1 = asrl(acc1, 15);
|
||||
acc2 = asrl(acc2, 15);
|
||||
acc3 = asrl(acc3, 15);
|
||||
|
||||
*pDst++ = (q15_t) __SSAT(acc0, 16);
|
||||
*pDst++ = (q15_t) __SSAT(acc1, 16);
|
||||
*pDst++ = (q15_t) __SSAT(acc2, 16);
|
||||
*pDst++ = (q15_t) __SSAT(acc3, 16);
|
||||
i -= 4;
|
||||
}
|
||||
else if (i >= 3)
|
||||
{
|
||||
/*
|
||||
* Initialize coefficient pointer
|
||||
*/
|
||||
ptr2 = pCoeffs + (i - 1U - 2);
|
||||
|
||||
q63_t acc0 = 0LL;
|
||||
q63_t acc1 = 0LL;
|
||||
q63_t acc2 = 0LL;
|
||||
|
||||
uint32_t tapCnt = phaseLen >> 3;
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
vecState = vldrhq_s16(ptr1);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides2);
|
||||
acc0 = vmlaldavaq(acc0, vecState, vecCoef);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1);
|
||||
acc1 = vmlaldavaq(acc1, vecState, vecCoef);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0);
|
||||
acc2 = vmlaldavaq(acc2, vecState, vecCoef);
|
||||
|
||||
ptr1 += 8;
|
||||
ptr2 = ptr2 + S->L * 8;
|
||||
tapCnt--;
|
||||
}
|
||||
tapCnt = phaseLen & 7;
|
||||
if (tapCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(tapCnt);
|
||||
|
||||
vecState = vldrhq_z_s16(ptr1, p0);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides2, p0);
|
||||
acc0 = vmlaldavaq(acc0, vecState, vecCoef);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0);
|
||||
acc1 = vmlaldavaq(acc1, vecState, vecCoef);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0);
|
||||
acc2 = vmlaldavaq(acc2, vecState, vecCoef);
|
||||
}
|
||||
|
||||
acc0 = asrl(acc0, 15);
|
||||
acc1 = asrl(acc1, 15);
|
||||
acc2 = asrl(acc2, 15);
|
||||
|
||||
*pDst++ = (q15_t) __SSAT(acc0, 16);;
|
||||
*pDst++ = (q15_t) __SSAT(acc1, 16);;
|
||||
*pDst++ = (q15_t) __SSAT(acc2, 16);;
|
||||
i -= 3;
|
||||
}
|
||||
else if (i >= 2)
|
||||
{
|
||||
/*
|
||||
* Initialize coefficient pointer
|
||||
*/
|
||||
ptr2 = pCoeffs + (i - 1U - 1);
|
||||
|
||||
q63_t acc0 = 0LL;
|
||||
q63_t acc1 = 0LL;
|
||||
|
||||
uint32_t tapCnt = phaseLen >> 3;
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
vecState = vldrhq_s16(ptr1);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1);
|
||||
acc0 = vmlaldavaq(acc0, vecState, vecCoef);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0);
|
||||
acc1 = vmlaldavaq(acc1, vecState, vecCoef);
|
||||
|
||||
ptr1 += 8;
|
||||
ptr2 = ptr2 + S->L * 8;
|
||||
tapCnt--;
|
||||
}
|
||||
tapCnt = phaseLen & 7;
|
||||
if (tapCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(tapCnt);
|
||||
|
||||
vecState = vldrhq_z_s16(ptr1, p0);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0);
|
||||
acc0 = vmlaldavaq(acc0, vecState, vecCoef);
|
||||
|
||||
vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0);
|
||||
acc1 = vmlaldavaq(acc1, vecState, vecCoef);
|
||||
}
|
||||
|
||||
acc0 = asrl(acc0, 15);
|
||||
acc1 = asrl(acc1, 15);
|
||||
|
||||
*pDst++ = (q15_t) __SSAT(acc0, 16);
|
||||
*pDst++ = (q15_t) __SSAT(acc1, 16);
|
||||
i -= 2;
|
||||
}
|
||||
else
|
||||
{
|
||||
/*
|
||||
* Initialize coefficient pointer
|
||||
*/
|
||||
ptr2 = pCoeffs + (i - 1U);
|
||||
|
||||
q63_t acc0 = 0LL;
|
||||
|
||||
uint32_t tapCnt = phaseLen >> 3;
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
vecState = vldrhq_s16(ptr1);
|
||||
vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0);
|
||||
|
||||
acc0 = vmlaldavaq(acc0, vecState, vecCoef);
|
||||
|
||||
ptr1 += 8;
|
||||
ptr2 = ptr2 + S->L * 8;
|
||||
tapCnt--;
|
||||
}
|
||||
tapCnt = phaseLen & 7;
|
||||
if (tapCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(tapCnt);
|
||||
|
||||
vecState = vldrhq_z_s16(ptr1, p0);
|
||||
vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0);
|
||||
acc0 = vmlaldavaq(acc0, vecState, vecCoef);
|
||||
}
|
||||
|
||||
acc0 = asrl(acc0, 15);
|
||||
*pDst++ = (q15_t) __SSAT(acc0, 16);
|
||||
/*
|
||||
* Decrement the loop counter
|
||||
*/
|
||||
i--;
|
||||
}
|
||||
}
|
||||
/*
|
||||
* Advance the state pointer by 1
|
||||
* * to process the next group of interpolation factor number samples
|
||||
*/
|
||||
pState = pState + 1;
|
||||
/*
|
||||
* Decrement the loop counter
|
||||
*/
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/*
|
||||
* Processing is complete.
|
||||
* Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
|
||||
* This prepares the state buffer for the next function call.
|
||||
*/
|
||||
|
||||
/*
|
||||
* Points to the start of the state buffer
|
||||
*/
|
||||
pStateCurnt = S->pState;
|
||||
blkCnt = (phaseLen - 1U) >> 3;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
vstrhq_s16(pStateCurnt, vldrhq_s16(pState));
|
||||
pState += 8;
|
||||
pStateCurnt += 8;
|
||||
blkCnt--;
|
||||
}
|
||||
blkCnt = (phaseLen - 1U) & 7;
|
||||
if (blkCnt > 0U)
|
||||
{
|
||||
mve_pred16_t p0 = vctp16q(blkCnt);
|
||||
vstrhq_p_s16(pStateCurnt, vldrhq_s16(pState), p0);
|
||||
}
|
||||
}
|
||||
#else
|
||||
void arm_fir_interpolate_q15(
|
||||
const arm_fir_interpolate_instance_q15 * S,
|
||||
const q15_t * pSrc,
|
||||
q15_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
#if (1)
|
||||
//#if !defined(ARM_MATH_CM0_FAMILY)
|
||||
|
||||
q15_t *pState = S->pState; /* State pointer */
|
||||
const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
|
||||
q15_t *pStateCur; /* Points to the current sample of the state */
|
||||
q15_t *ptr1; /* Temporary pointer for state buffer */
|
||||
const q15_t *ptr2; /* Temporary pointer for coefficient buffer */
|
||||
q63_t sum0; /* Accumulators */
|
||||
uint32_t i, blkCnt, tapCnt; /* Loop counters */
|
||||
uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
|
||||
uint32_t j;
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
q63_t acc0, acc1, acc2, acc3;
|
||||
q15_t x0, x1, x2, x3;
|
||||
q15_t c0, c1, c2, c3;
|
||||
#endif
|
||||
|
||||
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
|
||||
/* pStateCur points to the location where the new input data should be written */
|
||||
pStateCur = S->pState + (phaseLen - 1U);
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* Copy new input sample into the state buffer */
|
||||
*pStateCur++ = *pSrc++;
|
||||
*pStateCur++ = *pSrc++;
|
||||
*pStateCur++ = *pSrc++;
|
||||
*pStateCur++ = *pSrc++;
|
||||
|
||||
/* Address modifier index of coefficient buffer */
|
||||
j = 1U;
|
||||
|
||||
/* Loop over the Interpolation factor. */
|
||||
i = (S->L);
|
||||
|
||||
while (i > 0U)
|
||||
{
|
||||
/* Set accumulator to zero */
|
||||
acc0 = 0;
|
||||
acc1 = 0;
|
||||
acc2 = 0;
|
||||
acc3 = 0;
|
||||
|
||||
/* Initialize state pointer */
|
||||
ptr1 = pState;
|
||||
|
||||
/* Initialize coefficient pointer */
|
||||
ptr2 = pCoeffs + (S->L - j);
|
||||
|
||||
/* Loop over the polyPhase length. Unroll by a factor of 4.
|
||||
Repeat until we've computed numTaps-(4*S->L) coefficients. */
|
||||
tapCnt = phaseLen >> 2U;
|
||||
|
||||
x0 = *(ptr1++);
|
||||
x1 = *(ptr1++);
|
||||
x2 = *(ptr1++);
|
||||
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
/* Read the input sample */
|
||||
x3 = *(ptr1++);
|
||||
|
||||
/* Read the coefficient */
|
||||
c0 = *(ptr2);
|
||||
|
||||
/* Perform the multiply-accumulate */
|
||||
acc0 += (q63_t) x0 * c0;
|
||||
acc1 += (q63_t) x1 * c0;
|
||||
acc2 += (q63_t) x2 * c0;
|
||||
acc3 += (q63_t) x3 * c0;
|
||||
|
||||
/* Read the coefficient */
|
||||
c1 = *(ptr2 + S->L);
|
||||
|
||||
/* Read the input sample */
|
||||
x0 = *(ptr1++);
|
||||
|
||||
/* Perform the multiply-accumulate */
|
||||
acc0 += (q63_t) x1 * c1;
|
||||
acc1 += (q63_t) x2 * c1;
|
||||
acc2 += (q63_t) x3 * c1;
|
||||
acc3 += (q63_t) x0 * c1;
|
||||
|
||||
/* Read the coefficient */
|
||||
c2 = *(ptr2 + S->L * 2);
|
||||
|
||||
/* Read the input sample */
|
||||
x1 = *(ptr1++);
|
||||
|
||||
/* Perform the multiply-accumulate */
|
||||
acc0 += (q63_t) x2 * c2;
|
||||
acc1 += (q63_t) x3 * c2;
|
||||
acc2 += (q63_t) x0 * c2;
|
||||
acc3 += (q63_t) x1 * c2;
|
||||
|
||||
/* Read the coefficient */
|
||||
c3 = *(ptr2 + S->L * 3);
|
||||
|
||||
/* Read the input sample */
|
||||
x2 = *(ptr1++);
|
||||
|
||||
/* Perform the multiply-accumulate */
|
||||
acc0 += (q63_t) x3 * c3;
|
||||
acc1 += (q63_t) x0 * c3;
|
||||
acc2 += (q63_t) x1 * c3;
|
||||
acc3 += (q63_t) x2 * c3;
|
||||
|
||||
|
||||
/* Upsampling is done by stuffing L-1 zeros between each sample.
|
||||
* So instead of multiplying zeros with coefficients,
|
||||
* Increment the coefficient pointer by interpolation factor times. */
|
||||
ptr2 += 4 * S->L;
|
||||
|
||||
/* Decrement loop counter */
|
||||
tapCnt--;
|
||||
}
|
||||
|
||||
/* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
|
||||
tapCnt = phaseLen % 0x4U;
|
||||
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
/* Read the input sample */
|
||||
x3 = *(ptr1++);
|
||||
|
||||
/* Read the coefficient */
|
||||
c0 = *(ptr2);
|
||||
|
||||
/* Perform the multiply-accumulate */
|
||||
acc0 += (q63_t) x0 * c0;
|
||||
acc1 += (q63_t) x1 * c0;
|
||||
acc2 += (q63_t) x2 * c0;
|
||||
acc3 += (q63_t) x3 * c0;
|
||||
|
||||
/* Increment the coefficient pointer by interpolation factor times. */
|
||||
ptr2 += S->L;
|
||||
|
||||
/* update states for next sample processing */
|
||||
x0 = x1;
|
||||
x1 = x2;
|
||||
x2 = x3;
|
||||
|
||||
/* Decrement loop counter */
|
||||
tapCnt--;
|
||||
}
|
||||
|
||||
/* The result is in the accumulator, store in the destination buffer. */
|
||||
*(pDst ) = (q15_t) (__SSAT((acc0 >> 15), 16));
|
||||
*(pDst + S->L) = (q15_t) (__SSAT((acc1 >> 15), 16));
|
||||
*(pDst + 2 * S->L) = (q15_t) (__SSAT((acc2 >> 15), 16));
|
||||
*(pDst + 3 * S->L) = (q15_t) (__SSAT((acc3 >> 15), 16));
|
||||
|
||||
pDst++;
|
||||
|
||||
/* Increment the address modifier index of coefficient buffer */
|
||||
j++;
|
||||
|
||||
/* Decrement loop counter */
|
||||
i--;
|
||||
}
|
||||
|
||||
/* Advance the state pointer by 1
|
||||
* to process the next group of interpolation factor number samples */
|
||||
pState = pState + 4;
|
||||
|
||||
pDst += S->L * 3;
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* Copy new input sample into the state buffer */
|
||||
*pStateCur++ = *pSrc++;
|
||||
|
||||
/* Address modifier index of coefficient buffer */
|
||||
j = 1U;
|
||||
|
||||
/* Loop over the Interpolation factor. */
|
||||
i = S->L;
|
||||
while (i > 0U)
|
||||
{
|
||||
/* Set accumulator to zero */
|
||||
sum0 = 0;
|
||||
|
||||
/* Initialize state pointer */
|
||||
ptr1 = pState;
|
||||
|
||||
/* Initialize coefficient pointer */
|
||||
ptr2 = pCoeffs + (S->L - j);
|
||||
|
||||
/* Loop over the polyPhase length.
|
||||
Repeat until we've computed numTaps-(4*S->L) coefficients. */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
tapCnt = phaseLen >> 2U;
|
||||
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
/* Perform the multiply-accumulate */
|
||||
sum0 += (q63_t) *ptr1++ * *ptr2;
|
||||
|
||||
/* Upsampling is done by stuffing L-1 zeros between each sample.
|
||||
* So instead of multiplying zeros with coefficients,
|
||||
* Increment the coefficient pointer by interpolation factor times. */
|
||||
ptr2 += S->L;
|
||||
|
||||
sum0 += (q63_t) *ptr1++ * *ptr2;
|
||||
ptr2 += S->L;
|
||||
|
||||
sum0 += (q63_t) *ptr1++ * *ptr2;
|
||||
ptr2 += S->L;
|
||||
|
||||
sum0 += (q63_t) *ptr1++ * *ptr2;
|
||||
ptr2 += S->L;
|
||||
|
||||
/* Decrement loop counter */
|
||||
tapCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
tapCnt = phaseLen % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize tapCnt with number of samples */
|
||||
tapCnt = phaseLen;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
/* Perform the multiply-accumulate */
|
||||
sum0 += (q63_t) *ptr1++ * *ptr2;
|
||||
|
||||
/* Upsampling is done by stuffing L-1 zeros between each sample.
|
||||
* So instead of multiplying zeros with coefficients,
|
||||
* Increment the coefficient pointer by interpolation factor times. */
|
||||
ptr2 += S->L;
|
||||
|
||||
/* Decrement loop counter */
|
||||
tapCnt--;
|
||||
}
|
||||
|
||||
/* The result is in the accumulator, store in the destination buffer. */
|
||||
*pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
|
||||
|
||||
/* Increment the address modifier index of coefficient buffer */
|
||||
j++;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
i--;
|
||||
}
|
||||
|
||||
/* Advance the state pointer by 1
|
||||
* to process the next group of interpolation factor number samples */
|
||||
pState = pState + 1;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Processing is complete.
|
||||
Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
|
||||
This prepares the state buffer for the next function call. */
|
||||
|
||||
/* Points to the start of the state buffer */
|
||||
pStateCur = S->pState;
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
tapCnt = (phaseLen - 1U) >> 2U;
|
||||
|
||||
/* copy data */
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
|
||||
write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
|
||||
|
||||
/* Decrement loop counter */
|
||||
tapCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
tapCnt = (phaseLen - 1U) % 0x04U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize tapCnt with number of samples */
|
||||
tapCnt = (phaseLen - 1U);
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
/* Copy data */
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
*pStateCur++ = *pState++;
|
||||
|
||||
/* Decrement loop counter */
|
||||
tapCnt--;
|
||||
}
|
||||
|
||||
#else
|
||||
/* alternate version for CM0_FAMILY */
|
||||
|
||||
q15_t *pState = S->pState; /* State pointer */
|
||||
const q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */
|
||||
q15_t *pStateCur; /* Points to the current sample of the state */
|
||||
q15_t *ptr1; /* Temporary pointer for state buffer */
|
||||
const q15_t *ptr2; /* Temporary pointer for coefficient buffer */
|
||||
q63_t sum0; /* Accumulators */
|
||||
uint32_t i, blkCnt, tapCnt; /* Loop counters */
|
||||
uint32_t phaseLen = S->phaseLength; /* Length of each polyphase filter component */
|
||||
|
||||
/* S->pState buffer contains previous frame (phaseLen - 1) samples */
|
||||
/* pStateCur points to the location where the new input data should be written */
|
||||
pStateCur = S->pState + (phaseLen - 1U);
|
||||
|
||||
/* Total number of intput samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
/* Loop over the blockSize. */
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* Copy new input sample into the state buffer */
|
||||
*pStateCur++ = *pSrc++;
|
||||
|
||||
/* Loop over the Interpolation factor. */
|
||||
i = S->L;
|
||||
|
||||
while (i > 0U)
|
||||
{
|
||||
/* Set accumulator to zero */
|
||||
sum0 = 0;
|
||||
|
||||
/* Initialize state pointer */
|
||||
ptr1 = pState;
|
||||
|
||||
/* Initialize coefficient pointer */
|
||||
ptr2 = pCoeffs + (i - 1U);
|
||||
|
||||
/* Loop over the polyPhase length */
|
||||
tapCnt = phaseLen;
|
||||
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
/* Perform the multiply-accumulate */
|
||||
sum0 += ((q63_t) *ptr1++ * *ptr2);
|
||||
|
||||
/* Increment the coefficient pointer by interpolation factor times. */
|
||||
ptr2 += S->L;
|
||||
|
||||
/* Decrement the loop counter */
|
||||
tapCnt--;
|
||||
}
|
||||
|
||||
/* Store the result after converting to 1.15 format in the destination buffer. */
|
||||
*pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
|
||||
|
||||
/* Decrement loop counter */
|
||||
i--;
|
||||
}
|
||||
|
||||
/* Advance the state pointer by 1
|
||||
* to process the next group of interpolation factor number samples */
|
||||
pState = pState + 1;
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Processing is complete.
|
||||
** Now copy the last phaseLen - 1 samples to the start of the state buffer.
|
||||
** This prepares the state buffer for the next function call. */
|
||||
|
||||
/* Points to the start of the state buffer */
|
||||
pStateCur = S->pState;
|
||||
|
||||
tapCnt = phaseLen - 1U;
|
||||
|
||||
/* Copy data */
|
||||
while (tapCnt > 0U)
|
||||
{
|
||||
*pStateCur++ = *pState++;
|
||||
|
||||
/* Decrement loop counter */
|
||||
tapCnt--;
|
||||
}
|
||||
|
||||
#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI)*/
|
||||
/**
|
||||
@} end of FIR_Interpolate group
|
||||
*/
|
||||
@@ -0,0 +1,181 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_q15_to_q31.c
|
||||
* Description: Converts the elements of the Q15 vector to Q31 vector
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/support_functions.h"
|
||||
|
||||
/**
|
||||
@ingroup groupSupport
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup q15_to_x
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Converts the elements of the Q15 vector to Q31 vector.
|
||||
@param[in] pSrc points to the Q15 input vector
|
||||
@param[out] pDst points to the Q31 output vector
|
||||
@param[in] blockSize number of samples in each vector
|
||||
|
||||
@par Details
|
||||
The equation used for the conversion process is:
|
||||
<pre>
|
||||
pDst[n] = (q31_t) pSrc[n] << 16; 0 <= n < blockSize.
|
||||
</pre>
|
||||
*/
|
||||
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
|
||||
__STATIC_INLINE void arm_q15_to_q31(
|
||||
const q15_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
|
||||
uint32_t blkCnt;
|
||||
|
||||
q31x4_t vecDst;
|
||||
|
||||
blkCnt = blockSize>> 2;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
|
||||
/* C = (q31_t)A << 16 */
|
||||
/* convert from q15 to q31 and then store the results in the destination buffer */
|
||||
/* load q15 + 32-bit widening */
|
||||
vecDst = vldrhq_s32((q15_t const *) pSrc);
|
||||
vecDst = vshlq_n(vecDst, 16);
|
||||
vstrwq_s32(pDst, vecDst);
|
||||
|
||||
/*
|
||||
* Decrement the blockSize loop counter
|
||||
* Advance vector source and destination pointers
|
||||
*/
|
||||
pDst += 4;
|
||||
pSrc += 4;
|
||||
blkCnt --;
|
||||
}
|
||||
|
||||
blkCnt = blockSize & 3;
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = (q31_t) A << 16 */
|
||||
|
||||
/* Convert from q15 to q31 and store result in destination buffer */
|
||||
*pDst++ = (q31_t) *pSrc++ << 16;
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
}
|
||||
#else
|
||||
void arm_q15_to_q31(
|
||||
const q15_t * pSrc,
|
||||
q31_t * pDst,
|
||||
uint32_t blockSize)
|
||||
{
|
||||
uint32_t blkCnt; /* Loop counter */
|
||||
const q15_t *pIn = pSrc; /* Source pointer */
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
q31_t in1, in2;
|
||||
q31_t out1, out2, out3, out4;
|
||||
#endif
|
||||
|
||||
#if defined (ARM_MATH_LOOPUNROLL)
|
||||
|
||||
/* Loop unrolling: Compute 4 outputs at a time */
|
||||
blkCnt = blockSize >> 2U;
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = (q31_t)A << 16 */
|
||||
|
||||
/* Convert from q15 to q31 and store result in destination buffer */
|
||||
in1 = read_q15x2_ia (&pIn);
|
||||
in2 = read_q15x2_ia (&pIn);
|
||||
|
||||
#ifndef ARM_MATH_BIG_ENDIAN
|
||||
|
||||
/* extract lower 16 bits to 32 bit result */
|
||||
out1 = in1 << 16U;
|
||||
/* extract upper 16 bits to 32 bit result */
|
||||
out2 = in1 & 0xFFFF0000;
|
||||
/* extract lower 16 bits to 32 bit result */
|
||||
out3 = in2 << 16U;
|
||||
/* extract upper 16 bits to 32 bit result */
|
||||
out4 = in2 & 0xFFFF0000;
|
||||
|
||||
#else
|
||||
|
||||
/* extract upper 16 bits to 32 bit result */
|
||||
out1 = in1 & 0xFFFF0000;
|
||||
/* extract lower 16 bits to 32 bit result */
|
||||
out2 = in1 << 16U;
|
||||
/* extract upper 16 bits to 32 bit result */
|
||||
out3 = in2 & 0xFFFF0000;
|
||||
/* extract lower 16 bits to 32 bit result */
|
||||
out4 = in2 << 16U;
|
||||
|
||||
#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
|
||||
|
||||
*pDst++ = out1;
|
||||
*pDst++ = out2;
|
||||
*pDst++ = out3;
|
||||
*pDst++ = out4;
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
/* Loop unrolling: Compute remaining outputs */
|
||||
blkCnt = blockSize % 0x4U;
|
||||
|
||||
#else
|
||||
|
||||
/* Initialize blkCnt with number of samples */
|
||||
blkCnt = blockSize;
|
||||
|
||||
#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
|
||||
|
||||
while (blkCnt > 0U)
|
||||
{
|
||||
/* C = (q31_t) A << 16 */
|
||||
|
||||
/* Convert from q15 to q31 and store result in destination buffer */
|
||||
*pDst++ = (q31_t) *pIn++ << 16;
|
||||
|
||||
/* Decrement loop counter */
|
||||
blkCnt--;
|
||||
}
|
||||
|
||||
}
|
||||
#endif /* defined(ARM_MATH_MVEI) */
|
||||
|
||||
/**
|
||||
@} end of q15_to_x group
|
||||
*/
|
||||
@@ -0,0 +1,82 @@
|
||||
/* ----------------------------------------------------------------------
|
||||
* Project: CMSIS DSP Library
|
||||
* Title: arm_sin_q31.c
|
||||
* Description: Fast sine calculation for Q31 values
|
||||
*
|
||||
* $Date: 23 April 2021
|
||||
* $Revision: V1.9.0
|
||||
*
|
||||
* Target Processor: Cortex-M and Cortex-A cores
|
||||
* -------------------------------------------------------------------- */
|
||||
/*
|
||||
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the License); you may
|
||||
* not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include "dsp/fast_math_functions.h"
|
||||
#include "arm_common_tables.h"
|
||||
|
||||
/**
|
||||
@ingroup groupFastMath
|
||||
*/
|
||||
|
||||
/**
|
||||
@addtogroup sin
|
||||
@{
|
||||
*/
|
||||
|
||||
/**
|
||||
@brief Fast approximation to the trigonometric sine function for Q31 data.
|
||||
@param[in] x Scaled input value in radians
|
||||
@return sin(x)
|
||||
|
||||
The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
|
||||
*/
|
||||
|
||||
q31_t arm_sin_q31(
|
||||
q31_t x)
|
||||
{
|
||||
q31_t sinVal; /* Temporary variables for input, output */
|
||||
int32_t index; /* Index variable */
|
||||
q31_t a, b; /* Two nearest output values */
|
||||
q31_t fract; /* Temporary values for fractional values */
|
||||
|
||||
if (x < 0)
|
||||
{ /* convert negative numbers to corresponding positive ones */
|
||||
x = (uint32_t)x + 0x80000000;
|
||||
}
|
||||
|
||||
/* Calculate the nearest index */
|
||||
index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
|
||||
|
||||
/* Calculation of fractional value */
|
||||
fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
|
||||
|
||||
/* Read two nearest values of input value from the sin table */
|
||||
a = sinTable_q31[index];
|
||||
b = sinTable_q31[index+1];
|
||||
|
||||
/* Linear interpolation process */
|
||||
sinVal = (q63_t) (0x80000000 - fract) * a >> 32;
|
||||
sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) fract * b)) >> 32);
|
||||
|
||||
/* Return output value */
|
||||
return (sinVal << 1);
|
||||
}
|
||||
|
||||
/**
|
||||
@} end of sin group
|
||||
*/
|
||||
+104
@@ -0,0 +1,104 @@
|
||||
/*
|
||||
* Copyright (C) 2015,2016,2017,2018,2020,2024 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if !defined(CONFIG_H)
|
||||
#define CONFIG_H
|
||||
|
||||
// Allow for the selection of which modes to compile into the firmware. This is particularly useful for processors
|
||||
// which have limited code space and processing power.
|
||||
|
||||
// Enable D-Star support.
|
||||
#define MODE_DSTAR
|
||||
|
||||
// Enable DMR support.
|
||||
#define MODE_DMR
|
||||
|
||||
// Enable System Fusion support.
|
||||
#define MODE_YSF
|
||||
|
||||
// Enable P25 phase 1 support.
|
||||
#define MODE_P25
|
||||
|
||||
// Enable NXDN support, the boxcar filter sometimes improves the performance of NXDN receive on some systems.
|
||||
#define MODE_NXDN
|
||||
#define USE_NXDN_BOXCAR
|
||||
|
||||
// Enable M17 support.
|
||||
#define MODE_M17
|
||||
|
||||
// Enable POCSAG support.
|
||||
#define MODE_POCSAG
|
||||
|
||||
// Enable FM support.
|
||||
#define MODE_FM
|
||||
|
||||
// Enable AX.25 support, this is only enabled if FM is also enabled.
|
||||
#define MODE_AX25
|
||||
|
||||
// Select a baud rate for host communication. The faster speeds are needed for external FM to work.
|
||||
// #define SERIAL_SPEED 115200 // Suitable for most older boards. External FM will NOT work with this!
|
||||
// #define SERIAL_SPEED 230400 // Only works on newer boards like fast M4, M7. External FM might work with this
|
||||
#define SERIAL_SPEED 460800 // Only works on newer boards like fast M4, M7. External FM will work with this
|
||||
//#define SERIAL_SPEED 500000 // Used with newer boards and Armbian on AllWinner SOCs (H2, H3) that do not support 460800
|
||||
|
||||
// Use pins to output the current mode via LEDs
|
||||
#define MODE_LEDS
|
||||
|
||||
// Pass RSSI information to the host
|
||||
#define SEND_RSSI_DATA
|
||||
|
||||
// Use the modem as a serial repeater for Nextion displays
|
||||
#define SERIAL_REPEATER
|
||||
|
||||
// Set the baud rate of the modem serial repeater for Nextion displays
|
||||
#define SERIAL_REPEATER_BAUD_RATE 9600
|
||||
|
||||
// Use the modem as an I2C repeater for OLED displays
|
||||
// #define I2C_REPEATER
|
||||
|
||||
// To reduce CPU load, you can remove the DC blocker by commenting out the next line
|
||||
#define USE_DCBLOCKER
|
||||
|
||||
// Choose the type of modem board in use, only one.
|
||||
// The KI6ZUM v0.9 Pi hat, STM32F446 CPU
|
||||
#define ZUM_V09_PI
|
||||
// The KI6ZUM v1.0 Pi hat, STM32F722 CPU
|
||||
// #define ZUM_V10_PI
|
||||
// The Repeater Builder V3 board, STM32F446 CPU
|
||||
// #define RB_V3_PI
|
||||
// The Repeater Builder V5 board, STM32F722 CPU
|
||||
// #define RB_V5_PI
|
||||
|
||||
// Constant Service LED once repeater is running
|
||||
// Do not use if employing an external hardware watchdog
|
||||
// #define CONSTANT_SRV_LED
|
||||
|
||||
// Use the YSF and P25 LEDs for NXDN
|
||||
// #define USE_ALTERNATE_NXDN_LEDS
|
||||
|
||||
// Use the D-Star and P25 LEDs for M17
|
||||
#define USE_ALTERNATE_M17_LEDS
|
||||
|
||||
// Use the D-Star and DMR LEDs for POCSAG
|
||||
#define USE_ALTERNATE_POCSAG_LEDS
|
||||
|
||||
// Use the D-Star and YSF LEDs for FM
|
||||
#define USE_ALTERNATE_FM_LEDS
|
||||
|
||||
#endif
|
||||
|
||||
@@ -18,6 +18,9 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "CalDMR.h"
|
||||
|
||||
@@ -221,3 +224,5 @@ uint8_t CCalDMR::write(const uint8_t* data, uint16_t length)
|
||||
return 0U;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -17,10 +17,13 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#if !defined(CALDMR_H)
|
||||
#define CALDMR_H
|
||||
|
||||
#include "Config.h"
|
||||
#include "DMRDefines.h"
|
||||
|
||||
enum DMRCAL1K {
|
||||
@@ -53,3 +56,5 @@ private:
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2009-2017,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -17,6 +17,9 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "DMRDMORX.h"
|
||||
#include "DMRSlotType.h"
|
||||
@@ -423,3 +426,6 @@ void CDMRDMORX::writeRSSIData(uint8_t* frame)
|
||||
serial.writeDMRData(true, frame, DMR_FRAME_LENGTH_BYTES + 1U);
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015,2016,2017,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -16,10 +16,13 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#if !defined(DMRDMORX_H)
|
||||
#define DMRDMORX_H
|
||||
|
||||
#include "Config.h"
|
||||
#include "DMRDefines.h"
|
||||
|
||||
const uint16_t DMO_BUFFER_LENGTH_SAMPLES = 1440U; // 60ms at 24 kHz
|
||||
@@ -67,3 +70,6 @@ private:
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -19,6 +19,9 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "DMRSlotType.h"
|
||||
|
||||
@@ -74,7 +77,7 @@ void CDMRDMOTX::process()
|
||||
m_poLen = m_txDelay;
|
||||
} else {
|
||||
for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++)
|
||||
m_poBuffer[i] = m_fifo.get();
|
||||
m_fifo.get(m_poBuffer[i]);
|
||||
|
||||
for (unsigned int i = 0U; i < 39U; i++)
|
||||
m_poBuffer[i + DMR_FRAME_LENGTH_BYTES] = PR_FILL[i];
|
||||
@@ -161,3 +164,5 @@ void CDMRDMOTX::setTXDelay(uint8_t delay)
|
||||
m_txDelay = 1200U;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -17,13 +17,16 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#if !defined(DMRDMOTX_H)
|
||||
#define DMRDMOTX_H
|
||||
|
||||
#include "Config.h"
|
||||
#include "DMRDefines.h"
|
||||
|
||||
#include "SerialRB.h"
|
||||
#include "RingBuffer.h"
|
||||
|
||||
class CDMRDMOTX {
|
||||
public:
|
||||
@@ -38,7 +41,7 @@ public:
|
||||
uint8_t getSpace() const;
|
||||
|
||||
private:
|
||||
CSerialRB m_fifo;
|
||||
CRingBuffer<uint8_t> m_fifo;
|
||||
arm_fir_interpolate_instance_q15 m_modFilter;
|
||||
q15_t m_modState[16U]; // blockSize + phaseLength - 1, 4 + 9 - 1 plus some spare
|
||||
uint8_t m_poBuffer[1200U];
|
||||
@@ -51,3 +54,5 @@ private:
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2009-2017,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -17,6 +17,9 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "DMRIdleRX.h"
|
||||
#include "DMRSlotType.h"
|
||||
@@ -209,3 +212,6 @@ void CDMRIdleRX::setColorCode(uint8_t colorCode)
|
||||
{
|
||||
m_colorCode = colorCode;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2015 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -16,10 +16,13 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#if !defined(DMRIDLERX_H)
|
||||
#define DMRIDLERX_H
|
||||
|
||||
#include "Config.h"
|
||||
#include "DMRDefines.h"
|
||||
|
||||
class CDMRIdleRX {
|
||||
@@ -49,3 +52,5 @@ private:
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -17,6 +17,9 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "DMRRX.h"
|
||||
|
||||
@@ -68,3 +71,5 @@ void CDMRRX::reset()
|
||||
m_slot2RX.reset();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -16,10 +16,13 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#if !defined(DMRRX_H)
|
||||
#define DMRRX_H
|
||||
|
||||
#include "Config.h"
|
||||
#include "DMRSlotRX.h"
|
||||
|
||||
class CDMRRX {
|
||||
@@ -40,3 +43,5 @@ private:
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2009-2017 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2009-2017,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -17,6 +17,9 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "DMRSlotRX.h"
|
||||
#include "DMRSlotType.h"
|
||||
@@ -400,3 +403,6 @@ void CDMRSlotRX::writeRSSIData(uint8_t* frame)
|
||||
serial.writeDMRData(m_slot, frame, DMR_FRAME_LENGTH_BYTES + 1U);
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015,2016,2017,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -16,10 +16,13 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#if !defined(DMRSLOTRX_H)
|
||||
#define DMRSLOTRX_H
|
||||
|
||||
#include "Config.h"
|
||||
#include "DMRDefines.h"
|
||||
|
||||
enum DMRRX_STATE {
|
||||
@@ -70,3 +73,6 @@ private:
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2015 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -17,6 +17,9 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "DMRSlotType.h"
|
||||
|
||||
@@ -285,3 +288,5 @@ void CDMRSlotType::encode(uint8_t colorCode, uint8_t dataType, uint8_t* frame) c
|
||||
frame[20U] = (frame[20U] & 0x03U) | ((slotType[1U] << 6) & 0xC0U) | ((slotType[2U] >> 2) & 0x3CU);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2015 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -16,6 +16,10 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#if !defined(DMRSLOTTYPE_H)
|
||||
#define DMRSLOTTYPE_H
|
||||
|
||||
@@ -35,3 +39,5 @@ private:
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -19,6 +19,9 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "DMRSlotType.h"
|
||||
|
||||
@@ -293,7 +296,7 @@ void CDMRTX::createData(uint8_t slotIndex)
|
||||
{
|
||||
if (m_fifo[slotIndex].getData() >= DMR_FRAME_LENGTH_BYTES && m_frameCount >= STARTUP_COUNT && m_abortCount[slotIndex] >= ABORT_COUNT) {
|
||||
for (unsigned int i = 0U; i < DMR_FRAME_LENGTH_BYTES; i++) {
|
||||
m_poBuffer[i] = m_fifo[slotIndex].get();
|
||||
m_fifo[slotIndex].get(m_poBuffer[i]);
|
||||
m_markBuffer[i] = MARK_NONE;
|
||||
}
|
||||
} else {
|
||||
@@ -414,3 +417,6 @@ uint32_t CDMRTX::getFrameCount()
|
||||
{
|
||||
return m_frameCount;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -17,13 +17,16 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DMR)
|
||||
|
||||
#if !defined(DMRTX_H)
|
||||
#define DMRTX_H
|
||||
|
||||
#include "Config.h"
|
||||
#include "DMRDefines.h"
|
||||
|
||||
#include "SerialRB.h"
|
||||
#include "RingBuffer.h"
|
||||
|
||||
enum DMRTXSTATE {
|
||||
DMRTXSTATE_IDLE,
|
||||
@@ -59,7 +62,7 @@ public:
|
||||
void setColorCode(uint8_t colorCode);
|
||||
|
||||
private:
|
||||
CSerialRB m_fifo[2U];
|
||||
CRingBuffer<uint8_t> m_fifo[2U];
|
||||
arm_fir_interpolate_instance_q15 m_modFilter;
|
||||
q15_t m_modState[16U]; // blockSize + phaseLength - 1, 4 + 9 - 1 plus some spare
|
||||
DMRTXSTATE m_state;
|
||||
@@ -83,3 +86,5 @@ private:
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2009-2016 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2009-2016,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -17,6 +17,9 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DSTAR)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "CalDStarRX.h"
|
||||
#include "Utils.h"
|
||||
@@ -24,7 +27,7 @@
|
||||
const unsigned int BUFFER_LENGTH = 200U;
|
||||
|
||||
const uint32_t PLLMAX = 0x10000U;
|
||||
const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
|
||||
const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_SYMBOL_LENGTH;
|
||||
const uint32_t INC = PLLINC / 32U;
|
||||
|
||||
// D-Star bit order version of 0x55 0x2D 0x16
|
||||
@@ -126,3 +129,5 @@ void CCalDStarRX::process(q15_t value)
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -16,10 +16,13 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DSTAR)
|
||||
|
||||
#if !defined(CALDSTARRX_H)
|
||||
#define CALDSTARRX_H
|
||||
|
||||
#include "Config.h"
|
||||
#include "DStarDefines.h"
|
||||
|
||||
class CCalDStarRX {
|
||||
@@ -40,3 +43,5 @@ private:
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -17,6 +17,9 @@
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DSTAR)
|
||||
|
||||
#include "Globals.h"
|
||||
#include "CalDStarTX.h"
|
||||
|
||||
@@ -181,3 +184,5 @@ uint8_t CCalDStarTX::write(const uint8_t* data, uint16_t length)
|
||||
return 0U;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
@@ -16,10 +16,13 @@
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#if defined(MODE_DSTAR)
|
||||
|
||||
#if !defined(CALDSTARTX_H)
|
||||
#define CALDSTARTX_H
|
||||
|
||||
#include "Config.h"
|
||||
#include "DStarDefines.h"
|
||||
|
||||
class CCalDStarTX {
|
||||
@@ -37,3 +40,5 @@ private:
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user