mirror of https://github.com/g4klx/MMDVM.git
Reorganise the code slightly.
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20
IOTeensy.cpp
20
IOTeensy.cpp
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@ -75,6 +75,10 @@ void CIO::initInt()
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void CIO::startInt()
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{
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// Initialise the DAC
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SIM_SCGC2 |= SIM_SCGC2_DAC0;
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DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 1.2V VDDA is DACREF_2
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// Initialise ADC0
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SIM_SCGC6 |= SIM_SCGC6_ADC0;
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ADC0_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
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@ -118,18 +122,18 @@ void CIO::startInt()
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#endif
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#if defined(EXTERNAL_OSC)
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// Set ADC0 to trigger from the LPTMR at 24 kHz
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SIM_SOPT7 = SIM_SOPT7_ADC0ALTTRGEN |
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SIM_SOPT7_ADC0TRGSEL(14);
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CORE_PIN13_CONFIG = PORT_PCR_MUX(3);
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SIM_SCGC5 |= SIM_SCGC5_LPTIMER;
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LPTMR0_PSR = LPTMR_PSR_PBYP; // Bypass prescaler/filter
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LPTMR0_CMR = EXTERNAL_OSC / 24000;
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LPTMR0_CSR = LPTMR_CSR_TIE | LPTMR_CSR_TPS(2) | // Interrupt, counter, input=Alt2, free running mode, enable
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LPTMR_CSR_TFC | LPTMR_CSR_TMS |
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LPTMR_CSR_TEN;
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CORE_PIN13_CONFIG = PORT_PCR_MUX(3);
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// Set ADC0 to trigger from the LPTMR
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SIM_SOPT7 = SIM_SOPT7_ADC0ALTTRGEN |
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SIM_SOPT7_ADC0TRGSEL(14);
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#else
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// Setup PDB for ADC0 at 24 kHz
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SIM_SCGC6 |= SIM_SCGC6_PDB; // Enable PDB clock
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@ -141,10 +145,6 @@ void CIO::startInt()
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PDB0_SC |= PDB_SC_SWTRIG; // Software trigger (reset and restart counter)
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#endif
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// Initialise the DAC
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SIM_SCGC2 |= SIM_SCGC2_DAC0;
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DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 1.2V VDDA is DACREF_2
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digitalWrite(PIN_PTT, m_pttInvert ? HIGH : LOW);
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digitalWrite(PIN_COSLED, LOW);
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digitalWrite(PIN_LED, HIGH);
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