Merge branch 'FM' into dstar_correlator_fm

Drcc serial bugfix

.gitmodules

@@ -4,3 +4,6 @@
 [submodule "STM32F7XX_Lib"]
 	path = STM32F7XX_Lib
 	url = https://github.com/juribeparada/STM32F7XX_Lib.git
+[submodule "STM32F10X_Lib"]
+	path = STM32F10X_Lib
+	url = https://github.com/shawnchain/STM32F10X_Lib.git

CWIdTX.cpp

@@ -77,6 +77,7 @@ const struct {
   {',', 0xEEAEE000U, 22U},
   {'-', 0xEAAE0000U, 18U},
   {'=', 0xEAB80000U, 16U},
+  {'.', 0xBAEB8000U, 20U},
   {' ', 0x00000000U, 4U},
   {0U,  0x00000000U, 0U}
 };
@@ -170,4 +171,3 @@ void CCWIdTX::reset()
   m_poPtr = 0U;
   m_n     = 0U;
 }
-

CalDStarRX.cpp

@@ -24,7 +24,7 @@
 const unsigned int BUFFER_LENGTH = 200U;
 
 const uint32_t PLLMAX = 0x10000U;
-const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
+const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_SYMBOL_LENGTH;
 const uint32_t INC    = PLLINC / 32U;
 
 // D-Star bit order version of 0x55 0x2D 0x16

CalFM.cpp

@@ -0,0 +1,127 @@
+/*
+ *   Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2016 by Colin Durbridge G4EML
+ *   Copyright (C) 2020 by Phil Taylor M0VSE
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include "Config.h"
+#include "Globals.h"
+#include "CalFM.h"
+
+
+const struct TONE_TABLE {
+  uint16_t  frequency;
+  uint16_t length;
+  q31_t    increment;
+} TONE_TABLE_DATA[] = {
+  {2495U, 10U, 223248821},
+  {2079U, 12U, 186025772},
+  {1633U, 15U, 146118367},
+  {1247U, 19U, 111579672},
+  {1039U, 23U, 93012886},
+  {956U,  25U, 85541432}};
+
+const uint8_t TONE_TABLE_DATA_LEN = 6U;
+
+CCalFM::CCalFM() :
+m_frequency(0),
+m_length(0),
+m_tone(NULL),
+m_level(128 * 12),
+m_transmit(false),
+m_audioSeq(0),
+m_lastState(STATE_IDLE)
+{
+}
+
+void CCalFM::process()
+{
+  const TONE_TABLE* entry = NULL;
+
+  if (m_modemState!=m_lastState)
+  {
+    switch (m_modemState) {
+        case STATE_FMCAL10K:
+          m_frequency = 956U;
+          break;
+        case STATE_FMCAL12K:
+          m_frequency = 1039U;
+          break;
+        case STATE_FMCAL15K:
+          m_frequency = 1247U;
+          break;
+        case STATE_FMCAL20K:
+          m_frequency = 1633U;
+          break;
+        case STATE_FMCAL25K:
+          m_frequency = 2079U;
+          break;
+        case STATE_FMCAL30K:
+          m_frequency = 2495U;
+          break;
+        default:
+          m_frequency = 0U;
+          break;
+    }
+
+    for (uint8_t i = 0U; i < TONE_TABLE_DATA_LEN; i++) {
+      if (TONE_TABLE_DATA[i].frequency == m_frequency) {
+        entry = TONE_TABLE_DATA + i;
+        break;
+      }
+    }
+
+    if (entry == NULL)
+      return;
+
+    m_length = entry->length;
+
+    delete[] m_tone;
+    m_tone = new q15_t[m_length];
+
+    q31_t arg = 0;
+    for (uint16_t i = 0U; i < m_length; i++) {
+      q63_t value = ::arm_sin_q31(arg) * q63_t(m_level);
+      m_tone[i] = q15_t(__SSAT((value >> 31), 16));
+
+      arg += entry->increment;
+    }
+
+    m_lastState=m_modemState;
+  }
+
+  if (m_transmit)
+  {
+    uint16_t space = io.getSpace();
+    while (space > m_length)
+    {
+      io.write(m_modemState,m_tone,m_length);
+      space -= m_length;
+    }
+  }
+}
+
+
+uint8_t CCalFM::write(const uint8_t* data, uint8_t length)
+{
+  if (length != 1U)
+    return 4U;
+
+  m_transmit = data[0U] == 1U;
+
+  return 0U;
+}

CalFM.h

@@ -0,0 +1,51 @@
+/*
+ *   Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2016 by Colin Durbridge G4EML
+ *   Copyright (C) 2020 by Phil Taylor M0VSE
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#if !defined(CALFM_H)
+#define  CALFM_H
+
+#include "Config.h"
+
+class CCalFM {
+public:
+  CCalFM();
+
+  void process();
+  void fm10kcal();
+  void fm12k5cal();
+  void fm15kcal();
+  void fm20kcal();
+  void fm25kcal();
+  void fm30kcal();
+
+  uint8_t write(const uint8_t* data, uint8_t length);
+
+private:
+  uint16_t  m_frequency;
+  uint16_t  m_length;
+  q15_t*    m_tone;
+  q15_t     m_level;
+  bool      m_transmit;
+  uint8_t   m_audioSeq;
+  uint8_t   m_lastState;
+};
+
+#endif
+

CalPOCSAG.cpp

@@ -0,0 +1,49 @@
+/*
+ *   Copyright (C) 2019 by Florian Wolters DF2ET
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include "Config.h"
+#include "Globals.h"
+#include "CalPOCSAG.h"
+
+
+CCalPOCSAG::CCalPOCSAG() :
+m_state(POCSAGCAL_IDLE)
+{
+}
+
+void CCalPOCSAG::process()
+{
+  if (m_state == POCSAGCAL_IDLE)
+    return;
+
+  uint16_t space = io.getSpace();
+  if (space <= 165U)
+    return;
+
+  pocsagTX.writeByte(0xAAU);
+}
+
+uint8_t CCalPOCSAG::write(const uint8_t* data, uint8_t length)
+{
+  if (length != 1U)
+    return 4U;
+
+  m_state = data[0U] == 1U ? POCSAGCAL_TX : POCSAGCAL_IDLE;
+
+  return 0U;
+}

CalPOCSAG.h

@@ -0,0 +1,41 @@
+/*
+ *   Copyright (C) 2019 by Florian Wolters DF2ET
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#if !defined(CALPOCSAG_H)
+#define  CALPOCSAG_H
+
+#include "Config.h"
+
+enum POCSAGCAL {
+  POCSAGCAL_IDLE,
+  POCSAGCAL_TX
+};
+
+class CCalPOCSAG {
+public:
+  CCalPOCSAG();
+
+  void process();
+
+  uint8_t write(const uint8_t* data, uint8_t length);
+
+private:
+  POCSAGCAL m_state;
+};
+
+#endif

Config.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -38,17 +38,19 @@
 // Allow the use of the COS line to lockout the modem
 // #define USE_COS_AS_LOCKOUT
 
-// Use pins to output the current mode
+// Use pins to output the current mode via LEDs
-// #define MODE_PINS
+// #define MODE_LEDS
 
 // For the original Arduino Due pin layout
 // #define ARDUINO_DUE_PAPA
 
+#if defined(STM32F1)
+// For the SQ6POG board
+#define STM32F1_POG
+#else
 // For the ZUM V1.0 and V1.0.1 boards pin layout
 #define ARDUINO_DUE_ZUM_V10
-
+#endif
-// For the SQ6POG board
-// #define STM32F1_POG
 
 // For the SP8NTH board
 // #define ARDUINO_DUE_NTH
@@ -57,8 +59,11 @@
 // #define STM32F4_NUCLEO_MORPHO_HEADER
 // #define STM32F4_NUCLEO_ARDUINO_HEADER
 
-// Use separate mode pins to switch external filters/bandwidth for example
+// Use separate mode pins to switch external channel/filters/bandwidth for example
-// #define STM32F4_NUCLEO_MODE_PINS
+// #define MODE_PINS
+
+// For the VK6MST Pi3 Shield communicating over i2c. i2c address & speed defined in i2cTeensy.cpp
+// #define VK6MST_TEENSY_PI3_SHIELD_I2C
 
 // Pass RSSI information to the host
 // #define SEND_RSSI_DATA
@@ -79,5 +84,7 @@
 // Use the D-Star and DMR LEDs for POCSAG
 // #define USE_ALTERNATE_POCSAG_LEDS
 
-#endif
+// Use the D-Star and YSF LEDs for FM
+#define USE_ALTERNATE_FM_LEDS
 
+#endif

DStarDefines.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2009-2015,2017 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -19,30 +19,50 @@
 #if !defined(DSTARDEFINES_H)
 #define  DSTARDEFINES_H
 
-const unsigned int DSTAR_RADIO_BIT_LENGTH = 5U;      // At 24 kHz sample rate
+const unsigned int DSTAR_RADIO_SYMBOL_LENGTH = 5U;      // At 24 kHz sample rate
 
-const unsigned int DSTAR_HEADER_LENGTH_BYTES = 41U;
+const unsigned int DSTAR_HEADER_LENGTH_BYTES   = 41U;
-const unsigned int DSTAR_HEADER_LENGTH_BITS  = DSTAR_HEADER_LENGTH_BYTES * 8U;
 
-const unsigned int DSTAR_FEC_SECTION_LENGTH_BYTES = 83U;
+const unsigned int DSTAR_FEC_SECTION_LENGTH_BYTES   = 83U;
-const unsigned int DSTAR_FEC_SECTION_LENGTH_BITS  = 660U;
+const unsigned int DSTAR_FEC_SECTION_LENGTH_SYMBOLS = 660U;
+const unsigned int DSTAR_FEC_SECTION_LENGTH_SAMPLES = DSTAR_FEC_SECTION_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
 
-const unsigned int DSTAR_DATA_LENGTH_BYTES = 12U;
+const unsigned int DSTAR_DATA_LENGTH_BYTES   = 12U;
-const unsigned int DSTAR_DATA_LENGTH_BITS  = DSTAR_DATA_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_DATA_LENGTH_SYMBOLS = DSTAR_DATA_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_DATA_LENGTH_SAMPLES = DSTAR_DATA_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
 
-const uint8_t      DSTAR_EOT_BYTES[] = {0x55, 0x55, 0x55, 0x55, 0xC8, 0x7A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+const unsigned int DSTAR_END_SYNC_LENGTH_BYTES = 6U;
-const unsigned int DSTAR_EOT_LENGTH_BYTES = 6U;
+const unsigned int DSTAR_END_SYNC_LENGTH_BITS  = DSTAR_END_SYNC_LENGTH_BYTES * 8U;
-const unsigned int DSTAR_EOT_LENGTH_BITS  = DSTAR_EOT_LENGTH_BYTES * 8U;
 
-const uint8_t      DSTAR_DATA_SYNC_LENGTH_BYTES = 3U;
+const unsigned int DSTAR_FRAME_SYNC_LENGTH_BYTES   = 3U;
-const uint8_t      DSTAR_DATA_SYNC_LENGTH_BITS  = DSTAR_DATA_SYNC_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_FRAME_SYNC_LENGTH_SYMBOLS = DSTAR_FRAME_SYNC_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_FRAME_SYNC_LENGTH_SAMPLES = DSTAR_FRAME_SYNC_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
 
-const uint8_t      DSTAR_DATA_SYNC_BYTES[] = {0x9E, 0x8D, 0x32, 0x88, 0x26, 0x1A, 0x3F, 0x61, 0xE8, 0x55, 0x2D, 0x16};
+const unsigned int DSTAR_DATA_SYNC_LENGTH_BYTES   = 3U;
+const unsigned int DSTAR_DATA_SYNC_LENGTH_SYMBOLS = DSTAR_DATA_SYNC_LENGTH_BYTES * 8U;
+const unsigned int DSTAR_DATA_SYNC_LENGTH_SAMPLES = DSTAR_DATA_SYNC_LENGTH_SYMBOLS * DSTAR_RADIO_SYMBOL_LENGTH;
 
-const uint8_t      DSTAR_SLOW_DATA_TYPE_TEXT   = 0x40U;
+const uint8_t DSTAR_DATA_SYNC_BYTES[] = {0x9E, 0x8D, 0x32, 0x88, 0x26, 0x1A, 0x3F, 0x61, 0xE8, 0x55, 0x2D, 0x16};
-const uint8_t      DSTAR_SLOW_DATA_TYPE_HEADER = 0x50U;
 
-const uint8_t      DSTAR_SCRAMBLER_BYTES[] = {0x70U, 0x4FU, 0x93U};
+// D-Star bit order version of 0x55 0x6E 0x0A
+const uint32_t DSTAR_FRAME_SYNC_DATA = 0x00557650U;
+const uint32_t DSTAR_FRAME_SYNC_MASK = 0x00FFFFFFU;
+const bool     DSTAR_FRAME_SYNC_SYMBOLS[] = {false, true, false, true, false, true, false, true, false, true, true, true, false, true, true, false, false, true, false, true, false, false, false, false};
+
+// D-Star bit order version of 0x55 0x2D 0x16
+const uint32_t DSTAR_DATA_SYNC_DATA = 0x00AAB468U;
+const uint32_t DSTAR_DATA_SYNC_MASK = 0x00FFFFFFU;
+const bool     DSTAR_DATA_SYNC_SYMBOLS[] = {true, false, true, false, true, false, true, false, true, false, true, true, false, true, false, false, false, true, true, false, true, false, false, false};
+
+// D-Star bit order version of 0x55 0x55 0xC8 0x7A
+const uint32_t DSTAR_END_SYNC_DATA = 0xAAAA135EU;
+const uint32_t DSTAR_END_SYNC_MASK = 0xFFFFFFFFU;
+const uint8_t  DSTAR_END_SYNC_BYTES[] = {0x55, 0x55, 0x55, 0x55, 0xC8, 0x7A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+const uint8_t  DSTAR_SLOW_DATA_TYPE_TEXT   = 0x40U;
+const uint8_t  DSTAR_SLOW_DATA_TYPE_HEADER = 0x50U;
+
+const uint8_t  DSTAR_SCRAMBLER_BYTES[] = {0x70U, 0x4FU, 0x93U};
 
 #endif
 

DStarRX.cpp

@@ -22,18 +22,12 @@
 #include "DStarRX.h"
 #include "Utils.h"
 
-const unsigned int BUFFER_LENGTH = 200U;
+const unsigned int MAX_FRAMES = 150U;
-
-const uint32_t PLLMAX = 0x10000U;
-const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
-const uint32_t INC    = PLLINC / 32U;
-
-const unsigned int MAX_SYNC_BITS = 100U * DSTAR_DATA_LENGTH_BITS;
 
 // D-Star bit order version of 0x55 0x55 0x6E 0x0A
 const uint32_t FRAME_SYNC_DATA = 0x00557650U;
 const uint32_t FRAME_SYNC_MASK = 0x00FFFFFFU;
-const uint8_t  FRAME_SYNC_ERRS = 2U;
+const uint8_t  FRAME_SYNC_ERRS = 1U;
 
 // D-Star bit order version of 0x55 0x2D 0x16
 const uint32_t DATA_SYNC_DATA = 0x00AAB468U;
@@ -237,14 +231,24 @@ const uint16_t CCITT_TABLE[] = {
   0xf78fU, 0xe606U, 0xd49dU, 0xc514U, 0xb1abU, 0xa022U, 0x92b9U, 0x8330U,
   0x7bc7U, 0x6a4eU, 0x58d5U, 0x495cU, 0x3de3U, 0x2c6aU, 0x1ef1U, 0x0f78U};
 
+const uint16_t NOENDPTR = 9999U;
+
 CDStarRX::CDStarRX() :
-m_pll(0U),
-m_prev(false),
 m_rxState(DSRXS_NONE),
-m_patternBuffer(0x00U),
+m_bitBuffer(),
-m_rxBuffer(),
+m_headerBuffer(),
-m_rxBufferBits(0U),
+m_dataBuffer(),
-m_dataBits(0U),
+m_bitPtr(0U),
+m_headerPtr(0U),
+m_dataPtr(0U),
+m_startPtr(NOENDPTR),
+m_syncPtr(NOENDPTR),
+m_minSyncPtr(NOENDPTR),
+m_maxSyncPtr(NOENDPTR),
+m_maxFrameCorr(0),
+m_maxDataCorr(0),
+m_frameCount(0U),
+m_countdown(0U),
 m_mar(0U),
 m_pathMetric(),
 m_pathMemory0(),
@@ -259,14 +263,20 @@ m_rssiCount(0U)
 
 void CDStarRX::reset()
 {
-  m_pll           = 0U;
+  m_rxState      = DSRXS_NONE;
-  m_prev          = false;
+  m_headerPtr    = 0U;
-  m_rxState       = DSRXS_NONE;
+  m_dataPtr      = 0U;
-  m_patternBuffer = 0x00U;
+  m_bitPtr       = 0U;
-  m_rxBufferBits  = 0U;
+  m_maxFrameCorr = 0;
-  m_dataBits      = 0U;
+  m_maxDataCorr  = 0;
-  m_rssiAccum     = 0U;
+  m_startPtr     = NOENDPTR;
-  m_rssiCount     = 0U;
+  m_syncPtr      = NOENDPTR;
+  m_minSyncPtr   = NOENDPTR;
+  m_maxSyncPtr   = NOENDPTR;
+  m_frameCount   = 0U;
+  m_countdown    = 0U;
+  m_rssiAccum    = 0U;
+  m_rssiCount    = 0U;
 }
 
 void CDStarRX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t length)
@@ -275,125 +285,117 @@ void CDStarRX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t lengt
     m_rssiAccum += rssi[i];
     m_rssiCount++;
 
-    bool bit = samples[i] < 0;
+    q15_t sample = samples[i];
 
-    if (bit != m_prev) {
+    m_bitBuffer[m_bitPtr] <<= 1;
-      if (m_pll < (PLLMAX / 2U))
+    if (sample < 0)
-        m_pll += INC;
+      m_bitBuffer[m_bitPtr] |= 0x01U;
-      else
+
-        m_pll -= INC;
+    m_dataBuffer[m_dataPtr] = sample;
+
+    switch (m_rxState) {
+      case DSRXS_HEADER:
+        processHeader(sample);
+        break;
+      case DSRXS_DATA:
+        processData();
+        break;
+      default:
+        processNone(sample);
+        break;
     }
 
-    m_prev = bit;
+    m_dataPtr++;
+    if (m_dataPtr >= DSTAR_DATA_LENGTH_SAMPLES)
+      m_dataPtr = 0U;
 
-    m_pll += PLLINC;
+    m_bitPtr++;
-
+    if (m_bitPtr >= DSTAR_RADIO_SYMBOL_LENGTH)
-    if (m_pll >= PLLMAX) {
+      m_bitPtr = 0U;
-      m_pll -= PLLMAX;
-
-      switch (m_rxState) {
-        case DSRXS_NONE:
-          processNone(bit);
-          break;
-        case DSRXS_HEADER:
-          processHeader(bit);
-          break;
-        case DSRXS_DATA:
-          processData(bit);
-          break;
-        default:
-          break;
-      }
-    }
   }
 }
 
-void CDStarRX::processNone(bool bit)
+void CDStarRX::processNone(q15_t sample)
 {
-  m_patternBuffer <<= 1;
-  if (bit)
-    m_patternBuffer |= 0x01U;
-
   // Fuzzy matching of the frame sync sequence
-  if (countBits32((m_patternBuffer & FRAME_SYNC_MASK) ^ FRAME_SYNC_DATA) <= FRAME_SYNC_ERRS) {
+  bool ret = correlateFrameSync();
-    DEBUG1("DStarRX: found frame sync in None");
+  if (ret) {
-
+    m_countdown = 5U;
-    ::memset(m_rxBuffer, 0x00U, DSTAR_FEC_SECTION_LENGTH_BYTES);
+	
-    m_rxBufferBits = 0U;
+    m_headerBuffer[m_headerPtr] = sample;
+    m_headerPtr++;
 
     m_rssiAccum = 0U;
     m_rssiCount = 0U;
 
     m_rxState = DSRXS_HEADER;
+
     return;
   }
 
-  // Exact matching of the data sync bit sequence
+  // Fuzzy matching of the data sync bit sequence
-  if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) == 0U) {
+  ret = correlateDataSync();
+  if (ret) {
     DEBUG1("DStarRX: found data sync in None");
 
     io.setDecode(true);
     io.setADCDetection(true);
 
-    // Suppress RSSI on the dummy sync message
+    m_rxState = DSRXS_DATA;
-    m_rssiAccum = 0U;
-    m_rssiCount = 0U;
-
-    ::memcpy(m_rxBuffer, DSTAR_DATA_SYNC_BYTES, DSTAR_DATA_LENGTH_BYTES);
-    writeRSSIData(m_rxBuffer);
-
-    ::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
-    m_rxBufferBits = 0U;
-
-    m_dataBits  = MAX_SYNC_BITS;
-    m_rxState   = DSRXS_DATA;
-    return;
   }
 }
 
-void CDStarRX::processHeader(bool bit)
+void CDStarRX::processHeader(q15_t sample)
 {
-  m_patternBuffer <<= 1;
+  if (m_countdown > 0U) {
-  if (bit)
+    correlateFrameSync();
-    m_patternBuffer |= 0x01U;
+    m_countdown--;
+  }
 
-  WRITE_BIT2(m_rxBuffer, m_rxBufferBits, bit);
+  m_headerBuffer[m_headerPtr] = sample;
-  m_rxBufferBits++;
+  m_headerPtr++;
 
   // A full FEC header
-  if (m_rxBufferBits == DSTAR_FEC_SECTION_LENGTH_BITS) {
+  if (m_headerPtr == (DSTAR_FEC_SECTION_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH)) {
-    // Process the scrambling, interleaving and FEC, then return if the chcksum was correct
+    uint8_t buffer[DSTAR_FEC_SECTION_LENGTH_BYTES];
-    unsigned char header[DSTAR_HEADER_LENGTH_BYTES];
+    samplesToBits(m_headerBuffer, DSTAR_RADIO_SYMBOL_LENGTH, DSTAR_FEC_SECTION_LENGTH_SYMBOLS, buffer, DSTAR_FEC_SECTION_LENGTH_SAMPLES);
-    bool ok = rxHeader(m_rxBuffer, header);
+
-    if (ok) {
+    // Process the scrambling, interleaving and FEC, then return true if the chcksum was correct
+    uint8_t header[DSTAR_HEADER_LENGTH_BYTES];
+    bool ok = rxHeader(buffer, header);
+    if (!ok) {
+      // The checksum failed, return to looking for syncs
+      m_rxState = DSRXS_NONE;
+      m_maxFrameCorr = 0;
+      m_maxDataCorr  = 0;
+    } else {
       io.setDecode(true);
       io.setADCDetection(true);
 
       writeRSSIHeader(header);
-
-      ::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
-      m_rxBufferBits = 0U;
-
-      m_rxState  = DSRXS_DATA;
-      m_dataBits = MAX_SYNC_BITS;
-    } else {
-      // The checksum failed, return to looking for syncs
-      m_rxState = DSRXS_NONE;
     }
   }
+
+  // Ready to start the first data section
+  if (m_headerPtr == (DSTAR_FEC_SECTION_LENGTH_SAMPLES + 2U * DSTAR_RADIO_SYMBOL_LENGTH)) {
+    m_frameCount = 0U;
+    m_dataPtr    = 0U;
+
+    m_startPtr   = 476U;
+    m_syncPtr    = 471U;
+    m_maxSyncPtr = 472U;
+    m_minSyncPtr = 470U;
+
+    DEBUG5("DStarRX: calc start/sync/max/min", m_startPtr, m_syncPtr, m_maxSyncPtr, m_minSyncPtr);
+
+    m_rxState = DSRXS_DATA;
+  }
 }
 
-void CDStarRX::processData(bool bit)
+void CDStarRX::processData()
 {
-  m_patternBuffer <<= 1;
-  if (bit)
-    m_patternBuffer |= 0x01U;
-
-  WRITE_BIT2(m_rxBuffer, m_rxBufferBits, bit);
-  m_rxBufferBits++;
-
   // Fuzzy matching of the end frame sequences
-  if (countBits32((m_patternBuffer & END_SYNC_MASK) ^ END_SYNC_DATA) <= END_SYNC_ERRS) {
+  if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_END_SYNC_MASK) ^ DSTAR_END_SYNC_DATA) <= END_SYNC_ERRS) {
     DEBUG1("DStarRX: Found end sync in Data");
 
     io.setDecode(false);
@@ -401,35 +403,24 @@ void CDStarRX::processData(bool bit)
 
     serial.writeDStarEOT();
 
+    m_maxFrameCorr = 0;
+    m_maxDataCorr  = 0;
+
     m_rxState = DSRXS_NONE;
     return;
   }
 
   // Fuzzy matching of the data sync bit sequence
-  bool syncSeen = false;
+  if (m_minSyncPtr < m_maxSyncPtr) {
-  if (m_rxBufferBits >= (DSTAR_DATA_LENGTH_BITS - 3U)) {
+    if (m_dataPtr >= m_minSyncPtr && m_dataPtr <= m_maxSyncPtr)
-    if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) <= DATA_SYNC_ERRS) {
+      correlateDataSync();
-      m_rxBufferBits = DSTAR_DATA_LENGTH_BITS;
+  } else {
-      m_dataBits     = MAX_SYNC_BITS;
+    if (m_dataPtr >= m_minSyncPtr || m_dataPtr <= m_maxSyncPtr)
-      syncSeen       = true;
+      correlateDataSync();
-    }
   }
 
-  // Check to see if the sync is arriving late
+  // We've not seen a data sync for too long, signal RXLOST and change to RX_NONE
-  if (m_rxBufferBits == DSTAR_DATA_LENGTH_BITS && !syncSeen) {
+  if (m_frameCount >= MAX_FRAMES) {
-    for (uint8_t i = 1U; i <= 3U; i++) {
-      uint32_t syncMask = DATA_SYNC_MASK >> i;
-      uint32_t syncData = DATA_SYNC_DATA >> i;
-      if (countBits32((m_patternBuffer & syncMask) ^ syncData) <= DATA_SYNC_ERRS) {
-        m_rxBufferBits -= i;
-        break;
-      }
-    }
-  }
-
-  m_dataBits--;
-
-  if (m_dataBits == 0U) {
     DEBUG1("DStarRX: data sync timed out, lost lock");
 
     io.setDecode(false);
@@ -437,24 +428,35 @@ void CDStarRX::processData(bool bit)
 
     serial.writeDStarLost();
 
+    m_maxFrameCorr = 0;
+    m_maxDataCorr  = 0;
+
     m_rxState = DSRXS_NONE;
     return;
   }
 
-  // Send a data frame to the host if the required number of bits have been received, or if a data sync has been seen
+  // Send a data frame to the host if the required number of bits have been received
-  if (m_rxBufferBits == DSTAR_DATA_LENGTH_BITS) {
+  if (m_dataPtr == m_maxSyncPtr) {
-    if (syncSeen) {
+    uint8_t buffer[DSTAR_DATA_LENGTH_BYTES + 2U];
-      m_rxBuffer[9U]  = DSTAR_DATA_SYNC_BYTES[9U];
+    samplesToBits(m_dataBuffer, m_startPtr, DSTAR_DATA_LENGTH_SYMBOLS, buffer, DSTAR_DATA_LENGTH_SAMPLES);
-      m_rxBuffer[10U] = DSTAR_DATA_SYNC_BYTES[10U];
-      m_rxBuffer[11U] = DSTAR_DATA_SYNC_BYTES[11U];
-	    writeRSSIData(m_rxBuffer);
-    } else {
-	    serial.writeDStarData(m_rxBuffer, DSTAR_DATA_LENGTH_BYTES);
-	  }
 
-    // Start the next frame
+    if ((m_frameCount % 21U) == 0U) {
-    ::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
+      if (m_frameCount == 0U) {
-    m_rxBufferBits = 0U;
+        buffer[9U]  = DSTAR_DATA_SYNC_BYTES[9U];
+        buffer[10U] = DSTAR_DATA_SYNC_BYTES[10U];
+        buffer[11U] = DSTAR_DATA_SYNC_BYTES[11U];
+        DEBUG5("DStarRX: found start/sync/max/min", m_startPtr, m_syncPtr, m_maxSyncPtr, m_minSyncPtr);
+      }
+
+      writeRSSIData(buffer);
+    } else {
+      serial.writeDStarData(buffer, DSTAR_DATA_LENGTH_BYTES);
+    }
+
+    m_frameCount++;
+
+    m_maxFrameCorr = 0;
+    m_maxDataCorr  = 0;
   }
 }
 
@@ -500,6 +502,105 @@ void CDStarRX::writeRSSIData(unsigned char* data)
   m_rssiCount = 0U;
 }
 
+bool CDStarRX::correlateFrameSync()
+{
+  if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_FRAME_SYNC_MASK) ^ DSTAR_FRAME_SYNC_DATA) <= FRAME_SYNC_ERRS) {
+    uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_FRAME_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
+    if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
+      ptr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+    q31_t corr = 0;
+
+    for (uint8_t i = 0U; i < DSTAR_FRAME_SYNC_LENGTH_SYMBOLS; i++) {
+      q15_t val = m_dataBuffer[ptr];
+
+      if (DSTAR_FRAME_SYNC_SYMBOLS[i])
+        corr -= val;
+      else
+        corr += val;
+
+      ptr += DSTAR_RADIO_SYMBOL_LENGTH;
+      if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
+        ptr -= DSTAR_DATA_LENGTH_SAMPLES;
+    }
+
+    if (corr > m_maxFrameCorr) {
+      m_maxFrameCorr = corr;
+      m_headerPtr    = 0U;
+      return true;
+    }
+  }
+
+  return false;
+}
+
+bool CDStarRX::correlateDataSync()
+{
+  uint8_t maxErrs = 0U;
+  if (m_rxState == DSRXS_DATA)
+    maxErrs = DATA_SYNC_ERRS;
+
+  if (countBits32((m_bitBuffer[m_bitPtr] & DSTAR_DATA_SYNC_MASK) ^ DSTAR_DATA_SYNC_DATA) <= maxErrs) {
+    uint16_t ptr = m_dataPtr + DSTAR_DATA_LENGTH_SAMPLES - DSTAR_DATA_SYNC_LENGTH_SAMPLES + DSTAR_RADIO_SYMBOL_LENGTH;
+    if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
+      ptr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+    q31_t corr = 0;
+
+    for (uint8_t i = 0U; i < DSTAR_DATA_SYNC_LENGTH_SYMBOLS; i++) {
+      q15_t val = m_dataBuffer[ptr];
+
+      if (DSTAR_DATA_SYNC_SYMBOLS[i])
+        corr -= val;
+      else
+        corr += val;
+
+      ptr += DSTAR_RADIO_SYMBOL_LENGTH;
+      if (ptr >= DSTAR_DATA_LENGTH_SAMPLES)
+        ptr -= DSTAR_DATA_LENGTH_SAMPLES;
+    }
+
+    if (corr > m_maxDataCorr) {
+      m_maxDataCorr = corr;
+      m_frameCount  = 0U;
+
+      m_syncPtr    = m_dataPtr;
+
+      m_startPtr   = m_dataPtr + DSTAR_RADIO_SYMBOL_LENGTH;
+      if (m_startPtr >= DSTAR_DATA_LENGTH_SAMPLES)
+        m_startPtr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+      m_maxSyncPtr = m_syncPtr + 1U;
+      if (m_maxSyncPtr >= DSTAR_DATA_LENGTH_SAMPLES)
+        m_maxSyncPtr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+      m_minSyncPtr = m_syncPtr + DSTAR_DATA_LENGTH_SAMPLES - 1U;
+      if (m_minSyncPtr >= DSTAR_DATA_LENGTH_SAMPLES)
+        m_minSyncPtr -= DSTAR_DATA_LENGTH_SAMPLES;
+
+      return true;
+    }
+  }
+
+  return false;
+}
+
+void CDStarRX::samplesToBits(const q15_t* inBuffer, uint16_t start, uint16_t count, uint8_t* outBuffer, uint16_t limit)
+{
+  for (uint16_t i = 0U; i < count; i++) {
+    q15_t sample = inBuffer[start];
+
+    if (sample < 0)
+      WRITE_BIT2(outBuffer, i, true);
+    else
+      WRITE_BIT2(outBuffer, i, false);
+
+    start += DSTAR_RADIO_SYMBOL_LENGTH;
+    if (start >= limit)
+      start -= limit;
+  }
+}
+
 bool CDStarRX::rxHeader(uint8_t* in, uint8_t* out)
 {
   int i;

DStarRX.h

@@ -37,13 +37,21 @@ public:
   void reset();
 
 private:
-  uint32_t     m_pll;
-  bool         m_prev;
   DSRX_STATE   m_rxState;
-  uint32_t     m_patternBuffer;
+  uint32_t     m_bitBuffer[DSTAR_RADIO_SYMBOL_LENGTH];
-  uint8_t      m_rxBuffer[100U];
+  q15_t        m_headerBuffer[DSTAR_FEC_SECTION_LENGTH_SAMPLES + 2U * DSTAR_RADIO_SYMBOL_LENGTH];
-  unsigned int m_rxBufferBits;
+  q15_t        m_dataBuffer[DSTAR_DATA_LENGTH_SAMPLES];
-  unsigned int m_dataBits;
+  uint16_t     m_bitPtr;
+  uint16_t     m_headerPtr;
+  uint16_t     m_dataPtr;
+  uint16_t     m_startPtr;
+  uint16_t     m_syncPtr;
+  uint16_t     m_minSyncPtr;
+  uint16_t     m_maxSyncPtr;
+  q31_t        m_maxFrameCorr;
+  q31_t        m_maxDataCorr;
+  uint16_t     m_frameCount;
+  uint8_t      m_countdown;
   unsigned int m_mar;
   int          m_pathMetric[4U];
   unsigned int m_pathMemory0[42U];
@@ -54,9 +62,12 @@ private:
   uint32_t     m_rssiAccum;
   uint16_t     m_rssiCount;
   
-  void    processNone(bool bit);
+  void    processNone(q15_t sample);
-  void    processHeader(bool bit);
+  void    processHeader(q15_t sample);
-  void    processData(bool bit);
+  void    processData();
+  bool    correlateFrameSync();
+  bool    correlateDataSync();
+  void    samplesToBits(const q15_t* inBuffer, uint16_t start, uint16_t count, uint8_t* outBuffer, uint16_t limit);
   void    writeRSSIHeader(unsigned char* header);
   void    writeRSSIData(unsigned char* data);
   bool    rxHeader(uint8_t* in, uint8_t* out);

DStarTX.cpp

@@ -198,7 +198,7 @@ m_txDelay(60U)       // 100ms
 {
   ::memset(m_modState, 0x00U, 20U * sizeof(q15_t));
 
-  m_modFilter.L           = DSTAR_RADIO_BIT_LENGTH;
+  m_modFilter.L           = DSTAR_RADIO_SYMBOL_LENGTH;
   m_modFilter.phaseLength = GAUSSIAN_0_35_FILTER_PHASE_LEN;
   m_modFilter.pCoeffs     = GAUSSIAN_0_35_FILTER;
   m_modFilter.pState      = m_modState;
@@ -252,8 +252,8 @@ void CDStarTX::process()
     m_buffer.get();
 
     for (uint8_t j = 0U; j < 3U; j++) {
-      for (uint8_t i = 0U; i < DSTAR_EOT_LENGTH_BYTES; i++)
+      for (uint8_t i = 0U; i < DSTAR_END_SYNC_LENGTH_BYTES; i++)
-        m_poBuffer[m_poLen++] = DSTAR_EOT_BYTES[i];
+        m_poBuffer[m_poLen++] = DSTAR_END_SYNC_BYTES[i];
     }
      
     m_poPtr = 0U;
@@ -262,11 +262,11 @@ void CDStarTX::process()
   if (m_poLen > 0U) {
     uint16_t space = io.getSpace();
     
-    while (space > (8U * DSTAR_RADIO_BIT_LENGTH)) {
+    while (space > (8U * DSTAR_RADIO_SYMBOL_LENGTH)) {
       uint8_t c = m_poBuffer[m_poPtr++];
       writeByte(c);
 
-      space -= 8U * DSTAR_RADIO_BIT_LENGTH;
+      space -= 8U * DSTAR_RADIO_SYMBOL_LENGTH;
       
       if (m_poPtr >= m_poLen) {
         m_poPtr = 0U;
@@ -388,7 +388,7 @@ void CDStarTX::txHeader(const uint8_t* in, uint8_t* out) const
     if (i < 660U) {
       if (d & 0x08U)
         out[INTERLEAVE_TABLE_TX[i * 2U]] |= (0x01U << INTERLEAVE_TABLE_TX[i * 2U + 1U]);
-        i++;
+      i++;
 
       if (d & 0x04U)
         out[INTERLEAVE_TABLE_TX[i * 2U]] |= (0x01U << INTERLEAVE_TABLE_TX[i * 2U + 1U]);
@@ -412,7 +412,7 @@ void CDStarTX::txHeader(const uint8_t* in, uint8_t* out) const
 void CDStarTX::writeByte(uint8_t c)
 {
   q15_t inBuffer[8U];
-  q15_t outBuffer[DSTAR_RADIO_BIT_LENGTH * 8U];
+  q15_t outBuffer[DSTAR_RADIO_SYMBOL_LENGTH * 8U];
 
   uint8_t mask = 0x01U;
 
@@ -427,7 +427,7 @@ void CDStarTX::writeByte(uint8_t c)
 
   ::arm_fir_interpolate_q15(&m_modFilter, inBuffer, outBuffer, 8U);
   
-  io.write(STATE_DSTAR, outBuffer, DSTAR_RADIO_BIT_LENGTH * 8U);
+  io.write(STATE_DSTAR, outBuffer, DSTAR_RADIO_SYMBOL_LENGTH * 8U);
 }
 
 void CDStarTX::setTXDelay(uint8_t delay)

FM.cpp

@@ -0,0 +1,490 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include "Config.h"
+#include "Globals.h"
+#include "FM.h"
+
+CFM::CFM() :
+m_callsign(),
+m_rfAck(),
+m_ctcssRX(),
+m_ctcssTX(),
+m_timeoutTone(),
+m_state(FS_LISTENING),
+m_callsignAtStart(false),
+m_callsignAtEnd(false),
+m_callsignAtLatch(false),
+m_callsignTimer(),
+m_timeoutTimer(),
+m_holdoffTimer(),
+m_kerchunkTimer(),
+m_ackMinTimer(),
+m_ackDelayTimer(),
+m_hangTimer(),
+m_filterStage1(  724,   1448,   724, 32768, -37895, 21352),//3rd order Cheby Filter 300 to 2700Hz, 0.2dB passband ripple, sampling rate 24kHz
+m_filterStage2(32768,      0,-32768, 32768, -50339, 19052),
+m_filterStage3(32768, -65536, 32768, 32768, -64075, 31460),
+m_blanking(),
+m_useCOS(true),
+m_cosInvert(false),
+m_rfAudioBoost(1U),
+m_downsampler(128U),//Size might need adjustement
+m_rxLevel(1),
+m_inputRB(4800U),   // 200ms of audio
+m_outputRB(2400U)   // 100ms of audio
+{
+  insertDelay(100U);
+}
+
+void CFM::samples(bool cos, const q15_t* samples, uint8_t length)
+{
+  if (m_useCOS) {
+    if (m_cosInvert)
+      cos = !cos;
+  } else {
+    cos = true;
+  }
+
+  clock(length);
+
+  uint8_t i = 0U;
+  for (; i < length; i++) {
+    // ARMv7-M has hardware integer division 
+    q15_t currentSample = q15_t((q31_t(samples[i]) << 8) / m_rxLevel);
+
+    uint8_t ctcssState = m_ctcssRX.process(currentSample);
+
+    if (!m_useCOS) {
+      // Delay the audio by 100ms to better match the CTCSS detector output
+      m_inputRB.put(currentSample);
+      m_inputRB.get(currentSample);
+    }
+
+    if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
+      //Not enough samples to determine if you have CTCSS, just carry on
+      continue;
+    } else if (CTCSS_READY(ctcssState) && m_modemState != STATE_FM) {
+      //we had enough samples for CTCSS and we are in some other mode than FM
+      bool validCTCSS = CTCSS_VALID(ctcssState);
+      stateMachine(validCTCSS && cos);
+      if (m_modemState != STATE_FM)
+        continue;
+    } else if (CTCSS_READY(ctcssState) && m_modemState == STATE_FM) {
+      //We had enough samples for CTCSS and we are in FM mode, trigger the state machine
+      bool validCTCSS = CTCSS_VALID(ctcssState);
+      stateMachine(validCTCSS && cos);
+      if (m_modemState != STATE_FM)
+        break;
+    } else if (CTCSS_NOT_READY(ctcssState) && m_modemState == STATE_FM && i == length - 1) {
+      //Not enough samples for CTCSS but we already are in FM, trigger the state machine
+      //but do not trigger the state machine on every single sample, save CPU!
+      bool validCTCSS = CTCSS_VALID(ctcssState);
+      stateMachine(validCTCSS && cos);
+    }
+
+    // Only let audio through when relaying audio
+    if (m_state == FS_RELAYING || m_state == FS_KERCHUNK) {  
+      // m_downsampler.addSample(currentSample);
+      currentSample = m_blanking.process(currentSample);
+      currentSample *= m_rfAudioBoost;
+    } else {
+      currentSample = 0;
+    }
+
+    if (!m_callsign.isRunning())
+      currentSample += m_rfAck.getHighAudio();
+    
+    if (!m_rfAck.isRunning()) {
+      if (m_state == FS_LISTENING)
+        currentSample += m_callsign.getHighAudio();
+      else
+        currentSample += m_callsign.getLowAudio();
+    }
+
+    if (!m_callsign.isRunning() && !m_rfAck.isRunning())
+      currentSample += m_timeoutTone.getAudio();
+
+    currentSample = m_filterStage3.filter(m_filterStage2.filter(m_filterStage1.filter(currentSample)));
+
+    currentSample += m_ctcssTX.getAudio();
+
+    if (m_modemState == STATE_FM)
+      m_outputRB.put(currentSample);
+  }
+}
+
+void CFM::process()
+{
+  q15_t sample;
+  while (io.getSpace() >= 3U && m_outputRB.get(sample))
+    io.write(STATE_FM, &sample, 1U);
+}
+
+void CFM::reset()
+{
+  m_state = FS_LISTENING;
+
+  m_callsignTimer.stop();
+  m_timeoutTimer.stop();
+  m_kerchunkTimer.stop();
+  m_ackMinTimer.stop();
+  m_ackDelayTimer.stop();
+  m_hangTimer.stop();
+
+  m_ctcssRX.reset();
+  m_rfAck.stop();
+  m_callsign.stop();
+  m_timeoutTone.stop();
+
+  m_outputRB.reset();
+}
+
+uint8_t CFM::setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd, bool callsignAtLatch)
+{
+  m_callsignAtStart = callsignAtStart;
+  m_callsignAtEnd   = callsignAtEnd;
+  m_callsignAtLatch = callsignAtLatch;
+
+  uint16_t holdoffTime  = holdoff * 60U;
+  uint16_t callsignTime = time * 60U;
+
+  m_holdoffTimer.setTimeout(holdoffTime, 0U);
+  m_callsignTimer.setTimeout(callsignTime, 0U);
+
+  if (holdoffTime > 0U)
+    m_holdoffTimer.start();
+
+  return m_callsign.setParams(callsign, speed, frequency, highLevel, lowLevel);
+}
+
+uint8_t CFM::setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_t minTime, uint16_t delay, uint8_t level)
+{
+  m_ackDelayTimer.setTimeout(0U, delay);
+
+  if (minTime > 0U)
+    m_ackMinTimer.setTimeout(minTime, delay);
+
+  return m_rfAck.setParams(rfAck, speed, frequency, level, level);
+}
+
+uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel)
+{
+  m_useCOS    = useCOS;
+  m_cosInvert = cosInvert;
+
+  m_rfAudioBoost = q15_t(rfAudioBoost);
+
+  m_timeoutTimer.setTimeout(timeout, 0U);
+  m_kerchunkTimer.setTimeout(kerchunkTime, 0U);
+  m_hangTimer.setTimeout(hangTime, 0U);
+
+  m_timeoutTone.setParams(timeoutLevel);
+  m_blanking.setParams(maxDev, timeoutLevel);
+
+  m_rxLevel = rxLevel; //q15_t(255)/q15_t(rxLevel >> 1);
+
+  uint8_t ret = m_ctcssRX.setParams(ctcssFrequency, ctcssHighThreshold, ctcssLowThreshold);
+  if (ret != 0U)
+    return ret;
+
+  return m_ctcssTX.setParams(ctcssFrequency, ctcssLevel);
+}
+
+void CFM::stateMachine(bool validSignal)
+{
+  switch (m_state) {
+    case FS_LISTENING:
+      listeningState(validSignal);
+      break;
+    case FS_KERCHUNK:
+      kerchunkState(validSignal);
+      break;
+    case FS_RELAYING:
+      relayingState(validSignal);
+      break;
+    case FS_RELAYING_WAIT:
+      relayingWaitState(validSignal);
+      break;
+    case FS_TIMEOUT:
+      timeoutState(validSignal);
+      break;
+    case FS_TIMEOUT_WAIT:
+      timeoutWaitState(validSignal);
+      break;
+    case FS_HANG:
+      hangState(validSignal);
+      break;
+    default:
+      break;
+  }
+
+  if (m_state == FS_LISTENING && m_modemState == STATE_FM) {
+    if (!m_callsign.isWanted() && !m_rfAck.isWanted()) {
+      DEBUG1("Change to STATE_IDLE");
+      m_modemState = STATE_IDLE;
+      m_callsignTimer.stop();
+      m_timeoutTimer.stop();
+      m_kerchunkTimer.stop();
+      m_ackMinTimer.stop();
+      m_ackDelayTimer.stop();
+      m_hangTimer.stop();
+    }
+  }
+}
+
+void CFM::clock(uint8_t length)
+{
+  m_callsignTimer.clock(length);
+  m_timeoutTimer.clock(length);
+  m_holdoffTimer.clock(length);
+  m_kerchunkTimer.clock(length);
+  m_ackMinTimer.clock(length);
+  m_ackDelayTimer.clock(length);
+  m_hangTimer.clock(length);
+}
+
+void CFM::listeningState(bool validSignal)
+{
+  if (validSignal) {
+    if (m_kerchunkTimer.getTimeout() > 0U) {
+      DEBUG1("State to KERCHUNK");
+      m_state = FS_KERCHUNK;
+      m_kerchunkTimer.start();
+      if (m_callsignAtStart && !m_callsignAtLatch)
+        sendCallsign();
+    } else {
+      DEBUG1("State to RELAYING");
+      m_state = FS_RELAYING;
+      if (m_callsignAtStart)
+        sendCallsign();
+    }
+
+    insertSilence(50U);
+
+    beginRelaying();
+
+    m_callsignTimer.start();
+
+    io.setDecode(true);
+    io.setADCDetection(true);
+
+    DEBUG1("Change to STATE_FM");
+    m_modemState = STATE_FM;
+  }
+}
+
+void CFM::kerchunkState(bool validSignal)
+{
+  if (validSignal) {
+    if (m_kerchunkTimer.hasExpired()) {
+      DEBUG1("State to RELAYING");
+      m_state = FS_RELAYING;
+      m_kerchunkTimer.stop();
+      if (m_callsignAtStart && m_callsignAtLatch) {
+        sendCallsign();
+        m_callsignTimer.start();
+      }
+    }
+  } else {
+    io.setDecode(false);
+    io.setADCDetection(false);
+
+    DEBUG1("State to LISTENING");
+    m_state = FS_LISTENING;
+    m_kerchunkTimer.stop();
+    m_timeoutTimer.stop();
+    m_ackMinTimer.stop();
+    m_callsignTimer.stop();
+  }
+}
+
+void CFM::relayingState(bool validSignal)
+{
+  if (validSignal) {
+    if (m_timeoutTimer.isRunning() && m_timeoutTimer.hasExpired()) {
+      DEBUG1("State to TIMEOUT");
+      m_state = FS_TIMEOUT;
+      m_ackMinTimer.stop();
+      m_timeoutTimer.stop();
+      m_timeoutTone.start();
+    }
+  } else {
+    io.setDecode(false);
+    io.setADCDetection(false);
+
+    DEBUG1("State to RELAYING_WAIT");
+    m_state = FS_RELAYING_WAIT;
+    m_ackDelayTimer.start();
+  }
+
+  if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
+    sendCallsign();
+    m_callsignTimer.start();
+  }
+}
+
+void CFM::relayingWaitState(bool validSignal)
+{
+  if (validSignal) {
+    io.setDecode(true);
+    io.setADCDetection(true);
+
+    DEBUG1("State to RELAYING");
+    m_state = FS_RELAYING;
+    m_ackDelayTimer.stop();
+  } else {
+    if (m_ackDelayTimer.isRunning() && m_ackDelayTimer.hasExpired()) {
+      DEBUG1("State to HANG");
+      m_state = FS_HANG;
+
+      if (m_ackMinTimer.isRunning()) {
+        if (m_ackMinTimer.hasExpired()) {
+          DEBUG1("Send ack");
+          m_rfAck.start();
+          m_ackMinTimer.stop();
+        }
+      } else {
+          DEBUG1("Send ack");
+          m_rfAck.start();
+          m_ackMinTimer.stop();
+      }
+
+      m_ackDelayTimer.stop();
+      m_timeoutTimer.stop();
+      m_hangTimer.start();
+    }
+  }
+
+  if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
+    sendCallsign();
+    m_callsignTimer.start();
+  }
+}
+
+void CFM::hangState(bool validSignal)
+{
+  if (validSignal) {
+    io.setDecode(true);
+    io.setADCDetection(true);
+
+    DEBUG1("State to RELAYING");
+    m_state = FS_RELAYING;
+    DEBUG1("Stop ack");
+    m_rfAck.stop();
+    beginRelaying();
+  } else {
+    if (m_hangTimer.isRunning() && m_hangTimer.hasExpired()) {
+      DEBUG1("State to LISTENING");
+      m_state = FS_LISTENING;
+      m_hangTimer.stop();
+
+      if (m_callsignAtEnd)
+        sendCallsign();
+
+      m_callsignTimer.stop();
+    }
+  }
+
+  if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
+    sendCallsign();
+    m_callsignTimer.start();
+  }
+}
+
+void CFM::timeoutState(bool validSignal)
+{
+  if (!validSignal) {
+    io.setDecode(false);
+    io.setADCDetection(false);
+
+    DEBUG1("State to TIMEOUT_WAIT");
+    m_state = FS_TIMEOUT_WAIT;
+    m_ackDelayTimer.start();
+  }
+
+  if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
+    sendCallsign();
+    m_callsignTimer.start();
+  }
+}
+
+void CFM::timeoutWaitState(bool validSignal)
+{
+  if (validSignal) {
+    io.setDecode(true);
+    io.setADCDetection(true);
+
+    DEBUG1("State to TIMEOUT");
+    m_state = FS_TIMEOUT;
+    m_ackDelayTimer.stop();
+  } else {
+    if (m_ackDelayTimer.isRunning() && m_ackDelayTimer.hasExpired()) {
+      DEBUG1("State to HANG");
+      m_state = FS_HANG;
+      m_timeoutTone.stop();
+      DEBUG1("Send ack");
+      m_rfAck.start();
+      m_ackDelayTimer.stop();
+      m_ackMinTimer.stop();
+      m_timeoutTimer.stop();
+      m_hangTimer.start();
+    }
+  }
+
+  if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
+    sendCallsign();
+    m_callsignTimer.start();
+  }
+}
+
+void CFM::sendCallsign()
+{
+  if (m_holdoffTimer.isRunning()) {
+    if (m_holdoffTimer.hasExpired()) {
+      DEBUG1("Send callsign");
+      m_callsign.start();
+      m_holdoffTimer.start();
+    }
+  } else {
+    DEBUG1("Send callsign");
+    m_callsign.start();
+  }
+}
+
+void CFM::beginRelaying()
+{
+  m_timeoutTimer.start();
+  m_ackMinTimer.start();
+}
+
+void CFM::insertDelay(uint16_t ms)
+{
+  uint32_t nSamples = ms * 24U;
+
+  for (uint32_t i = 0U; i < nSamples; i++)
+    m_inputRB.put(0);
+}
+
+void CFM::insertSilence(uint16_t ms)
+{
+  uint32_t nSamples = ms * 24U;
+
+  for (uint32_t i = 0U; i < nSamples; i++)
+    m_outputRB.put(0);
+}

FM.h

@@ -0,0 +1,108 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#if !defined(FM_H)
+#define  FM_H
+
+#include "Config.h"
+
+#include "FMBlanking.h"
+#include "FMCTCSSRX.h"
+#include "FMCTCSSTX.h"
+#include "FMTimeout.h"
+#include "FMKeyer.h"
+#include "FMTimer.h"
+#include "FMRB.h"
+#include "FMDirectForm1.h"
+#include "FMDownsampler.h"
+
+enum FM_STATE {
+  FS_LISTENING,
+  FS_KERCHUNK,
+  FS_RELAYING,
+  FS_RELAYING_WAIT,
+  FS_TIMEOUT,
+  FS_TIMEOUT_WAIT,
+  FS_HANG
+};
+
+
+
+
+class CFM {
+public:
+  CFM();
+
+  void samples(bool cos, const q15_t* samples, uint8_t length);
+
+  void process();
+
+  void reset();
+
+  uint8_t setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd, bool callsignAtLatch);
+  uint8_t setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_t minTime, uint16_t delay, uint8_t level);
+  uint8_t setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel);
+
+private:
+  CFMKeyer             m_callsign;
+  CFMKeyer             m_rfAck;
+  CFMCTCSSRX           m_ctcssRX;
+  CFMCTCSSTX           m_ctcssTX;
+  CFMTimeout           m_timeoutTone;
+  FM_STATE             m_state;
+  bool                 m_callsignAtStart;
+  bool                 m_callsignAtEnd;
+  bool                 m_callsignAtLatch;
+  CFMTimer             m_callsignTimer;
+  CFMTimer             m_timeoutTimer;
+  CFMTimer             m_holdoffTimer;
+  CFMTimer             m_kerchunkTimer;
+  CFMTimer             m_ackMinTimer;
+  CFMTimer             m_ackDelayTimer;
+  CFMTimer             m_hangTimer;
+  CFMDirectFormI       m_filterStage1;
+  CFMDirectFormI       m_filterStage2;
+  CFMDirectFormI       m_filterStage3;
+  CFMBlanking          m_blanking;
+  bool                 m_useCOS;
+  bool                 m_cosInvert;
+  q15_t                m_rfAudioBoost;
+  CFMDownsampler       m_downsampler;
+  q15_t                m_rxLevel;
+  CFMRB                m_inputRB;
+  CFMRB                m_outputRB;
+
+  void stateMachine(bool validSignal);
+  void listeningState(bool validSignal);
+  void kerchunkState(bool validSignal);
+  void relayingState(bool validSignal);
+  void relayingWaitState(bool validSignal);
+  void timeoutState(bool validSignal);
+  void timeoutWaitState(bool validSignal);
+  void hangState(bool validSignal);
+
+  void clock(uint8_t length);
+
+  void sendCallsign();
+  void beginRelaying();
+
+  void insertDelay(uint16_t ms);
+  void insertSilence(uint16_t ms);
+};
+
+#endif

FMBlanking.cpp

@@ -0,0 +1,82 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include "Config.h"
+#include "Globals.h"
+#include "FMBlanking.h"
+
+// 2000 Hz sine wave at 24000 Hz sample rate
+const q31_t TONE[] = {0, 16384, 28378, 32767, 28378, 16384, 0, -16383, -28377, -32767, -28377, -16383};
+
+const uint8_t TONE_LEN = 12U;
+
+const uint32_t BLEEP_LEN = 2400U;   // 100ms
+
+CFMBlanking::CFMBlanking() :
+m_posValue(0),
+m_negValue(0),
+m_level(128 * 128),
+m_running(false),
+m_pos(0U),
+m_n(0U)
+{
+}
+
+void CFMBlanking::setParams(uint8_t value, uint8_t level)
+{
+  m_posValue = q15_t(value * 128);
+  m_negValue = -m_posValue;
+
+  m_level = q15_t(level * 128);
+}
+
+q15_t CFMBlanking::process(q15_t sample)
+{
+  if (m_posValue == 0)
+    return sample;
+
+  if (!m_running) {
+    if (sample >= m_posValue) {
+      m_running = true;
+      m_pos = 0U;
+      m_n   = 0U;
+    } else if (sample <= m_negValue) {
+      m_running = true;
+      m_pos = 0U;
+      m_n   = 0U;
+    }
+  }
+
+  if (!m_running)
+    return sample;
+
+  if (m_pos <= BLEEP_LEN) {
+    q31_t value = TONE[m_n++] * m_level;
+    sample = q15_t(__SSAT((value >> 15), 16));
+    if (m_n >= TONE_LEN)
+      m_n = 0U;
+  } else {
+    sample = 0;
+  }
+
+  m_pos++;
+  if (m_pos >= 12000U)
+    m_running = false;
+
+  return sample;
+}

FMBlanking.h

@@ -0,0 +1,41 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#if !defined(FMBlanking_H)
+#define  FMBlanking_H
+
+#include "Config.h"
+
+class CFMBlanking {
+public:
+  CFMBlanking();
+
+  void setParams(uint8_t value, uint8_t level);
+
+  q15_t process(q15_t sample);
+
+private:
+  q15_t    m_posValue;
+  q15_t    m_negValue;
+  q15_t    m_level;
+  bool     m_running;
+  uint32_t m_pos;
+  uint8_t  m_n;
+};
+
+#endif

FMCTCSSRX.cpp

@@ -0,0 +1,181 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include "Config.h"
+#include "Globals.h"
+#include "FMCTCSSRX.h"
+
+const struct RX_CTCSS_TABLE {
+  uint8_t frequency;
+  q63_t   coeffDivTwo;
+} RX_CTCSS_TABLE_DATA[] = {
+  { 67U, 2147153298},
+  { 69U, 2147130228},
+  { 71U, 2147103212},
+  { 74U, 2147076297},
+  { 77U, 2147047330},
+  { 79U, 2147016195},
+  { 82U, 2146982775},
+  { 85U, 2146946945},
+  { 88U, 2146907275},
+  { 91U, 2146867538},
+  { 94U, 2146822298},
+  { 97U, 2146785526},
+  {100U, 2146747759},
+  {103U, 2146695349},
+  {107U, 2146637984},
+  {110U, 2146578604},
+  {114U, 2146513835},
+  {118U, 2146445080},
+  {123U, 2146370355},
+  {127U, 2146291161},
+  {131U, 2146205372},
+  {136U, 2146112589},
+  {141U, 2146014479},
+  {146U, 2145910829},
+  {151U, 2145796971},
+  {156U, 2145676831},
+  {159U, 2145604646},
+  {162U, 2145547790},
+  {165U, 2145468230},
+  {167U, 2145409363},
+  {171U, 2145324517},
+  {173U, 2145261046},
+  {177U, 2145170643},
+  {179U, 2145102321},
+  {183U, 2145006080},
+  {186U, 2144932648},
+  {189U, 2144830280},
+  {192U, 2144748638},
+  {196U, 2144639788},
+  {199U, 2144555290},
+  {203U, 2144436713},
+  {206U, 2144346237},
+  {210U, 2144217348},
+  {218U, 2143983951},
+  {225U, 2143735870},
+  {229U, 2143622139},
+  {233U, 2143469001},
+  {241U, 2143182299},
+  {250U, 2142874683},
+  {254U, 2142733729}};
+
+const uint8_t CTCSS_TABLE_DATA_LEN = 50U;
+
+// 4Hz bandwidth
+const uint16_t N = 24000U / 4U;
+
+CFMCTCSSRX::CFMCTCSSRX() :
+m_coeffDivTwo(0),
+m_highThreshold(0),
+m_lowThreshold(0),
+m_count(0U),
+m_q0(0),
+m_q1(0),
+m_result(CTS_NONE)
+{
+}
+
+uint8_t CFMCTCSSRX::setParams(uint8_t frequency, uint8_t highThreshold, uint8_t lowThreshold)
+{
+  m_coeffDivTwo = 0;
+
+  for (uint8_t i = 0U; i < CTCSS_TABLE_DATA_LEN; i++) {
+    if (RX_CTCSS_TABLE_DATA[i].frequency == frequency) {
+      m_coeffDivTwo = RX_CTCSS_TABLE_DATA[i].coeffDivTwo;
+      break;
+    }
+  }
+
+  if (m_coeffDivTwo == 0)
+    return 4U;
+
+  m_highThreshold = q31_t(highThreshold);
+  m_lowThreshold  = q31_t(lowThreshold);
+
+  return 0U;
+}
+
+uint8_t CFMCTCSSRX::process(q15_t sample)
+{
+  //get more dynamic into the decoder by multiplying the sample by 1.5
+  q31_t sample31 = q31_t(sample) +  (q31_t(sample) >> 1);
+
+  m_result &= ~CTS_READY;
+
+  q31_t q2 = m_q1;
+  m_q1 = m_q0;
+
+  // Q31 multiplication, t3 = m_coeffDivTwo * 2 * m_q1
+  q63_t t1 = m_coeffDivTwo * m_q1;
+  q31_t t2 = __SSAT((t1 >> 31), 31);
+  q31_t t3 = t2 * 2;
+
+  // m_q0 = m_coeffDivTwo * m_q1 * 2 - q2 + sample
+  m_q0 = t3 - q2 + sample31;
+
+  m_count++;
+  if (m_count == N) {
+    // Q31 multiplication, t2 = m_q0 * m_q0
+    q63_t t1 = q63_t(m_q0) * q63_t(m_q0);
+    q31_t t2 = __SSAT((t1 >> 31), 31);
+
+    // Q31 multiplication, t4 = m_q0 * m_q0
+    q63_t t3 = q63_t(m_q1) * q63_t(m_q1);
+    q31_t t4 = __SSAT((t3 >> 31), 31);
+
+    // Q31 multiplication, t9 = m_q0 * m_q1 * m_coeffDivTwo * 2
+    q63_t t5 = q63_t(m_q0) * q63_t(m_q1);
+    q31_t t6 = __SSAT((t5 >> 31), 31);
+    q63_t t7 = t6 * m_coeffDivTwo;
+    q31_t t8 = __SSAT((t7 >> 31), 31);
+    q31_t t9  = t8 * 2;
+
+    // value = m_q0 * m_q0 + m_q1 * m_q1 - m_q0 * m_q1 * m_coeffDivTwo * 2
+    q31_t value = t2 + t4 - t9;
+
+    bool previousCTCSSValid = CTCSS_VALID(m_result);
+
+    q31_t threshold = m_highThreshold;
+    if (previousCTCSSValid)
+      threshold = m_lowThreshold;
+
+    m_result |= CTS_READY;
+    if (value >= threshold)
+      m_result |= CTS_VALID;
+    else
+      m_result &= ~CTS_VALID;
+
+    if (previousCTCSSValid != CTCSS_VALID(m_result))
+      DEBUG4("CTCSS Value / Threshold / Valid", value, threshold, CTCSS_VALID(m_result));
+
+    m_count = 0U;
+    m_q0 = 0;
+    m_q1 = 0;
+  }
+
+  return m_result;
+}
+
+void CFMCTCSSRX::reset()
+{
+  m_q0 = 0;
+  m_q1 = 0;
+  m_result = CTS_NONE;
+  m_count  = 0U;
+}

FMCTCSSRX.h

@@ -0,0 +1,53 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#if !defined(FMCTCSSRX_H)
+#define  FMCTCSSRX_H
+
+#include "Config.h"
+
+const uint8_t CTS_NONE  = 0U;
+const uint8_t CTS_READY = 1U;
+const uint8_t CTS_VALID = 2U;
+
+#define CTCSS_READY(a) ((a & CTS_READY) != 0)
+#define CTCSS_NOT_READY(a) ((a & CTS_READY) == 0)
+#define CTCSS_VALID(a) ((a & CTS_VALID) != 0)
+#define CTCSS_NOT_VALID(a) ((a & CTS_VALID) == 0)
+
+class CFMCTCSSRX {
+public:
+  CFMCTCSSRX();
+
+  uint8_t setParams(uint8_t frequency, uint8_t highThreshold, uint8_t lowThreshold);
+  
+  uint8_t process(q15_t sample);
+
+  void reset();
+
+private:
+  q63_t    m_coeffDivTwo;
+  q31_t    m_highThreshold;
+  q31_t    m_lowThreshold;
+  uint16_t m_count;
+  q31_t    m_q0;
+  q31_t    m_q1;
+  uint8_t  m_result;
+};
+
+#endif

FMCTCSSTX.cpp

@@ -0,0 +1,125 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include "Config.h"
+#include "Globals.h"
+#include "FMCTCSSTX.h"
+
+const struct TX_CTCSS_TABLE {
+  uint8_t  frequency;
+  uint16_t length;
+  q31_t    increment;
+} TX_CTCSS_TABLE_DATA[] = {
+  { 67U, 358U, 5995059},
+  { 69U, 346U, 6200860},
+  { 71U, 334U, 6433504},
+  { 74U, 323U, 6657200},
+  { 77U, 312U, 6889844},
+  { 79U, 301U, 7131436},
+  { 82U, 291U, 7381976},
+  { 85U, 281U, 7641463},
+  { 88U, 271U, 7918846},
+  { 91U, 262U, 8187282},
+  { 94U, 253U, 8482561},
+  { 97U, 246U, 8715205},
+  {100U, 240U, 8947849},
+  {103U, 232U, 9261024},
+  {107U, 224U, 9592094},
+  {110U, 216U, 9923165},
+  {114U, 209U, 10272131},
+  {118U, 202U, 10630045},
+  {123U, 195U, 11005854},
+  {127U, 189U, 11390612},
+  {131U, 182U, 11793265},
+  {136U, 176U, 12213814},
+  {141U, 170U, 12643310},
+  {146U, 164U, 13081755},
+  {151U, 159U, 13547043},
+  {156U, 153U, 14021279},
+  {159U, 150U, 14298662},
+  {162U, 148U, 14513411},
+  {165U, 145U, 14808690},
+  {167U, 143U, 15023438},
+  {171U, 140U, 15327665},
+  {173U, 138U, 15551361},
+  {177U, 135U, 15864536},
+  {179U, 133U, 16097180},
+  {183U, 131U, 16419303},
+  {186U, 129U, 16660894},
+  {189U, 126U, 16991965},
+  {192U, 124U, 17251452},
+  {196U, 122U, 17591471},
+  {199U, 120U, 17850958},
+  {203U, 118U, 18208872},
+  {206U, 116U, 18477308},
+  {210U, 114U, 18853117},
+  {218U, 110U, 19515258},
+  {225U, 106U, 20195295},
+  {229U, 105U, 20499521},
+  {233U, 103U, 20902175},
+  {241U,  99U, 21635898},
+  {250U,  96U, 22396465},
+  {254U,  94U, 22736484}};
+
+const uint8_t CTCSS_TABLE_DATA_LEN = 50U;
+
+CFMCTCSSTX::CFMCTCSSTX() :
+m_values(NULL),
+m_length(0U),
+m_n(0U)
+{
+}
+
+uint8_t CFMCTCSSTX::setParams(uint8_t frequency, uint8_t level)
+{
+  const TX_CTCSS_TABLE* entry = NULL;
+
+  for (uint8_t i = 0U; i < CTCSS_TABLE_DATA_LEN; i++) {
+    if (TX_CTCSS_TABLE_DATA[i].frequency == frequency) {
+      entry = TX_CTCSS_TABLE_DATA + i;
+      break;
+    }
+  }
+
+  if (entry == NULL)
+    return 4U;
+
+  m_length = entry->length;
+
+  delete[] m_values;
+  m_values = new q15_t[m_length];
+
+  q31_t arg = 0;
+  for (uint16_t i = 0U; i < m_length; i++) {
+    q63_t value = ::arm_sin_q31(arg) * q63_t(level * 13);
+    m_values[i] = q15_t(__SSAT((value >> 31), 16));
+
+    arg += entry->increment;
+  }
+
+  return 0U;
+}
+
+q15_t CFMCTCSSTX::getAudio()
+{
+  q15_t sample = m_values[m_n++];
+  if(m_n >= m_length)
+    m_n = 0U;
+  
+  return sample;
+}

FMCTCSSTX.h

@@ -0,0 +1,38 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#if !defined(FMCTCSSTX_H)
+#define  FMCTCSSTX_H
+
+#include "Config.h"
+
+class CFMCTCSSTX {
+public:
+  CFMCTCSSTX();
+
+  uint8_t setParams(uint8_t frequency, uint8_t level);
+
+  q15_t getAudio();
+
+private:
+  q15_t*   m_values;
+  uint16_t m_length;
+  uint16_t m_n;
+};
+
+#endif

FMDirectForm1.h

@@ -0,0 +1,111 @@
+
+/*******************************************************************************
+This header file has been taken from:
+"A Collection of Useful C++ Classes for Digital Signal Processing"
+By Vinnie Falco 
+Bernd Porr adapted it for Linux and turned it into a filter using
+fixed point arithmetic.
+--------------------------------------------------------------------------------
+License: MIT License (http://www.opensource.org/licenses/mit-license.php)
+Copyright (c) 2009 by Vinnie Falco
+Copyright (C) 2013-2017, Bernd Porr, [email protected]
+Copyright (C) 2020 , Mario Molitor , [email protected]
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+THE SOFTWARE.
+*******************************************************************************/
+
+// based on https://raw.githubusercontent.com/berndporr/iir_fixed_point/master/DirectFormI.h
+
+#include "Globals.h"
+
+#ifndef DIRECTFORMI_H_
+#define DIRECTFORMI_H_
+class CFMDirectFormI
+{
+public:
+
+	// convenience function which takes the a0 argument but ignores it!
+	CFMDirectFormI(const q31_t b0, const q31_t b1, const q31_t b2,
+			const q31_t, const q31_t a1, const q31_t a2)
+	{
+		// FIR coefficients
+		c_b0 = b0;
+		c_b1 = b1;
+		c_b2 = b2;
+		// IIR coefficients
+		c_a1 = a1;
+		c_a2 = a2;
+		reset();
+	}
+
+	CFMDirectFormI(const CFMDirectFormI &my)
+	{
+	// delay line
+		m_x2 = my.m_x2; // x[n-2]
+		m_y2 = my.m_y2; // y[n-2]
+		m_x1 = my.m_x1; // x[n-1]
+		m_y1 = my.m_y1; // y[n-1]
+
+	// coefficients
+		c_b0 = my.c_b0;
+		c_b1 = my.c_b1;
+		c_b2 = my.c_b2; // FIR
+		c_a1 = my.c_a1;
+		c_a2 = my.c_a2; // IIR
+    }
+
+	void reset ()
+	{
+		m_x1 = 0;
+		m_x2 = 0;
+		m_y1 = 0;
+		m_y2 = 0;
+	}
+
+	// filtering operation: one sample in and one out
+	inline q15_t filter(const q15_t in)
+	{
+		// calculate the output
+		register q31_t out_upscaled = c_b0 * in
+									+ c_b1 * m_x1
+									+ c_b2 * m_x2
+									- c_a1 * m_y1
+									- c_a2 * m_y2;
+
+		q15_t out = __SSAT(out_upscaled >> 15, 15);
+
+		// update the delay lines
+		m_x2 = m_x1;
+		m_y2 = m_y1;
+		m_x1 = in;
+		m_y1 = out;
+
+		return out;
+	}
+
+private:
+	// delay line
+	q31_t m_x2; // x[n-2]
+	q31_t m_y2; // y[n-2]
+	q31_t m_x1; // x[n-1]
+	q31_t m_y1; // y[n-1]
+
+	// coefficients
+	q31_t c_b0,c_b1,c_b2; // FIR
+	q31_t c_a1,c_a2; // IIR
+};
+
+#endif /* DIRECTFORMI_H */

FMDownsampleRB.cpp

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include "FMDownsampleRB.h"
+
+CFMDownsampleRB::CFMDownsampleRB(uint16_t length) :
+m_length(length),
+m_head(0U),
+m_tail(0U),
+m_full(false),
+m_overflow(false)
+{
+  m_samples = new uint8_t[length];
+}
+
+uint16_t CFMDownsampleRB::getSpace() const
+{
+  uint16_t n = 0U;
+
+  if (m_tail == m_head)
+    n = m_full ? 0U : m_length;
+  else if (m_tail < m_head)
+    n = m_length - m_head + m_tail;
+  else
+    n = m_tail - m_head;
+
+  if (n > m_length)
+    n = 0U;
+
+  return n;
+}
+
+uint16_t CFMDownsampleRB::getData() const
+{
+  if (m_tail == m_head)
+    return m_full ? m_length : 0U;
+  else if (m_tail < m_head)
+    return m_head - m_tail;
+  else
+    return m_length - m_tail + m_head;
+}
+
+bool CFMDownsampleRB::put(uint8_t sample)
+{
+  if (m_full) {
+    m_overflow = true;
+    return false;
+  }
+
+  m_samples[m_head] = sample;
+
+  m_head++;
+  if (m_head >= m_length)
+    m_head = 0U;
+
+  if (m_head == m_tail)
+    m_full = true;
+
+  return true;
+}
+
+bool CFMDownsampleRB::get(uint8_t& sample)
+{
+  if (m_head == m_tail && !m_full)
+    return false;
+
+  sample = m_samples[m_tail];
+
+  m_full = false;
+
+  m_tail++;
+  if (m_tail >= m_length)
+    m_tail = 0U;
+
+  return true;
+}
+
+bool CFMDownsampleRB::hasOverflowed()
+{
+  bool overflow = m_overflow;
+
+  m_overflow = false;
+
+  return overflow;
+}

FMDownsampleRB.h

@@ -0,0 +1,68 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#if !defined(FMDOWNSAMPLERB_H)
+#define  FMDOWNSAMPLERB_H
+
+#if defined(STM32F4XX)
+#include "stm32f4xx.h"
+#elif defined(STM32F7XX)
+#include "stm32f7xx.h"
+#elif defined(STM32F105xC)
+#include "stm32f1xx.h"
+#include <cstddef>
+#else
+#include <Arduino.h>
+#endif
+
+#if defined(__SAM3X8E__) || defined(STM32F105xC)
+#define  ARM_MATH_CM3
+#elif defined(STM32F7XX)
+#define  ARM_MATH_CM7
+#elif defined(STM32F4XX) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
+#define  ARM_MATH_CM4
+#else
+#error "Unknown processor type"
+#endif
+
+#include <arm_math.h>
+
+class CFMDownsampleRB {
+public:
+  CFMDownsampleRB(uint16_t length);
+  
+  uint16_t getSpace() const;
+  
+  uint16_t getData() const;
+
+  bool put(uint8_t sample);
+
+  bool get(uint8_t& sample);
+
+  bool hasOverflowed();
+
+private:
+  uint16_t          m_length;
+  volatile uint8_t* m_samples;
+  volatile uint16_t m_head;
+  volatile uint16_t m_tail;
+  volatile bool     m_full;
+  bool              m_overflow;
+};
+
+#endif

FMDownsampler.cpp

@@ -0,0 +1,63 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2020 by Geoffrey Merck F4FXL - KC3FRA
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include "Config.h"
+#include "FMDownsampler.h"
+
+
+CFMDownsampler::CFMDownsampler(uint16_t length) :
+m_ringBuffer(length),//length might need tweaking
+m_packIndex(0),
+m_downSampleIndex(0)
+{
+    m_samplePack = 0;
+}
+
+void CFMDownsampler::addSample(q15_t sample)
+{
+    //only take one of three samples
+    if(m_downSampleIndex == 0) {
+      switch(m_packIndex){
+        case 0:
+          m_samplePack = int32_t(sample) << 12;
+        break;
+        case 1:{
+            m_samplePack |= int32_t(sample);
+            
+            //we did not use MSB; skip it
+            m_ringBuffer.put(m_samplePackBytes[1]); 
+            m_ringBuffer.put(m_samplePackBytes[2]); 
+            m_ringBuffer.put(m_samplePackBytes[3]); 
+
+            m_samplePack = 0;
+        }
+        break;
+        default:
+            //should never happen
+        break;
+        }
+        m_packIndex++;
+        if(m_packIndex >= 2)
+            m_packIndex = 0;  
+    }
+
+    m_downSampleIndex++;
+    if(m_downSampleIndex >= 3)
+        m_downSampleIndex = 0;
+}

FMDownsampler.h

@@ -0,0 +1,43 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2020 by Geoffrey Merck F4FXL - KC3FRA
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#if !defined(FMDOWNSAMPLER_H)
+#define FMDOWNSAMPLER_H
+
+#include "Config.h"
+#include "FMDownsampleRB.h"
+
+class CFMDownsampler {
+public:
+  CFMDownsampler(uint16_t length);
+  void addSample(q15_t sample);
+  inline bool getPackedData(uint8_t& data){ return m_ringBuffer.get(data); };
+  inline bool hasOverflowed() { return m_ringBuffer.hasOverflowed(); };
+
+private:
+  CFMDownsampleRB m_ringBuffer;
+  union {
+    int32_t m_samplePack;
+    int8_t  m_samplePackBytes[4];
+  };
+  uint8_t m_packIndex;
+  uint8_t m_downSampleIndex;
+};
+
+#endif

FMKeyer.cpp

@@ -0,0 +1,216 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include "Config.h"
+#include "Globals.h"
+#include "FMKeyer.h"
+
+const struct {
+  char     c;
+  uint32_t pattern;
+  uint8_t  length;
+} SYMBOL_LIST[] = {
+  {'A', 0xB8000000U, 8U},
+  {'B', 0xEA800000U, 12U},
+  {'C', 0xEBA00000U, 14U},
+  {'D', 0xEA000000U, 10U},
+  {'E', 0x80000000U, 4U},
+  {'F', 0xAE800000U, 12U},
+  {'G', 0xEE800000U, 12U},
+  {'H', 0xAA000000U, 10U},
+  {'I', 0xA0000000U, 6U},
+  {'J', 0xBBB80000U, 16U},
+  {'K', 0xEB800000U, 12U},
+  {'L', 0xBA800000U, 12U},
+  {'M', 0xEE000000U, 10U},
+  {'N', 0xE8000000U, 8U},
+  {'O', 0xEEE00000U, 14U},
+  {'P', 0xBBA00000U, 14U},
+  {'Q', 0xEEB80000U, 16U},
+  {'R', 0xBA000000U, 10U},
+  {'S', 0xA8000000U, 8U},
+  {'T', 0xE0000000U, 6U},
+  {'U', 0xAE000000U, 10U},
+  {'V', 0xAB800000U, 12U},
+  {'W', 0xBB800000U, 12U},
+  {'X', 0xEAE00000U, 14U},
+  {'Y', 0xEBB80000U, 16U},
+  {'Z', 0xEEA00000U, 14U},
+  {'1', 0xBBBB8000U, 20U},
+  {'2', 0xAEEE0000U, 18U},
+  {'3', 0xABB80000U, 16U},
+  {'4', 0xAAE00000U, 14U},
+  {'5', 0xAA800000U, 12U},
+  {'6', 0xEAA00000U, 14U},
+  {'7', 0xEEA80000U, 16U},
+  {'8', 0xEEEA0000U, 18U},
+  {'9', 0xEEEE8000U, 20U},
+  {'0', 0xEEEEE000U, 22U},
+  {'/', 0xEAE80000U, 16U},
+  {'?', 0xAEEA0000U, 18U},
+  {',', 0xEEAEE000U, 22U},
+  {'-', 0xEAAE0000U, 18U},
+  {'=', 0xEAB80000U, 16U},
+  {'.', 0xBAEB8000U, 20U},
+  {' ', 0x00000000U, 4U},
+  {0U,  0x00000000U, 0U}
+};
+
+const uint8_t BIT_MASK_TABLE[] = {0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U};
+
+#define WRITE_BIT_FM(p,i,b) p[(i)>>3] = (b) ? (p[(i)>>3] | BIT_MASK_TABLE[(i)&7]) : (p[(i)>>3] & ~BIT_MASK_TABLE[(i)&7])
+#define READ_BIT_FM(p,i)    (p[(i)>>3] & BIT_MASK_TABLE[(i)&7])
+
+CFMKeyer::CFMKeyer() :
+m_wanted(false),
+m_poBuffer(),
+m_poLen(0U),
+m_poPos(0U),
+m_dotLen(0U),
+m_dotPos(0U),
+m_audio(NULL),
+m_audioLen(0U),
+m_audioPos(0U),
+m_highLevel(0U),
+m_lowLevel(0)
+{
+}
+
+uint8_t CFMKeyer::setParams(const char* text, uint8_t speed, uint16_t frequency, uint8_t highLevel, uint8_t lowLevel)
+{
+  m_poLen = 0U;
+
+  for (uint8_t i = 0U; text[i] != '\0'; i++) {
+    for (uint8_t j = 0U; SYMBOL_LIST[j].c != 0U; j++) {
+      if (SYMBOL_LIST[j].c == text[i]) {
+        uint32_t MASK = 0x80000000U;
+        for (uint8_t k = 0U; k < SYMBOL_LIST[j].length; k++, m_poLen++, MASK >>= 1) {
+          bool b = (SYMBOL_LIST[j].pattern & MASK) == MASK;
+          WRITE_BIT_FM(m_poBuffer, m_poLen, b);
+
+          if (m_poLen >= 995U) {
+            m_poLen = 0U;
+            return 4U;
+          }
+        }
+
+        break;
+      }
+    }
+  }
+
+  m_highLevel = q15_t(highLevel);
+  m_lowLevel  = q15_t(lowLevel);
+
+  m_dotLen = 24000U / speed;   // In samples
+
+  m_audioLen = 24000U / frequency; // In samples
+
+  delete[] m_audio;
+  m_audio = new bool[m_audioLen];
+
+  for (uint16_t i = 0U; i < m_audioLen; i++) {
+    if (i < (m_audioLen / 2U))
+      m_audio[i] = true;
+    else
+      m_audio[i] = false;
+  }
+
+  return 0U;
+}
+
+q15_t CFMKeyer::getHighAudio()
+{
+  q15_t output = 0U;
+  if (!m_wanted)
+    return 0U;
+
+  bool b = READ_BIT_FM(m_poBuffer, m_poPos);
+  if (b)
+    output = m_audio[m_audioPos] ? m_highLevel : -m_highLevel;
+
+  m_audioPos++;
+  if (m_audioPos >= m_audioLen)
+    m_audioPos = 0U;
+  m_dotPos++;
+  if (m_dotPos >= m_dotLen) {
+    m_dotPos = 0U;
+    m_poPos++;
+    if (m_poPos >= m_poLen) {
+      stop();
+      return output;
+    }
+  }
+
+  return output;
+}
+
+q15_t CFMKeyer::getLowAudio()
+{
+  q15_t output = 0U;
+  if (!m_wanted)
+    return 0U;
+
+  bool b = READ_BIT_FM(m_poBuffer, m_poPos);
+  if (b)
+    output = m_audio[m_audioPos] ? m_lowLevel : -m_lowLevel;
+
+  m_audioPos++;
+  if (m_audioPos >= m_audioLen)
+    m_audioPos = 0U;
+  m_dotPos++;
+  if (m_dotPos >= m_dotLen) {
+    m_dotPos = 0U;
+    m_poPos++;
+    if (m_poPos >= m_poLen) {
+      stop();
+      return output;
+    }
+  }
+
+  return output;
+}
+
+void CFMKeyer::start()
+{
+  if (isRunning())
+    return;
+
+  m_wanted   = true;
+  m_poPos    = 0U;
+  m_dotPos   = 0U;
+  m_audioPos = 0U;
+}
+
+void CFMKeyer::stop()
+{
+  m_wanted   = false;
+  m_poPos    = 0U;
+  m_dotPos   = 0U;
+  m_audioPos = 0U;
+}
+
+bool CFMKeyer::isWanted() const
+{
+  return m_wanted;
+}
+
+bool CFMKeyer::isRunning() const
+{
+  return m_poPos > 0U || m_dotPos > 0U || m_audioPos > 0U;
+}

FMKeyer.h

@@ -0,0 +1,54 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#if !defined(FMKeyer_H)
+#define  FMKeyer_H
+
+#include "Config.h"
+
+class CFMKeyer {
+public:
+  CFMKeyer();
+
+  uint8_t setParams(const char* text, uint8_t speed, uint16_t frequency, uint8_t highLevel, uint8_t lowLevel);
+
+  q15_t getHighAudio();
+  q15_t getLowAudio();
+
+  void start();
+  void stop();
+
+  bool isRunning() const;
+
+  bool isWanted() const;
+
+private:
+  bool     m_wanted;
+  uint8_t  m_poBuffer[1000U];
+  uint16_t m_poLen;
+  uint16_t m_poPos;
+  uint16_t m_dotLen;
+  uint16_t m_dotPos;
+  bool*    m_audio;
+  uint16_t m_audioLen;
+  uint16_t m_audioPos;
+  q15_t    m_highLevel;
+  q15_t    m_lowLevel;
+};
+
+#endif

FMRB.cpp

@@ -0,0 +1,110 @@
+/*
+TX fifo control - Copyright (C) KI6ZUM 2015
+Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with this library; if not, write to the
+Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
+Boston, MA  02110-1301, USA.
+*/
+
+#include "FMRB.h"
+
+CFMRB::CFMRB(uint16_t length) :
+m_length(length),
+m_head(0U),
+m_tail(0U),
+m_full(false),
+m_overflow(false)
+{
+  m_samples = new q15_t[length];
+}
+
+uint16_t CFMRB::getSpace() const
+{
+  uint16_t n = 0U;
+
+  if (m_tail == m_head)
+    n = m_full ? 0U : m_length;
+  else if (m_tail < m_head)
+    n = m_length - m_head + m_tail;
+  else
+    n = m_tail - m_head;
+
+  if (n > m_length)
+    n = 0U;
+
+  return n;
+}
+
+uint16_t CFMRB::getData() const
+{
+  if (m_tail == m_head)
+    return m_full ? m_length : 0U;
+  else if (m_tail < m_head)
+    return m_head - m_tail;
+  else
+    return m_length - m_tail + m_head;
+}
+
+bool CFMRB::put(q15_t sample)
+{
+  if (m_full) {
+    m_overflow = true;
+    return false;
+  }
+
+  m_samples[m_head] = sample;
+
+  m_head++;
+  if (m_head >= m_length)
+    m_head = 0U;
+
+  if (m_head == m_tail)
+    m_full = true;
+
+  return true;
+}
+
+bool CFMRB::get(q15_t& sample)
+{
+  if (m_head == m_tail && !m_full)
+    return false;
+
+  sample = m_samples[m_tail];
+
+  m_full = false;
+
+  m_tail++;
+  if (m_tail >= m_length)
+    m_tail = 0U;
+
+  return true;
+}
+
+bool CFMRB::hasOverflowed()
+{
+  bool overflow = m_overflow;
+
+  m_overflow = false;
+
+  return overflow;
+}
+
+void CFMRB::reset()
+{
+  m_head = 0U;
+  m_tail = 0U;
+  m_full     = false;
+  m_overflow = false;
+}

FMRB.h

@@ -0,0 +1,72 @@
+/*
+Serial fifo control - Copyright (C) KI6ZUM 2015
+Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
+
+This library is free software; you can redistribute it and/or
+modify it under the terms of the GNU Library General Public
+License as published by the Free Software Foundation; either
+version 2 of the License, or (at your option) any later version.
+
+This library is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+Library General Public License for more details.
+
+You should have received a copy of the GNU Library General Public
+License along with this library; if not, write to the
+Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
+Boston, MA  02110-1301, USA.
+*/
+
+#if !defined(FMRB_H)
+#define  FMRB_H
+
+#if defined(STM32F4XX)
+#include "stm32f4xx.h"
+#elif defined(STM32F7XX)
+#include "stm32f7xx.h"
+#elif defined(STM32F105xC)
+#include "stm32f1xx.h"
+#include <cstddef>
+#else
+#include <Arduino.h>
+#endif
+
+#if defined(__SAM3X8E__) || defined(STM32F105xC)
+#define  ARM_MATH_CM3
+#elif defined(STM32F7XX)
+#define  ARM_MATH_CM7
+#elif defined(STM32F4XX) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
+#define  ARM_MATH_CM4
+#else
+#error "Unknown processor type"
+#endif
+
+#include <arm_math.h>
+
+class CFMRB {
+public:
+  CFMRB(uint16_t length);
+  
+  uint16_t getSpace() const;
+  
+  uint16_t getData() const;
+
+  bool put(q15_t sample);
+
+  bool get(q15_t& sample);
+
+  bool hasOverflowed();
+
+  void reset();
+
+private:
+  uint16_t          m_length;
+  volatile q15_t*   m_samples;
+  volatile uint16_t m_head;
+  volatile uint16_t m_tail;
+  volatile bool     m_full;
+  bool              m_overflow;
+};
+
+#endif

FMTimeout.cpp

@@ -0,0 +1,76 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include "Config.h"
+#include "Globals.h"
+#include "FMTimeout.h"
+
+// 400 Hz sine wave at 24000 Hz sample rate
+const q15_t BUSY_AUDIO[] = {0, 3426, 6813, 10126, 13328, 16384, 19261, 21926, 24351, 26510, 28378, 29935, 31164, 32052, 32588, 32767, 32588, 32052, 31164, 29935, 28378, 26510, 24351,
+                            21926, 19261, 16384, 13328, 10126, 6813, 3425, 0, -3425, -6813, -10126, -13328, -16384, -19261, -21926, -24351, -26510, -28378, -29935, -31164, -32052,
+                            -32588, -32768, -32588, -32052, -31164, -29935, -28378, -26510, -24351, -21926, -19261, -16384, -13328, -10126, -6813, -3425};
+const uint8_t BUSY_AUDIO_LEN = 60U;
+
+CFMTimeout::CFMTimeout() :
+m_level(128 * 128),
+m_running(false),
+m_pos(0U),
+m_n(0U)
+{
+}
+
+void CFMTimeout::setParams(uint8_t level)
+{
+  m_level = q15_t(level * 128);
+}
+
+q15_t CFMTimeout::getAudio()
+{
+  q15_t sample = 0U;
+  if (!m_running)
+    return sample;
+
+  if (m_pos > 12000U) {
+    q31_t sample = BUSY_AUDIO[m_n] * m_level;
+    sample = q15_t(__SSAT((sample >> 15), 16));
+
+    m_n++;
+    if (m_n >= BUSY_AUDIO_LEN)
+      m_n = 0U;
+  } else {
+    sample = 0U;
+  }
+
+  m_pos++;
+  if (m_pos >= 24000U)
+    m_pos = 0U;
+
+  return sample;
+}
+
+void CFMTimeout::start()
+{
+  m_running = true;
+  m_pos = 0U;
+  m_n   = 0U;
+}
+
+void CFMTimeout::stop()
+{
+  m_running = false;
+}

FMTimeout.h

@@ -0,0 +1,42 @@
+/*
+ *   Copyright (C) 2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#if !defined(FMTimeout_H)
+#define  FMTimeout_H
+
+#include "Config.h"
+
+class CFMTimeout {
+public:
+  CFMTimeout();
+
+  void setParams(uint8_t level);
+
+  void start();
+  void stop();
+
+  q15_t getAudio();
+
+private:
+  q15_t    m_level;
+  bool     m_running;
+  uint32_t m_pos;
+  uint8_t  m_n;
+};
+
+#endif

FMTimer.cpp

@@ -0,0 +1,70 @@
+/*
+ *   Copyright (C) 2009,2010,2015,2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include "Config.h"
+#include "Globals.h"
+#include "FMTimer.h"
+
+CFMTimer::CFMTimer() :
+m_timeout(0U),
+m_timer(0U)
+{
+}
+
+void CFMTimer::setTimeout(uint16_t secs, uint32_t msecs)
+{
+  m_timeout = (secs * 24000U) + (msecs * 24U);
+}
+
+uint32_t CFMTimer::getTimeout() const
+{
+  return m_timeout / 24U;
+}
+
+void CFMTimer::start()
+{
+  if (m_timeout > 0U)
+    m_timer = 1U;
+}
+
+void CFMTimer::stop()
+{
+  m_timer = 0U;
+}
+
+void CFMTimer::clock(uint8_t length)
+{
+  if (m_timer > 0U && m_timeout > 0U)
+    m_timer += length;
+}
+
+bool CFMTimer::isRunning() const
+{
+  return m_timer > 0U;
+}
+
+bool CFMTimer::hasExpired() const
+{
+  if (m_timeout == 0U || m_timer == 0U)
+    return false;
+
+  if (m_timer > m_timeout)
+    return true;
+
+  return false;
+}

FMTimer.h

@@ -0,0 +1,47 @@
+/*
+ *   Copyright (C) 2009,2010,2015,2020 by Jonathan Naylor G4KLX
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#if !defined(FMTimer_H)
+#define  FMTimer_H
+
+#include "Config.h"
+
+class CFMTimer {
+public:
+  CFMTimer();
+
+  void setTimeout(uint16_t secs, uint32_t msecs);
+
+  uint32_t getTimeout() const;
+
+  void start();
+  
+  void stop();
+
+  void clock(uint8_t length);
+
+  bool isRunning() const;
+  
+  bool hasExpired() const;
+
+private:
+  uint32_t m_timeout;
+  uint32_t m_timer;
+};
+
+#endif

Globals.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -50,6 +50,7 @@ enum MMDVM_STATE {
   STATE_P25       = 4,
   STATE_NXDN      = 5,
   STATE_POCSAG    = 6,
+  STATE_FM        = 10,
 
   // Dummy states start at 90
   STATE_NXDNCAL1K = 91,
@@ -60,7 +61,15 @@ enum MMDVM_STATE {
   STATE_RSSICAL   = 96,
   STATE_CWID      = 97,
   STATE_DMRCAL    = 98,
-  STATE_DSTARCAL  = 99
+  STATE_DSTARCAL  = 99,
+  STATE_INTCAL    = 100,
+  STATE_POCSAGCAL = 101,
+  STATE_FMCAL10K  = 102,
+  STATE_FMCAL12K  = 103,
+  STATE_FMCAL15K  = 104,
+  STATE_FMCAL20K  = 105,
+  STATE_FMCAL25K  = 106,
+  STATE_FMCAL30K  = 107
 };
 
 #include "SerialPort.h"
@@ -80,13 +89,16 @@ enum MMDVM_STATE {
 #include "POCSAGTX.h"
 #include "CalDStarRX.h"
 #include "CalDStarTX.h"
+#include "CalFM.h"
 #include "CalDMR.h"
 #include "CalP25.h"
 #include "CalNXDN.h"
+#include "CalPOCSAG.h"
 #include "CalRSSI.h"
 #include "CWIdTX.h"
 #include "Debug.h"
 #include "IO.h"
+#include "FM.h"
 
 const uint8_t  MARK_SLOT1 = 0x08U;
 const uint8_t  MARK_SLOT2 = 0x04U;
@@ -97,6 +109,12 @@ const uint16_t RX_BLOCK_SIZE = 2U;
 const uint16_t TX_RINGBUFFER_SIZE = 500U;
 const uint16_t RX_RINGBUFFER_SIZE = 600U;
 
+#if defined(STM32F105xC) || defined(__MK20DX256__)
+const uint16_t TX_BUFFER_LEN = 2000U;
+#else
+const uint16_t TX_BUFFER_LEN = 4000U;
+#endif
+
 extern MMDVM_STATE m_modemState;
 
 extern bool m_dstarEnable;
@@ -105,6 +123,7 @@ extern bool m_ysfEnable;
 extern bool m_p25Enable;
 extern bool m_nxdnEnable;
 extern bool m_pocsagEnable;
+extern bool m_fmEnable;
 
 extern bool m_duplex;
 
@@ -135,14 +154,17 @@ extern CNXDNTX nxdnTX;
 
 extern CPOCSAGTX pocsagTX;
 
+extern CFM fm;
+
 extern CCalDStarRX calDStarRX;
 extern CCalDStarTX calDStarTX;
 extern CCalDMR     calDMR;
+extern CCalFM      calFM;
 extern CCalP25     calP25;
 extern CCalNXDN    calNXDN;
+extern CCalPOCSAG  calPOCSAG;
 extern CCalRSSI    calRSSI;
 
 extern CCWIdTX cwIdTX;
 
 #endif
-

I2CTeensy.cpp

@@ -0,0 +1,235 @@
+/*
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *   28-4-2017 Created for MMDVM Pi shield for Teensy by Chris Huitema
+ */
+
+#include "Config.h"
+#include "Globals.h"
+
+#if defined(VK6MST_TEENSY_PI3_SHIELD_I2C)
+
+#include <i2c_t3.h>   //available here https://github.com/nox771/i2c_t3 or maybe the normal wire will work #include <wire.h> justs need to test i guess
+
+#define I2C_ADDRESS   0x22
+#define I2C_SPEED     100000
+
+// Function prototypes
+void receiveEvent(size_t count);
+void requestEvent(void);
+
+#define TX_FIFO_SIZE 512U
+#define RX_FIFO_SIZE 512U
+
+volatile uint8_t  TXfifo[TX_FIFO_SIZE];
+volatile uint8_t  RXfifo[RX_FIFO_SIZE];
+volatile uint16_t TXfifohead, TXfifotail;
+volatile uint16_t RXfifohead, RXfifotail;
+
+// Init queues
+void TXfifoinit(void)
+{
+   TXfifohead = 0U;
+   TXfifotail = 0U;
+}
+
+void RXfifoinit()
+{
+   RXfifohead = 0U;
+   RXfifotail = 0U;
+}
+
+// How full is queue
+
+uint16_t TXfifolevel(void)
+{
+   uint32_t tail = TXfifotail;
+   uint32_t head = TXfifohead;
+
+   if (tail > head)
+      return TX_FIFO_SIZE + head - tail;
+   else
+      return head - tail;
+}
+
+uint16_t RXfifolevel(void)
+{
+   uint32_t tail = RXfifotail;
+   uint32_t head = RXfifohead;
+
+   if (tail > head)
+      return RX_FIFO_SIZE + head - tail;
+   else
+      return head - tail;
+}
+
+
+uint8_t TXfifoput(uint8_t next)
+{
+   if (TXfifolevel() < TX_FIFO_SIZE) {
+      TXfifo[TXfifohead] = next;
+
+      TXfifohead++;
+      if (TXfifohead >= TX_FIFO_SIZE)
+         TXfifohead = 0U;
+      return 1U;
+   } else {
+      return 0U; // signal an overflow occurred by returning a zero count
+   }
+}
+
+void I2Cbegin(void)
+{
+  // Setup for Slave mode, address 0x22, pins 18/19, external pullups, speed in hz
+  Wire.begin(I2C_SLAVE, I2C_ADDRESS, I2C_PINS_18_19, I2C_PULLUP_EXT, I2C_SPEED);
+
+    // register events
+    Wire.onReceive(receiveEvent);
+    Wire.onRequest(requestEvent);
+
+    // initialize the fifos
+    TXfifoinit();
+    RXfifoinit();
+}
+
+
+int I2Cavailable(void)
+{
+  if (RXfifolevel() > 0U)
+      return 1U;
+    else
+      return 0U;
+}
+
+
+uint8_t I2Cread(void)
+{
+  uint8_t data_c = RXfifo[RXfifotail];
+
+   RXfifotail++;
+   if (RXfifotail >= RX_FIFO_SIZE)
+      RXfifotail = 0U;
+
+   return data_c;
+}
+
+
+void I2Cwrite(const uint8_t* data, uint16_t length)
+{
+   for (uint16_t i = 0U; i < length; i++)
+      TXfifoput(data[i]);   //puts it in the fifo
+}
+
+//
+// handle Rx Event (incoming I2C data)
+//
+void receiveEvent(size_t count)
+{
+  for (uint16_t i = 0U; i < count; i++)
+  {
+    if (RXfifolevel() < RX_FIFO_SIZE) {
+      RXfifo[RXfifohead] = Wire.readByte();
+      if (RXfifo[RXfifohead] != -1){
+        RXfifohead++;
+        if (RXfifohead >= RX_FIFO_SIZE) RXfifohead = 0U;
+      }
+    } else {
+      Wire.readByte();                  // drop data if mem full.
+    }
+    
+  }
+}
+
+//
+// handle Tx Event (outgoing I2C data)
+//
+void requestEvent(void)
+{
+    if (TXfifolevel() > 0) {
+      if (Wire.write(TXfifo[TXfifotail])){  //write to i2c
+        TXfifotail++;
+        if (TXfifotail >= TX_FIFO_SIZE) TXfifotail = 0U;
+      }  
+    }
+}
+
+
+
+/************************************/
+
+void CSerialPort::beginInt(uint8_t n, int speed)
+{
+  switch (n) {
+    case 1U:
+      return I2Cbegin();
+    case 3U:
+      Serial3.begin(speed);
+      break;
+    default:
+      break;
+  }
+}
+
+int CSerialPort::availableInt(uint8_t n)
+{
+  switch (n) {
+    case 1U:
+      return I2Cavailable();
+    case 3U:
+      return Serial3.available();
+    default:
+      return false;
+  }
+}
+
+int CSerialPort::availableForWriteInt(uint8_t n)
+{
+  switch (n) {
+    case 3U:
+      return Serial3.availableForWrite();
+    default:
+      return false;
+  }
+}
+
+uint8_t CSerialPort::readInt(uint8_t n)
+{
+  switch (n) {
+    case 1U:
+      return I2Cread();
+    case 3U:
+      return Serial3.read();
+    default:
+      return 0U;
+  }
+}
+
+void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
+{
+  switch (n) {
+    case 1U:
+      I2Cwrite(data, length);
+      break;
+    case 3U:
+      Serial3.write(data, length);
+      if (flush)
+        Serial3.flush();
+      break;
+    default:
+      break;
+  }
+}
+
+#endif

IO.cpp

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2015 by Jim Mclaughlin KI6ZUM
  *   Copyright (C) 2016 by Colin Durbridge G4EML
  *
@@ -80,6 +80,7 @@ m_ysfTXLevel(128 * 128),
 m_p25TXLevel(128 * 128),
 m_nxdnTXLevel(128 * 128),
 m_pocsagTXLevel(128 * 128),
+m_fmTXLevel(128 * 128),
 m_rxDCOffset(DC_OFFSET),
 m_txDCOffset(DC_OFFSET),
 m_ledCount(0U),
@@ -137,123 +138,75 @@ void CIO::selfTest()
     // We exclude PTT to avoid trigger the transmitter
     setLEDInt(ledValue);
     setCOSInt(ledValue);
-#if defined(MODE_PINS)
+#if defined(MODE_LEDS)
     setDStarInt(ledValue);
     setDMRInt(ledValue);
     setYSFInt(ledValue);
     setP25Int(ledValue);
     setNXDNInt(ledValue);
     setPOCSAGInt(ledValue);
+    setFMInt(ledValue);
 #endif
     delayInt(250);
   }
 
-#if defined(MODE_PINS)
+#if defined(MODE_LEDS)
   setDStarInt(true);
   setDMRInt(false);
   setYSFInt(false);
   setP25Int(false);
   setNXDNInt(false);
   setPOCSAGInt(false);
+  setFMInt(false);
 
   delayInt(250);
-
-  setDStarInt(true);
   setDMRInt(true);
-  setYSFInt(false);
-  setP25Int(false);
-  setNXDNInt(false);
-  setPOCSAGInt(false);
 
   delayInt(250);
-
-  setDStarInt(true);
-  setDMRInt(true);
   setYSFInt(true);
-  setP25Int(false);
-  setNXDNInt(false);
-  setPOCSAGInt(false);
-  
-  delayInt(250);
 
-  setDStarInt(true);
+  delayInt(250);
-  setDMRInt(true);
-  setYSFInt(true);
   setP25Int(true);
-  setNXDNInt(false);
-  setPOCSAGInt(false);
-  
-  delayInt(250);
 
-  setDStarInt(true);
+#if !defined(USE_ALTERNATE_NXDN_LEDS)
-  setDMRInt(true);
+  delayInt(250);
-  setYSFInt(true);
-  setP25Int(true);
   setNXDNInt(true);
-  setPOCSAGInt(false);
+#endif
-  
-  delayInt(250);
 
-  setDStarInt(true);
+#if !defined(USE_ALTERNATE_POCSAG_LEDS)
-  setDMRInt(true);
+  delayInt(250);
-  setYSFInt(true);
-  setP25Int(true);
-  setNXDNInt(true);
   setPOCSAGInt(true);
-  
+#endif
-  delayInt(250);
 
-  setDStarInt(true);
+#if !defined(USE_ALTERNATE_FM_LEDS)
-  setDMRInt(true);
+  delayInt(250);
-  setYSFInt(true);
+  setFMInt(true);
-  setP25Int(true);
+
-  setNXDNInt(true);
+  delayInt(250);
+  setFMInt(false);
+#endif
+
+#if !defined(USE_ALTERNATE_POCSAG_LEDS)
+  delayInt(250);
   setPOCSAGInt(false);
-  
+#endif
-  delayInt(250);
 
-  setDStarInt(true);
+#if !defined(USE_ALTERNATE_NXDN_LEDS)
-  setDMRInt(true);
+  delayInt(250);
-  setYSFInt(true);
-  setP25Int(true);
   setNXDNInt(false);
-  setPOCSAGInt(false);
+#endif
 
   delayInt(250);
-  
-  setDStarInt(true);
-  setDMRInt(true);
-  setYSFInt(true);
   setP25Int(false);
-  setNXDNInt(false);
-  setPOCSAGInt(false);
 
   delayInt(250);
-
-  setDStarInt(true);
-  setDMRInt(true);
   setYSFInt(false);
-  setP25Int(false);
-  setNXDNInt(false);
-  setPOCSAGInt(false);
 
   delayInt(250);
-  
-  setDStarInt(true);
   setDMRInt(false);
-  setYSFInt(false);
-  setP25Int(false);
-  setNXDNInt(false);
-  setPOCSAGInt(false);
 
   delayInt(250);
-
   setDStarInt(false);
-  setDMRInt(false);
-  setYSFInt(false);
-  setP25Int(false);
-  setNXDNInt(false);
-  setPOCSAGInt(false);
 #endif
 }
 
@@ -402,6 +355,15 @@ void CIO::process()
             dmrDMORX.samples(RRCVals, rssi, RX_BLOCK_SIZE);
         }
       }
+
+      if (m_fmEnable) {
+        bool cos = getCOSInt();
+#if defined(USE_DCBLOCKER)
+        fm.samples(cos, dcSamples, RX_BLOCK_SIZE);
+#else
+        fm.samples(cos, samples, RX_BLOCK_SIZE);
+#endif
+      }
     } else if (m_modemState == STATE_DSTAR) {
       if (m_dstarEnable) {
         q15_t GMSKVals[RX_BLOCK_SIZE];
@@ -460,6 +422,13 @@ void CIO::process()
 
         nxdnRX.samples(NXDNVals, rssi, RX_BLOCK_SIZE);
       }
+    } else if (m_modemState == STATE_FM) {
+      bool cos = getCOSInt();
+#if defined(USE_DCBLOCKER)
+      fm.samples(cos, dcSamples, RX_BLOCK_SIZE);
+#else
+      fm.samples(cos, samples, RX_BLOCK_SIZE);
+#endif
     } else if (m_modemState == STATE_DSTARCAL) {
       q15_t GMSKVals[RX_BLOCK_SIZE];
       ::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
@@ -505,6 +474,9 @@ void CIO::write(MMDVM_STATE mode, q15_t* samples, uint16_t length, const uint8_t
     case STATE_POCSAG:
       txLevel = m_pocsagTXLevel;
       break;
+    case STATE_FM:
+      txLevel = m_fmTXLevel;
+      break;
     default:
       txLevel = m_cwIdTXLevel;
       break;
@@ -546,17 +518,18 @@ void CIO::setADCDetection(bool detect)
 
 void CIO::setMode()
 {
-#if defined(MODE_PINS)
+#if defined(MODE_LEDS)
   setDStarInt(m_modemState == STATE_DSTAR);
   setDMRInt(m_modemState   == STATE_DMR);
   setYSFInt(m_modemState   == STATE_YSF);
   setP25Int(m_modemState   == STATE_P25);
   setNXDNInt(m_modemState  == STATE_NXDN);
   setPOCSAGInt(m_modemState  == STATE_POCSAG);
+  setFMInt(m_modemState == STATE_FM);
 #endif
 }
 
-void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, int16_t txDCOffset, int16_t rxDCOffset)
+void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset)
 {
   m_pttInvert = pttInvert;
 
@@ -568,6 +541,7 @@ void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rx
   m_p25TXLevel    = q15_t(p25TXLevel * 128);
   m_nxdnTXLevel   = q15_t(nxdnTXLevel * 128);
   m_pocsagTXLevel = q15_t(pocsagTXLevel * 128);
+  m_fmTXLevel     = q15_t(fmTXLevel * 128);
 
   m_rxDCOffset   = DC_OFFSET + rxDCOffset;
   m_txDCOffset   = DC_OFFSET + txDCOffset;
@@ -618,4 +592,3 @@ bool CIO::hasLockout() const
 {
   return m_lockout;
 }
-

IO.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -42,7 +42,7 @@ public:
   
   void interrupt();
 
-  void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, int16_t txDCOffset, int16_t rxDCOffset);
+  void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset);
 
   void getOverflow(bool& adcOverflow, bool& dacOverflow);
 
@@ -86,6 +86,7 @@ private:
   q15_t                m_p25TXLevel;
   q15_t                m_nxdnTXLevel;
   q15_t                m_pocsagTXLevel;
+  q15_t                m_fmTXLevel;
 
   uint16_t             m_rxDCOffset;
   uint16_t             m_txDCOffset;
@@ -118,9 +119,9 @@ private:
   void setP25Int(bool on);
   void setNXDNInt(bool on);
   void setPOCSAGInt(bool on);
+  void setFMInt(bool on);
   
   void delayInt(unsigned int dly);
 };
 
 #endif
-

IODue.cpp

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2015 by Jim Mclaughlin KI6ZUM
  *   Copyright (C) 2016 by Colin Durbridge G4EML
  *
@@ -35,6 +35,7 @@
 #define PIN_P25                19
 #define PIN_NXDN               20
 #define PIN_POCSAG             4
+#define PIN_FM                 5
 #define ADC_CHER_Chan          (1<<7)                 // ADC on Due pin A0  - Due AD7 - (1 << 7)
 #define ADC_ISR_EOC_Chan       ADC_ISR_EOC7
 #define ADC_CDR_Chan           7
@@ -50,6 +51,7 @@
 #define PIN_P25                6
 #define PIN_NXDN               5
 #define PIN_POCSAG             4
+#define PIN_FM                 3
 #define ADC_CHER_Chan          (1<<13)                // ADC on Due pin A11 - Due AD13 - (1 << 13)
 #define ADC_ISR_EOC_Chan       ADC_ISR_EOC13
 #define ADC_CDR_Chan           13
@@ -67,6 +69,7 @@
 #define PIN_P25                6
 #define PIN_NXDN               5
 #define PIN_POCSAG             4
+#define PIN_FM                 3
 #define ADC_CHER_Chan          (1<<7)                 // ADC on Due pin A0  - Due AD7 - (1 << 7)
 #define ADC_ISR_EOC_Chan       ADC_ISR_EOC7
 #define ADC_CDR_Chan           7
@@ -95,7 +98,7 @@ void CIO::initInt()
   pinMode(PIN_LED,    OUTPUT);
   pinMode(PIN_COS,    INPUT);
 
-#if defined(MODE_PINS)
+#if defined(MODE_LEDS)
   // Set up the mode output pins
   pinMode(PIN_DSTAR,  OUTPUT);
   pinMode(PIN_DMR,    OUTPUT);
@@ -107,6 +110,9 @@ void CIO::initInt()
 #if !defined(USE_ALTERNATE_POCSAG_LEDS)
   pinMode(PIN_POCSAG, OUTPUT);
 #endif
+#if !defined(USE_ALTERNATE_POCSAG_LEDS)
+  pinMode(PIN_FM,     OUTPUT);
+#endif
 #endif
 }
 
@@ -258,10 +264,19 @@ void CIO::setPOCSAGInt(bool on)
 #endif
 }
 
+void CIO::setFMInt(bool on)
+{
+#if defined(USE_ALTERNATE_FM_LEDS)
+  digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
+  digitalWrite(PIN_YSF,   on ? HIGH : LOW);
+#else
+  digitalWrite(PIN_FM, on ? HIGH : LOW);
+#endif
+}
+
 void CIO::delayInt(unsigned int dly)
 {
   delay(dly);
 }
 
 #endif
-

IOPins.h

@@ -0,0 +1,70 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _IO_PINS_H
+#define _IO_PINS_H
+
+#if !defined(CONFIG_H)
+#error "Requires Config.h to be included first!"
+#endif
+
+#if defined(STM32F4_RPT_HAT_TGO)
+    #include "pins/pins_f4_rpt_tgo.h"
+
+#elif defined(STM32F4_DISCOVERY)
+    #include "pins/pins_f4_discovery.h"
+
+#elif defined(STM32F4_PI)
+    #include "pins/pins_f4_pi.h"
+
+#elif defined(STM32F722_PI)
+    #include "pins/pins_f7_pi.h"
+
+#elif defined(STM32F4_F4M)
+    #include "pins/pins_f4_f4m.h"
+
+#elif defined(STM32F722_F7M)
+    #include "pins/pins_f7_f7m.h"
+
+#elif defined(STM32F722_RPT_HAT)
+    #include "pins/pins_f7_rpt_hat.h"
+
+#elif defined(STM32F4_NUCLEO)
+    #if defined(STM32F4_NUCLEO_MORPHO_HEADER)
+        #include "pins/pins_f4_nucleo_morpho.h"
+    #elif defined(STM32F4_NUCLEO_ARDUINO_HEADER)
+        #include "pins/pins_f4_nucleo_arduino.h"
+    #else
+        #error "Either STM32F4_NUCLEO_MORPHO_HEADER or STM32F4_NUCLEO_ARDUINO_HEADER need to be defined"
+    #endif
+
+#elif defined(STM32F7_NUCLEO)
+    #include "pins/pins_f7_nucleo.h"
+
+#elif defined(STM32F4_DVM)
+    #include "pins/pins_f4_stm32dvm_v3.h"
+
+#elif defined(DRCC_DVM_NQF)
+    #include "pins/pins_f4_drcc_nqf.h"
+
+#else
+    #error "A valid board type macro need to be defined."
+
+#endif
+
+#endif  //#ifndef _IO_PINS_H

IOSTM.cpp

@@ -1,7 +1,8 @@
 /*
  *   Copyright (C) 2016 by Jim McLaughlin KI6ZUM
  *   Copyright (C) 2016,2017,2018 by Andy Uribe CA6JAU
- *   Copyright (C) 2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2017,2018,2020 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2019,2020 by BG5HHP
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -23,753 +24,8 @@
 #include "IO.h"
 
 #if defined(STM32F4XX) || defined(STM32F7XX)
+#include "IOPins.h"
 
-#if defined(STM32F4_DISCOVERY)
-/*
-Pin definitions for STM32F4 Discovery Board:
-
-PTT      PB13   output           P1 Pin37
-COSLED   PA7    output           P1 Pin17
-LED      PD15   output           P1 Pin47
-COS      PA5    input            P1 Pin15
-
-DSTAR    PD12   output           P1 Pin44
-DMR      PD13   output           P1 Pin45
-YSF      PD14   output           P1 Pin46
-P25      PD11   output           P1 Pin43
-NXDN     PD10   output           P1 Pin42
-
-RX       PA0    analog input     P1 Pin12
-RSSI     PA1    analog input     P1 Pin11
-TX       PA4    analog output    P1 Pin16
-
-EXT_CLK  PA15   input            P2 Pin40
-*/
-
-#define PIN_COS           GPIO_Pin_5
-#define PORT_COS          GPIOA
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOA
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_7
-#define PORT_COSLED       GPIOA
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOA
-
-#define PIN_LED           GPIO_Pin_15
-#define PORT_LED          GPIOD
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOD
-
-#define PIN_P25           GPIO_Pin_11
-#define PORT_P25          GPIOD
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOD
-
-#define PIN_NXDN          GPIO_Pin_10
-#define PORT_NXDN         GPIOD
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOD
-
-#define PIN_DSTAR         GPIO_Pin_12
-#define PORT_DSTAR        GPIOD
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOD
-
-#define PIN_DMR           GPIO_Pin_13
-#define PORT_DMR          GPIOD
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOD
-
-#define PIN_YSF           GPIO_Pin_14
-#define PORT_YSF          GPIOD
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOD
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_1
-#define PIN_RSSI_CH       ADC_Channel_1
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#elif defined(STM32F4_PI)
-/*
-Pin definitions for STM32F4 Pi Board:
-
-PTT      PB13   output
-COSLED   PB14   output
-LED      PB15   output
-COS      PC0    input
-
-DSTAR    PC7    output
-DMR      PC8    output
-YSF      PA8    output
-P25      PC9    output
-NXDN     PB1    output
-
-RX       PA0    analog input
-RSSI     PA7    analog input
-TX       PA4    analog output
-
-EXT_CLK  PA15   input
-*/
-
-#define PIN_COS           GPIO_Pin_0
-#define PORT_COS          GPIOC
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_14
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_15
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_9
-#define PORT_P25          GPIOC
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
-
-#define PIN_NXDN          GPIO_Pin_1
-#define PORT_NXDN         GPIOB
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_7
-#define PORT_DSTAR        GPIOC
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
-
-#define PIN_DMR           GPIO_Pin_8
-#define PORT_DMR          GPIOC
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
-
-#define PIN_YSF           GPIO_Pin_8
-#define PORT_YSF          GPIOA
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_7
-#define PIN_RSSI_CH       ADC_Channel_7
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#elif defined(STM32F722_PI)
-/*
-Pin definitions for STM32F722 Pi Board:
-
-PTT      PB13   output
-COSLED   PB14   output
-LED      PB15   output
-COS      PC0    input
-
-DSTAR    PC7    output
-DMR      PC8    output
-YSF      PA8    output
-P25      PC9    output
-NXDN     PB1    output
-
-RX       PA0    analog input
-RSSI     PA7    analog input
-TX       PA4    analog output
-
-EXT_CLK  PA15   input
-*/
-
-#define PIN_COS           GPIO_Pin_0
-#define PORT_COS          GPIOC
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_14
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_15
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_9
-#define PORT_P25          GPIOC
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
-
-#define PIN_NXDN          GPIO_Pin_1
-#define PORT_NXDN         GPIOB
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_7
-#define PORT_DSTAR        GPIOC
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
-
-#define PIN_DMR           GPIO_Pin_8
-#define PORT_DMR          GPIOC
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
-
-#define PIN_YSF           GPIO_Pin_8
-#define PORT_YSF          GPIOA
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_7
-#define PIN_RSSI_CH       ADC_Channel_7
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#elif defined(STM32F4_F4M)
-/*
-Pin definitions for MMDVM-F4M Pi-Hat F0DEI board:
-
-PTT      PB13   output
-COSLED   PB14   output
-LED      PB15   output
-COS      PC0    input
-
-DSTAR    PC7    output
-DMR      PC8    output
-YSF      PA8    output
-P25      PC9    output
-NXDN     PB1    output
-
-RX       PA0    analog input
-RSSI     PA7    analog input
-TX       PA4    analog output
-
-EXT_CLK  PA15   input
-*/
-
-#define PIN_COS           GPIO_Pin_0
-#define PORT_COS          GPIOC
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_14
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_15
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_9
-#define PORT_P25          GPIOC
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
-
-#define PIN_NXDN          GPIO_Pin_1
-#define PORT_NXDN         GPIOB
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_7
-#define PORT_DSTAR        GPIOC
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
-
-#define PIN_DMR           GPIO_Pin_8
-#define PORT_DMR          GPIOC
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
-
-#define PIN_YSF           GPIO_Pin_8
-#define PORT_YSF          GPIOA
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_7
-#define PIN_RSSI_CH       ADC_Channel_7
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#elif defined(STM32F722_F7M)
-/*
-Pin definitions for MMDVM-F7M Pi-Hat F0DEI board:
-
-PTT      PB13   output
-COSLED   PB14   output
-LED      PB15   output
-COS      PC0    input
-
-DSTAR    PC7    output
-DMR      PC8    output
-YSF      PA8    output
-P25      PC9    output
-NXDN     PB1    output
-POCSAG   PB12   output
-
-RX       PA0    analog input
-RSSI     PA7    analog input
-TX       PA4    analog output
-
-EXT_CLK  PA15   input
-*/
-
-#define PIN_COS           GPIO_Pin_0
-#define PORT_COS          GPIOC
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_14
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_15
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_9
-#define PORT_P25          GPIOC
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
-
-#define PIN_NXDN          GPIO_Pin_1
-#define PORT_NXDN         GPIOB
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
-
-#define PIN_POCSAG        GPIO_Pin_12
-#define PORT_NXDN         GPIOB
-#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_7
-#define PORT_DSTAR        GPIOC
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
-
-#define PIN_DMR           GPIO_Pin_8
-#define PORT_DMR          GPIOC
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
-
-#define PIN_YSF           GPIO_Pin_8
-#define PORT_YSF          GPIOA
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_7
-#define PIN_RSSI_CH       ADC_Channel_7
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#elif defined(STM32F4_NUCLEO)
-
-#if defined(STM32F4_NUCLEO_MORPHO_HEADER)
-/*
-Pin definitions for STM32F4 Nucleo boards (ST Morpho header):
-
-PTT      PB13   output           CN10 Pin30
-COSLED   PB14   output           CN10 Pin28
-LED      PA5    output           CN10 Pin11
-COS      PB15   input            CN10 Pin26
-
-DSTAR    PB10   output           CN10 Pin25
-DMR      PB4    output           CN10 Pin27
-YSF      PB5    output           CN10 Pin29
-P25      PB3    output           CN10 Pin31
-NXDN     PA10   output           CN10 Pin33
-
-MDSTAR   PC4    output           CN10 Pin34
-MDMR     PC5    output           CN10 Pin6
-MYSF     PC2    output           CN7 Pin35
-MP25     PC3    output           CN7 Pin37
-MNXDN    PC6    output           CN10 Pin4
-
-RX       PA0    analog input     CN7 Pin28
-RSSI     PA1    analog input     CN7 Pin30
-TX       PA4    analog output    CN7 Pin32
-
-EXT_CLK  PA15   input            CN7 Pin17
-*/
-
-#define PIN_COS           GPIO_Pin_15
-#define PORT_COS          GPIOB
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_14
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_5
-#define PORT_LED          GPIOA
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
-
-#define PIN_P25           GPIO_Pin_3
-#define PORT_P25          GPIOB
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
-
-#define PIN_NXDN          GPIO_Pin_10
-#define PORT_NXDN         GPIOA
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
-
-#define PIN_DSTAR         GPIO_Pin_10
-#define PORT_DSTAR        GPIOB
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
-
-#define PIN_DMR           GPIO_Pin_4
-#define PORT_DMR          GPIOB
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
-
-#define PIN_YSF           GPIO_Pin_5
-#define PORT_YSF          GPIOB
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
-
-#if defined(STM32F4_NUCLEO_MODE_PINS)
-#define PIN_MP25          GPIO_Pin_3
-#define PORT_MP25         GPIOC
-#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
-
-#define PIN_MNXDN         GPIO_Pin_6
-#define PORT_MNXDN        GPIOC
-#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
-
-#define PIN_MDSTAR        GPIO_Pin_4
-#define PORT_MDSTAR       GPIOC
-#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
-
-#define PIN_MDMR          GPIO_Pin_5
-#define PORT_MDMR         GPIOC
-#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
-
-#define PIN_MYSF          GPIO_Pin_2
-#define PORT_MYSF         GPIOC
-#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
-#endif
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_1
-#define PIN_RSSI_CH       ADC_Channel_1
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#elif defined(STM32F4_NUCLEO_ARDUINO_HEADER)
-/*
-Pin definitions for STM32F4 Nucleo boards (Arduino header):
-
-PTT      PB10   output           CN9 Pin7
-COSLED   PB3    output           CN9 Pin4
-LED      PB5    output           CN9 Pin5
-COS      PB4    input            CN9 Pin6
-
-DSTAR    PA1    output           CN8 Pin2
-DMR      PA4    output           CN8 Pin3
-YSF      PB0    output           CN8 Pin4
-P25      PC1    output           CN8 Pin5
-NXDN     PA3    output           CN9 Pin1
-
-RX       PA0    analog input     CN8 Pin1
-RSSI     PC0    analog input     CN8 Pin6
-TX       PA5    analog output    CN5 Pin6
-
-EXT_CLK  PB8    input            CN5 Pin10
-*/
-
-#define PIN_COS           GPIO_Pin_4
-#define PORT_COS          GPIOB
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
-
-#define PIN_PTT           GPIO_Pin_10
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_3
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_5
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_1
-#define PORT_P25          GPIOC
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
-
-#define PIN_NXDN          GPIO_Pin_3
-#define PORT_NXDN         GPIOA
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
-
-#define PIN_DSTAR         GPIO_Pin_1
-#define PORT_DSTAR        GPIOA
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOA
-
-#define PIN_DMR           GPIO_Pin_4
-#define PORT_DMR          GPIOA
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOA
-
-#define PIN_YSF           GPIO_Pin_0
-#define PORT_YSF          GPIOB
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
-
-#define PIN_EXT_CLK       GPIO_Pin_8
-#define SRC_EXT_CLK       GPIO_PinSource8
-#define PORT_EXT_CLK      GPIOB
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_0
-#define PIN_RSSI_CH       ADC_Channel_10
-#define PORT_RSSI         GPIOC
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOC
-
-#define PIN_TX            GPIO_Pin_5
-#define PIN_TX_CH         DAC_Channel_2
-
-#else
-#error "Either STM32F4_NUCLEO_MORPHO_HEADER or STM32F4_NUCLEO_ARDUINO_HEADER need to be defined in Config.h"
-#endif
-
-#elif defined(STM32F7_NUCLEO)
-/*
-Pin definitions for STM32F7 Nucleo boards (ST Morpho header):
-
-PTT      PB13   output           CN12 Pin30
-COSLED   PB14   output           CN12 Pin28
-LED      PA5    output           CN12 Pin11
-COS      PB15   input            CN12 Pin26
-
-DSTAR    PB10   output           CN12 Pin25
-DMR      PB4    output           CN12 Pin27
-YSF      PB5    output           CN12 Pin29
-P25      PB3    output           CN12 Pin31
-NXDN     PA10   output           CN12 Pin33
-
-MDSTAR   PC4    output           CN12 Pin34
-MDMR     PC5    output           CN12 Pin6
-MYSF     PC2    output           CN11 Pin35
-MP25     PC3    output           CN11 Pin37
-MNXDN    PC6    output           CN12 Pin4
-
-RX       PA0    analog input     CN11 Pin28
-RSSI     PA1    analog input     CN11 Pin30
-TX       PA4    analog output    CN11 Pin32
-
-EXT_CLK  PA15   input            CN11 Pin17
-*/
-
-#define PIN_COS           GPIO_Pin_15
-#define PORT_COS          GPIOB
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_14
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_5
-#define PORT_LED          GPIOA
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
-
-#define PIN_P25           GPIO_Pin_3
-#define PORT_P25          GPIOB
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
-
-#define PIN_NXDN          GPIO_Pin_10
-#define PORT_NXDN         GPIOA
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
-
-#define PIN_DSTAR         GPIO_Pin_10
-#define PORT_DSTAR        GPIOB
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
-
-#define PIN_DMR           GPIO_Pin_4
-#define PORT_DMR          GPIOB
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
-
-#define PIN_YSF           GPIO_Pin_5
-#define PORT_YSF          GPIOB
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
-
-#if defined(STM32F4_NUCLEO_MODE_PINS)
-#define PIN_MP25          GPIO_Pin_3
-#define PORT_MP25         GPIOC
-#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
-
-#define PIN_MNXDN         GPIO_Pin_6
-#define PORT_MNXDN        GPIOC
-#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
-
-#define PIN_MDSTAR        GPIO_Pin_4
-#define PORT_MDSTAR       GPIOC
-#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
-
-#define PIN_MDMR          GPIO_Pin_5
-#define PORT_MDMR         GPIOC
-#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
-
-#define PIN_MYSF          GPIO_Pin_2
-#define PORT_MYSF         GPIOC
-#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
-#endif
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_1
-#define PIN_RSSI_CH       ADC_Channel_1
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#elif defined(STM32F4_DVM)
-/*
-Pin definitions for STM32F4 STM32-DVM rev 3 Board:
-
-COS      PB13   input
-PTT      PB12   output
-COSLED   PB4    output
-LED      PB3    output
-
-P25      PB8    output
-NXDN     PB9    output
-DSTAR    PB6    output
-DMR      PB5    output
-YSF      PB7    output
-
-RX       PB0    analog input
-RSSI     PB1    analog input
-TX       PA4    analog output
-
-EXT_CLK  PA15   input
-*/
-
-#define PIN_COS           GPIO_Pin_13
-#define PORT_COS          GPIOB
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
-
-
-#define PIN_PTT           GPIO_Pin_12
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_4
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_3
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_8
-#define PORT_P25          GPIOB
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
-
-#define PIN_NXDN          GPIO_Pin_9
-#define PORT_NXDN         GPIOB
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_6
-#define PORT_DSTAR        GPIOB
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
-
-#define PIN_DMR           GPIO_Pin_5
-#define PORT_DMR          GPIOB
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
-
-#define PIN_YSF           GPIO_Pin_7
-#define PORT_YSF          GPIOB
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_8
-#define PORT_RX           GPIOB
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOB
-
-#define PIN_RSSI          GPIO_Pin_1
-#define PIN_RSSI_CH       ADC_Channel_9
-#define PORT_RSSI         GPIOB
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOB
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#else
-#error "Either STM32F4_DISCOVERY, STM32F4_PI, STM32F722_PI, STM32F4_F4M, STM32F722_F7M, STM32F4_DVM, STM32F4_NUCLEO or STM32F7_NUCLEO need to be defined"
-#endif
 
 const uint16_t DC_OFFSET = 2048U;
 
@@ -817,7 +73,7 @@ void CIO::initInt()
    GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_IN;
    GPIO_Init(PORT_COS, &GPIO_InitStruct);
 
-#if defined(MODE_PINS)
+#if defined(MODE_LEDS)
    // DSTAR pin
    RCC_AHB1PeriphClockCmd(RCC_Per_DSTAR, ENABLE);
    GPIO_InitStruct.GPIO_Pin   = PIN_DSTAR;
@@ -857,9 +113,18 @@ void CIO::initInt()
    GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
    GPIO_Init(PORT_POCSAG, &GPIO_InitStruct);
 #endif
+
+#if !defined(USE_ALTERNATE_FM_LEDS)
+   // FM pin
+   RCC_AHB1PeriphClockCmd(RCC_Per_FM, ENABLE);
+   GPIO_InitStruct.GPIO_Pin   = PIN_FM;
+   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
+   GPIO_Init(PORT_FM, &GPIO_InitStruct);
 #endif
 
-#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
+#endif
+
+#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
    // DSTAR mode pin
    RCC_AHB1PeriphClockCmd(RCC_Per_MDSTAR, ENABLE);
    GPIO_InitStruct.GPIO_Pin   = PIN_MDSTAR;
@@ -899,6 +164,15 @@ void CIO::initInt()
    GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
    GPIO_Init(PORT_MPOCSAG, &GPIO_InitStruct);
 #endif
+
+#if !defined(USE_ALTERNATE_FM_LEDS)
+   // FM mode pin
+   RCC_AHB1PeriphClockCmd(RCC_Per_MFM, ENABLE);
+   GPIO_InitStruct.GPIO_Pin   = PIN_MFM;
+   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
+   GPIO_Init(PORT_MFM, &GPIO_InitStruct);
+#endif
+
 #endif
 }
 
@@ -1108,48 +382,60 @@ void CIO::setCOSInt(bool on)
 
 void CIO::setDStarInt(bool on)
 {
+#if defined(MODE_LEDS)
    GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
-#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
+#endif
+#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
    GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
 #endif
 }
 
 void CIO::setDMRInt(bool on)
 {
+#if defined(MODE_LEDS)
    GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
-#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
+#endif
+#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
    GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET);
 #endif
 }
 
 void CIO::setYSFInt(bool on)
 {
+#if defined(MODE_LEDS)
    GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
-#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
+#endif
+#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
    GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
 #endif
 }
 
 void CIO::setP25Int(bool on)
 {
+#if defined(MODE_LEDS)
    GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
-#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
+#endif
+#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
    GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
 #endif
 }
 
 void CIO::setNXDNInt(bool on)
 {
+#if defined(MODE_LEDS)
 #if defined(USE_ALTERNATE_NXDN_LEDS)
    GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
    GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
-#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
-   GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
-   GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
-#endif
 #else
    GPIO_WriteBit(PORT_NXDN, PIN_NXDN, on ? Bit_SET : Bit_RESET);
-#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
+#endif
+#endif
+
+#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
+#if defined(USE_ALTERNATE_NXDN_LEDS)
+   GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
+   GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
+#else
    GPIO_WriteBit(PORT_MNXDN, PIN_MNXDN, on ? Bit_SET : Bit_RESET);
 #endif
 #endif
@@ -1157,21 +443,46 @@ void CIO::setNXDNInt(bool on)
 
 void CIO::setPOCSAGInt(bool on)
 {
+#if defined(MODE_LEDS)
 #if defined(USE_ALTERNATE_POCSAG_LEDS)
    GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
    GPIO_WriteBit(PORT_DMR,   PIN_DMR,   on ? Bit_SET : Bit_RESET);
-#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
-   GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
-   GPIO_WriteBit(PORT_MDMR,   PIN_MDMR,   on ? Bit_SET : Bit_RESET);
-#endif
 #else
    GPIO_WriteBit(PORT_POCSAG,  PIN_POCSAG, on ? Bit_SET : Bit_RESET);
-#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
+#endif
+#endif
+
+#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
+#if defined(USE_ALTERNATE_POCSAG_LEDS)
+   GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
+   GPIO_WriteBit(PORT_MDMR,   PIN_MDMR,   on ? Bit_SET : Bit_RESET);
+#else
    GPIO_WriteBit(PORT_MPOCSAG, PIN_MPOCSAG, on ? Bit_SET : Bit_RESET);
 #endif
 #endif
 }
 
+void CIO::setFMInt(bool on)
+{
+#if defined(MODE_LEDS)
+#if defined(USE_ALTERNATE_FM_LEDS)
+   GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
+   GPIO_WriteBit(PORT_YSF,   PIN_YSF,   on ? Bit_SET : Bit_RESET);
+#else
+   GPIO_WriteBit(PORT_FM,  PIN_FM, on ? Bit_SET : Bit_RESET);
+#endif
+#endif
+
+#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
+#if defined(USE_ALTERNATE_FM_LEDS)
+   GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
+   GPIO_WriteBit(PORT_MYSF,   PIN_MYSF,   on ? Bit_SET : Bit_RESET);
+#else
+   GPIO_WriteBit(PORT_MFM, PIN_MFM, on ? Bit_SET : Bit_RESET);
+#endif
+#endif
+}
+
 // Simple delay function for STM32
 // Example from: http://thehackerworkshop.com/?p=1209
 void CIO::delayInt(unsigned int dly)

IOSTM_CMSIS.cpp

@@ -1,7 +1,7 @@
 /*
  *   Copyright (C) 2016 by Jim McLaughlin KI6ZUM
  *   Copyright (C) 2016, 2017 by Andy Uribe CA6JAU
- *   Copyright (C) 2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2017,2018,2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2017 by Wojciech Krutnik N0CALL
  *
  *   This program is free software; you can redistribute it and/or modify
@@ -41,6 +41,7 @@ YSF      PB8    output
 P25      PB9    output
 NXDN     PB10   output
 POCSAG   PB11   output
+FM       PB12   output
 
 RX       PB0    analog input (ADC1_8)
 RSSI     PB1    analog input (ADC2_9)
@@ -84,6 +85,9 @@ USART1_RXD PA10  input (AF)
 #define PIN_POCSAG        11
 #define PORT_POCSAG       GPIOB
 #define BB_POCSAG         *((bitband_t)BITBAND_PERIPH(&PORT_POCSAG->ODR, PIN_POCSAG))
+#define PIN_FM            14
+#define PORT_FM           GPIOB
+#define BB_FM             *((bitband_t)BITBAND_PERIPH(&PORT_FM->ODR, PIN_FM))
 
 #define PIN_RX            0
 #define PIN_RX_ADC_CH     8
@@ -154,16 +158,35 @@ void GPIOConfigPin(GPIO_TypeDef *port_ptr, uint32_t pin, uint32_t mode_cnf_value
 #if defined(STM32F1_POG)
 void FancyLEDEffect()
 {
-  bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25};
+  int ledCount = 10;
-   
+
-  for(int i=0; i<7; i++){
+  bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25,
-    *foo[i] = 0x01;
+#if defined(USE_ALTERNATE_NXDN_LEDS)
+	NULL,
+#else
+	&BB_NXDN,
+#endif
+#if defined(USE_ALTERNATE_POCSAG_LEDS)
+	NULL,
+#else
+  	&BB_POCSAG,
+#endif
+#if defined(USE_ALTERNATE_FM_LEDS)
+	NULL};
+#else
+	&BB_FM};
+#endif
+
+  for(int i=0; i<ledCount; i++){
+    if(foo[i] != NULL)
+      *foo[i] = 0x01;
   }
   GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1);
   *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
   delay(SystemCoreClock/1000*100);
-  for(int i=0; i<7; i++){
+  for(int i=0; i<ledCount; i++){
-    *foo[i] = 0x00;
+    if(foo[i] != NULL)
+      *foo[i] = 0x00;
   }
   *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
   delay(SystemCoreClock/1000*20);
@@ -172,18 +195,22 @@ void FancyLEDEffect()
   *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
   
   *foo[0] = 0x01;
-  for(int i=1; i<7; i++){
+  for(int i=1; i<ledCount; i++){
     delay(SystemCoreClock/1000*10);
-    *foo[i-1] = 0x00;
+    if (foo[i-1] != NULL)
-    *foo[i] = 0x01;
+      *foo[i-1] = 0x00;
+    if (foo[i] != NULL)
+      *foo[i] = 0x01;
   }
-  for(int i=5; i>=0; i--){
+  for(int i=ledCount - 2; i>=0; i--) {
     delay(SystemCoreClock/1000*10);
-    *foo[i+1] = 0x00;
+    if (foo[i+1] != NULL)
-    *foo[i] = 0x01;
+      *foo[i+1] = 0x00;
+    if (foo[i] != NULL)
+      *foo[i] = 0x01;
   }
   delay(SystemCoreClock/1000*10);
-  *foo[5+1-6] = 0x00;
+  *foo[0] = 0x00;
   *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
   delay(SystemCoreClock/1000*10);
   *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
@@ -228,6 +255,9 @@ static inline void GPIOInit()
 #if !defined(USE_ALTERNATE_POCSAG_LEDS)
   GPIOConfigPin(PORT_POCSAG, PIN_POCSAG, GPIO_CRL_MODE0_1);
 #endif
+#if !defined(USE_ALTERNATE_FM_LEDS)
+  GPIOConfigPin(PORT_FM,     PIN_FM,     GPIO_CRL_MODE0_1);
+#endif
 
   GPIOConfigPin(PORT_RX, PIN_RX, 0);
 #if defined(SEND_RSSI_DATA)
@@ -369,7 +399,9 @@ void CIO::interrupt()
 {
   uint8_t control  = MARK_NONE;
   uint16_t sample  = DC_OFFSET;
+#if defined(SEND_RSSI_DATA)
   uint16_t rawRSSI = 0U;
+#endif
   bitband_t eoc = (bitband_t)BITBAND_PERIPH(&ADC1->SR, ADC_SR_EOS_Pos);
   bitband_t adon = (bitband_t)BITBAND_PERIPH(&ADC1->CR2, ADC_CR2_ADON_Pos);
 #if defined(SEND_RSSI_DATA)
@@ -458,6 +490,16 @@ void CIO::setPOCSAGInt(bool on)
 #endif
 }
 
+void CIO::setFMInt(bool on)
+{
+#if defined(USE_ALTERNATE_FM_LEDS)
+  BB_DSTAR = !!on;
+  BB_YSF   = !!on;
+#else
+  BB_FM = !!on;
+#endif
+}
+
 void CIO::delayInt(unsigned int dly)
 {
   delay(dly);

IOTeensy.cpp

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2016,2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2016,2017,2018,2020 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -37,9 +37,11 @@
 #if defined(__MK20DX256__)
 #define PIN_NXDN               2
 #define PIN_POCSAG             3
+#define PIN_FM                 4
 #else
 #define PIN_NXDN               24
 #define PIN_POCSAG             25
+#define PIN_FM                 26
 #endif
 #define PIN_ADC                5        // A0,  Pin 14
 #define PIN_RSSI               4        // Teensy 3.5/3.6, A16, Pin 35. Teensy 3.1/3.2, A17, Pin 28
@@ -64,7 +66,7 @@ void CIO::initInt()
   pinMode(PIN_LED,    OUTPUT);
   pinMode(PIN_COS,    INPUT);
 
-#if defined(MODE_PINS)
+#if defined(MODE_LEDS)
   // Set up the mode output pins
   pinMode(PIN_DSTAR,  OUTPUT);
   pinMode(PIN_DMR,    OUTPUT);
@@ -76,6 +78,9 @@ void CIO::initInt()
 #if !defined(USE_ALTERNATE_POCSAG_LEDS)
   pinMode(PIN_POCSAG, OUTPUT);
 #endif
+#if !defined(USE_ALTERNATE_FM_LEDS)
+  pinMode(PIN_FM,     OUTPUT);
+#endif
 #endif
 }
 
@@ -243,6 +248,16 @@ void CIO::setPOCSAGInt(bool on)
 #endif
 }
 
+void CIO::setFMInt(bool on)
+{
+#if defined(USE_ALTERNATE_FM_LEDS)
+  digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
+  digitalWrite(PIN_YSF,   on ? HIGH : LOW);
+#else
+  digitalWrite(PIN_FM, on ? HIGH : LOW);
+#endif
+}
+
 void CIO::delayInt(unsigned int dly)
 {
   delay(dly);

MMDVM.cpp

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2016 by Mathis Schmieder DB9MAT
  *   Copyright (C) 2016 by Colin Durbridge G4EML
  *
@@ -32,6 +32,7 @@ bool m_ysfEnable    = true;
 bool m_p25Enable    = true;
 bool m_nxdnEnable   = true;
 bool m_pocsagEnable = true;
+bool m_fmEnable     = true;
 
 bool m_duplex = true;
 
@@ -59,11 +60,15 @@ CNXDNTX    nxdnTX;
 
 CPOCSAGTX  pocsagTX;
 
+CFM        fm;
+
 CCalDStarRX calDStarRX;
 CCalDStarTX calDStarTX;
 CCalDMR     calDMR;
 CCalP25     calP25;
 CCalNXDN    calNXDN;
+CCalFM      calFM;
+CCalPOCSAG  calPOCSAG;
 CCalRSSI    calRSSI;
 
 CCWIdTX cwIdTX;
@@ -102,9 +107,12 @@ void loop()
   if (m_nxdnEnable && m_modemState == STATE_NXDN)
     nxdnTX.process();
 
-  if (m_pocsagEnable && m_modemState == STATE_POCSAG)
+  if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
     pocsagTX.process();
 
+  if (m_fmEnable && m_modemState == STATE_FM)
+    fm.process();
+
   if (m_modemState == STATE_DSTARCAL)
     calDStarTX.process();
 
@@ -117,6 +125,12 @@ void loop()
   if (m_modemState == STATE_NXDNCAL1K)
     calNXDN.process();
 
+  if (m_modemState == STATE_POCSAGCAL)
+    calPOCSAG.process();
+
+  if (m_modemState == STATE_FMCAL10K || m_modemState == STATE_FMCAL12K || m_modemState == STATE_FMCAL15K || m_modemState == STATE_FMCAL20K || m_modemState == STATE_FMCAL25K ||m_modemState == STATE_FMCAL30K)
+    calFM.process();
+
   if (m_modemState == STATE_IDLE)
     cwIdTX.process();
 }

MMDVM.ino

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2016 by Colin Durbridge G4EML
  *
  *   This program is free software; you can redistribute it and/or modify
@@ -29,6 +29,7 @@ bool m_ysfEnable    = true;
 bool m_p25Enable    = true;
 bool m_nxdnEnable   = true;
 bool m_pocsagEnable = true;
+bool m_fmEnable     = true;
 
 bool m_duplex = true;
 
@@ -56,11 +57,15 @@ CNXDNTX    nxdnTX;
 
 CPOCSAGTX  pocsagTX;
 
+CFM        fm;
+
 CCalDStarRX calDStarRX;
 CCalDStarTX calDStarTX;
 CCalDMR     calDMR;
+CCalFM      calFM;
 CCalP25     calP25;
 CCalNXDN    calNXDN;
+CCalPOCSAG  calPOCSAG;
 CCalRSSI    calRSSI;
 
 CCWIdTX cwIdTX;
@@ -99,22 +104,30 @@ void loop()
   if (m_nxdnEnable && m_modemState == STATE_NXDN)
     nxdnTX.process();
 
-  if (m_pocsagEnable && m_modemState == STATE_POCSAG)
+  if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
     pocsagTX.process();
 
+  if (m_fmEnable && m_modemState == STATE_FM)
+    fm.process();
+
   if (m_modemState == STATE_DSTARCAL)
     calDStarTX.process();
 
   if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K || m_modemState == STATE_DMRDMO1K)
     calDMR.process();
 
+  if (m_modemState == STATE_FMCAL10K || m_modemState == STATE_FMCAL12K || m_modemState == STATE_FMCAL15K || m_modemState == STATE_FMCAL20K || m_modemState == STATE_FMCAL25K || m_modemState == STATE_FMCAL30K)
+    calFM.process();
+
   if (m_modemState == STATE_P25CAL1K)
     calP25.process();
 
   if (m_modemState == STATE_NXDNCAL1K)
     calNXDN.process();
 
+  if (m_modemState == STATE_POCSAGCAL)
+    calPOCSAG.process();
+
   if (m_modemState == STATE_IDLE)
     cwIdTX.process();
 }
-

MMDVM_STM32F4xx.coproj

@@ -1,338 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<Project version="2G - 1.7.8" name="MMDVM_STM32F4xx">
-  <Target name="MMDVM_Discovery_407" isCurrent="1">
-    <Device manufacturerId="9" manufacturerName="ST" chipId="344" chipName="STM32F407VG" boardId="" boardName=""/>
-    <BuildOption>
-      <Compile>
-        <Option name="OptimizationLevel" value="4"/>
-        <Option name="UseFPU" value="0"/>
-        <Option name="UserEditCompiler" value=""/>
-        <Option name="SupportCPlusplus" value="1"/>
-        <Option name="FPU" value="2"/>
-        <Includepaths>
-          <Includepath path="."/>
-        </Includepaths>
-        <DefinedSymbols>
-          <Define name="STM32F4XX"/>
-          <Define name="USE_STDPERIPH_DRIVER"/>
-          <Define name="__ASSEMBLY__"/>
-          <Define name="SUPPORT_CPLUSPLUS"/>
-          <Define name="STM32F40_41xxx"/>
-          <Define name="HSE_VALUE=8000000"/>
-          <Define name="STM32F4_DISCOVERY"/>
-          <Define name="__FPU_USED"/>
-        </DefinedSymbols>
-      </Compile>
-      <Link useDefault="0">
-        <Option name="DiscardUnusedSection" value="0"/>
-        <Option name="UserEditLinkder" value=""/>
-        <Option name="UseMemoryLayout" value="0"/>
-        <Option name="nostartfiles" value="1"/>
-        <Option name="LTO" value="0"/>
-        <Option name="IsNewStartupCode" value="1"/>
-        <Option name="Library" value="Semihosting"/>
-        <Option name="UserEditLinker" value="-lstdc++; --specs=nano.specs;"/>
-        <LinkedLibraries>
-          <Libset dir="stm32f4xx_lib\cmsis\lib\gcc\" libs="arm_cortexm4lf_math"/>
-        </LinkedLibraries>
-        <MemoryAreas debugInFlashNotRAM="1">
-          <Memory name="IROM1" type="ReadOnly" size="0x00100000" startValue="0x08000000"/>
-          <Memory name="IRAM1" type="ReadWrite" size="0x00020000" startValue="0x20000000"/>
-          <Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
-          <Memory name="IRAM2" type="ReadWrite" size="0x00010000" startValue="0x10000000"/>
-        </MemoryAreas>
-        <LocateLinkFile path="./stm32f4xx_link.ld" type="0"/>
-      </Link>
-      <Output>
-        <Option name="OutputFileType" value="0"/>
-        <Option name="Path" value="./"/>
-        <Option name="Name" value="MMDVM_DIS"/>
-        <Option name="HEX" value="1"/>
-        <Option name="BIN" value="1"/>
-      </Output>
-      <User>
-        <UserRun name="Run#1" type="Before" checked="0" value=""/>
-        <UserRun name="Run#1" type="After" checked="0" value=""/>
-      </User>
-    </BuildOption>
-    <DebugOption>
-      <Option name="org.coocox.codebugger.gdbjtag.core.adapter" value="ST-Link"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.debugMode" value="SWD"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.clockDiv" value="1M"/>
-      <Option name="org.coocox.codebugger.gdbjtag.corerunToMain" value="1"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.jlinkgdbserver" value=""/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.userDefineGDBScript" value=""/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.targetEndianess" value="0"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.jlinkResetMode" value="Type 0: Normal"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.resetMode" value="SYSRESETREQ"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.ifSemihost" value="0"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.ifCacheRom" value="1"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.ipAddress" value="127.0.0.1"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.portNumber" value="2009"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.autoDownload" value="1"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.verify" value="1"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.downloadFuction" value="Erase Effected"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.defaultAlgorithm" value="STM32F4xx_1024.elf"/>
-    </DebugOption>
-    <ExcludeFile/>
-  </Target>
-  <Target name="MMDVM_Pi_446" isCurrent="0">
-    <Device manufacturerId="9" manufacturerName="ST" chipId="344" chipName="STM32F407VG" boardId="" boardName=""/>
-    <BuildOption>
-      <Compile>
-        <Option name="OptimizationLevel" value="4"/>
-        <Option name="UseFPU" value="0"/>
-        <Option name="UserEditCompiler" value=""/>
-        <Option name="SupportCPlusplus" value="1"/>
-        <Option name="FPU" value="2"/>
-        <Includepaths>
-          <Includepath path="."/>
-        </Includepaths>
-        <DefinedSymbols>
-          <Define name="STM32F4XX"/>
-          <Define name="USE_STDPERIPH_DRIVER"/>
-          <Define name="__ASSEMBLY__"/>
-          <Define name="SUPPORT_CPLUSPLUS"/>
-          <Define name="__FPU_USED"/>
-          <Define name="STM32F446xx"/>
-          <Define name="HSE_VALUE=12000000"/>
-          <Define name="STM32F4_PI"/>
-          <Define name="MODE_PINS"/>
-        </DefinedSymbols>
-      </Compile>
-      <Link useDefault="0">
-        <Option name="DiscardUnusedSection" value="0"/>
-        <Option name="UserEditLinkder" value=""/>
-        <Option name="UseMemoryLayout" value="0"/>
-        <Option name="nostartfiles" value="1"/>
-        <Option name="LTO" value="0"/>
-        <Option name="IsNewStartupCode" value="1"/>
-        <Option name="Library" value="Semihosting"/>
-        <Option name="UserEditLinker" value="-lstdc++; --specs=nano.specs;"/>
-        <LinkedLibraries>
-          <Libset dir="stm32f4xx_lib\cmsis\lib\gcc\" libs="arm_cortexm4lf_math"/>
-        </LinkedLibraries>
-        <MemoryAreas debugInFlashNotRAM="1">
-          <Memory name="IROM1" type="ReadOnly" size="0x00100000" startValue="0x08000000"/>
-          <Memory name="IRAM1" type="ReadWrite" size="0x00020000" startValue="0x20000000"/>
-          <Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
-          <Memory name="IRAM2" type="ReadWrite" size="0x00010000" startValue="0x10000000"/>
-        </MemoryAreas>
-        <LocateLinkFile path="./stm32f4xx_link.ld" type="0"/>
-      </Link>
-      <Output>
-        <Option name="OutputFileType" value="0"/>
-        <Option name="Path" value="./"/>
-        <Option name="Name" value="MMDVM_PI"/>
-        <Option name="HEX" value="1"/>
-        <Option name="BIN" value="1"/>
-      </Output>
-      <User>
-        <UserRun name="Run#1" type="Before" checked="0" value=""/>
-        <UserRun name="Run#1" type="After" checked="0" value=""/>
-      </User>
-    </BuildOption>
-    <DebugOption>
-      <Option name="org.coocox.codebugger.gdbjtag.core.adapter" value="ST-Link"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.debugMode" value="SWD"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.clockDiv" value="1M"/>
-      <Option name="org.coocox.codebugger.gdbjtag.corerunToMain" value="1"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.jlinkgdbserver" value=""/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.userDefineGDBScript" value=""/>
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-      <Option name="org.coocox.codebugger.gdbjtag.core.resetMode" value="SYSRESETREQ"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.ifSemihost" value="0"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.ifCacheRom" value="1"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.ipAddress" value="127.0.0.1"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.portNumber" value="2009"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.autoDownload" value="1"/>
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-      <Option name="org.coocox.codebugger.gdbjtag.core.downloadFuction" value="Erase Effected"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.defaultAlgorithm" value="STM32F4xx_1024.elf"/>
-    </DebugOption>
-    <ExcludeFile/>
-  </Target>
-  <Target name="MMDVM_Nucleo_446" isCurrent="0">
-    <Device manufacturerId="9" manufacturerName="ST" chipId="344" chipName="STM32F407VG" boardId="" boardName=""/>
-    <BuildOption>
-      <Compile>
-        <Option name="OptimizationLevel" value="4"/>
-        <Option name="UseFPU" value="0"/>
-        <Option name="UserEditCompiler" value=""/>
-        <Option name="SupportCPlusplus" value="1"/>
-        <Option name="FPU" value="2"/>
-        <Includepaths>
-          <Includepath path="."/>
-        </Includepaths>
-        <DefinedSymbols>
-          <Define name="STM32F4XX"/>
-          <Define name="USE_STDPERIPH_DRIVER"/>
-          <Define name="__ASSEMBLY__"/>
-          <Define name="SUPPORT_CPLUSPLUS"/>
-          <Define name="HSE_VALUE=8000000"/>
-          <Define name="__FPU_USED"/>
-          <Define name="STM32F4_NUCLEO"/>
-          <Define name="STM32F446xx"/>
-        </DefinedSymbols>
-      </Compile>
-      <Link useDefault="0">
-        <Option name="DiscardUnusedSection" value="0"/>
-        <Option name="UserEditLinkder" value=""/>
-        <Option name="UseMemoryLayout" value="0"/>
-        <Option name="nostartfiles" value="1"/>
-        <Option name="LTO" value="0"/>
-        <Option name="IsNewStartupCode" value="1"/>
-        <Option name="Library" value="Semihosting"/>
-        <Option name="UserEditLinker" value="-lstdc++; --specs=nano.specs;"/>
-        <LinkedLibraries>
-          <Libset dir="stm32f4xx_lib\cmsis\lib\gcc\" libs="arm_cortexm4lf_math"/>
-        </LinkedLibraries>
-        <MemoryAreas debugInFlashNotRAM="1">
-          <Memory name="IROM1" type="ReadOnly" size="0x00100000" startValue="0x08000000"/>
-          <Memory name="IRAM1" type="ReadWrite" size="0x00020000" startValue="0x20000000"/>
-          <Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
-          <Memory name="IRAM2" type="ReadWrite" size="0x00010000" startValue="0x10000000"/>
-        </MemoryAreas>
-        <LocateLinkFile path="./stm32f4xx_link.ld" type="0"/>
-      </Link>
-      <Output>
-        <Option name="OutputFileType" value="0"/>
-        <Option name="Path" value="./"/>
-        <Option name="Name" value="MMDVM_NUCLEO"/>
-        <Option name="HEX" value="1"/>
-        <Option name="BIN" value="1"/>
-      </Output>
-      <User>
-        <UserRun name="Run#1" type="Before" checked="0" value=""/>
-        <UserRun name="Run#1" type="After" checked="0" value=""/>
-      </User>
-    </BuildOption>
-    <DebugOption>
-      <Option name="org.coocox.codebugger.gdbjtag.core.adapter" value="ST-Link"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.debugMode" value="SWD"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.clockDiv" value="1M"/>
-      <Option name="org.coocox.codebugger.gdbjtag.corerunToMain" value="1"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.jlinkgdbserver" value=""/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.userDefineGDBScript" value=""/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.targetEndianess" value="0"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.jlinkResetMode" value="Type 0: Normal"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.resetMode" value="SYSRESETREQ"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.ifSemihost" value="0"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.ifCacheRom" value="1"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.ipAddress" value="127.0.0.1"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.portNumber" value="2009"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.autoDownload" value="1"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.verify" value="1"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.downloadFuction" value="Erase Effected"/>
-      <Option name="org.coocox.codebugger.gdbjtag.core.defaultAlgorithm" value="STM32F4xx_1024.elf"/>
-    </DebugOption>
-    <ExcludeFile/>
-  </Target>
-  <Components path="./">
-  </Components>
-  <Files>
-    <File name="DMRIdleRX.h" path="DMRIdleRX.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_dac.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_dac.c" type="1"/>
-    <File name="DMRDMOTX.cpp" path="DMRDMOTX.cpp" type="1"/>
-    <File name="DMRRX.cpp" path="DMRRX.cpp" type="1"/>
-    <File name="YSFRX.cpp" path="YSFRX.cpp" type="1"/>
-    <File name="CalRSSI.cpp" path="CalRSSI.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/Device/stm32f4xx.h" path="STM32F4XX_Lib/Device/stm32f4xx.h" type="1"/>
-    <File name="SampleRB.cpp" path="SampleRB.cpp" type="1"/>
-    <File name="CalDStarTX.h" path="CalDStarTX.h" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Include/core_cm4.h" path="STM32F4XX_Lib/CMSIS/Include/core_cm4.h" type="1"/>
-    <File name="DMRSlotRX.h" path="DMRSlotRX.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_tim.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_tim.c" type="1"/>
-    <File name="YSFRX.h" path="YSFRX.h" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Include" path="" type="2"/>
-    <File name="IO.cpp" path="IO.cpp" type="1"/>
-    <File name="DMRDMORX.cpp" path="DMRDMORX.cpp" type="1"/>
-    <File name="P25RX.h" path="P25RX.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/misc.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/misc.c" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS" path="" type="2"/>
-    <File name="SerialArduino.cpp" path="SerialArduino.cpp" type="1"/>
-    <File name="SerialPort.cpp" path="SerialPort.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/Device/stm32f4xx_conf.h" path="STM32F4XX_Lib/Device/stm32f4xx_conf.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_adc.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_adc.c" type="1"/>
-    <File name="DStarTX.cpp" path="DStarTX.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_usart.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_usart.c" type="1"/>
-    <File name="SampleRB.h" path="SampleRB.h" type="1"/>
-    <File name="YSFTX.h" path="YSFTX.h" type="1"/>
-    <File name="DMRRX.h" path="DMRRX.h" type="1"/>
-    <File name="CalRSSI.h" path="CalRSSI.h" type="1"/>
-    <File name="IOTeensy.cpp" path="IOTeensy.cpp" type="1"/>
-    <File name="MMDVM.cpp" path="MMDVM.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Include/core_cmSimd.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmSimd.h" type="1"/>
-    <File name="DMRDMORX.h" path="DMRDMORX.h" type="1"/>
-    <File name="SerialPort.h" path="SerialPort.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_dac.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_dac.h" type="1"/>
-    <File name="CWIdTX.h" path="CWIdTX.h" type="1"/>
-    <File name="STM32F4XX_Lib/Device/system_stm32f4xx.h" path="STM32F4XX_Lib/Device/system_stm32f4xx.h" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Include/core_cmFunc.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmFunc.h" type="1"/>
-    <File name="CalDStarTX.cpp" path="CalDStarTX.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source" path="" type="2"/>
-    <File name="CalDMR.h" path="CalDMR.h" type="1"/>
-    <File name="DMRDMOTX.h" path="DMRDMOTX.h" type="1"/>
-    <File name="IODue.cpp" path="IODue.cpp" type="1"/>
-    <File name="DMRTX.cpp" path="DMRTX.cpp" type="1"/>
-    <File name="P25RX.cpp" path="P25RX.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Lib/GCC" path="" type="2"/>
-    <File name="STM32F4XX_Lib" path="" type="2"/>
-    <File name="STM32F4XX_Lib/CMSIS/Include/core_cmInstr.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmInstr.h" type="1"/>
-    <File name="DMRTX.h" path="DMRTX.h" type="1"/>
-    <File name="STM32F4XX_Lib/Device/system_stm32f4xx.c" path="STM32F4XX_Lib/Device/system_stm32f4xx.c" type="1"/>
-    <File name="RSSIRB.h" path="RSSIRB.h" type="1"/>
-    <File name="STM32F4XX_Lib/Device/startup/startup_stm32f4xx.c" path="STM32F4XX_Lib/Device/startup/startup_stm32f4xx.c" type="1"/>
-    <File name="STM32F4XX_Lib/Device/startup" path="" type="2"/>
-    <File name="SerialRB.h" path="SerialRB.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_gpio.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_gpio.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver" path="" type="2"/>
-    <File name="DMRDefines.h" path="DMRDefines.h" type="1"/>
-    <File name="CalDMR.cpp" path="CalDMR.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_adc.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_adc.h" type="1"/>
-    <File name="SerialSTM.cpp" path="SerialSTM.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" path="STM32F4XX_Lib/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" type="1"/>
-    <File name="DStarDefines.h" path="DStarDefines.h" type="1"/>
-    <File name="DStarRX.h" path="DStarRX.h" type="1"/>
-    <File name="Config.h" path="Config.h" type="1"/>
-    <File name="DMRSlotType.cpp" path="DMRSlotType.cpp" type="1"/>
-    <File name="Globals.h" path="Globals.h" type="1"/>
-    <File name="STM32F4XX_Lib/Device" path="" type="2"/>
-    <File name="CalDStarRX.cpp" path="CalDStarRX.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_tim.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_tim.h" type="1"/>
-    <File name="CalDStarRX.h" path="CalDStarRX.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include" path="" type="2"/>
-    <File name="IO.h" path="IO.h" type="1"/>
-    <File name="Utils.cpp" path="Utils.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/.DS_Store" path="STM32F4XX_Lib/CMSIS/.DS_Store" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Lib/.DS_Store" path="STM32F4XX_Lib/CMSIS/Lib/.DS_Store" type="1"/>
-    <File name="Utils.h" path="Utils.h" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Lib" path="" type="2"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/.DS_Store" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/.DS_Store" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Include/.DS_Store" path="STM32F4XX_Lib/CMSIS/Include/.DS_Store" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Include/arm_math.h" path="STM32F4XX_Lib/CMSIS/Include/arm_math.h" type="1"/>
-    <File name="YSFDefines.h" path="YSFDefines.h" type="1"/>
-    <File name="DStarTX.h" path="DStarTX.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_rcc.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_rcc.c" type="1"/>
-    <File name="STM32F4XX_Lib/Device/.DS_Store" path="STM32F4XX_Lib/Device/.DS_Store" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_rcc.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_rcc.h" type="1"/>
-    <File name="P25Defines.h" path="P25Defines.h" type="1"/>
-    <File name="DMRSlotType.h" path="DMRSlotType.h" type="1"/>
-    <File name="Debug.h" path="Debug.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/misc.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/misc.h" type="1"/>
-    <File name="P25TX.h" path="P25TX.h" type="1"/>
-    <File name="RSSIRB.cpp" path="RSSIRB.cpp" type="1"/>
-    <File name="DStarRX.cpp" path="DStarRX.cpp" type="1"/>
-    <File name="DMRSlotRX.cpp" path="DMRSlotRX.cpp" type="1"/>
-    <File name="IOSTM.cpp" path="IOSTM.cpp" type="1"/>
-    <File name="P25TX.cpp" path="P25TX.cpp" type="1"/>
-    <File name="SerialRB.cpp" path="SerialRB.cpp" type="1"/>
-    <File name="CWIdTX.cpp" path="CWIdTX.cpp" type="1"/>
-    <File name="DMRIdleRX.cpp" path="DMRIdleRX.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_usart.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_usart.h" type="1"/>
-    <File name="STM32F4XX_Lib/.DS_Store" path="STM32F4XX_Lib/.DS_Store" type="1"/>
-    <File name="YSFTX.cpp" path="YSFTX.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_gpio.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_gpio.c" type="1"/>
-  </Files>
-</Project>

Makefile

@@ -25,6 +25,7 @@ F7_LIB_PATH=./STM32F7XX_Lib
 # MCU external clock frequency (Hz)
 CLK_MMDVM_PI=12000000
 CLK_NUCLEO=8000000
+CLK_12MHZ=12000000
 
 # Directory Structure
 BINDIR=bin
@@ -93,6 +94,8 @@ ifndef $(OSC)
 		OSC=$(CLK_MMDVM_PI)
 	else ifeq ($(MAKECMDGOALS),pi-f722)
 		OSC=$(CLK_MMDVM_PI)
+	else ifeq ($(MAKECMDGOALS),drcc_nqf)
+		OSC=$(CLK_12MHZ)
 	else
 		OSC=$(CLK_NUCLEO)
 	endif
@@ -128,8 +131,15 @@ DEFS_NUCLEO_F767=-DUSE_HAL_DRIVER -DSTM32F767xx -DSTM32F7XX -DSTM32F7_NUCLEO -DH
 DEFS_PI_F722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_PI -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
 # MMDVM-F7M F0DEI board:
 DEFS_F7M=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_F7M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
+# MMDVM_RPT_Hat F0DEI, DB9MAT, DF2ET board:
+DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
 # STM32F4 DVM board:
 DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
+# MMDVM_RPT_Hat BG4TGO, BG5HHP board:
+DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
+# DRCC_DVM BG7NQF board:
+DEFS_DRCC_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DDRCC_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
+
 
 # Build compiler flags
 CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
@@ -145,10 +155,10 @@ LDFLAGS_F722 =-T stm32f722_link.ld $(MCFLAGS_F7) --specs=nosys.specs $(INCLUDES_
 # Common flags
 CFLAGS=-Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
 CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
-LDFLAGS=-Os --specs=nano.specs
+LDFLAGS=-Os --specs=nano.specs -Wl,-Map=bin/mmdvm.map
 
 # Build Rules
-.PHONY: all release dis pi pi_f722 f4m nucleo f767 dvm clean
+.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm drcc_nqf clean
 
 # Default target: Nucleo-64 F446RE board
 all: nucleo
@@ -177,6 +187,18 @@ f7m: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_F7M)
 f7m: LDFLAGS+=$(LDFLAGS_F722)
 f7m: release_f7
 
+rpt_hat: GitVersion.h
+rpt_hat: CFLAGS+=$(CFLAGS_F7) $(DEFS_RPT_HAT)
+rpt_hat: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_RPT_HAT)
+rpt_hat: LDFLAGS+=$(LDFLAGS_F722)
+rpt_hat: release_f7
+
+rpt_hat_tgo: GitVersion.h
+rpt_hat_tgo: CFLAGS+=$(CFLAGS_F4) $(DEFS_RPT_HAT_TGO)
+rpt_hat_tgo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_RPT_HAT_TGO)
+rpt_hat_tgo: LDFLAGS+=$(LDFLAGS_F4)
+rpt_hat_tgo: release_f4
+
 nucleo: GitVersion.h
 nucleo: CFLAGS+=$(CFLAGS_F4) $(DEFS_NUCLEO)
 nucleo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_NUCLEO)
@@ -201,6 +223,12 @@ dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM)
 dvm: LDFLAGS+=$(LDFLAGS_F4)
 dvm: release_f4
 
+drcc_nqf: GitVersion.h
+drcc_nqf: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
+drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
+drcc_nqf: LDFLAGS+=$(LDFLAGS_F4)
+drcc_nqf: release_f4
+
 release_f4: $(BINDIR)
 release_f4: $(OBJDIR_F4)
 release_f4: $(BINDIR)/$(BINHEX_F4)
@@ -223,7 +251,7 @@ $(OBJDIR_F7):
 $(BINDIR)/$(BINHEX_F4): $(BINDIR)/$(BINELF_F4)
 	$(CP) -O ihex $< $@
 	@echo "Objcopy from ELF to IHEX complete!\n"
-	
+
 $(BINDIR)/$(BINBIN_F4): $(BINDIR)/$(BINELF_F4)
 	$(CP) -O binary $< $@
 	@echo "Objcopy from ELF to BINARY complete!\n"
@@ -236,7 +264,7 @@ $(BINDIR)/$(BINELF_F4): $(OBJ_F4)
 $(BINDIR)/$(BINHEX_F7): $(BINDIR)/$(BINELF_F7)
 	$(CP) -O ihex $< $@
 	@echo "Objcopy from ELF to IHEX complete!\n"
-	
+
 $(BINDIR)/$(BINBIN_F7): $(BINDIR)/$(BINELF_F7)
 	$(CP) -O binary $< $@
 	@echo "Objcopy from ELF to BINARY complete!\n"
@@ -326,17 +354,15 @@ deploy-dvm: deploy-pi
 deploy-pi-f7:
 ifneq ($(wildcard /usr/local/bin/stm32flash),)
 	-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	-/usr/local/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F7)
 	/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
-endif
 
-ifneq ($(wildcard /usr/bin/stm32flash),)
+else ifneq ($(wildcard /usr/bin/stm32flash),)
 	-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	-/usr/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F7)
 	/usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
 endif
 
-deploy-f7m: deploy-pi-f7
+deploy-f7m:   deploy-pi-f7
+deploy-rpt_hat: deploy-pi-f7
 
 # Export the current git version if the index file exists, else 000...
 GitVersion.h:
@@ -351,3 +377,7 @@ else
 	echo "#define GITVERSION \"0000000\"" > $@
 endif
 endif
+
+flash_f4:
+	@echo "flashing firmware..."
+	st-flash write bin/$(BINBIN_F4) 0x8000000

Makefile.CMSIS

@@ -25,7 +25,7 @@ STARTUP:=$(SYSDIR)/startup_stm32f105xc.S
 STARTUP_DEFS=
 
 # Include directory for CMSIS
-CMSISDIR:=/opt/STM32Cube_FW_F1_V1.4.0/Drivers/CMSIS
+CMSISDIR:=STM32F10X_Lib/CMSIS
 
 # Libraries
 LIBDIR:=
@@ -65,7 +65,7 @@ COMMON_FLAGS =-mthumb -mlittle-endian -mcpu=$(MCPU)
 COMMON_FLAGS+= -Wall
 COMMON_FLAGS+= -I. -I$(CMSISDIR)/Include -I$(CMSISDIR)/Device/ST/STM32F1xx/Include -I$(SYSDIR)
 COMMON_FLAGS+=  $(addprefix -I,$(INCDIR))
-COMMON_FLAGS+= -D$(MCU)
+COMMON_FLAGS+= -D$(MCU) -DMADEBYMAKEFILE -DSTM32F1
 COMMON_FLAGS+= -Os -flto -ffunction-sections -fdata-sections
 COMMON_FLAGS+= -g
 # Assembler flags
@@ -91,7 +91,7 @@ DEPENDS:=$(CSRC:%.c=$(OBJDIR)/%.d) $(CXXSRC:%.cpp=$(OBJDIR)/%.d)
 
 # Targets
 .PHONY: all
-all: $(DIS) $(HEX)
+all: GitVersion.h $(DIS) $(HEX)
 	$(SIZE) $(ELF)
 
 .PHONY: program
@@ -116,7 +116,7 @@ debug: $(ELF)
 
 .PHONY: clean
 clean:
-	$(RM) $(OBJ) $(HEX) $(ELF) $(DIS) $(MAP) $(DEPENDS)
+	$(RM) $(OBJ) $(HEX) $(ELF) $(DIS) $(MAP) $(DEPENDS) GitVersion.h
 
 # implicit rules
 .elf.hex:
@@ -149,3 +149,17 @@ $(DIS): $(ELF)
 
 # include dependecies
 -include $(DEPENDS)
+
+# Export the current git version if the index file exists, else 000...
+GitVersion.h:
+ifdef SYSTEMROOT
+	echo #define GITVERSION "0000000" > $@
+else ifdef SystemRoot
+	echo #define GITVERSION "0000000" > $@
+else
+ifneq ("$(wildcard .git/index)","")
+	echo "#define GITVERSION \"$(shell git rev-parse --short HEAD)\"" > $@
+else
+	echo "#define GITVERSION \"0000000\"" > $@
+endif
+endif

NXDNTX.cpp

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2009-2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2009-2018,2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2017 by Andy Uribe CA6JAU
  *
  *   This program is free software; you can redistribute it and/or modify
@@ -45,7 +45,7 @@ const uint8_t NXDN_PREAMBLE[] = {0x57U, 0x75U, 0xFDU};
 const uint8_t NXDN_SYNC = 0x5FU;
 
 CNXDNTX::CNXDNTX() :
-m_buffer(4000U),
+m_buffer(TX_BUFFER_LEN),
 m_modFilter(),
 m_sincFilter(),
 m_modState(),
@@ -53,7 +53,9 @@ m_sincState(),
 m_poBuffer(),
 m_poLen(0U),
 m_poPtr(0U),
-m_txDelay(240U)      // 200ms
+m_txDelay(240U),     // 200ms
+m_txHang(3000U),     // 5s
+m_txCount(0U)
 {
   ::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
   ::memset(m_sincState,  0x00U, 70U * sizeof(q15_t));
@@ -70,10 +72,7 @@ m_txDelay(240U)      // 200ms
 
 void CNXDNTX::process()
 {
-  if (m_buffer.getData() == 0U && m_poLen == 0U)
+  if (m_poLen == 0U && m_buffer.getData() > 0U) {
-    return;
-
-  if (m_poLen == 0U) {
     if (!m_tx) {
       for (uint16_t i = 0U; i < m_txDelay; i++)
         m_poBuffer[m_poLen++] = NXDN_SYNC;
@@ -98,6 +97,8 @@ void CNXDNTX::process()
       writeByte(c);
 
       space -= 4U * NXDN_RADIO_SYMBOL_LENGTH;
+      if (m_duplex)
+        m_txCount = m_txHang;
       
       if (m_poPtr >= m_poLen) {
         m_poPtr = 0U;
@@ -105,6 +106,19 @@ void CNXDNTX::process()
         return;
       }
     }
+  } else if (m_txCount > 0U) {
+    // Transmit silence until the hang timer has expired.
+    uint16_t space = io.getSpace();
+
+    while (space > (4U * NXDN_RADIO_SYMBOL_LENGTH)) {
+      writeSilence();
+
+      space -= 4U * NXDN_RADIO_SYMBOL_LENGTH;
+      m_txCount--;
+
+      if (m_txCount == 0U)
+        return;
+    }
   }
 }
 
@@ -155,6 +169,19 @@ void CNXDNTX::writeByte(uint8_t c)
   io.write(STATE_NXDN, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
 }
 
+void CNXDNTX::writeSilence()
+{
+  q15_t inBuffer[4U] = {0x00U, 0x00U, 0x00U, 0x00U};
+  q15_t intBuffer[NXDN_RADIO_SYMBOL_LENGTH * 4U];
+  q15_t outBuffer[NXDN_RADIO_SYMBOL_LENGTH * 4U];
+
+  ::arm_fir_interpolate_q15(&m_modFilter, inBuffer, intBuffer, 4U);
+
+  ::arm_fir_fast_q15(&m_sincFilter, intBuffer, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
+
+  io.write(STATE_NXDN, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
+}
+
 void CNXDNTX::setTXDelay(uint8_t delay)
 {
   m_txDelay = 300U + uint16_t(delay) * 6U;        // 500ms + tx delay
@@ -168,3 +195,7 @@ uint8_t CNXDNTX::getSpace() const
   return m_buffer.getSpace() / NXDN_FRAME_LENGTH_BYTES;
 }
 
+void CNXDNTX::setParams(uint8_t txHang)
+{
+  m_txHang = txHang * 600U;
+}

NXDNTX.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -35,6 +35,8 @@ public:
 
   uint8_t getSpace() const;
 
+  void setParams(uint8_t txHang);
+
 private:
   CSerialRB                        m_buffer;
   arm_fir_interpolate_instance_q15 m_modFilter;
@@ -45,9 +47,11 @@ private:
   uint16_t                         m_poLen;
   uint16_t                         m_poPtr;
   uint16_t                         m_txDelay;
+  uint32_t                         m_txHang;
+  uint32_t                         m_txCount;
 
   void writeByte(uint8_t c);
+  void writeSilence();
 };
 
 #endif
-

P25Defines.h

@@ -47,6 +47,11 @@ const unsigned int P25_TSDU_FRAME_LENGTH_BITS      = P25_TSDU_FRAME_LENGTH_BYTES
 const unsigned int P25_TSDU_FRAME_LENGTH_SYMBOLS   = P25_TSDU_FRAME_LENGTH_BYTES * 4U; 
 const unsigned int P25_TSDU_FRAME_LENGTH_SAMPLES   = P25_TSDU_FRAME_LENGTH_SYMBOLS * P25_RADIO_SYMBOL_LENGTH;
 
+const unsigned int P25_PDU_HDR_FRAME_LENGTH_BYTES = 45U;
+const unsigned int P25_PDU_HDR_FRAME_LENGTH_BITS = P25_PDU_HDR_FRAME_LENGTH_BYTES * 8U;
+const unsigned int P25_PDU_HDR_FRAME_LENGTH_SYMBOLS = P25_PDU_HDR_FRAME_LENGTH_BYTES * 4U;
+const unsigned int P25_PDU_HDR_FRAME_LENGTH_SAMPLES = P25_PDU_HDR_FRAME_LENGTH_SYMBOLS * P25_RADIO_SYMBOL_LENGTH;
+
 const unsigned int P25_SYNC_LENGTH_BYTES   = 6U;
 const unsigned int P25_SYNC_LENGTH_BITS    = P25_SYNC_LENGTH_BYTES * 8U;
 const unsigned int P25_SYNC_LENGTH_SYMBOLS = P25_SYNC_LENGTH_BYTES * 4U;

P25RX.cpp

@@ -199,7 +199,19 @@ void CP25RX::processHdr(q15_t sample)
                 serial.writeP25Hdr(frame, P25_HDR_FRAME_LENGTH_BYTES + 1U);
             }
             break;
-        case P25_DUID_TSDU: {
+		case P25_DUID_PDU: {
+				calculateLevels(m_hdrSyncPtr, P25_PDU_HDR_FRAME_LENGTH_SYMBOLS);
+
+				DEBUG4("P25RX: sync found in PDU pos/centre/threshold", m_hdrSyncPtr, m_centreVal, m_thresholdVal);
+
+				uint8_t frame[P25_PDU_HDR_FRAME_LENGTH_BYTES + 1U];
+				samplesToBits(m_hdrSyncPtr, P25_PDU_HDR_FRAME_LENGTH_SYMBOLS, frame, 8U, m_centreVal, m_thresholdVal);
+
+				frame[0U] = 0x01U;
+				serial.writeP25Hdr(frame, P25_PDU_HDR_FRAME_LENGTH_BYTES + 1U);
+			}
+			break;
+		case P25_DUID_TSDU: {
                 calculateLevels(m_hdrStartPtr, P25_TSDU_FRAME_LENGTH_SYMBOLS);
 
                 DEBUG4("P25RX: sync found in TSDU pos/centre/threshold", m_hdrSyncPtr, m_centreVal, m_thresholdVal);

P25TX.cpp

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2016,2017,2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2017 by Andy Uribe CA6JAU
  *
  *   This program is free software; you can redistribute it and/or modify
@@ -43,7 +43,7 @@ const q15_t P25_LEVELD = -1260;
 const uint8_t P25_START_SYNC = 0x77U;
 
 CP25TX::CP25TX() :
-m_buffer(4000U),
+m_buffer(TX_BUFFER_LEN),
 m_modFilter(),
 m_lpFilter(),
 m_modState(),
@@ -51,7 +51,9 @@ m_lpState(),
 m_poBuffer(),
 m_poLen(0U),
 m_poPtr(0U),
-m_txDelay(240U)       // 200ms
+m_txDelay(240U),      // 200ms
+m_txHang(6000U),      // 5s
+m_txCount(0U)
 {
   ::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
   ::memset(m_lpState,  0x00U, 60U * sizeof(q15_t));
@@ -68,10 +70,7 @@ m_txDelay(240U)       // 200ms
 
 void CP25TX::process()
 {
-  if (m_buffer.getData() == 0U && m_poLen == 0U)
+  if (m_poLen == 0U && m_buffer.getData() > 0U) {
-    return;
-
-  if (m_poLen == 0U) {
     if (!m_tx) {
       for (uint16_t i = 0U; i < m_txDelay; i++)
         m_poBuffer[m_poLen++] = P25_START_SYNC;
@@ -94,13 +93,28 @@ void CP25TX::process()
       writeByte(c);
 
       space -= 4U * P25_RADIO_SYMBOL_LENGTH;
-      
+       if (m_duplex)
+        m_txCount = m_txHang;
+
       if (m_poPtr >= m_poLen) {
         m_poPtr = 0U;
         m_poLen = 0U;
         return;
       }
     }
+  } else if (m_txCount > 0U) {
+    // Transmit silence until the hang timer has expired.
+    uint16_t space = io.getSpace();
+
+    while (space > (4U * P25_RADIO_SYMBOL_LENGTH)) {
+      writeSilence();
+
+      space -= 4U * P25_RADIO_SYMBOL_LENGTH;
+      m_txCount--;
+
+      if (m_txCount == 0U)
+        return;
+    }
   }
 }
 
@@ -152,6 +166,19 @@ void CP25TX::writeByte(uint8_t c)
   io.write(STATE_P25, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
 }
 
+void CP25TX::writeSilence()
+{
+  q15_t inBuffer[4U] = {0x00U, 0x00U, 0x00U, 0x00U};
+  q15_t intBuffer[P25_RADIO_SYMBOL_LENGTH * 4U];
+  q15_t outBuffer[P25_RADIO_SYMBOL_LENGTH * 4U];
+
+  ::arm_fir_interpolate_q15(&m_modFilter, inBuffer, intBuffer, 4U);
+
+  ::arm_fir_fast_q15(&m_lpFilter, intBuffer, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
+
+  io.write(STATE_P25, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
+}
+
 void CP25TX::setTXDelay(uint8_t delay)
 {
   m_txDelay = 600U + uint16_t(delay) * 12U;        // 500ms + tx delay
@@ -164,3 +191,8 @@ uint8_t CP25TX::getSpace() const
 {
   return m_buffer.getSpace() / P25_LDU_FRAME_LENGTH_BYTES;
 }
+
+void CP25TX::setParams(uint8_t txHang)
+{
+  m_txHang = txHang * 1200U;
+}

P25TX.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2016,2017,2020 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -35,6 +35,8 @@ public:
 
   uint8_t getSpace() const;
 
+  void setParams(uint8_t txHang);
+
 private:
   CSerialRB                        m_buffer;
   arm_fir_interpolate_instance_q15 m_modFilter;
@@ -45,9 +47,11 @@ private:
   uint16_t                         m_poLen;
   uint16_t                         m_poPtr;
   uint16_t                         m_txDelay;
+  uint32_t                         m_txHang;
+  uint32_t                         m_txCount;
 
   void writeByte(uint8_t c);
+  void writeSilence();
 };
 
 #endif
-

POCSAGTX.cpp

@@ -87,6 +87,14 @@ void CPOCSAGTX::process()
   }
 }
 
+bool CPOCSAGTX::busy()
+{
+  if (m_poLen > 0U || m_buffer.getData() > 0U)
+    return true;
+  else
+    return false;
+}
+
 uint8_t CPOCSAGTX::writeData(const uint8_t* data, uint8_t length)
 {
   if (length != POCSAG_FRAME_LENGTH_BYTES)

POCSAGTX.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015-2019 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -29,12 +29,16 @@ public:
 
   uint8_t writeData(const uint8_t* data, uint8_t length);
 
+  void writeByte(uint8_t c);
+
   void process();
 
   void setTXDelay(uint8_t delay);
 
   uint8_t getSpace() const;
 
+  bool busy();
+
 private:
   CSerialRB            m_buffer;
   arm_fir_instance_q15 m_modFilter;
@@ -43,8 +47,6 @@ private:
   uint16_t             m_poLen;
   uint16_t             m_poPtr;
   uint16_t             m_txDelay;
-
-  void writeByte(uint8_t c);
 };
 
 #endif

SerialArduino.cpp

@@ -21,7 +21,10 @@
 
 #include "SerialPort.h"
 
-#if defined(__SAM3X8E__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
+#if defined(VK6MST_TEENSY_PI3_SHIELD_I2C)
+//it will load I2CTeensy.cpp
+
+#elif defined(__SAM3X8E__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
 
 void CSerialPort::beginInt(uint8_t n, int speed)
 {

SerialPort.cpp

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2013,2015,2016,2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2013,2015-2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2016 by Colin Durbridge G4EML
  *
  *   This program is free software; you can redistribute it and/or modify
@@ -65,12 +65,17 @@ const uint8_t MMDVM_NXDN_LOST    = 0x41U;
 
 const uint8_t MMDVM_POCSAG_DATA  = 0x50U;
 
+const uint8_t MMDVM_FM_PARAMS1   = 0x60U;
+const uint8_t MMDVM_FM_PARAMS2   = 0x61U;
+const uint8_t MMDVM_FM_PARAMS3   = 0x62U;
+
 const uint8_t MMDVM_ACK          = 0x70U;
 const uint8_t MMDVM_NAK          = 0x7FU;
 
 const uint8_t MMDVM_SERIAL       = 0x80U;
 
 const uint8_t MMDVM_TRANSPARENT  = 0x90U;
+const uint8_t MMDVM_QSO_INFO     = 0x91U;
 
 const uint8_t MMDVM_DEBUG1       = 0xF1U;
 const uint8_t MMDVM_DEBUG2       = 0xF2U;
@@ -90,14 +95,22 @@ const uint8_t MMDVM_DEBUG5       = 0xF5U;
 #define TCXO "NO TCXO"
 #endif
 
-#define DESCRIPTION              "MMDVM 20180327 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG)"
+#if defined(DRCC_DVM_NQF)
+#define	HW_TYPE	"MMDVM DRCC_DVM_NQF"
+#elif defined(STM32F4_RPT_HAT_TGO)
+#define	HW_TYPE	"MMDVM RPT_HAT_TGO"
+#else
+#define	HW_TYPE	"MMDVM"
+#endif
+
+#define DESCRIPTION "20200520 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
 
 #if defined(GITVERSION)
-#define concat(a, b, c) a " " b " GitID #" c ""
+#define concat(h, a, b, c) h " " a " " b " GitID #" c ""
-const char HARDWARE[] = concat(DESCRIPTION, TCXO, GITVERSION);
+const char HARDWARE[] = concat(HW_TYPE, DESCRIPTION, TCXO, GITVERSION);
 #else
-#define concat(a, b, c, d) a " " b " (Build: " c " " d ")"
+#define concat(h, a, b, c, d) h " " a " " b " (Build: " c " " d ")"
-const char HARDWARE[] = concat(DESCRIPTION, TCXO, __TIME__, __DATE__);
+const char HARDWARE[] = concat(HW_TYPE, DESCRIPTION, TCXO, __TIME__, __DATE__);
 #endif
 
 const uint8_t PROTOCOL_VERSION   = 1U;
@@ -161,6 +174,8 @@ void CSerialPort::getStatus()
     reply[3U] |= 0x10U;
   if (m_pocsagEnable)
     reply[3U] |= 0x20U;
+  if (m_fmEnable)
+    reply[3U] |= 0x40U;
 
   reply[4U]  = uint8_t(m_modemState);
 
@@ -249,7 +264,7 @@ void CSerialPort::getVersion()
 
 uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
 {
-  if (length < 18U)
+  if (length < 21U)
     return 4U;
 
   bool rxInvert  = (data[0U] & 0x01U) == 0x01U;
@@ -266,6 +281,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
   bool p25Enable    = (data[1U] & 0x08U) == 0x08U;
   bool nxdnEnable   = (data[1U] & 0x10U) == 0x10U;
   bool pocsagEnable = (data[1U] & 0x20U) == 0x20U;
+  bool fmEnable     = (data[1U] & 0x40U) == 0x40U;
 
   uint8_t txDelay = data[2U];
   if (txDelay > 50U)
@@ -273,7 +289,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
 
   MMDVM_STATE modemState = MMDVM_STATE(data[3U]);
 
-  if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K)
+  if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_FM && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K && modemState != STATE_POCSAGCAL && modemState != STATE_FMCAL10K && modemState != STATE_FMCAL12K && modemState != STATE_FMCAL15K && modemState != STATE_FMCAL20K && modemState != STATE_FMCAL25K && modemState != STATE_FMCAL30K)
     return 4U;
   if (modemState == STATE_DSTAR && !dstarEnable)
     return 4U;
@@ -287,6 +303,8 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
     return 4U;
   if (modemState == STATE_POCSAG && !pocsagEnable)
     return 4U;
+  if (modemState == STATE_FM && !fmEnable)
+    return 4U;
 
   uint8_t rxLevel = data[4U];
 
@@ -311,7 +329,13 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
 
   uint8_t pocsagTXLevel = data[17U];
 
-  m_modemState  = modemState;
+  uint8_t fmTXLevel     = data[18U];
+
+  uint8_t p25TXHang     = data[19U];
+
+  uint8_t nxdnTXHang    = data[20U];
+
+  setMode(modemState);
 
   m_dstarEnable  = dstarEnable;
   m_dmrEnable    = dmrEnable;
@@ -319,6 +343,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
   m_p25Enable    = p25Enable;
   m_nxdnEnable   = nxdnEnable;
   m_pocsagEnable = pocsagEnable;
+  m_fmEnable     = fmEnable;
   m_duplex       = !simplex;
 
   dstarTX.setTXDelay(txDelay);
@@ -335,14 +360,87 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
   dmrIdleRX.setColorCode(colorCode);
 
   ysfTX.setParams(ysfLoDev, ysfTXHang);
+  p25TX.setParams(p25TXHang);
+  nxdnTX.setParams(nxdnTXHang);
 
-  io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, nxdnTXLevel, pocsagTXLevel, txDCOffset, rxDCOffset);
+  io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, nxdnTXLevel, pocsagTXLevel, fmTXLevel, txDCOffset, rxDCOffset);
 
   io.start();
 
   return 0U;
 }
 
+uint8_t CSerialPort::setFMParams1(const uint8_t* data, uint8_t length)
+{
+  if (length < 8U)
+    return 4U;
+
+  uint8_t  speed     = data[0U];;
+  uint16_t frequency = data[1U] * 10U;
+  uint8_t  time      = data[2U];
+  uint8_t  holdoff   = data[3U];
+  uint8_t  highLevel = data[4U];
+  uint8_t  lowLevel  = data[5U];
+
+  bool callAtStart = (data[6U] & 0x01U) == 0x01U;
+  bool callAtEnd   = (data[6U] & 0x02U) == 0x02U;
+  bool callAtLatch = (data[6U] & 0x04U) == 0x04U;
+
+  char callsign[50U];
+  uint8_t n = 0U;
+  for (uint8_t i = 7U; i < length; i++, n++)
+    callsign[n] = data[i];
+  callsign[n] = '\0';
+
+  return fm.setCallsign(callsign, speed, frequency, time, holdoff, highLevel, lowLevel, callAtStart, callAtEnd, callAtLatch);
+}
+
+uint8_t CSerialPort::setFMParams2(const uint8_t* data, uint8_t length)
+{
+  if (length < 6U)
+    return 4U;
+
+  uint8_t  speed     = data[0U];
+  uint16_t frequency = data[1U] * 10U;
+  uint8_t  minTime   = data[2U];
+  uint16_t delay     = data[3U] * 10U;
+  uint8_t  level     = data[4U];
+
+  char ack[50U];
+  uint8_t n = 0U;
+  for (uint8_t i = 5U; i < length; i++, n++)
+    ack[n] = data[i];
+  ack[n] = '\0';
+
+  return fm.setAck(ack, speed, frequency, minTime, delay, level);
+}
+
+uint8_t CSerialPort::setFMParams3(const uint8_t* data, uint8_t length)
+{
+  if (length < 12U)
+    return 4U;
+
+  uint16_t timeout        = data[0U] * 5U;
+  uint8_t  timeoutLevel   = data[1U];
+
+  uint8_t  ctcssFrequency     = data[2U];
+  uint8_t  ctcssHighThreshold = data[3U];
+  uint8_t  ctcssLowThreshold  = data[4U];
+  uint8_t  ctcssLevel         = data[5U];
+
+  uint8_t  kerchunkTime   = data[6U];
+  uint8_t  hangTime       = data[7U];
+
+  bool     useCOS         = (data[8U] & 0x01U) == 0x01U;
+  bool     cosInvert      = (data[8U] & 0x02U) == 0x02U;
+
+  uint8_t  rfAudioBoost   = data[9U];
+  uint8_t  maxDev         = data[10U];
+  uint8_t  rxLevel        = data[11U];
+
+  return fm.setMisc(timeout, timeoutLevel, ctcssFrequency, ctcssHighThreshold, ctcssLowThreshold, ctcssLevel, kerchunkTime, hangTime, useCOS, cosInvert, rfAudioBoost, maxDev, rxLevel);
+}
+
 uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
 {
   if (length < 1U)
@@ -353,7 +451,7 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
   if (modemState == m_modemState)
     return 0U;
 
-  if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K)
+  if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_FM && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K && modemState != STATE_POCSAGCAL && modemState != STATE_FMCAL10K  && modemState != STATE_FMCAL12K && modemState != STATE_FMCAL15K && modemState != STATE_FMCAL20K && modemState != STATE_FMCAL25K && modemState != STATE_FMCAL30K)
     return 4U;
   if (modemState == STATE_DSTAR && !m_dstarEnable)
     return 4U;
@@ -367,6 +465,8 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
     return 4U;
   if (modemState == STATE_POCSAG && !m_pocsagEnable)
     return 4U;
+  if (modemState == STATE_FM && !m_fmEnable)
+    return 4U;
 
   setMode(modemState);
 
@@ -378,157 +478,95 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
   switch (modemState) {
     case STATE_DMR:
       DEBUG1("Mode set to DMR");
-      dstarRX.reset();
-      ysfRX.reset();
-      p25RX.reset();
-      nxdnRX.reset();
-      cwIdTX.reset();
       break;
     case STATE_DSTAR:
       DEBUG1("Mode set to D-Star");
-      dmrIdleRX.reset();
-      dmrDMORX.reset();
-      dmrRX.reset();
-      ysfRX.reset();
-      p25RX.reset();
-      nxdnRX.reset();
-      cwIdTX.reset();
       break;
     case STATE_YSF:
       DEBUG1("Mode set to System Fusion");
-      dmrIdleRX.reset();
-      dmrDMORX.reset();
-      dmrRX.reset();
-      dstarRX.reset();
-      p25RX.reset();
-      nxdnRX.reset();
-      cwIdTX.reset();
       break;
     case STATE_P25:
       DEBUG1("Mode set to P25");
-      dmrIdleRX.reset();
-      dmrDMORX.reset();
-      dmrRX.reset();
-      dstarRX.reset();
-      ysfRX.reset();
-      nxdnRX.reset();
-      cwIdTX.reset();
       break;
     case STATE_NXDN:
       DEBUG1("Mode set to NXDN");
-      dmrIdleRX.reset();
-      dmrDMORX.reset();
-      dmrRX.reset();
-      dstarRX.reset();
-      ysfRX.reset();
-      p25RX.reset();
-      cwIdTX.reset();
       break;
     case STATE_POCSAG:
       DEBUG1("Mode set to POCSAG");
-      dmrIdleRX.reset();
+      break;
-      dmrDMORX.reset();
+    case STATE_FM:
-      dmrRX.reset();
+      DEBUG1("Mode set to FM");
-      dstarRX.reset();
-      ysfRX.reset();
-      p25RX.reset();
-      nxdnRX.reset();
-      cwIdTX.reset();
       break;
     case STATE_DSTARCAL:
       DEBUG1("Mode set to D-Star Calibrate");
-      dmrIdleRX.reset();
-      dmrDMORX.reset();
-      dmrRX.reset();
-      dstarRX.reset();
-      ysfRX.reset();
-      p25RX.reset();
-      nxdnRX.reset();
-      cwIdTX.reset();
       break;
     case STATE_DMRCAL:
       DEBUG1("Mode set to DMR Calibrate");
-      dmrIdleRX.reset();
-      dmrDMORX.reset();
-      dmrRX.reset();
-      dstarRX.reset();
-      ysfRX.reset();
-      p25RX.reset();
-      nxdnRX.reset();
-      cwIdTX.reset();
       break;
     case STATE_RSSICAL:
       DEBUG1("Mode set to RSSI Calibrate");
-      dmrIdleRX.reset();
-      dmrDMORX.reset();
-      dmrRX.reset();
-      dstarRX.reset();
-      ysfRX.reset();
-      p25RX.reset();
-      nxdnRX.reset();
-      cwIdTX.reset();
       break;
     case STATE_LFCAL:
       DEBUG1("Mode set to 80 Hz Calibrate");
-      dmrIdleRX.reset();
-      dmrDMORX.reset();
-      dmrRX.reset();
-      dstarRX.reset();
-      ysfRX.reset();
-      p25RX.reset();
-      nxdnRX.reset();
-      cwIdTX.reset();
       break;
-    case STATE_DMRCAL1K:
+    case STATE_FMCAL10K:
-      DEBUG1("Mode set to DMR BS 1031 Hz Calibrate");
+      DEBUG1("Mode set to FM 10Khz Calibrate");
-      dmrIdleRX.reset();
+      break;
-      dmrDMORX.reset();
+    case STATE_FMCAL12K:
-      dmrRX.reset();
+      DEBUG1("Mode set to FM 12.5Khz Calibrate");
-      dstarRX.reset();
+      break;
-      ysfRX.reset();
+    case STATE_FMCAL15K:
-      p25RX.reset();
+      DEBUG1("Mode set to FM 15Khz Calibrate");
-      nxdnRX.reset();
+      break;
-      cwIdTX.reset();
+    case STATE_FMCAL20K:
+      DEBUG1("Mode set to FM 20Khz Calibrate");
+      break;
+    case STATE_FMCAL25K:
+      DEBUG1("Mode set to FM 10Khz Calibrate");
+      break;
+    case STATE_FMCAL30K:
+      DEBUG1("Mode set to FM 30Khz Calibrate");
       break;
     case STATE_P25CAL1K:
       DEBUG1("Mode set to P25 1011 Hz Calibrate");
-      dmrIdleRX.reset();
-      dmrDMORX.reset();
-      dmrRX.reset();
-      dstarRX.reset();
-      ysfRX.reset();
-      p25RX.reset();
-      nxdnRX.reset();
-      cwIdTX.reset();
       break;
     case STATE_DMRDMO1K:
       DEBUG1("Mode set to DMR MS 1031 Hz Calibrate");
-      dmrIdleRX.reset();
-      dmrDMORX.reset();
-      dmrRX.reset();
-      dstarRX.reset();
-      ysfRX.reset();
-      p25RX.reset();
-      nxdnRX.reset();
-      cwIdTX.reset();
       break;
     case STATE_NXDNCAL1K:
       DEBUG1("Mode set to NXDN 1031 Hz Calibrate");
-      dmrIdleRX.reset();
-      dmrDMORX.reset();
-      dmrRX.reset();
-      dstarRX.reset();
-      ysfRX.reset();
-      p25RX.reset();
-      nxdnRX.reset();
-      cwIdTX.reset();
       break;
-    default:
+    case STATE_POCSAGCAL:
+      DEBUG1("Mode set to POCSAG Calibrate");
+      break;
+    default:        // STATE_IDLE
       DEBUG1("Mode set to Idle");
-      // STATE_IDLE
       break;
   }
 
+  if (modemState != STATE_DSTAR)
+    dstarRX.reset();
+
+  if (modemState != STATE_DMR) {
+    dmrIdleRX.reset();
+    dmrDMORX.reset();
+    dmrRX.reset();
+  }
+
+  if (modemState != STATE_YSF)
+    ysfRX.reset();
+
+  if (modemState != STATE_P25)
+    p25RX.reset();
+
+  if (modemState != STATE_NXDN)
+    nxdnRX.reset();
+
+  if (modemState != STATE_FM)
+    fm.reset();
+
+  cwIdTX.reset();
+
   m_modemState = modemState;
 
   io.setMode();
@@ -554,8 +592,7 @@ void CSerialPort::process()
         m_buffer[0U] = c;
         m_ptr = 1U;
         m_len = 0U;
-      }
+      } else {
-      else {
         m_ptr = 0U;
         m_len = 0U;
       }
@@ -601,15 +638,49 @@ void CSerialPort::process()
             sendACK();
             break;
 
+          case MMDVM_FM_PARAMS1:
+            err = setFMParams1(m_buffer + 3U, m_len - 3U);
+            if (err == 0U) {
+              sendACK();
+            } else {
+              DEBUG2("Received invalid FM params 1", err);
+              sendNAK(err);
+            }
+            break;
+
+          case MMDVM_FM_PARAMS2:
+            err = setFMParams2(m_buffer + 3U, m_len - 3U);
+            if (err == 0U) {
+              sendACK();
+            } else {
+              DEBUG2("Received invalid FM params 2", err);
+              sendNAK(err);
+            }
+            break;
+
+          case MMDVM_FM_PARAMS3:
+            err = setFMParams3(m_buffer + 3U, m_len - 3U);
+            if (err == 0U) {
+              sendACK();
+            } else {
+              DEBUG2("Received invalid FM params 3", err);
+              sendNAK(err);
+            }
+            break;
+
           case MMDVM_CAL_DATA:
             if (m_modemState == STATE_DSTARCAL)
               err = calDStarTX.write(m_buffer + 3U, m_len - 3U);
             if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K || m_modemState == STATE_DMRDMO1K)
               err = calDMR.write(m_buffer + 3U, m_len - 3U);
+            if (m_modemState == STATE_FMCAL10K || m_modemState == STATE_FMCAL12K || m_modemState == STATE_FMCAL15K || m_modemState == STATE_FMCAL20K || m_modemState == STATE_FMCAL25K || m_modemState == STATE_FMCAL30K)
+              err = calFM.write(m_buffer + 3U, m_len - 3U);
             if (m_modemState == STATE_P25CAL1K)
               err = calP25.write(m_buffer + 3U, m_len - 3U);
             if (m_modemState == STATE_NXDNCAL1K)
               err = calNXDN.write(m_buffer + 3U, m_len - 3U);
+            if (m_modemState == STATE_POCSAGCAL)
+              err = calPOCSAG.write(m_buffer + 3U, m_len - 3U);
             if (err == 0U) {
               sendACK();
             } else {
@@ -814,6 +885,7 @@ void CSerialPort::process()
             break;
 
           case MMDVM_TRANSPARENT:
+          case MMDVM_QSO_INFO:
             // Do nothing on the MMDVM.
             break;
 

SerialPort.h

@@ -73,6 +73,9 @@ private:
   uint8_t setConfig(const uint8_t* data, uint8_t length);
   uint8_t setMode(const uint8_t* data, uint8_t length);
   void    setMode(MMDVM_STATE modemState);
+  uint8_t setFMParams1(const uint8_t* data, uint8_t length);
+  uint8_t setFMParams2(const uint8_t* data, uint8_t length);
+  uint8_t setFMParams3(const uint8_t* data, uint8_t length);
 
   // Hardware versions
   void    beginInt(uint8_t n, int speed);
@@ -83,4 +86,3 @@ private:
 };
 
 #endif
-

SerialRB.h

@@ -32,7 +32,7 @@ Boston, MA  02110-1301, USA.
 #include <Arduino.h>
 #endif
 
-const uint16_t SERIAL_RINGBUFFER_SIZE = 2000U;
+const uint16_t SERIAL_RINGBUFFER_SIZE = 370U;
 
 class CSerialRB {
 public:

SerialSTM.cpp

@@ -28,13 +28,13 @@ Pin definitions:
 
 - Host communication:
 USART1 - TXD PA9  - RXD PA10 (MMDVM-Pi board, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board)
-USART2 - TXD PA2  - RXD PA3  (Nucleo64 F446RE board, Morpho or Arduino header)
+USART2 - TXD PA2  - RXD PA3  (Nucleo64 F446RE board, Morpho or Arduino header, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
 USART3 - TXD PC10 - RXD PC11 (Discovery board)
 USART3 - TXD PD8  - RXD PD9  (Nucleo144 F767ZI board)
 
 - Serial repeater:
 USART1 - TXD PA9  - RXD PA10 (Nucleo with Arduino header)
-UART5  - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI)
+UART5  - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
 */
 
 #if defined(STM32F4XX) || defined(STM32F7XX)
@@ -50,7 +50,7 @@ extern "C" {
 }
 
 /* ************* USART1 ***************** */
-#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
+#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM)
 
 volatile uint8_t  TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
 volatile uint8_t  RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
@@ -241,7 +241,7 @@ void WriteUSART1(const uint8_t* data, uint16_t length)
 #endif
 
 /* ************* USART2 ***************** */
-#if defined(STM32F4_NUCLEO)
+#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) || defined(DRCC_DVM)
 
 volatile uint8_t  TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
 volatile uint8_t  RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
@@ -841,15 +841,19 @@ void CSerialPort::beginInt(uint8_t n, int speed)
       case 1U:
          #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
          InitUSART3(speed);
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
          InitUSART1(speed);
-         #elif defined(STM32F4_NUCLEO)
+         #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          InitUSART2(speed);
+         #elif defined(DRCC_DVM)
+         InitUSART1(speed);
          #endif
          break;
       case 3U:
          #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
          InitUSART1(speed);
+         #elif defined(DRCC_DVM)
+         InitUSART2(speed);
          #else
          InitUART5(speed);
          #endif
@@ -865,14 +869,18 @@ int CSerialPort::availableInt(uint8_t n)
       case 1U:
          #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
          return AvailUSART3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
          return AvailUSART1();
-         #elif defined(STM32F4_NUCLEO)
+         #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          return AvailUSART2();
+         #elif defined(DRCC_DVM)
+         return AvailUSART1();
          #endif
       case 3U:
          #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
          return AvailUSART1();
+         #elif defined(DRCC_DVM)
+         return AvailUSART2();
          #else
          return AvailUART5();
          #endif
@@ -887,14 +895,18 @@ int CSerialPort::availableForWriteInt(uint8_t n)
       case 1U:
          #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
          return AvailForWriteUSART3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
          return AvailForWriteUSART1();
-         #elif defined(STM32F4_NUCLEO)
+         #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          return AvailForWriteUSART2();
+         #elif defined(DRCC_DVM)
+         return AvailForWriteUSART1();
          #endif
       case 3U:
          #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
          return AvailForWriteUSART1();
+         #elif defined(DRCC_DVM)
+         return AvailForWriteUSART2();
          #else
          return AvailForWriteUART5();
          #endif
@@ -909,14 +921,18 @@ uint8_t CSerialPort::readInt(uint8_t n)
       case 1U:
          #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
          return ReadUSART3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
          return ReadUSART1();
-         #elif defined(STM32F4_NUCLEO)
+         #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          return ReadUSART2();
+         #elif defined(DRCC_DVM)
+         return ReadUSART1();
          #endif
       case 3U:
          #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
          return ReadUSART1();
+         #elif defined(DRCC_DVM)
+         return ReadUSART2();
          #else
          return ReadUART5();
          #endif
@@ -933,14 +949,18 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
          WriteUSART3(data, length);
          if (flush)
             TXSerialFlush3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
+         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
          WriteUSART1(data, length);
          if (flush)
             TXSerialFlush1();
-         #elif defined(STM32F4_NUCLEO)
+         #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          WriteUSART2(data, length);
          if (flush)
             TXSerialFlush2();
+         #elif defined(DRCC_DVM)
+         WriteUSART1(data, length);
+         if (flush)
+            TXSerialFlush1();
          #endif
          break;
       case 3U:
@@ -948,6 +968,10 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
          WriteUSART1(data, length);
          if (flush)
             TXSerialFlush1();
+         #elif defined(DRCC_DVM)
+         WriteUSART2(data, length);
+         if (flush)
+            TXSerialFlush2();
          #else
          WriteUART5(data, length);
          if (flush)

Tools/FMGenerateFilterCoefficients.py

@@ -0,0 +1,46 @@
+# based on https://github.com/berndporr/iir_fixed_point/blob/master/gen_coeff.py
+
+import numpy as np
+import scipy.signal as signal
+import pylab as pl
+
+# Calculate the coefficients for a pure fixed point
+# integer filter
+
+# sampling rate
+fs = 24000
+
+# cutoffs
+f1 = 300
+f2 = 2700
+# ripple
+rp = 0.2
+
+# scaling factor in bits, do not change !
+q = 0
+# scaling factor as facor...
+scaling_factor = 2**q
+
+# let's generate a sequence of 2nd order IIR filters
+sos = signal.cheby1(3,rp,[f1, f2],'bandpass', output='sos', fs=fs)
+#sos = signal.cheby1(1, rp, 2122, 'lowpass', output='sos', fs=fs) #deemphasis filter
+#sos = signal.cheby1(1, rp, 2122, 'highpass', output='sos', fs=fs) #deemphasis filter
+
+#sos = np.round((sos) * scaling_factor)
+
+# print coefficients
+for biquad in sos:
+    for coeff in biquad:
+        #print(int(coeff),",",sep="",end="")
+        print((coeff),",",sep="",end="")
+    print("")
+
+# plot the frequency response
+b,a = signal.sos2tf(sos)
+w,h = signal.freqz(b,a)
+pl.plot(w/np.pi/2*fs,20*np.log(np.abs(h)))
+pl.xlabel('frequency/Hz');
+pl.ylabel('gain/dB');
+pl.ylim(top=1,bottom=-20);
+pl.xlim(left=250, right=12000);
+pl.show()

Tools/emphasis.txt

@@ -0,0 +1,58 @@
+% GNU Octave script to generate pre and deemphasis filters
+% https://dsp.stackexchange.com/questions/34605/biquad-cookbook-formula-for-broadcast-fm-de-emphasis
+% PACKAGES
+
+pkg load control
+pkg load signal
+
+clear all;
+clc;
+
+fs = 24000;
+samplingtime = 1/fs;
+
+% analog prototype
+A2 = [1];
+B2 = [0.000075 1];
+
+% Pre
+Ds = tf(B2, A2);
+% De
+% Ds = tf(A2, B2);
+ 
+Ds = Ds/dcgain(Ds);
+
+% MZT
+T1 = 0.000075; % 75us
+z1 = -exp(-1.0/(fs*T1));
+p1 = 1+z1;
+
+a0 = 1.0;
+a1 = p1;
+a2 = 0;
+
+b0 = 1.0;
+b1 = z1;
+b2 = 0;
+
+% swap between a1, b1 to select pre- or de-emphasis
+
+# Pre
+Bmzt = [b0 a1 b2]
+Amzt = [a0 b1 a2]
+% De
+% Bmzt = [b0 b1 b2]
+% Amzt = [a0 a1 a2]
+
+DzMZT = tf(Amzt, Bmzt, samplingtime);
+DzMZT = DzMZT/dcgain(DzMZT);
+
+%% Plot
+wmin = 2 * pi * 20.0; % 20Hz
+wmax = 2 * pi * ((fs/2.0) - (fs/2 - 20000)); %20kHz
+
+figure(1);
+bode(Ds, 'b', DzMZT, 'c', {wmin, wmax});
+legend('Analog prototype', 'MZT 2nd order','location', 'northwest');
+grid on;
+pause();

YSFTX.cpp

@@ -44,7 +44,7 @@ const uint8_t YSF_END_SYNC   = 0xFFU;
 const uint8_t YSF_HANG       = 0x00U;
 
 CYSFTX::CYSFTX() :
-m_buffer(4000U),
+m_buffer(TX_BUFFER_LEN),
 m_modFilter(),
 m_modState(),
 m_poBuffer(),
@@ -66,9 +66,6 @@ m_txCount(0U)
 
 void CYSFTX::process()
 {
-  if (m_buffer.getData() == 0U && m_poLen == 0U && m_txCount == 0U)
-    return;
-
   // If we have YSF data to transmit, do so.
   if (m_poLen == 0U && m_buffer.getData() > 0U) {
     if (!m_tx) {
@@ -191,4 +188,3 @@ void CYSFTX::setParams(bool on, uint8_t txHang)
   m_loDev  = on;
   m_txHang = txHang * 1200U;
 }
-

mmdvmmenu.sh

@@ -83,7 +83,7 @@ EOF
     "3")  sed -e 's/\/\/ #define EXTERNAL_OSC 14400000/#define EXTERNAL_OSC 14400000/'     $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "14.400 MHz clock enabled";;
     "4")  sed -e 's/\/\/ #define EXTERNAL_OSC 19200000/#define EXTERNAL_OSC 19200000/'     $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "19.200 MHz clock enabled";;
     "5")  sed -e 's/\/\/ #define USE_COS_AS_LOCKOUT /#define USE_COS_AS_LOCKOUT/'          $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "COS as Lockout enabled";;
-    "6")  sed -e 's/\/\/ #define MODE_PINS/#define MODE_PINS/'             $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Mode pins enabled";;
+    "6")  sed -e 's/\/\/ #define MODE_LEDS/#define MODE_LEDS/'             $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Mode pins enabled";;
     "7")  sed -e 's/\/\/ #define ARDUINO_DUE_PAPA/#define ARDUINO_DUE_PAPA/'               $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for the PAPA board enabled";;
     "8")  sed -e 's/\/\/ #define ARDUINO_DUE_ZUM_V10/#define ARDUINO_DUE_ZUM_V10/'         $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for ZUM V1.0 and V1.0.1 boards enabled";;
     "9")  sed -e 's/\/\/ #define ARDUINO_DUE_NTH/#define ARDUINO_DUE_NTH/'                 $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for SP8NTH board enabled";;

pins/pins_f4_discovery.h

@@ -0,0 +1,96 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_DISCOVERY_H
+#define _PINS_F4_DISCOVERY_H
+
+/*
+Pin definitions for STM32F4 Discovery Board:
+
+PTT      PB13   output           P1 Pin37
+COSLED   PA7    output           P1 Pin17
+LED      PD15   output           P1 Pin47
+COS      PA5    input            P1 Pin15
+
+DSTAR    PD12   output           P1 Pin44
+DMR      PD13   output           P1 Pin45
+YSF      PD14   output           P1 Pin46
+P25      PD11   output           P1 Pin43
+NXDN     PD10   output           P1 Pin42
+
+RX       PA0    analog input     P1 Pin12
+RSSI     PA1    analog input     P1 Pin11
+TX       PA4    analog output    P1 Pin16
+
+EXT_CLK  PA15   input            P2 Pin40
+*/
+
+#define PIN_COS           GPIO_Pin_5
+#define PORT_COS          GPIOA
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOA
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_7
+#define PORT_COSLED       GPIOA
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOA
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOD
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOD
+
+#define PIN_P25           GPIO_Pin_11
+#define PORT_P25          GPIOD
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOD
+
+#define PIN_NXDN          GPIO_Pin_10
+#define PORT_NXDN         GPIOD
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOD
+
+#define PIN_DSTAR         GPIO_Pin_12
+#define PORT_DSTAR        GPIOD
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOD
+
+#define PIN_DMR           GPIO_Pin_13
+#define PORT_DMR          GPIOD
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOD
+
+#define PIN_YSF           GPIO_Pin_14
+#define PORT_YSF          GPIOD
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOD
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_drcc_nqf.h

@@ -0,0 +1,144 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_DRCC_NQF_H
+#define _PINS_F4_DRCC_NQF_H
+
+/*
+Pin definitions for DRCC_DVM BG7NQF  board rev1
+
+TX/PTT_LED  PB12   output
+RX/COS_LED  PB5    output
+STATUS_LED  PB10   output
+
+COS_IN      PB13   input
+
+DSTAR       N/A
+DMR         N/A
+YSF         N/A
+P25         N/A
+NXDN        N/A
+POCSAG      N/A
+
+MDMR/BIT0   PB8    output
+MYSF/BIT1   PB9    output
+MDSTAR/BIT2 PB14   output
+MP25/BIT3   PB15   output          Generic Mode Pins
+MNXDN       N/A
+MPOCSAG     N/A
+
+RX          PA0    analog input
+RSSI        PA1    analog input
+TX          PA4    analog output
+
+EXT_CLK     PA15   input
+
+UART1_TX    PA9    output
+UART1_RX    PA10   output          Host Data Communication
+
+UART2_TX    PA2    output
+UART2_RX    PA3    output          Nextion Data Communication
+
+I2C1_SCL    PB6    output
+I2C1_SDA    PB7    output          OLED Data Communication as master
+
+*/
+
+#define PIN_COS           GPIO_Pin_13
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_12
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_5
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_10
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_TXLED         GPIO_Pin_4
+#define PORT_TXLED        GPIOB
+#define RCC_Per_TXLED     RCC_AHB1Periph_GPIOB
+
+// #define PIN_P25           GPIO_Pin_3
+// #define PORT_P25          GPIOB
+// #define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+// #define PIN_NXDN          GPIO_Pin_10
+// #define PORT_NXDN         GPIOA
+// #define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+// #define PIN_POCSAG        GPIO_Pin_12
+// #define PORT_POCSAG       GPIOB
+// #define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+// #define PIN_DSTAR         GPIO_Pin_10
+// #define PORT_DSTAR        GPIOB
+// #define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+// #define PIN_DMR           GPIO_Pin_4
+// #define PORT_DMR          GPIOB
+// #define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+// #define PIN_YSF           GPIO_Pin_5
+// #define PORT_YSF          GPIOB
+// #define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_15
+#define PORT_MP25         GPIOB
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOB
+
+#define PIN_MDSTAR        GPIO_Pin_9
+#define PORT_MDSTAR       GPIOB
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOB
+
+#define PIN_MDMR          GPIO_Pin_8
+#define PORT_MDMR         GPIOB
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOB
+
+#define PIN_MYSF          GPIO_Pin_14
+#define PORT_MYSF         GPIOB
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOB
+
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+#define PORT_TX           GPIOA
+#define RCC_Per_TX        RCC_AHB1Periph_GPIOA
+
+#endif

pins/pins_f4_f4m.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_F4M_H
+#define _PINS_F4_F4M_H
+
+/*
+Pin definitions for MMDVM-F4M Pi-Hat F0DEI board:
+
+PTT      PB13   output
+COSLED   PB14   output
+LED      PB15   output
+COS      PC0    input
+
+DSTAR    PC7    output
+DMR      PC8    output
+YSF      PA8    output
+P25      PC9    output
+NXDN     PB1    output
+POCSAG   PB12   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_9
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_1
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_7
+#define PORT_DSTAR        GPIOC
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
+
+#define PIN_DMR           GPIO_Pin_8
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_8
+#define PORT_YSF          GPIOA
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_nucleo_arduino.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_NUCLEO_ARDUINO_H
+#define _PINS_F4_NUCLEO_ARDUINO_H
+
+/*
+Pin definitions for STM32F4 Nucleo boards (Arduino header):
+
+PTT      PB10   output           CN9 Pin7
+COSLED   PB3    output           CN9 Pin4
+LED      PB5    output           CN9 Pin5
+COS      PB4    input            CN9 Pin6
+
+DSTAR    PA1    output           CN8 Pin2
+DMR      PA4    output           CN8 Pin3
+YSF      PB0    output           CN8 Pin4
+P25      PC1    output           CN8 Pin5
+NXDN     PA3    output           CN9 Pin1
+POCSAG   PB12   output
+
+RX       PA0    analog input     CN8 Pin1
+RSSI     PC0    analog input     CN8 Pin6
+TX       PA5    analog output    CN5 Pin6
+
+EXT_CLK  PB8    input            CN5 Pin10
+*/
+
+#define PIN_COS           GPIO_Pin_4
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_10
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_3
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_5
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_1
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_3
+#define PORT_NXDN         GPIOA
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_1
+#define PORT_DSTAR        GPIOA
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOA
+
+#define PIN_DMR           GPIO_Pin_4
+#define PORT_DMR          GPIOA
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOA
+
+#define PIN_YSF           GPIO_Pin_0
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#define PIN_EXT_CLK       GPIO_Pin_8
+#define SRC_EXT_CLK       GPIO_PinSource8
+#define PORT_EXT_CLK      GPIOB
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_0
+#define PIN_RSSI_CH       ADC_Channel_10
+#define PORT_RSSI         GPIOC
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOC
+
+#define PIN_TX            GPIO_Pin_5
+#define PIN_TX_CH         DAC_Channel_2
+
+#endif

pins/pins_f4_nucleo_morpho.h

@@ -0,0 +1,134 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_NUCLEO_MORPHO_H
+#define _PINS_F4_NUCLEO_MORPHO_H
+
+/*
+Pin definitions for STM32F4 Nucleo boards (ST Morpho header):
+
+PTT      PB13   output           CN10 Pin30
+COSLED   PB14   output           CN10 Pin28
+LED      PA5    output           CN10 Pin11
+COS      PB15   input            CN10 Pin26
+
+DSTAR    PB10   output           CN10 Pin25
+DMR      PB4    output           CN10 Pin27
+YSF      PB5    output           CN10 Pin29
+P25      PB3    output           CN10 Pin31
+NXDN     PA10   output           CN10 Pin33
+POCSAG   PB12   output           CN10 Pin16
+
+MDSTAR   PC4    output           CN10 Pin34
+MDMR     PC5    output           CN10 Pin6
+MYSF     PC2    output           CN7 Pin35
+MP25     PC3    output           CN7 Pin37
+MNXDN    PC6    output           CN10 Pin4
+MPOCSAG  PC8    output           CN10 Pin2
+
+RX       PA0    analog input     CN7 Pin28
+RSSI     PA1    analog input     CN7 Pin30
+TX       PA4    analog output    CN7 Pin32
+
+EXT_CLK  PA15   input            CN7 Pin17
+*/
+
+#define PIN_COS           GPIO_Pin_15
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_5
+#define PORT_LED          GPIOA
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
+
+#define PIN_P25           GPIO_Pin_3
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_10
+#define PORT_NXDN         GPIOA
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_10
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_4
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_5
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_3
+#define PORT_MP25         GPIOC
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
+
+#define PIN_MNXDN         GPIO_Pin_6
+#define PORT_MNXDN        GPIOC
+#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
+
+#define PIN_MDSTAR        GPIO_Pin_4
+#define PORT_MDSTAR       GPIOC
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
+
+#define PIN_MDMR          GPIO_Pin_5
+#define PORT_MDMR         GPIOC
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
+
+#define PIN_MYSF          GPIO_Pin_2
+#define PORT_MYSF         GPIOC
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
+
+#define PIN_MPOCSAG       GPIO_Pin_8
+#define PORT_MPOCSAG      GPIOC
+#define RCC_Per_MPOCSAG   RCC_AHB1Periph_GPIOC
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_pi.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_PI_H
+#define _PINS_F4_PI_H
+
+/*
+Pin definitions for STM32F4 Pi Board:
+
+PTT      PB13   output
+COSLED   PB14   output
+LED      PB15   output
+COS      PC0    input
+
+DSTAR    PC7    output
+DMR      PC8    output
+YSF      PA8    output
+P25      PC9    output
+NXDN     PB1    output
+POCSAG   PB12   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_9
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_1
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_7
+#define PORT_DSTAR        GPIOC
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
+
+#define PIN_DMR           GPIO_Pin_8
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_8
+#define PORT_YSF          GPIOA
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_rpt_tgo.h

@@ -0,0 +1,134 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_RPT_TGO_H
+#define _PINS_F4_RPT_TGO_H
+
+/*
+Pin definitions for MMDVM_RPT_Hat Pi-Hat BG4TGO  board::
+
+PTT      PB13   output           CN10 Pin30
+COSLED   PB14   output           CN10 Pin28
+LED      PA5    output           CN10 Pin11
+COS      PB15   input            CN10 Pin26
+
+DSTAR    PB10   output           CN10 Pin25
+DMR      PB4    output           CN10 Pin27
+YSF      PB5    output           CN10 Pin29
+P25      PB3    output           CN10 Pin31
+NXDN     PA10   output           CN10 Pin33
+POCSAG   PB12   output           CN10 Pin16
+
+MDSTAR   PC4    output           CN10 Pin34
+MDMR     PC5    output           CN10 Pin6
+MYSF     PC2    output           CN7 Pin35
+MP25     PC3    output           CN7 Pin37
+MNXDN    PC6    output           CN10 Pin4
+MPOCSAG  PC8    output           CN10 Pin2
+
+RX       PA0    analog input     CN7 Pin28
+RSSI     PA1    analog input     CN7 Pin30
+TX       PA4    analog output    CN7 Pin32
+
+EXT_CLK  PA15   input            CN7 Pin17
+*/
+
+#define PIN_COS           GPIO_Pin_15
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_5
+#define PORT_LED          GPIOA
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
+
+#define PIN_P25           GPIO_Pin_3
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_10
+#define PORT_NXDN         GPIOA
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_10
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_4
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_5
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_3
+#define PORT_MP25         GPIOC
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
+
+#define PIN_MNXDN         GPIO_Pin_6
+#define PORT_MNXDN        GPIOC
+#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
+
+#define PIN_MDSTAR        GPIO_Pin_4
+#define PORT_MDSTAR       GPIOC
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
+
+#define PIN_MDMR          GPIO_Pin_5
+#define PORT_MDMR         GPIOC
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
+
+#define PIN_MYSF          GPIO_Pin_2
+#define PORT_MYSF         GPIOC
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
+
+#define PIN_MPOCSAG       GPIO_Pin_8
+#define PORT_MPOCSAG      GPIOC
+#define RCC_Per_MPOCSAG   RCC_AHB1Periph_GPIOC
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_stm32dvm_v3.h

@@ -0,0 +1,102 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_STM32DVM_V3_H
+#define _PINS_F4_STM32DVM_V3_H
+
+/*
+Pin definitions for STM32F4 STM32-DVM rev 3 Board:
+
+COS      PB13   input
+PTT      PB12   output
+COSLED   PB4    output
+LED      PB3    output
+
+P25      PB8    output
+NXDN     PB9    output
+DSTAR    PB6    output
+DMR      PB5    output
+YSF      PB7    output
+POCSAG   PC10   output
+
+RX       PB0    analog input
+RSSI     PB1    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_13
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+
+#define PIN_PTT           GPIO_Pin_12
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_4
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_3
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_8
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_9
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_6
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_5
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_7
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_10
+#define PORT_POCSAG       GPIOC
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOC
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_8
+#define PORT_RX           GPIOB
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOB
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_9
+#define PORT_RSSI         GPIOB
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOB
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f7_f7m.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_F7M_H
+#define _PINS_F7_F7M_H
+
+/*
+Pin definitions for MMDVM-F7M Pi-Hat F0DEI board:
+
+PTT      PB13   output
+COSLED   PB14   output
+LED      PB15   output
+COS      PC0    input
+
+DSTAR    PC7    output
+DMR      PC8    output
+YSF      PA8    output
+P25      PC9    output
+NXDN     PB1    output
+POCSAG   PB12   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_9
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_1
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_7
+#define PORT_DSTAR        GPIOC
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
+
+#define PIN_DMR           GPIO_Pin_8
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_8
+#define PORT_YSF          GPIOA
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f7_nucleo.h

@@ -0,0 +1,129 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_NUCLEO_H
+#define _PINS_F7_NUCLEO_H
+
+/*
+Pin definitions for STM32F7 Nucleo boards (ST Morpho header):
+
+PTT      PB13   output           CN12 Pin30
+COSLED   PB14   output           CN12 Pin28
+LED      PA5    output           CN12 Pin11
+COS      PB15   input            CN12 Pin26
+
+DSTAR    PB10   output           CN12 Pin25
+DMR      PB4    output           CN12 Pin27
+YSF      PB5    output           CN12 Pin29
+P25      PB3    output           CN12 Pin31
+NXDN     PA10   output           CN12 Pin33
+POCSAG   PB12   output           CN12 Pin16
+
+MDSTAR   PC4    output           CN12 Pin34
+MDMR     PC5    output           CN12 Pin6
+MYSF     PC2    output           CN11 Pin35
+MP25     PC3    output           CN11 Pin37
+MNXDN    PC6    output           CN12 Pin4
+
+RX       PA0    analog input     CN11 Pin28
+RSSI     PA1    analog input     CN11 Pin30
+TX       PA4    analog output    CN11 Pin32
+
+EXT_CLK  PA15   input            CN11 Pin17
+*/
+
+#define PIN_COS           GPIO_Pin_15
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_5
+#define PORT_LED          GPIOA
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
+
+#define PIN_P25           GPIO_Pin_3
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_10
+#define PORT_NXDN         GPIOA
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_10
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_4
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_5
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_3
+#define PORT_MP25         GPIOC
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
+
+#define PIN_MNXDN         GPIO_Pin_6
+#define PORT_MNXDN        GPIOC
+#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
+
+#define PIN_MDSTAR        GPIO_Pin_4
+#define PORT_MDSTAR       GPIOC
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
+
+#define PIN_MDMR          GPIO_Pin_5
+#define PORT_MDMR         GPIOC
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
+
+#define PIN_MYSF          GPIO_Pin_2
+#define PORT_MYSF         GPIOC
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f7_pi.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_PI_H
+#define _PINS_F7_PI_H
+
+/*
+Pin definitions for STM32F722 Pi Board:
+
+PTT      PB13   output
+COSLED   PB14   output
+LED      PB15   output
+COS      PC0    input
+
+DSTAR    PC7    output
+DMR      PC8    output
+YSF      PA8    output
+P25      PC9    output
+NXDN     PB1    output
+POCSAG   PB12   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_9
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_1
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_7
+#define PORT_DSTAR        GPIOC
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
+
+#define PIN_DMR           GPIO_Pin_8
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_8
+#define PORT_YSF          GPIOA
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f7_rpt_hat.h

@@ -0,0 +1,144 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_RPT_HAT_H
+#define _PINS_F7_RPT_HAT_H
+
+/*
+Pin definitions for MMDVM_RPT_Hat Pi-Hat F0DEI DB9MAT DF2ET board:
+
+PTT      PB14   output
+COSLED   PB13   output
+LED      PB12   output
+COS      PC0    input
+
+DSTAR    PB15   output
+DMR      PC6    output
+YSF      PC7    output
+P25      PC8    output
+NXDN     PC9    output
+POCSAG   PA8    output
+FM       PA11   output
+
+MDSTAR   PC1    output
+MDMR     PC2    output
+MYSF     PC3    output
+MP25     PC4    output
+MNXDN    PC10   output
+MPOCSAG  PC11   output
+MFM      PC13   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_14
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_13
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_12
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_8
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_9
+#define PORT_NXDN         GPIOC
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOC
+
+#define PIN_POCSAG        GPIO_Pin_8
+#define PORT_POCSAG       GPIOA
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOA
+
+#define PIN_FM            GPIO_Pin_11
+#define PORT_FM           GPIOA
+#define RCC_Per_FM        RCC_AHB1Periph_GPIOA
+
+#define PIN_DSTAR         GPIO_Pin_15
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_6
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_7
+#define PORT_YSF          GPIOC
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOC
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_4
+#define PORT_MP25         GPIOC
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
+
+#define PIN_MNXDN         GPIO_Pin_10
+#define PORT_MNXDN        GPIOC
+#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
+
+#define PIN_MDSTAR        GPIO_Pin_1
+#define PORT_MDSTAR       GPIOC
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
+
+#define PIN_MDMR          GPIO_Pin_2
+#define PORT_MDMR         GPIOC
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
+
+#define PIN_MYSF          GPIO_Pin_3
+#define PORT_MYSF         GPIOC
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
+
+#define PIN_MPOCSAG       GPIO_Pin_11
+#define PORT_MPOCSAG      GPIOC
+#define RCC_Per_MPOCSAG   RCC_AHB1Periph_GPIOC
+
+#define PIN_MFM           GPIO_Pin_13
+#define PORT_MFM          GPIOC
+#define RCC_Per_MFM       RCC_AHB1Periph_GPIOC
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif