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77 Commits
Author SHA1 Message Date
Jonathan Naylor d2061e05ac Merge branch 'FM' into boxcar_fm 2020-05-21 10:57:53 +01:00
Jonathan Naylor 2cf2ce4dfa Fix the TX Hang handling. 2020-05-20 15:16:12 +01:00
Jonathan Naylor 5f29808b80 Set the COS LED correctly. 2020-05-19 12:09:44 +01:00
Jonathan Naylor 063b21f999 Try and make the closing callsign appear. 2020-05-18 11:09:56 +01:00
Jonathan Naylor 89b8641955 Merge pull request #278 from shawnchain/drcc_serial_bugfix
Drcc serial bugfix
2020-05-18 06:34:09 +01:00
Shawn Chain 6397c720e8 Generate bin map file for analysis 2020-05-18 12:19:22 +08:00
Shawn Chain 50c1e5aa3f update pin defs for drcc/nqf board 2020-05-18 12:18:44 +08:00
Shawn Chain 970d02773f Fix serial no write bug on DRCC board 2020-05-18 12:18:17 +08:00
Jonathan Naylor ff375abb0e Hold off the mode change until the ack and callsign have been
transmitted.
2020-05-14 12:10:37 +01:00
Jonathan Naylor 230c26ac4f Merge branch 'FM' into boxcar_fm 2020-05-13 12:03:41 +01:00
Jonathan Naylor c3db2cd730 Merge branch 'FM' into boxcar_fm 2020-05-13 10:31:46 +01:00
Jonathan Naylor fe2846a894 Merge branch 'FM' into boxcar_fm 2020-05-12 15:19:45 +01:00
Jonathan Naylor 273e4f63aa Merge branch 'FM' into boxcar_fm 2020-05-06 11:34:36 +01:00
Jonathan Naylor ef26b598f9 Merge branch 'FM' into boxcar_fm 2020-05-05 21:03:49 +01:00
Jonathan Naylor 341bfe4815 Merge branch 'FM' into boxcar_fm 2020-05-02 17:53:04 +01:00
Jonathan Naylor a53b3656ff Merge branch 'FM' into boxcar_fm 2020-05-02 16:52:01 +01:00
Jonathan Naylor 5dade9c1d9 Merge branch 'FM' into boxcar_fm 2020-05-01 18:47:43 +01:00
Jonathan Naylor bcd71edd90 Merge branch 'FM' into boxcar_fm 2020-04-29 21:51:44 +01:00
Jonathan Naylor ace9780b1f Merge branch 'FM' into boxcar_fm 2020-04-29 21:34:53 +01:00
Jonathan Naylor 0aace49867 Merge branch 'master' into boxcar 2020-04-29 21:29:22 +01:00
Jonathan Naylor ac7bd9d2fd Merge branch 'master' into boxcar 2019-07-15 09:11:40 +01:00
Jonathan Naylor c06a32af07 Merge branch 'master' into boxcar 2019-05-19 13:26:55 +01:00
Jonathan Naylor b40701a8e6 Merge branch 'master' into boxcar 2019-01-31 08:10:38 +00:00
Jonathan Naylor 608a10d159 Merge branch 'master' into boxcar 2018-10-31 14:50:47 +00:00
Jonathan Naylor 7ef6708d9d Merge branch 'master' into boxcar 2018-10-14 17:21:20 +01:00
Jonathan Naylor a0706c9fd4 Merge branch 'master' into boxcar 2018-09-18 09:29:47 +01:00
Jonathan Naylor 21cd848064 Merge branch 'master' into boxcar 2018-09-02 13:12:50 +01:00
Jonathan Naylor a69d1adaf0 Merge branch 'master' into boxcar 2018-07-24 19:14:27 +01:00
Jonathan Naylor 2eff3090a9 Merge branch 'master' into boxcar 2018-07-23 21:54:22 +01:00
Jonathan Naylor ce51b8daa8 Merge branch 'master' into boxcar 2018-07-23 17:48:34 +01:00
Jonathan Naylor aa70be0973 Merge branch 'master' into boxcar 2018-07-19 18:21:57 +01:00
Jonathan Naylor cadbfaa546 Merge branch 'master' into boxcar 2018-07-13 08:10:34 +01:00
Jonathan Naylor bd413d2e05 Merge branch 'master' into boxcar 2018-07-05 18:45:01 +01:00
Jonathan Naylor 7ab774d941 Merge branch 'master' into boxcar 2018-07-05 18:31:46 +01:00
Jonathan Naylor 1a1f721b3f Merge branch 'master' into boxcar 2018-06-04 20:51:25 +01:00
Jonathan Naylor bed9665b3a Merge branch 'master' into boxcar 2018-05-15 18:32:55 +01:00
Jonathan Naylor 056016c022 Merge branch 'master' into boxcar 2018-05-14 18:45:54 +01:00
Jonathan Naylor a582cbe1e3 Merge branch 'master' into boxcar 2018-04-30 17:59:33 +01:00
Jonathan Naylor 7454a08e4a Merge branch 'master' into boxcar 2018-04-17 22:33:56 +01:00
Jonathan Naylor 0fc3e8182d Merge branch 'master' into boxcar 2018-03-27 21:36:30 +01:00
Jonathan Naylor 335fba3930 Merge branch 'master' into boxcar 2018-03-22 07:11:13 +00:00
Jonathan Naylor 374fae594c Merge branch 'master' into boxcar 2018-03-07 20:05:39 +00:00
Jonathan Naylor 24ac2b902d Improve efficiency slightly. 2018-02-27 18:58:31 +00:00
Jonathan Naylor dbd84d7803 Merge branch 'master' into boxcar 2018-02-26 20:35:43 +00:00
Jonathan Naylor c1f12705a9 Merge branch 'master' into boxcar 2018-01-11 07:28:42 +00:00
Jonathan Naylor 6192a88b98 Merge branch 'master' into boxcar 2018-01-08 18:23:07 +00:00
Jonathan Naylor 8651e3a77b Merge branch 'master' into boxcar 2018-01-01 13:35:27 +00:00
Jonathan Naylor cb00f4aba7 Merge branch 'master' into boxcar 2017-11-06 09:33:22 +00:00
Jonathan Naylor 91a87f4581 Merge branch 'master' into boxcar 2017-10-30 14:06:06 +00:00
Jonathan Naylor bf1de4f307 Merge branch 'master' into boxcar 2017-10-28 12:46:19 +01:00
Jonathan Naylor 5f8a323dde Merge branch 'master' into boxcar 2017-10-15 13:20:52 +01:00
Jonathan Naylor 436ca1d851 Merge branch 'master' into boxcar 2017-10-02 16:35:14 +01:00
Jonathan Naylor ec34eb4a64 Merge branch 'master' into boxcar 2017-09-27 09:21:33 +01:00
Jonathan Naylor b76e95b540 Merge branch 'master' into boxcar 2017-09-10 14:39:51 +01:00
Jonathan Naylor b017e75787 Merge branch 'master' into boxcar 2017-09-07 09:03:17 +01:00
Jonathan Naylor 6221386873 Merge branch 'master' into boxcar 2017-08-31 08:39:15 +01:00
Jonathan Naylor 3c1b41c03f Merge branch 'master' into boxcar 2017-08-30 09:17:50 +01:00
Jonathan Naylor 7e85a64a41 Remove compiler warning. 2017-08-29 08:37:48 +01:00
Jonathan Naylor c820b22524 Merge pull request #108 from juribeparada/boxcar
Adding support for STM32F767 boxcar branch
2017-08-29 07:24:25 +01:00
Andy CA6JAU 7fae32042f Fix typo 2017-08-28 23:07:30 -03:00
Andy CA6JAU ebd86df3ef Fix Config.h 2017-08-28 21:25:40 -03:00
Andy CA6JAU 918403c399 Adding support for STM32F767 boxcar branch 2017-08-28 21:18:06 -03:00
Andy CA6JAU 7c243af5da Merge branch 'boxcar' of https://github.com/g4klx/MMDVM into boxcar 2017-08-28 20:54:31 -03:00
Jonathan Naylor 7bb042a6ca Adding watchdog to the host serial port. 2017-08-20 15:52:52 +01:00
Jonathan Naylor fbd9c4d18b Add an optional TX DC offset. 2017-08-20 12:14:58 +01:00
Jonathan Naylor 58966406da Re-add the const qualifiers. 2017-08-18 11:00:25 +01:00
Jonathan Naylor e707391a5e Optimise the DC offset removal. 2017-08-18 10:40:34 +01:00
Andy CA6JAU cff5a58bc7 Merge branch 'boxcar' of https://github.com/g4klx/MMDVM into boxcar 2017-08-13 17:19:50 -03:00
Jonathan Naylor 51577efd79 Merge branch 'master' into boxcar 2017-08-13 18:51:41 +01:00
Jonathan Naylor 469be87dc3 Merge branch 'master' into boxcar 2017-07-31 21:58:16 +01:00
Jonathan Naylor 8ce38eec9a Merge branch 'master' into boxcar 2017-07-16 19:01:54 +01:00
Jonathan Naylor 68f0fa8132 Merge branch 'master' into boxcar 2017-07-10 19:45:47 +01:00
Andy CA6JAU 954131f73c Merge branch 'boxcar' of https://github.com/g4klx/MMDVM into boxcar 2017-07-06 19:55:34 -04:00
Andy CA6JAU 06ec4b79a5 Merge remote-tracking branch 'g4klx/master' into boxcar 2017-07-06 19:55:01 -04:00
Jonathan Naylor de0aed2d2b Increase amplitude of the boxcar filter. 2017-07-06 20:09:57 +01:00
Jonathan Naylor 4b253f888d Increase the boxcar level. 2017-07-03 20:29:52 +01:00
Jonathan Naylor 316085f2a6 Try the boxcar filter on all modes. 2017-07-02 17:08:45 +01:00
12 changed files with 151 additions and 190 deletions
+23
View File
@@ -235,6 +235,7 @@ void CFM::stateMachine(bool validSignal)
} }
if (m_state == FS_LISTENING && m_modemState == STATE_FM) { if (m_state == FS_LISTENING && m_modemState == STATE_FM) {
if (!m_callsign.isWanted() && !m_rfAck.isWanted()) {
DEBUG1("Change to STATE_IDLE"); DEBUG1("Change to STATE_IDLE");
m_modemState = STATE_IDLE; m_modemState = STATE_IDLE;
m_callsignTimer.stop(); m_callsignTimer.stop();
@@ -245,6 +246,7 @@ void CFM::stateMachine(bool validSignal)
m_hangTimer.stop(); m_hangTimer.stop();
} }
} }
}
void CFM::clock(uint8_t length) void CFM::clock(uint8_t length)
{ {
@@ -279,6 +281,9 @@ void CFM::listeningState(bool validSignal)
m_callsignTimer.start(); m_callsignTimer.start();
io.setDecode(true);
io.setADCDetection(true);
DEBUG1("Change to STATE_FM"); DEBUG1("Change to STATE_FM");
m_modemState = STATE_FM; m_modemState = STATE_FM;
} }
@@ -297,6 +302,9 @@ void CFM::kerchunkState(bool validSignal)
} }
} }
} else { } else {
io.setDecode(false);
io.setADCDetection(false);
DEBUG1("State to LISTENING"); DEBUG1("State to LISTENING");
m_state = FS_LISTENING; m_state = FS_LISTENING;
m_kerchunkTimer.stop(); m_kerchunkTimer.stop();
@@ -317,6 +325,9 @@ void CFM::relayingState(bool validSignal)
m_timeoutTone.start(); m_timeoutTone.start();
} }
} else { } else {
io.setDecode(false);
io.setADCDetection(false);
DEBUG1("State to RELAYING_WAIT"); DEBUG1("State to RELAYING_WAIT");
m_state = FS_RELAYING_WAIT; m_state = FS_RELAYING_WAIT;
m_ackDelayTimer.start(); m_ackDelayTimer.start();
@@ -331,6 +342,9 @@ void CFM::relayingState(bool validSignal)
void CFM::relayingWaitState(bool validSignal) void CFM::relayingWaitState(bool validSignal)
{ {
if (validSignal) { if (validSignal) {
io.setDecode(true);
io.setADCDetection(true);
DEBUG1("State to RELAYING"); DEBUG1("State to RELAYING");
m_state = FS_RELAYING; m_state = FS_RELAYING;
m_ackDelayTimer.stop(); m_ackDelayTimer.stop();
@@ -366,6 +380,9 @@ void CFM::relayingWaitState(bool validSignal)
void CFM::hangState(bool validSignal) void CFM::hangState(bool validSignal)
{ {
if (validSignal) { if (validSignal) {
io.setDecode(true);
io.setADCDetection(true);
DEBUG1("State to RELAYING"); DEBUG1("State to RELAYING");
m_state = FS_RELAYING; m_state = FS_RELAYING;
DEBUG1("Stop ack"); DEBUG1("Stop ack");
@@ -393,6 +410,9 @@ void CFM::hangState(bool validSignal)
void CFM::timeoutState(bool validSignal) void CFM::timeoutState(bool validSignal)
{ {
if (!validSignal) { if (!validSignal) {
io.setDecode(false);
io.setADCDetection(false);
DEBUG1("State to TIMEOUT_WAIT"); DEBUG1("State to TIMEOUT_WAIT");
m_state = FS_TIMEOUT_WAIT; m_state = FS_TIMEOUT_WAIT;
m_ackDelayTimer.start(); m_ackDelayTimer.start();
@@ -407,6 +427,9 @@ void CFM::timeoutState(bool validSignal)
void CFM::timeoutWaitState(bool validSignal) void CFM::timeoutWaitState(bool validSignal)
{ {
if (validSignal) { if (validSignal) {
io.setDecode(true);
io.setADCDetection(true);
DEBUG1("State to TIMEOUT"); DEBUG1("State to TIMEOUT");
m_state = FS_TIMEOUT; m_state = FS_TIMEOUT;
m_ackDelayTimer.stop(); m_ackDelayTimer.stop();
+5
View File
@@ -205,6 +205,11 @@ void CFMKeyer::stop()
m_audioPos = 0U; m_audioPos = 0U;
} }
bool CFMKeyer::isWanted() const
{
return m_wanted;
}
bool CFMKeyer::isRunning() const bool CFMKeyer::isRunning() const
{ {
return m_poPos > 0U || m_dotPos > 0U || m_audioPos > 0U; return m_poPos > 0U || m_dotPos > 0U || m_audioPos > 0U;
+2
View File
@@ -35,6 +35,8 @@ public:
bool isRunning() const; bool isRunning() const;
bool isWanted() const;
private: private:
bool m_wanted; bool m_wanted;
uint8_t m_poBuffer[1000U]; uint8_t m_poBuffer[1000U];
+66 -122
View File
@@ -26,31 +26,12 @@
static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2} static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2}
const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
// Generated using rcosdesign(0.2, 8, 5, 'sqrt') in MATLAB // One symbol boxcar filters
static q15_t RRC_0_2_FILTER[] = {401, 104, -340, -731, -847, -553, 112, 909, 1472, 1450, 683, -675, -2144, -3040, -2706, -770, 2667, 6995, static q15_t BOXCAR5_FILTER[] = {12000, 12000, 12000, 12000, 12000, 0};
11237, 14331, 15464, 14331, 11237, 6995, 2667, -770, -2706, -3040, -2144, -675, 683, 1450, 1472, 909, 112, const uint16_t BOXCAR5_FILTER_LEN = 6U;
-553, -847, -731, -340, 104, 401, 0};
const uint16_t RRC_0_2_FILTER_LEN = 42U;
// Generated using rcosdesign(0.2, 8, 10, 'sqrt') in MATLAB static q15_t BOXCAR10_FILTER[] = {6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000};
static q15_t NXDN_0_2_FILTER[] = {284, 198, 73, -78, -240, -393, -517, -590, -599, -533, -391, -181, 79, 364, 643, 880, 1041, 1097, 1026, 819, const uint16_t BOXCAR10_FILTER_LEN = 10U;
483, 39, -477, -1016, -1516, -1915, -2150, -2164, -1914, -1375, -545, 557, 1886, 3376, 4946, 6502, 7946, 9184,
10134, 10731, 10935, 10731, 10134, 9184, 7946, 6502, 4946, 3376, 1886, 557, -545, -1375, -1914, -2164, -2150,
-1915, -1516, -1016, -477, 39, 483, 819, 1026, 1097, 1041, 880, 643, 364, 79, -181, -391, -533, -599, -590,
-517, -393, -240, -78, 73, 198, 284, 0};
const uint16_t NXDN_0_2_FILTER_LEN = 82U;
static q15_t NXDN_ISINC_FILTER[] = {790, -1085, -1073, -553, 747, 2341, 3156, 2152, -893, -4915, -7834, -7536, -3102, 4441, 12354, 17394, 17394,
12354, 4441, -3102, -7536, -7834, -4915, -893, 2152, 3156, 2341, 747, -553, -1073, -1085, 790};
const uint16_t NXDN_ISINC_FILTER_LEN = 32U;
// Generated using gaussfir(0.5, 4, 5) in MATLAB
static q15_t GAUSSIAN_0_5_FILTER[] = {8, 104, 760, 3158, 7421, 9866, 7421, 3158, 760, 104, 8, 0};
const uint16_t GAUSSIAN_0_5_FILTER_LEN = 12U;
// One symbol boxcar filter
static q15_t BOXCAR_FILTER[] = {12000, 12000, 12000, 12000, 12000, 0};
const uint16_t BOXCAR_FILTER_LEN = 6U;
const uint16_t DC_OFFSET = 2048U; const uint16_t DC_OFFSET = 2048U;
@@ -61,16 +42,10 @@ m_txBuffer(TX_RINGBUFFER_SIZE),
m_rssiBuffer(RX_RINGBUFFER_SIZE), m_rssiBuffer(RX_RINGBUFFER_SIZE),
m_dcFilter(), m_dcFilter(),
m_dcState(), m_dcState(),
m_rrcFilter(), m_boxcar5Filter(),
m_gaussianFilter(), m_boxcar10Filter(),
m_boxcarFilter(), m_boxcar5State(),
m_nxdnFilter(), m_boxcar10State(),
m_nxdnISincFilter(),
m_rrcState(),
m_gaussianState(),
m_boxcarState(),
m_nxdnState(),
m_nxdnISincState(),
m_pttInvert(false), m_pttInvert(false),
m_rxLevel(128 * 128), m_rxLevel(128 * 128),
m_cwIdTXLevel(128 * 128), m_cwIdTXLevel(128 * 128),
@@ -91,11 +66,8 @@ m_dacOverflow(0U),
m_watchdog(0U), m_watchdog(0U),
m_lockout(false) m_lockout(false)
{ {
::memset(m_rrcState, 0x00U, 70U * sizeof(q15_t)); ::memset(m_boxcar5State, 0x00U, 30U * sizeof(q15_t));
::memset(m_gaussianState, 0x00U, 40U * sizeof(q15_t)); ::memset(m_boxcar10State, 0x00U, 40U * sizeof(q15_t));
::memset(m_boxcarState, 0x00U, 30U * sizeof(q15_t));
::memset(m_nxdnState, 0x00U, 110U * sizeof(q15_t));
::memset(m_nxdnISincState, 0x00U, 60U * sizeof(q15_t));
::memset(m_dcState, 0x00U, 4U * sizeof(q31_t)); ::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
m_dcFilter.numStages = DC_FILTER_STAGES; m_dcFilter.numStages = DC_FILTER_STAGES;
@@ -103,25 +75,13 @@ m_lockout(false)
m_dcFilter.pCoeffs = DC_FILTER; m_dcFilter.pCoeffs = DC_FILTER;
m_dcFilter.postShift = 0; m_dcFilter.postShift = 0;
m_rrcFilter.numTaps = RRC_0_2_FILTER_LEN; m_boxcar5Filter.numTaps = BOXCAR5_FILTER_LEN;
m_rrcFilter.pState = m_rrcState; m_boxcar5Filter.pState = m_boxcar5State;
m_rrcFilter.pCoeffs = RRC_0_2_FILTER; m_boxcar5Filter.pCoeffs = BOXCAR5_FILTER;
m_gaussianFilter.numTaps = GAUSSIAN_0_5_FILTER_LEN; m_boxcar10Filter.numTaps = BOXCAR10_FILTER_LEN;
m_gaussianFilter.pState = m_gaussianState; m_boxcar10Filter.pState = m_boxcar10State;
m_gaussianFilter.pCoeffs = GAUSSIAN_0_5_FILTER; m_boxcar10Filter.pCoeffs = BOXCAR10_FILTER;
m_boxcarFilter.numTaps = BOXCAR_FILTER_LEN;
m_boxcarFilter.pState = m_boxcarState;
m_boxcarFilter.pCoeffs = BOXCAR_FILTER;
m_nxdnFilter.numTaps = NXDN_0_2_FILTER_LEN;
m_nxdnFilter.pState = m_nxdnState;
m_nxdnFilter.pCoeffs = NXDN_0_2_FILTER;
m_nxdnISincFilter.numTaps = NXDN_ISINC_FILTER_LEN;
m_nxdnISincFilter.pState = m_nxdnISincState;
m_nxdnISincFilter.pCoeffs = NXDN_ISINC_FILTER;
initInt(); initInt();
@@ -308,54 +268,37 @@ void CIO::process()
#endif #endif
if (m_modemState == STATE_IDLE) { if (m_modemState == STATE_IDLE) {
if (m_dstarEnable) { if (m_dstarEnable || m_dmrEnable || m_ysfEnable || m_p25Enable) {
q15_t GMSKVals[RX_BLOCK_SIZE]; q15_t vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER) ::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE);
::arm_fir_fast_q15(&m_gaussianFilter, dcSamples, GMSKVals, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
#endif
dstarRX.samples(GMSKVals, rssi, RX_BLOCK_SIZE);
}
if (m_p25Enable) { if (m_dstarEnable)
q15_t P25Vals[RX_BLOCK_SIZE]; dstarRX.samples(vals, rssi, RX_BLOCK_SIZE);
#if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_boxcarFilter, dcSamples, P25Vals, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_boxcarFilter, samples, P25Vals, RX_BLOCK_SIZE);
#endif
p25RX.samples(P25Vals, rssi, RX_BLOCK_SIZE);
}
if (m_nxdnEnable) { if (m_p25Enable)
q15_t NXDNValsTmp[RX_BLOCK_SIZE]; p25RX.samples(vals, rssi, RX_BLOCK_SIZE);
#if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_nxdnFilter, dcSamples, NXDNValsTmp, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_nxdnFilter, samples, NXDNValsTmp, RX_BLOCK_SIZE);
#endif
q15_t NXDNVals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_nxdnISincFilter, NXDNValsTmp, NXDNVals, RX_BLOCK_SIZE);
nxdnRX.samples(NXDNVals, rssi, RX_BLOCK_SIZE);
}
if (m_dmrEnable || m_ysfEnable) {
q15_t RRCVals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_rrcFilter, samples, RRCVals, RX_BLOCK_SIZE);
if (m_ysfEnable) if (m_ysfEnable)
ysfRX.samples(RRCVals, rssi, RX_BLOCK_SIZE); ysfRX.samples(vals, rssi, RX_BLOCK_SIZE);
if (m_dmrEnable) { if (m_dmrEnable) {
if (m_duplex) if (m_duplex)
dmrIdleRX.samples(RRCVals, RX_BLOCK_SIZE); dmrIdleRX.samples(vals, RX_BLOCK_SIZE);
else else
dmrDMORX.samples(RRCVals, rssi, RX_BLOCK_SIZE); dmrDMORX.samples(vals, rssi, RX_BLOCK_SIZE);
} }
} }
if (m_nxdnEnable) {
q15_t vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_boxcar10Filter, dcSamples, vals, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_boxcar10Filter, samples, vals, RX_BLOCK_SIZE);
#endif
nxdnRX.samples(vals, rssi, RX_BLOCK_SIZE);
}
if (m_fmEnable) { if (m_fmEnable) {
bool cos = getCOSInt(); bool cos = getCOSInt();
#if defined(USE_DCBLOCKER) #if defined(USE_DCBLOCKER)
@@ -366,61 +309,59 @@ void CIO::process()
} }
} else if (m_modemState == STATE_DSTAR) { } else if (m_modemState == STATE_DSTAR) {
if (m_dstarEnable) { if (m_dstarEnable) {
q15_t GMSKVals[RX_BLOCK_SIZE]; q15_t vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER) #if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_gaussianFilter, dcSamples, GMSKVals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_boxcar5Filter, dcSamples, vals, RX_BLOCK_SIZE);
#else #else
::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE);
#endif #endif
dstarRX.samples(GMSKVals, rssi, RX_BLOCK_SIZE);
dstarRX.samples(vals, rssi, RX_BLOCK_SIZE);
} }
} else if (m_modemState == STATE_DMR) { } else if (m_modemState == STATE_DMR) {
if (m_dmrEnable) { if (m_dmrEnable) {
q15_t DMRVals[RX_BLOCK_SIZE]; q15_t vals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_rrcFilter, samples, DMRVals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE);
if (m_duplex) { if (m_duplex) {
// If the transmitter isn't on, use the DMR idle RX to detect the wakeup CSBKs // If the transmitter isn't on, use the DMR idle RX to detect the wakeup CSBKs
if (m_tx) if (m_tx)
dmrRX.samples(DMRVals, rssi, control, RX_BLOCK_SIZE); dmrRX.samples(vals, rssi, control, RX_BLOCK_SIZE);
else else
dmrIdleRX.samples(DMRVals, RX_BLOCK_SIZE); dmrIdleRX.samples(vals, RX_BLOCK_SIZE);
} else { } else {
dmrDMORX.samples(DMRVals, rssi, RX_BLOCK_SIZE); dmrDMORX.samples(vals, rssi, RX_BLOCK_SIZE);
} }
} }
} else if (m_modemState == STATE_YSF) { } else if (m_modemState == STATE_YSF) {
if (m_ysfEnable) { if (m_ysfEnable) {
q15_t YSFVals[RX_BLOCK_SIZE]; q15_t vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER) #if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_rrcFilter, dcSamples, YSFVals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_boxcar5Filter, dcSamples, vals, RX_BLOCK_SIZE);
#else #else
::arm_fir_fast_q15(&m_rrcFilter, samples, YSFVals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE);
#endif #endif
ysfRX.samples(YSFVals, rssi, RX_BLOCK_SIZE); ysfRX.samples(vals, rssi, RX_BLOCK_SIZE);
} }
} else if (m_modemState == STATE_P25) { } else if (m_modemState == STATE_P25) {
if (m_p25Enable) { if (m_p25Enable) {
q15_t P25Vals[RX_BLOCK_SIZE]; q15_t vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER) #if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_boxcarFilter, dcSamples, P25Vals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_boxcar5Filter, dcSamples, vals, RX_BLOCK_SIZE);
#else #else
::arm_fir_fast_q15(&m_boxcarFilter, samples, P25Vals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE);
#endif #endif
p25RX.samples(P25Vals, rssi, RX_BLOCK_SIZE); p25RX.samples(vals, rssi, RX_BLOCK_SIZE);
} }
} else if (m_modemState == STATE_NXDN) { } else if (m_modemState == STATE_NXDN) {
if (m_nxdnEnable) { if (m_nxdnEnable) {
q15_t NXDNValsTmp[RX_BLOCK_SIZE]; q15_t vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER) #if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_nxdnFilter, dcSamples, NXDNValsTmp, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_boxcar10Filter, dcSamples, vals, RX_BLOCK_SIZE);
#else #else
::arm_fir_fast_q15(&m_nxdnFilter, samples, NXDNValsTmp, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_boxcar10Filter, samples, vals, RX_BLOCK_SIZE);
#endif #endif
q15_t NXDNVals[RX_BLOCK_SIZE]; nxdnRX.samples(vals, rssi, RX_BLOCK_SIZE);
::arm_fir_fast_q15(&m_nxdnISincFilter, NXDNValsTmp, NXDNVals, RX_BLOCK_SIZE);
nxdnRX.samples(NXDNVals, rssi, RX_BLOCK_SIZE);
} }
} else if (m_modemState == STATE_FM) { } else if (m_modemState == STATE_FM) {
bool cos = getCOSInt(); bool cos = getCOSInt();
@@ -430,10 +371,13 @@ void CIO::process()
fm.samples(cos, samples, RX_BLOCK_SIZE); fm.samples(cos, samples, RX_BLOCK_SIZE);
#endif #endif
} else if (m_modemState == STATE_DSTARCAL) { } else if (m_modemState == STATE_DSTARCAL) {
q15_t GMSKVals[RX_BLOCK_SIZE]; q15_t vals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE); #if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_boxcar5Filter, dcSamples, vals, RX_BLOCK_SIZE);
calDStarRX.samples(GMSKVals, RX_BLOCK_SIZE); #else
::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE);
#endif
calDStarRX.samples(vals, RX_BLOCK_SIZE);
} else if (m_modemState == STATE_RSSICAL) { } else if (m_modemState == STATE_RSSICAL) {
calRSSI.samples(rssi, RX_BLOCK_SIZE); calRSSI.samples(rssi, RX_BLOCK_SIZE);
} }
+4 -10
View File
@@ -66,16 +66,10 @@ private:
arm_biquad_casd_df1_inst_q31 m_dcFilter; arm_biquad_casd_df1_inst_q31 m_dcFilter;
q31_t m_dcState[4]; q31_t m_dcState[4];
arm_fir_instance_q15 m_rrcFilter; arm_fir_instance_q15 m_boxcar5Filter;
arm_fir_instance_q15 m_gaussianFilter; arm_fir_instance_q15 m_boxcar10Filter;
arm_fir_instance_q15 m_boxcarFilter; q15_t m_boxcar5State[30U]; // NoTaps + BlockSize - 1, 6 + 20 - 1 plus some spare
arm_fir_instance_q15 m_nxdnFilter; q15_t m_boxcar10State[40U]; // NoTaps + BlockSize - 1, 10 + 20 - 1 plus some spare
arm_fir_instance_q15 m_nxdnISincFilter;
q15_t m_rrcState[70U]; // NoTaps + BlockSize - 1, 42 + 20 - 1 plus some spare
q15_t m_gaussianState[40U]; // NoTaps + BlockSize - 1, 12 + 20 - 1 plus some spare
q15_t m_boxcarState[30U]; // NoTaps + BlockSize - 1, 6 + 20 - 1 plus some spare
q15_t m_nxdnState[110U]; // NoTaps + BlockSize - 1, 82 + 20 - 1 plus some spare
q15_t m_nxdnISincState[60U]; // NoTaps + BlockSize - 1, 32 + 20 - 1 plus some spare
bool m_pttInvert; bool m_pttInvert;
q15_t m_rxLevel; q15_t m_rxLevel;
+1 -1
View File
@@ -155,7 +155,7 @@ LDFLAGS_F722 =-T stm32f722_link.ld $(MCFLAGS_F7) --specs=nosys.specs $(INCLUDES_
# Common flags # Common flags
CFLAGS=-Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS CFLAGS=-Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
LDFLAGS=-Os --specs=nano.specs LDFLAGS=-Os --specs=nano.specs -Wl,-Map=bin/mmdvm.map
# Build Rules # Build Rules
.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm drcc_nqf clean .PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm drcc_nqf clean
+3 -6
View File
@@ -54,7 +54,7 @@ m_poBuffer(),
m_poLen(0U), m_poLen(0U),
m_poPtr(0U), m_poPtr(0U),
m_txDelay(240U), // 200ms m_txDelay(240U), // 200ms
m_txHang(6000U), // 5s m_txHang(3000U), // 5s
m_txCount(0U) m_txCount(0U)
{ {
::memset(m_modState, 0x00U, 16U * sizeof(q15_t)); ::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
@@ -72,10 +72,7 @@ m_txCount(0U)
void CNXDNTX::process() void CNXDNTX::process()
{ {
if (m_buffer.getData() == 0U && m_poLen == 0U && m_txCount == 0U) if (m_poLen == 0U && m_buffer.getData() > 0U) {
return;
if (m_poLen == 0U) {
if (!m_tx) { if (!m_tx) {
for (uint16_t i = 0U; i < m_txDelay; i++) for (uint16_t i = 0U; i < m_txDelay; i++)
m_poBuffer[m_poLen++] = NXDN_SYNC; m_poBuffer[m_poLen++] = NXDN_SYNC;
@@ -200,5 +197,5 @@ uint8_t CNXDNTX::getSpace() const
void CNXDNTX::setParams(uint8_t txHang) void CNXDNTX::setParams(uint8_t txHang)
{ {
m_txHang = txHang * 1200U; m_txHang = txHang * 600U;
} }
+1 -4
View File
@@ -70,10 +70,7 @@ m_txCount(0U)
void CP25TX::process() void CP25TX::process()
{ {
if (m_buffer.getData() == 0U && m_poLen == 0U && m_txCount == 0U) if (m_poLen == 0U && m_buffer.getData() > 0U) {
return;
if (m_poLen == 0U) {
if (!m_tx) { if (!m_tx) {
for (uint16_t i = 0U; i < m_txDelay; i++) for (uint16_t i = 0U; i < m_txDelay; i++)
m_poBuffer[m_poLen++] = P25_START_SYNC; m_poBuffer[m_poLen++] = P25_START_SYNC;
+2 -3
View File
@@ -103,7 +103,7 @@ const uint8_t MMDVM_DEBUG5 = 0xF5U;
#define HW_TYPE "MMDVM" #define HW_TYPE "MMDVM"
#endif #endif
#define DESCRIPTION "20200512 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)" #define DESCRIPTION "20200520 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
#if defined(GITVERSION) #if defined(GITVERSION)
#define concat(h, a, b, c) h " " a " " b " GitID #" c "" #define concat(h, a, b, c) h " " a " " b " GitID #" c ""
@@ -592,8 +592,7 @@ void CSerialPort::process()
m_buffer[0U] = c; m_buffer[0U] = c;
m_ptr = 1U; m_ptr = 1U;
m_len = 0U; m_len = 0U;
} } else {
else {
m_ptr = 0U; m_ptr = 0U;
m_len = 0U; m_len = 0U;
} }
+1 -1
View File
@@ -906,7 +906,7 @@ int CSerialPort::availableForWriteInt(uint8_t n)
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
return AvailForWriteUSART1(); return AvailForWriteUSART1();
#elif defined(DRCC_DVM) #elif defined(DRCC_DVM)
AvailForWriteUSART2(); return AvailForWriteUSART2();
#else #else
return AvailForWriteUART5(); return AvailForWriteUART5();
#endif #endif
-4
View File
@@ -66,9 +66,6 @@ m_txCount(0U)
void CYSFTX::process() void CYSFTX::process()
{ {
if (m_buffer.getData() == 0U && m_poLen == 0U && m_txCount == 0U)
return;
// If we have YSF data to transmit, do so. // If we have YSF data to transmit, do so.
if (m_poLen == 0U && m_buffer.getData() > 0U) { if (m_poLen == 0U && m_buffer.getData() > 0U) {
if (!m_tx) { if (!m_tx) {
@@ -191,4 +188,3 @@ void CYSFTX::setParams(bool on, uint8_t txHang)
m_loDev = on; m_loDev = on;
m_txHang = txHang * 1200U; m_txHang = txHang * 1200U;
} }
+21 -17
View File
@@ -22,11 +22,11 @@
/* /*
Pin definitions for DRCC_DVM BG7NQF board rev1 Pin definitions for DRCC_DVM BG7NQF board rev1
PTT PB12 output TX/PTT_LED PB12 output
LED_PTT PB4 output RX/COS_LED PB5 output
LED_COS PB5 output STATUS_LED PB10 output
LED_SRV PB10 output
COS PB13 input COS_IN PB13 input
DSTAR N/A DSTAR N/A
DMR N/A DMR N/A
@@ -35,23 +35,27 @@ P25 N/A
NXDN N/A NXDN N/A
POCSAG N/A POCSAG N/A
MDSTAR PB14 output MDMR/BIT0 PB8 output
MDMR PB8 output MYSF/BIT1 PB9 output
MYSF PB9 output MDSTAR/BIT2 PB14 output
MP25 PB15 output MP25/BIT3 PB15 output Generic Mode Pins
MNXDN N/A MNXDN N/A
MPOCSAG N/A MPOCSAG N/A
RX PB0 analog input RX PA0 analog input
RSSI PB1 analog input RSSI PA1 analog input
TX PA4 analog output TX PA4 analog output
EXT_CLK PA15 input EXT_CLK PA15 input
UART1_TX PA9 output UART1_TX PA9 output
UART1_RX PA10 output UART1_RX PA10 output Host Data Communication
UART2_TX PA2 output UART2_TX PA2 output
UART2_RX PA3 output UART2_RX PA3 output Nextion Data Communication
I2C1_SCL PB6 output
I2C1_SDA PB7 output OLED Data Communication as master
*/ */
@@ -124,13 +128,13 @@ UART2_RX PA3 output
#define PIN_RX GPIO_Pin_0 #define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0 #define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOB #define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOB #define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1 #define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1 #define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOB #define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOB #define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4 #define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1 #define PIN_TX_CH DAC_Channel_1