Add HSE_VALUE define to platformio.ini

.gitignore

@@ -1,5 +1,3 @@
-*.o
-obj/
-bin/
-GitVersion.h
-build/
+.pio
+.vscode
+

.gitmodules

@@ -1,6 +0,0 @@
-[submodule "STM32F4XX_Lib"]
-	path = STM32F4XX_Lib
-	url = https://github.com/juribeparada/STM32F4XX_Lib.git
-[submodule "STM32F7XX_Lib"]
-	path = STM32F7XX_Lib
-	url = https://github.com/juribeparada/STM32F7XX_Lib.git

BUILD.txt

@@ -1,125 +0,0 @@
-In order to build MMDVM, you need to tell the Arduino GUI to link with the
-CMSIS DSP library, which is doesn't do by default.
-
-My development is on Windows and so I can vouch for the following instructions.
-
-For Arduino 1.6.3 with SAM 1.6.4
---------------------------------
-
-1. Go to the where the platform.txt file is located. On my Windows machine it's
-in:
-
-C:\Users\Jonathan\AppData\Roaming\Arduino15\packages\arduino\hardware\sam\1.6.4
-
-On Mac OS X it's located in:
-
-/Applications/Arduino.app/Contents/Resources/Java/hardware/arduino/sam
-Or
-~/Library/Arduino15/packages/arduino/hardware/sam/1.6.6
-
-2. You'll need to open the file in a text editor and find the line:
-
-## Combine gc-sections, archives, and objects
-recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} -mcpu={build.mcu} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols -Wl,--start-group "{build.path}/syscalls_sam3.c.o" {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
-
-In my version it's line 73.
-
-3. Modify it to read as follows:
-
-## Combine gc-sections, archives, and objects
-recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} -mcpu={build.mcu} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols -Wl,--start-group "{build.path}/syscalls_sam3.c.o" {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.system.path}/CMSIS/CMSIS/Lib/ARM/arm_cortexM3l_math.lib" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
-
-The change is near the end, and is the addition of:
-
-"{build.system.path}/CMSIS/CMSIS/Lib/ARM/arm_cortexM3l_math.lib"
-
-Which is the CMSIS AMR3 DSP library for little-endian operation.
-
-4. Save the file and start up the Arduino GUI and build MMDVM.
-
-I would like to get instructions for doing the same on a Linux platform. As a
-starter find the relevent platform.txt and try adding:
-
-"{build.system.path}/CMSIS/CMSIS/Lib/ARM/libarm_cortexM3l_math.a"
-
-or maybe:
-
-"{build.variant.path}/libarm_cortexM3l_math.a"
-
-Likely on Linux
-
-"{build.system.path}/CMSIS/CMSIS/Lib/GCC/libarm_cortexM3l_math.a"
-
-As with Arduino 1.6.7 with SAM 1.6.6, see below.
-
-
-For Arduino 1.6.7 with SAM 1.6.6 
---------------------------------
-(checked OK on Arduino 1.6.11 and SAM 1.6.9)
-
-1. Go to the where the platform.txt file is located. On my Windows machine it's
-in:
-
-C:\Users\Jonathan\AppData\Local\Arduino15\packages\arduino\hardware\sam\1.6.6
-
-On Mac OS X it's located in:
-
-/Applications/Arduino.app/Contents/Resources/Java/hardware/arduino/sam
-
-On Linux, it's located in my home directory, downloaded and extracted from Arduino website, but must be installed.
-
-/home/m1geo/arduino-1.6.7/hardware/arduino/sam 
-
-or
-
-/home/m1geo/.arduino15/packages/arduino/hardware/sam/1.6.9 (if you let the board/library manager install SAM)
-
-
-I (M1GEO) found it was necessary to download SAM-1.6.6 outside of the Arduino IDE, and manually extract the files. 
-  The Board Manager didn't seem to install the SAM files correctly. Here's how I did it:
-  
-  a) wget http://downloads.arduino.cc/cores/sam-1.6.6.tar.bz2 -O /tmp/sam-1.6.6.tar.bz2 (download and save in /tmp)
-  b) cd arduino-1.6.7/hardware/arduino/ (Arduino root, here, in my home directory)
-  c) tar xvfj /tmp/sam-1.6.6.tar.bz2
-
-2. You'll need to open the file (platform.txt) in a text editor and find the line:
-
-## Combine gc-sections, archives, and objects
-recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mcpu={build.mcu} -mthumb {compiler.c.elf.flags} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group "{build.path}/core/syscalls_sam3.c.o" {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
-
-In my version it's line 73.
-
-3. Modify it to read as follows:
-
-## Combine gc-sections, archives, and objects
-recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mcpu={build.mcu} -mthumb {compiler.c.elf.flags} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group "{build.path}/core/syscalls_sam3.c.o" {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.system.path}/CMSIS/CMSIS/Lib/ARM/arm_cortexM3l_math.lib" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
-
-The change is near the end, and is the addition of:
-
-"{build.system.path}/CMSIS/CMSIS/Lib/ARM/arm_cortexM3l_math.lib"
-
-On Linux, the path was found to differ slightly (GCC instead of ARM):
-
-"{build.system.path}/CMSIS/CMSIS/Lib/GCC/libarm_cortexM3l_math.a"
-
-Which is the CMSIS AMR3 DSP library for little-endian operation.
-
-4. Save the file and start up the Arduino GUI and build MMDVM.
-
-For Arduino 1.6.9 with SAM 1.6.8
---------------------------------
-
-1. Locate platform.txt. On Ubuntu 14.04 LTS x86_64 OS it is in:
-
-/home/$user/.arduino15/packages/arduino/hardware/sam/1.6.8/
-
-2. Open the file in a text editor and change the line:
-
-## Combine gc-sections, archives, and objects
-recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mcpu={build.mcu} -mthumb {compiler.c.elf.flags} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group {compiler.combine.flags} {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
-
-to
-
-recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mcpu={build.mcu} -mthumb {compiler.c.elf.flags} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group {compiler.combine.flags} {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.system.path}/CMSIS/CMSIS/Lib/GCC/libarm_cortexM3l_math.a" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
-
-3. Save the file, open the Arduino IDE and build MMDVM

IODue.cpp

@@ -1,323 +0,0 @@
-/*
- *   Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
- *   Copyright (C) 2015 by Jim Mclaughlin KI6ZUM
- *   Copyright (C) 2016 by Colin Durbridge G4EML
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include "Config.h"
-#include "Globals.h"
-#include "IO.h"
-
-#if defined(__SAM3X8E__)
-
-// An Arduino Due
-#if defined(ARDUINO_DUE_PAPA)
-#define PIN_COS                7
-#define PIN_PTT                8
-#define PIN_COSLED             11
-#define PIN_DSTAR              16
-#define PIN_DMR                17
-#define PIN_YSF                18
-#define PIN_P25                19
-#define PIN_NXDN               20
-#define PIN_POCSAG             4
-#define PIN_FM                 5
-#define ADC_CHER_Chan          (1<<7)                 // ADC on Due pin A0  - Due AD7 - (1 << 7)
-#define ADC_ISR_EOC_Chan       ADC_ISR_EOC7
-#define ADC_CDR_Chan           7
-#define DACC_MR_USER_SEL_Chan  DACC_MR_USER_SEL_CHANNEL0 // DAC on Due DAC0
-#define DACC_CHER_Chan         DACC_CHER_CH0
-#elif defined(ARDUINO_DUE_ZUM_V10)
-#define PIN_COS                52
-#define PIN_PTT                23
-#define PIN_COSLED             22
-#define PIN_DSTAR              9
-#define PIN_DMR                8
-#define PIN_YSF                7
-#define PIN_P25                6
-#define PIN_NXDN               5
-#define PIN_POCSAG             4
-#define PIN_FM                 3
-#define ADC_CHER_Chan          (1<<13)                // ADC on Due pin A11 - Due AD13 - (1 << 13)
-#define ADC_ISR_EOC_Chan       ADC_ISR_EOC13
-#define ADC_CDR_Chan           13
-#define DACC_MR_USER_SEL_Chan  DACC_MR_USER_SEL_CHANNEL1 // DAC on Due DAC1
-#define DACC_CHER_Chan         DACC_CHER_CH1
-#define RSSI_CHER_Chan         (1<<1)                 // ADC on Due pin A6  - Due AD1 - (1 << 1)
-#define RSSI_CDR_Chan          1
-#elif defined(ARDUINO_DUE_NTH)
-#define PIN_COS                A7
-#define PIN_PTT                A8
-#define PIN_COSLED             A11
-#define PIN_DSTAR              9
-#define PIN_DMR                8
-#define PIN_YSF                7
-#define PIN_P25                6
-#define PIN_NXDN               5
-#define PIN_POCSAG             4
-#define PIN_FM                 3
-#define ADC_CHER_Chan          (1<<7)                 // ADC on Due pin A0  - Due AD7 - (1 << 7)
-#define ADC_ISR_EOC_Chan       ADC_ISR_EOC7
-#define ADC_CDR_Chan           7
-#define DACC_MR_USER_SEL_Chan  DACC_MR_USER_SEL_CHANNEL0 // DAC on Due DAC0
-#define DACC_CHER_Chan         DACC_CHER_CH0
-#define RSSI_CHER_Chan         (1<<1)                 // ADC on Due pin A6  - Due AD1 - (1 << 1)
-#define RSSI_CDR_Chan          1
-#else
-#error "Either ARDUINO_DUE_PAPA, ARDUINO_DUE_ZUM_V10, or ARDUINO_DUE_NTH need to be defined"
-#endif
-
-const uint16_t DC_OFFSET = 2048U;
-
-extern "C" {
-  void ADC_Handler()
-  {
-    io.interrupt();
-  }
-}
-
-void CIO::initInt()
-{
-  // Set up the TX, COS and LED pins
-  pinMode(PIN_PTT,    OUTPUT);
-  pinMode(PIN_COSLED, OUTPUT);
-  pinMode(PIN_LED,    OUTPUT);
-  pinMode(PIN_COS,    INPUT);
-
-#if defined(MODE_LEDS)
-  // Set up the mode output pins
-  pinMode(PIN_DSTAR,  OUTPUT);
-  pinMode(PIN_DMR,    OUTPUT);
-  pinMode(PIN_YSF,    OUTPUT);
-  pinMode(PIN_P25,    OUTPUT);
-#if !defined(USE_ALTERNATE_NXDN_LEDS)
-  pinMode(PIN_NXDN,   OUTPUT);
-#endif
-#if !defined(USE_ALTERNATE_M17_LEDS)
-  pinMode(PIN_M17,    OUTPUT);
-#endif
-#if !defined(USE_ALTERNATE_POCSAG_LEDS)
-  pinMode(PIN_POCSAG, OUTPUT);
-#endif
-#if !defined(USE_ALTERNATE_POCSAG_LEDS)
-  pinMode(PIN_FM,     OUTPUT);
-#endif
-#endif
-}
-
-void CIO::startInt()
-{
-  if (ADC->ADC_ISR & ADC_ISR_EOC_Chan)        // Ensure there was an End-of-Conversion and we read the ISR reg
-    io.interrupt();
-
-  // Set up the ADC
-  NVIC_EnableIRQ(ADC_IRQn);                   // Enable ADC interrupt vector
-  ADC->ADC_IDR  = 0xFFFFFFFF;                 // Disable interrupts
-  ADC->ADC_IER  = ADC_CHER_Chan;              // Enable End-Of-Conv interrupt
-  ADC->ADC_CHDR = 0xFFFF;                     // Disable all channels
-  ADC->ADC_CHER = ADC_CHER_Chan;              // Enable rx input channel
-#if defined(SEND_RSSI_DATA)
-  ADC->ADC_CHER |= RSSI_CHER_Chan;            // and RSSI input
-#endif
-  ADC->ADC_CGR  = 0x15555555;                 // All gains set to x1
-  ADC->ADC_COR  = 0x00000000;                 // All offsets off
-  ADC->ADC_MR   = (ADC->ADC_MR & 0xFFFFFFF0) | (1 << 1) | ADC_MR_TRGEN;  // 1 = trig source TIO from TC0
-
-#if defined(EXTERNAL_OSC)
-  // Set up the external clock input on PA4 = AI5
-  REG_PIOA_ODR   = 0x10;                      // Set pin as input
-  REG_PIOA_PDR   = 0x10;                      // Disable PIO A bit 4
-  REG_PIOA_ABSR &= ~0x10;                     // Select A peripheral = TCLK1 Input
-#endif
-
-  // Set up the timer
-  pmc_enable_periph_clk(TC_INTERFACE_ID + 0*3+0) ;  // Clock the TC0 channel 0
-  TcChannel* t = &(TC0->TC_CHANNEL)[0];       // Pointer to TC0 registers for its channel 0
-  t->TC_CCR = TC_CCR_CLKDIS;                  // Disable internal clocking while setup regs
-  t->TC_IDR = 0xFFFFFFFF;                     // Disable interrupts
-  t->TC_SR;                                   // Read int status reg to clear pending
-#if defined(EXTERNAL_OSC)
-  t->TC_CMR = TC_CMR_TCCLKS_XC1 |             // Use XC1 = TCLK1 external clock
-#else
-  t->TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1 |    // Use TCLK1 (prescale by 2, = 42MHz)
-#endif
-    TC_CMR_WAVE |                             // Waveform mode
-    TC_CMR_WAVSEL_UP_RC |                     // Count-up PWM using RC as threshold
-    TC_CMR_EEVT_XC0 |                         // Set external events from XC0 (this setup TIOB as output)
-    TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_CLEAR |
-    TC_CMR_BCPB_CLEAR | TC_CMR_BCPC_CLEAR;
-#if defined(EXTERNAL_OSC)
-  t->TC_RC  = EXTERNAL_OSC / 24000;           // Counter resets on RC, so sets period in terms of the external clock
-  t->TC_RA  = EXTERNAL_OSC / 48000;           // Roughly square wave
-#else
-  t->TC_RC  = 1750;                           // Counter resets on RC, so sets period in terms of 42MHz internal clock
-  t->TC_RA  = 880;                            // Roughly square wave
-#endif
-  t->TC_CMR = (t->TC_CMR & 0xFFF0FFFF) | TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_SET;  // Set clear and set from RA and RC compares
-  t->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG;    // re-enable local clocking and switch to hardware trigger source.
-
-  // Set up the DAC
-  pmc_enable_periph_clk(DACC_INTERFACE_ID);   // Start clocking DAC
-  DACC->DACC_CR = DACC_CR_SWRST;              // Reset DAC
-  DACC->DACC_MR =
-    DACC_MR_TRGEN_EN | DACC_MR_TRGSEL(1) |    // Trigger 1 = TIO output of TC0
-    DACC_MR_USER_SEL_Chan |                   // Select channel
-    (24 << DACC_MR_STARTUP_Pos);              // 24 = 1536 cycles which I think is in range 23..45us since DAC clock = 42MHz
-  DACC->DACC_IDR  = 0xFFFFFFFF;               // No interrupts
-  DACC->DACC_CHER = DACC_CHER_Chan;           // Enable channel
-
-  digitalWrite(PIN_PTT, m_pttInvert ? HIGH : LOW);
-  digitalWrite(PIN_COSLED, LOW);
-  digitalWrite(PIN_LED,    HIGH);
-}
-
-void CIO::interrupt()
-{
-  if ((ADC->ADC_ISR & ADC_ISR_EOC_Chan) == ADC_ISR_EOC_Chan) {    // Ensure there was an End-of-Conversion and we read the ISR reg
-    TSample sample = {DC_OFFSET, MARK_NONE};
-
-    m_txBuffer.get(sample);
-    DACC->DACC_CDR = sample.sample;
-
-    sample.sample = ADC->ADC_CDR[ADC_CDR_Chan];
-    m_rxBuffer.put(sample);
-
-#if defined(SEND_RSSI_DATA)
-    m_rssiBuffer.put(ADC->ADC_CDR[RSSI_CDR_Chan]);
-#else
-    m_rssiBuffer.put(0U);
-#endif
-
-    m_watchdog++;
-  }
-}
-
-bool CIO::getCOSInt()
-{
-  return digitalRead(PIN_COS) == HIGH;
-}
-
-void CIO::setLEDInt(bool on)
-{
-  digitalWrite(PIN_LED, on ? HIGH : LOW);
-}
-
-void CIO::setPTTInt(bool on)
-{
-  digitalWrite(PIN_PTT, on ? HIGH : LOW);
-}
-
-void CIO::setCOSInt(bool on)
-{
-  digitalWrite(PIN_COSLED, on ? HIGH : LOW);
-}
-
-void CIO::setDStarInt(bool on)
-{
-  digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
-}
-
-void CIO::setDMRInt(bool on)
-{
-  digitalWrite(PIN_DMR, on ? HIGH : LOW);
-}
-
-void CIO::setYSFInt(bool on)
-{
-  digitalWrite(PIN_YSF, on ? HIGH : LOW);
-}
-
-void CIO::setP25Int(bool on)
-{
-  digitalWrite(PIN_P25, on ? HIGH : LOW);
-}
-
-void CIO::setNXDNInt(bool on)
-{
-#if defined(USE_ALTERNATE_NXDN_LEDS)
-  digitalWrite(PIN_YSF, on ? HIGH : LOW);
-  digitalWrite(PIN_P25, on ? HIGH : LOW);
-#else
-  digitalWrite(PIN_NXDN, on ? HIGH : LOW);
-#endif
-}
-
-void CIO::setM17Int(bool on)
-{
-#if defined(USE_ALTERNATE_M17_LEDS)
-  digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
-  digitalWrite(PIN_P25,   on ? HIGH : LOW);
-#else
-  digitalWrite(PIN_M17, on ? HIGH : LOW);
-#endif
-}
-
-void CIO::setPOCSAGInt(bool on)
-{
-#if defined(USE_ALTERNATE_POCSAG_LEDS)
-  digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
-  digitalWrite(PIN_DMR,   on ? HIGH : LOW);
-#else
-  digitalWrite(PIN_POCSAG, on ? HIGH : LOW);
-#endif
-}
-
-void CIO::setFMInt(bool on)
-{
-#if defined(USE_ALTERNATE_FM_LEDS)
-  digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
-  digitalWrite(PIN_YSF,   on ? HIGH : LOW);
-#else
-  digitalWrite(PIN_FM, on ? HIGH : LOW);
-#endif
-}
-
-void CIO::delayInt(unsigned int dly)
-{
-  delay(dly);
-}
-
-uint8_t CIO::getCPU() const
-{
-  return 0U;
-}
-
-// Code taken from https://github.com/emagii/at91sam3s/blob/master/examples/eefc_uniqueid/main.c
-void CIO::getUDID(uint8_t* buffer)
-{
-  uint32_t status;
-
-  EFC1->EEFC_FCR = (0x5A << 24) | EFC_FCMD_STUI;
-  do {
-    status = EFC1->EEFC_FSR;
-  } while ( (status & EEFC_FSR_FRDY) == EEFC_FSR_FRDY );
-
-  for (uint8_t i = 0; i < 16; i+=4) {
-    buffer[i + 0] = *(uint32_t *)(IFLASH1_ADDR + i) >> 24;
-    buffer[i + 1] = *(uint32_t *)(IFLASH1_ADDR + i) >> 16;
-    buffer[i + 2] = *(uint32_t *)(IFLASH1_ADDR + i) >>  8;
-    buffer[i + 3] = *(uint32_t *)(IFLASH1_ADDR + i) >>  0;
-  }
-
-  EFC1->EEFC_FCR = (0x5A << 24) | EFC_FCMD_SPUI;
-  do {
-    status = EFC1->EEFC_FSR;
-  } while ( (status & EEFC_FSR_FRDY) != EEFC_FSR_FRDY );
-}
-
-#endif
-

IOPins.h

@@ -1,79 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _IO_PINS_H
-#define _IO_PINS_H
-
-#if !defined(CONFIG_H)
-#error "Requires Config.h to be included first!"
-#endif
-
-#if defined(STM32F4_RPT_HAT_TGO)
-    #include "pins/pins_f4_rpt_tgo.h"
-
-#elif defined(STM32F4_DISCOVERY)
-    #include "pins/pins_f4_discovery.h"
-
-#elif defined(STM32F4_PI)
-    #include "pins/pins_f4_pi.h"
-
-#elif defined(STM32F722_PI)
-    #include "pins/pins_f7_pi.h"
-
-#elif defined(STM32F4_F4M)
-    #include "pins/pins_f4_f4m.h"
-
-#elif defined(STM32F722_F7M)
-    #include "pins/pins_f7_f7m.h"
-
-#elif defined(STM32F722_RPT_HAT)
-    #include "pins/pins_f7_rpt_hat.h"
-
-#elif defined(STM32F4_NUCLEO)
-    #if defined(STM32F4_NUCLEO_MORPHO_HEADER)
-        #include "pins/pins_f4_nucleo_morpho.h"
-    #elif defined(STM32F4_NUCLEO_ARDUINO_HEADER)
-        #include "pins/pins_f4_nucleo_arduino.h"
-    #else
-        #error "Either STM32F4_NUCLEO_MORPHO_HEADER or STM32F4_NUCLEO_ARDUINO_HEADER need to be defined"
-    #endif
-
-#elif defined(STM32F7_NUCLEO)
-    #include "pins/pins_f7_nucleo.h"
-
-#elif defined(STM32F4_DVM)
-    #include "pins/pins_f4_stm32dvm_v3.h"
-
-#elif defined(STM32F7_DVM)
-    #include "pins/pins_f7_stm32dvm_v5.h"
-
-#elif defined(DRCC_DVM_NQF)
-    #include "pins/pins_f4_drcc_nqf.h"
-
-#elif defined(DRCC_DVM_HHP446)
-    #include "pins/pins_f4_drcc_hhp446.h"
-
-#elif defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
-    #include "pins/pins_f4_stm32eda.h"
-
-#else
-    #error "A valid board type macro need to be defined."
-
-#endif
-
-#endif  //#ifndef _IO_PINS_H

IOSTM.cpp

@@ -1,565 +0,0 @@
-/*
- *   Copyright (C) 2016 by Jim McLaughlin KI6ZUM
- *   Copyright (C) 2016,2017,2018 by Andy Uribe CA6JAU
- *   Copyright (C) 2017,2018,2020 by Jonathan Naylor G4KLX
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include "Config.h"
-#include "Globals.h"
-#include "IO.h"
-
-#if defined(STM32F4XX) || defined(STM32F7XX)
-#include "IOPins.h"
-
-
-const uint16_t DC_OFFSET = 2048U;
-
-// Sampling frequency
-#define SAMP_FREQ   24000
-
-extern "C" {
-   void TIM2_IRQHandler() {
-      if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET) {
-         TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
-         io.interrupt();
-      }
-   }
-}
-
-void CIO::initInt()
-{
-   GPIO_InitTypeDef GPIO_InitStruct;
-   GPIO_StructInit(&GPIO_InitStruct);
-   GPIO_InitStruct.GPIO_Speed = GPIO_Fast_Speed;
-   GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
-   GPIO_InitStruct.GPIO_PuPd  = GPIO_PuPd_DOWN;
-
-   // PTT pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_PTT, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_PTT;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_PTT, &GPIO_InitStruct);
-
-   // COSLED pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_COSLED, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_COSLED;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_COSLED, &GPIO_InitStruct);
-
-   // LED pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_LED, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_LED;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_LED, &GPIO_InitStruct);
-
-   // Init the input pins PIN_COS
-   RCC_AHB1PeriphClockCmd(RCC_Per_COS, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_COS;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_IN;
-   GPIO_Init(PORT_COS, &GPIO_InitStruct);
-
-#if defined(MODE_LEDS)
-   // DSTAR pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_DSTAR, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_DSTAR;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_DSTAR, &GPIO_InitStruct);
-
-   // DMR pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_DMR, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_DMR;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_DMR, &GPIO_InitStruct);
-
-   // YSF pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_YSF, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_YSF;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_YSF, &GPIO_InitStruct);
-
-   // P25 pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_P25, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_P25;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_P25, &GPIO_InitStruct);
-
-#if !defined(USE_ALTERNATE_NXDN_LEDS)
-   // NXDN pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_NXDN, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_NXDN;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_NXDN, &GPIO_InitStruct);
-#endif
-
-#if !defined(USE_ALTERNATE_M17_LEDS)
-   // M17 pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_M17, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_M17;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_M17, &GPIO_InitStruct);
-#endif
-
-#if !defined(USE_ALTERNATE_POCSAG_LEDS)
-   // POCSAG pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_POCSAG, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_POCSAG;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_POCSAG, &GPIO_InitStruct);
-#endif
-
-#if !defined(USE_ALTERNATE_FM_LEDS)
-   // FM pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_FM, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_FM;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_FM, &GPIO_InitStruct);
-#endif
-
-#endif
-
-#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
-   // DSTAR mode pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_MDSTAR, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_MDSTAR;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_MDSTAR, &GPIO_InitStruct);
-
-   // DMR mode pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_MDMR, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_MDMR;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_MDMR, &GPIO_InitStruct);
-
-   // YSF mode pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_MYSF, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_MYSF;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_MYSF, &GPIO_InitStruct);
-
-   // P25 mode pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_MP25, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_MP25;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_MP25, &GPIO_InitStruct);
-
-#if !defined(USE_ALTERNATE_NXDN_LEDS)
-   // NXDN mode pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_MNXDN, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_MNXDN;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_MNXDN, &GPIO_InitStruct);
-#endif
-
-#if !defined(USE_ALTERNATE_M17_LEDS)
-   // M17 mode pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_MM17, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_MM17;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_MM17, &GPIO_InitStruct);
-#endif
-
-#if !defined(USE_ALTERNATE_POCSAG_LEDS)
-   // POCSAG mode pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_MPOCSAG, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_MPOCSAG;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_MPOCSAG, &GPIO_InitStruct);
-#endif
-
-#if !defined(USE_ALTERNATE_FM_LEDS)
-   // FM mode pin
-   RCC_AHB1PeriphClockCmd(RCC_Per_MFM, ENABLE);
-   GPIO_InitStruct.GPIO_Pin   = PIN_MFM;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
-   GPIO_Init(PORT_MFM, &GPIO_InitStruct);
-#endif
-
-#endif
-}
-
-void CIO::startInt()
-{
-   if ((ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC) != RESET))
-      io.interrupt();
-
-   // Init the ADC
-   GPIO_InitTypeDef        GPIO_InitStruct;
-   ADC_InitTypeDef         ADC_InitStructure;
-   ADC_CommonInitTypeDef   ADC_CommonInitStructure;
-
-   GPIO_StructInit(&GPIO_InitStruct);
-   ADC_CommonStructInit(&ADC_CommonInitStructure);
-   ADC_StructInit(&ADC_InitStructure);
-
-   // Enable ADC1 clock
-   RCC_AHB1PeriphClockCmd(RCC_Per_RX, ENABLE);
-   RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
-   // Enable ADC1 GPIO
-   GPIO_InitStruct.GPIO_Pin  = PIN_RX;
-   GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN;
-   GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL ;
-   GPIO_Init(PORT_RX, &GPIO_InitStruct);
-
-#if defined(SEND_RSSI_DATA)
-   // Enable ADC2 clock
-   RCC_AHB1PeriphClockCmd(RCC_Per_RSSI, ENABLE);
-   RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC2, ENABLE);
-   // Enable ADC2 GPIO
-   GPIO_InitStruct.GPIO_Pin  = PIN_RSSI;
-   GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AN;
-   GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL ;
-   GPIO_Init(PORT_RSSI, &GPIO_InitStruct);
-#endif
-
-   // Init ADCs in dual mode (RSSI), div clock by two
-#if defined(SEND_RSSI_DATA)
-   ADC_CommonInitStructure.ADC_Mode             = ADC_DualMode_RegSimult;
-#else
-   ADC_CommonInitStructure.ADC_Mode             = ADC_Mode_Independent;
-#endif
-   ADC_CommonInitStructure.ADC_Prescaler        = ADC_Prescaler_Div2;
-   ADC_CommonInitStructure.ADC_DMAAccessMode    = ADC_DMAAccessMode_Disabled;
-   ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
-   ADC_CommonInit(&ADC_CommonInitStructure);
-
-   // Init ADC1 and ADC2: 12bit, single-conversion
-   ADC_InitStructure.ADC_Resolution           = ADC_Resolution_12b;
-   ADC_InitStructure.ADC_ScanConvMode         = DISABLE;
-   ADC_InitStructure.ADC_ContinuousConvMode   = DISABLE;
-   ADC_InitStructure.ADC_ExternalTrigConvEdge = 0;
-   ADC_InitStructure.ADC_ExternalTrigConv     = 0;
-   ADC_InitStructure.ADC_DataAlign            = ADC_DataAlign_Right;
-   ADC_InitStructure.ADC_NbrOfConversion      = 1;
-
-   ADC_Init(ADC1, &ADC_InitStructure);
-
-   ADC_EOCOnEachRegularChannelCmd(ADC1, ENABLE);
-   ADC_RegularChannelConfig(ADC1, PIN_RX_CH, 1, ADC_SampleTime_3Cycles);
-
-   // Enable ADC1
-   ADC_Cmd(ADC1, ENABLE);
-
-#if defined(SEND_RSSI_DATA)
-   ADC_Init(ADC2, &ADC_InitStructure);
-
-   ADC_EOCOnEachRegularChannelCmd(ADC2, ENABLE);
-   ADC_RegularChannelConfig(ADC2, PIN_RSSI_CH, 1, ADC_SampleTime_3Cycles);
-
-   // Enable ADC2
-   ADC_Cmd(ADC2, ENABLE);
-#endif
-
-   // Init the DAC
-   DAC_InitTypeDef DAC_InitStructure;
-
-   GPIO_StructInit(&GPIO_InitStruct);
-   DAC_StructInit(&DAC_InitStructure);
-
-   // GPIOA clock enable
-   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
-
-   // DAC Periph clock enable
-   RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE);
-
-   // GPIO CONFIGURATION of DAC Pin
-   GPIO_InitStruct.GPIO_Pin   = PIN_TX;
-   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_AN;
-   GPIO_InitStruct.GPIO_PuPd  = GPIO_PuPd_NOPULL;
-   GPIO_Init(GPIOA, &GPIO_InitStruct);
-
-   DAC_InitStructure.DAC_Trigger = DAC_Trigger_None;
-   DAC_InitStructure.DAC_WaveGeneration = DAC_WaveGeneration_None;
-   DAC_InitStructure.DAC_OutputBuffer = DAC_OutputBuffer_Enable;
-   DAC_Init(PIN_TX_CH, &DAC_InitStructure);
-   DAC_Cmd(PIN_TX_CH, ENABLE);
-
-   // Init the timer
-   RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE);
-
-#if defined(EXTERNAL_OSC) && !(defined(STM32F4_PI) || defined(STM32F722_PI))
-   // Configure a GPIO as external TIM2 clock source
-   GPIO_PinAFConfig(PORT_EXT_CLK, SRC_EXT_CLK, GPIO_AF_TIM2);
-   GPIO_InitStruct.GPIO_Pin = PIN_EXT_CLK;
-   GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
-   GPIO_Init(PORT_EXT_CLK, &GPIO_InitStruct);
-#endif
-
-   TIM_TimeBaseInitTypeDef timerInitStructure;
-   TIM_TimeBaseStructInit (&timerInitStructure);
-
-   // TIM2 output frequency
-#if defined(EXTERNAL_OSC) && !(defined(STM32F4_PI) || defined(STM32F722_PI))
-   timerInitStructure.TIM_Prescaler = (uint16_t) ((EXTERNAL_OSC/(2*SAMP_FREQ)) - 1);
-   timerInitStructure.TIM_Period = 1;
-#else
-   timerInitStructure.TIM_Prescaler = (uint16_t) ((SystemCoreClock/(6*SAMP_FREQ)) - 1);
-   timerInitStructure.TIM_Period = 2;
-#endif
-
-   timerInitStructure.TIM_CounterMode       = TIM_CounterMode_Up;
-   timerInitStructure.TIM_ClockDivision     = TIM_CKD_DIV1;
-   timerInitStructure.TIM_RepetitionCounter = 0;
-   TIM_TimeBaseInit(TIM2, &timerInitStructure);
-
-#if defined(EXTERNAL_OSC) && !(defined(STM32F4_PI) || defined(STM32F722_PI))
-   // Enable external clock
-   TIM_ETRClockMode2Config(TIM2, TIM_ExtTRGPSC_OFF, TIM_ExtTRGPolarity_NonInverted, 0x00);
-#else
-   // Enable internal clock
-   TIM_InternalClockConfig(TIM2);
-#endif
-
-   // Enable TIM2
-   TIM_Cmd(TIM2, ENABLE);
-   // Enable TIM2 interrupt
-   TIM_ITConfig(TIM2, TIM_IT_Update, ENABLE);
-
-   NVIC_InitTypeDef nvicStructure;
-   nvicStructure.NVIC_IRQChannel                   = TIM2_IRQn;
-   nvicStructure.NVIC_IRQChannelPreemptionPriority = 0;
-   nvicStructure.NVIC_IRQChannelSubPriority        = 1;
-   nvicStructure.NVIC_IRQChannelCmd                = ENABLE;
-   NVIC_Init(&nvicStructure);
-
-   GPIO_ResetBits(PORT_COSLED, PIN_COSLED);
-   GPIO_SetBits(PORT_LED, PIN_LED);
-}
-
-void CIO::interrupt()
-{
-   TSample sample = {DC_OFFSET, MARK_NONE};
-   uint16_t rawRSSI = 0U;
-
-   m_txBuffer.get(sample);
-
-   // Send the value to the DAC
-#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
-   DAC_SetChannel2Data(DAC_Align_12b_R, sample.sample);
-#else
-   DAC_SetChannel1Data(DAC_Align_12b_R, sample.sample);
-#endif
-
-   // Read value from ADC1 and ADC2
-   if ((ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC) == RESET)) {
-      // shouldn't be still in reset at this point so null the sample value?
-      sample.sample  = 0U;
-   } else {
-      sample.sample  = ADC_GetConversionValue(ADC1);
-#if defined(SEND_RSSI_DATA)
-      rawRSSI = ADC_GetConversionValue(ADC2);
-#endif
-   }
-
-   // trigger next ADC1
-   ADC_ClearFlag(ADC1, ADC_FLAG_EOC);
-   ADC_SoftwareStartConv(ADC1);
-
-   m_rxBuffer.put(sample);
-   m_rssiBuffer.put(rawRSSI);
-
-   m_watchdog++;
-}
-
-bool CIO::getCOSInt()
-{
-   return GPIO_ReadInputDataBit(PORT_COS, PIN_COS) == Bit_SET;
-}
-
-void CIO::setLEDInt(bool on)
-{
-   GPIO_WriteBit(PORT_LED, PIN_LED, on ? Bit_SET : Bit_RESET);
-}
-
-void CIO::setPTTInt(bool on)
-{
-   GPIO_WriteBit(PORT_PTT, PIN_PTT, on ? Bit_SET : Bit_RESET);
-}
-
-void CIO::setCOSInt(bool on)
-{
-   GPIO_WriteBit(PORT_COSLED, PIN_COSLED, on ? Bit_SET : Bit_RESET);
-}
-
-void CIO::setDStarInt(bool on)
-{
-#if defined(MODE_LEDS)
-   GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
-#endif
-#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
-   GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
-#endif
-}
-
-void CIO::setDMRInt(bool on)
-{
-#if defined(MODE_LEDS)
-   GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
-#endif
-#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
-   GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET);
-#endif
-}
-
-void CIO::setYSFInt(bool on)
-{
-#if defined(MODE_LEDS)
-   GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
-#endif
-#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
-   GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
-#endif
-}
-
-void CIO::setP25Int(bool on)
-{
-#if defined(MODE_LEDS)
-   GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
-#endif
-#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
-   GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
-#endif
-}
-
-void CIO::setNXDNInt(bool on)
-{
-#if defined(MODE_LEDS)
-#if defined(USE_ALTERNATE_NXDN_LEDS)
-   GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
-   GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
-#else
-   GPIO_WriteBit(PORT_NXDN, PIN_NXDN, on ? Bit_SET : Bit_RESET);
-#endif
-#endif
-
-#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
-#if defined(USE_ALTERNATE_NXDN_LEDS)
-   GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
-   GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
-#else
-   GPIO_WriteBit(PORT_MNXDN, PIN_MNXDN, on ? Bit_SET : Bit_RESET);
-#endif
-#endif
-}
-
-void CIO::setM17Int(bool on)
-{
-#if defined(MODE_LEDS)
-#if defined(USE_ALTERNATE_M17_LEDS)
-   GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
-   GPIO_WriteBit(PORT_P25,   PIN_P25, on ? Bit_SET : Bit_RESET);
-#else
-   GPIO_WriteBit(PORT_M17, PIN_M17, on ? Bit_SET : Bit_RESET);
-#endif
-#endif
-
-#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
-#if defined(USE_ALTERNATE_M17_LEDS)
-   GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
-   GPIO_WriteBit(PORT_MP25,   PIN_MP25,   on ? Bit_SET : Bit_RESET);
-#else
-   GPIO_WriteBit(PORT_MM17, PIN_MM17, on ? Bit_SET : Bit_RESET);
-#endif
-#endif
-}
-
-void CIO::setPOCSAGInt(bool on)
-{
-#if defined(MODE_LEDS)
-#if defined(USE_ALTERNATE_POCSAG_LEDS)
-   GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
-   GPIO_WriteBit(PORT_DMR,   PIN_DMR,   on ? Bit_SET : Bit_RESET);
-#else
-   GPIO_WriteBit(PORT_POCSAG,  PIN_POCSAG, on ? Bit_SET : Bit_RESET);
-#endif
-#endif
-
-#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
-#if defined(USE_ALTERNATE_POCSAG_LEDS)
-   GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
-   GPIO_WriteBit(PORT_MDMR,   PIN_MDMR,   on ? Bit_SET : Bit_RESET);
-#else
-   GPIO_WriteBit(PORT_MPOCSAG, PIN_MPOCSAG, on ? Bit_SET : Bit_RESET);
-#endif
-#endif
-}
-
-void CIO::setFMInt(bool on)
-{
-#if defined(MODE_LEDS)
-#if defined(USE_ALTERNATE_FM_LEDS)
-   GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
-   GPIO_WriteBit(PORT_YSF,   PIN_YSF,   on ? Bit_SET : Bit_RESET);
-#else
-   GPIO_WriteBit(PORT_FM,  PIN_FM, on ? Bit_SET : Bit_RESET);
-#endif
-#endif
-
-#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
-#if defined(USE_ALTERNATE_FM_LEDS)
-   GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
-   GPIO_WriteBit(PORT_MYSF,   PIN_MYSF,   on ? Bit_SET : Bit_RESET);
-#else
-   GPIO_WriteBit(PORT_MFM, PIN_MFM, on ? Bit_SET : Bit_RESET);
-#endif
-#endif
-}
-
-// Simple delay function for STM32
-// Example from: http://thehackerworkshop.com/?p=1209
-void CIO::delayInt(unsigned int dly)
-{
-#if defined(STM32F7XX)
-  unsigned int loopsPerMillisecond = (SystemCoreClock/1000);
-#else
-  unsigned int loopsPerMillisecond = (SystemCoreClock/1000) / 3;
-#endif
-
-  for (; dly > 0; dly--)
-  {
-    asm volatile //this routine waits (approximately) one millisecond
-    (
-      "mov r3, %[loopsPerMillisecond] \n\t" //load the initial loop counter
-      "loop: \n\t"
-        "subs r3, #1 \n\t"
-        "bne loop \n\t"
-
-      : //empty output list
-      : [loopsPerMillisecond] "r" (loopsPerMillisecond) //input to the asm routine
-      : "r3", "cc" //clobber list
-    );
-  }
-}
-
-uint8_t CIO::getCPU() const
-{
-  return 2U;
-}
-
-void CIO::getUDID(uint8_t* buffer)
-{
-#if defined(STM32F4XX)
-  ::memcpy(buffer, (void *)0x1FFF7A10, 12U);
-#elif defined(STM32F722xx)
-  ::memcpy(buffer, (void *)0x1FF07A10, 12U);
-#elif defined(STM32F767xx)
-  ::memcpy(buffer, (void *)0x1FF0F420, 12U);
-#endif
-}
-
-#endif
-

IOTeensy.cpp

@@ -1,289 +0,0 @@
-/*
- *   Copyright (C) 2016,2017,2018,2020 by Jonathan Naylor G4KLX
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include "Config.h"
-#include "Globals.h"
-#include "IO.h"
-
-#if defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
-
-#if defined(EXTERNAL_OSC)
-#define PIN_LED                3
-#else
-#define PIN_LED                13
-#endif
-#define PIN_COS                4
-#define PIN_PTT                5
-#define PIN_COSLED             6
-#define PIN_DSTAR              9
-#define PIN_DMR                10
-#define PIN_YSF                11
-#define PIN_P25                12
-#if defined(__MK20DX256__)
-#define PIN_NXDN               2
-#define PIN_POCSAG             3
-#define PIN_FM                 4
-#else
-#define PIN_NXDN               24
-#define PIN_POCSAG             25
-#define PIN_FM                 26
-#endif
-#define PIN_ADC                5        // A0,  Pin 14
-#define PIN_RSSI               4        // Teensy 3.5/3.6, A16, Pin 35. Teensy 3.1/3.2, A17, Pin 28
-
-#define PDB_CHnC1_TOS 0x0100
-#define PDB_CHnC1_EN  0x0001
-
-const uint16_t DC_OFFSET = 2048U;
-
-extern "C" {
-  void adc0_isr()
-  {
-    io.interrupt();
-  }
-}
-
-void CIO::initInt()
-{
-  // Set up the TX, COS and LED pins
-  pinMode(PIN_PTT,    OUTPUT);
-  pinMode(PIN_COSLED, OUTPUT);
-  pinMode(PIN_LED,    OUTPUT);
-  pinMode(PIN_COS,    INPUT);
-
-#if defined(MODE_LEDS)
-  // Set up the mode output pins
-  pinMode(PIN_DSTAR,  OUTPUT);
-  pinMode(PIN_DMR,    OUTPUT);
-  pinMode(PIN_YSF,    OUTPUT);
-  pinMode(PIN_P25,    OUTPUT);
-#if !defined(USE_ALTERNATE_NXDN_LEDS)
-  pinMode(PIN_NXDN,   OUTPUT);
-#endif
-#if !defined(USE_ALTERNATE_M17_LEDS)
-  pinMode(PIN_M17,    OUTPUT);
-#endif
-#if !defined(USE_ALTERNATE_POCSAG_LEDS)
-  pinMode(PIN_POCSAG, OUTPUT);
-#endif
-#if !defined(USE_ALTERNATE_FM_LEDS)
-  pinMode(PIN_FM,     OUTPUT);
-#endif
-#endif
-}
-
-void CIO::startInt()
-{
-  // Initialise the DAC
-  SIM_SCGC2 |= SIM_SCGC2_DAC0;
-  DAC0_C0    = DAC_C0_DACEN | DAC_C0_DACRFS;                          // 3.3V VDDA is DACREF_2
-
-  // Initialise ADC0
-  SIM_SCGC6 |= SIM_SCGC6_ADC0;
-  ADC0_CFG1  = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) |                // Single-ended 12 bits, long sample time
-               ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
-  ADC0_CFG2  = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2);                  // Select channels ADxxxb
-  ADC0_SC2   = ADC_SC2_REFSEL(0) | ADC_SC2_ADTRG;                     // Voltage ref external, hardware trigger
-  ADC0_SC3   = ADC_SC3_AVGE | ADC_SC3_AVGS(0);                        // Enable averaging, 4 samples
-
-  ADC0_SC3  |= ADC_SC3_CAL;
-  while (ADC0_SC3 & ADC_SC3_CAL)                                      // Wait for calibration
-    ;
-
-  uint16_t sum0 = ADC0_CLPS + ADC0_CLP4 + ADC0_CLP3 +                 // Plus side gain
-                  ADC0_CLP2 + ADC0_CLP1 + ADC0_CLP0;
-  sum0 = (sum0 / 2U) | 0x8000U;
-  ADC0_PG    = sum0;
-
-  ADC0_SC1A  = ADC_SC1_AIEN | PIN_ADC;                                // Enable ADC interrupt, use A0
-  NVIC_ENABLE_IRQ(IRQ_ADC0);
-
-#if defined(SEND_RSSI_DATA)
-  // Initialise ADC1
-  SIM_SCGC3 |= SIM_SCGC3_ADC1;
-  ADC1_CFG1  = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) |                // Single-ended 12 bits, long sample time
-               ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
-  ADC1_CFG2  = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2);                  // Select channels ADxxxb
-  ADC1_SC2   = ADC_SC2_REFSEL(0);                                     // Voltage ref external, software trigger
-  ADC1_SC3   = ADC_SC3_AVGE | ADC_SC3_AVGS(0);                        // Enable averaging, 4 samples
-
-  ADC1_SC3  |= ADC_SC3_CAL;
-  while (ADC1_SC3 & ADC_SC3_CAL)                                      // Wait for calibration
-    ;
-
-  uint16_t sum1 = ADC1_CLPS + ADC1_CLP4 + ADC1_CLP3 +                 // Plus side gain
-                  ADC1_CLP2 + ADC1_CLP1 + ADC1_CLP0;
-  sum1 = (sum1 / 2U) | 0x8000U;
-  ADC1_PG    = sum1;
-#endif
-
-#if defined(EXTERNAL_OSC)
-  // Set ADC0 to trigger from the LPTMR at 24 kHz
-  SIM_SOPT7   = SIM_SOPT7_ADC0ALTTRGEN |                              // Enable ADC0 alternate trigger
-                SIM_SOPT7_ADC0TRGSEL(14);                             // Trigger ADC0 by LPTMR0
-
-  CORE_PIN13_CONFIG = PORT_PCR_MUX(3);
-
-  SIM_SCGC5  |= SIM_SCGC5_LPTIMER;                                    // Enable Low Power Timer Access
-  LPTMR0_CSR  = 0;                                                    // Disable
-  LPTMR0_PSR  = LPTMR_PSR_PBYP;                                       // Bypass prescaler/filter
-  LPTMR0_CMR  = (EXTERNAL_OSC / 24000) - 1;                           // Frequency divided by CMR + 1
-  LPTMR0_CSR  = LPTMR_CSR_TPS(2) |                                    // Pin: 0=CMP0, 1=xtal, 2=pin13
-                LPTMR_CSR_TMS;                                        // Mode Select, 0=timer, 1=counter
-  LPTMR0_CSR |= LPTMR_CSR_TEN;                                        // Enable
-#else
-  // Setup PDB for ADC0 at 24 kHz
-  SIM_SCGC6  |= SIM_SCGC6_PDB;                                        // Enable PDB clock
-  PDB0_MOD    = (F_BUS / 24000) - 1;                                  // Timer period - 1
-  PDB0_IDLY   = 0;                                                    // Interrupt delay
-  PDB0_CH0C1  = PDB_CHnC1_TOS | PDB_CHnC1_EN;                         // Enable pre-trigger for ADC0
-  PDB0_SC     = PDB_SC_TRGSEL(15) | PDB_SC_PDBEN |                    // SW trigger, enable interrupts, continuous mode
-                PDB_SC_PDBIE | PDB_SC_CONT | PDB_SC_LDOK;             // No prescaling
-  PDB0_SC    |= PDB_SC_SWTRIG;                                        // Software trigger (reset and restart counter)
-#endif
-
-  digitalWrite(PIN_PTT, m_pttInvert ? HIGH : LOW);
-  digitalWrite(PIN_COSLED, LOW);
-  digitalWrite(PIN_LED,    HIGH);
-}
-
-void CIO::interrupt()
-{
-   TSample sample = {DC_OFFSET, MARK_NONE};
-
-  m_txBuffer.get(sample);
-  *(int16_t *)&(DAC0_DAT0L) = sample.sample;
-
-  if ((ADC0_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
-    sample.sample = ADC0_RA;
-    m_rxBuffer.put(sample);
-  }
-    
-#if defined(SEND_RSSI_DATA)
-  if ((ADC1_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
-    uint16_t rssi = ADC1_RA;
-    m_rssiBuffer.put(rssi);
-  } else {
-    m_rssiBuffer.put(0U);
-  }
-
-  ADC1_SC1A  = PIN_RSSI;         				    // Start the next RSSI conversion
-#else
-  m_rssiBuffer.put(0U);
-#endif
-
-  m_watchdog++;
-}
-
-bool CIO::getCOSInt()
-{
-  return digitalRead(PIN_COS) == HIGH;
-}
-
-void CIO::setLEDInt(bool on)
-{
-  digitalWrite(PIN_LED, on ? HIGH : LOW);
-}
-
-void CIO::setPTTInt(bool on)
-{
-  digitalWrite(PIN_PTT, on ? HIGH : LOW);
-}
-
-void CIO::setCOSInt(bool on)
-{
-  digitalWrite(PIN_COSLED, on ? HIGH : LOW);
-}
-
-void CIO::setDStarInt(bool on)
-{
-  digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
-}
-
-void CIO::setDMRInt(bool on) 
-{
-  digitalWrite(PIN_DMR, on ? HIGH : LOW);
-}
-
-void CIO::setYSFInt(bool on)
-{
-  digitalWrite(PIN_YSF, on ? HIGH : LOW);
-}
-
-void CIO::setP25Int(bool on) 
-{
-  digitalWrite(PIN_P25, on ? HIGH : LOW);
-}
-
-void CIO::setNXDNInt(bool on)
-{
-#if defined(USE_ALTERNATE_NXDN_LEDS)
-  digitalWrite(PIN_YSF, on ? HIGH : LOW);
-  digitalWrite(PIN_P25, on ? HIGH : LOW);
-#else
-  digitalWrite(PIN_NXDN, on ? HIGH : LOW);
-#endif
-}
-
-void CIO::setM17Int(bool on)
-{
-#if defined(USE_ALTERNATE_M17_LEDS)
-  digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
-  digitalWrite(PIN_P25,   on ? HIGH : LOW);
-#else
-  digitalWrite(PIN_M17, on ? HIGH : LOW);
-#endif
-}
-
-void CIO::setPOCSAGInt(bool on)
-{
-#if defined(USE_ALTERNATE_POCSAG_LEDS)
-  digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
-  digitalWrite(PIN_DMR,   on ? HIGH : LOW);
-#else
-  digitalWrite(PIN_POCSAG, on ? HIGH : LOW);
-#endif
-}
-
-void CIO::setFMInt(bool on)
-{
-#if defined(USE_ALTERNATE_FM_LEDS)
-  digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
-  digitalWrite(PIN_YSF,   on ? HIGH : LOW);
-#else
-  digitalWrite(PIN_FM, on ? HIGH : LOW);
-#endif
-}
-
-void CIO::delayInt(unsigned int dly)
-{
-  delay(dly);
-}
-
-uint8_t CIO::getCPU() const
-{
-  return 1U;
-}
-
-void CIO::getUDID(uint8_t* buffer)
-{
-  ::memcpy(buffer, (void *)0x4058, 16U);
-}
-
-#endif
-

MMDVM.ino

@@ -1,207 +0,0 @@
-/*
- *   Copyright (C) 2015,2016,2017,2018,2020,2021 by Jonathan Naylor G4KLX
- *   Copyright (C) 2016 by Colin Durbridge G4EML
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include "Config.h"
-#include "Globals.h"
-
-// Global variables
-MMDVM_STATE m_modemState = STATE_IDLE;
-
-bool m_dstarEnable  = true;
-bool m_dmrEnable    = true;
-bool m_ysfEnable    = true;
-bool m_p25Enable    = true;
-bool m_nxdnEnable   = true;
-bool m_m17Enable    = true;
-bool m_pocsagEnable = true;
-bool m_fmEnable     = true;
-bool m_ax25Enable   = true;
-
-bool m_duplex = true;
-
-bool m_tx  = false;
-bool m_dcd = false;
-
-#if defined(MODE_DSTAR)
-CDStarRX dstarRX;
-CDStarTX dstarTX;
-
-CCalDStarRX calDStarRX;
-CCalDStarTX calDStarTX;
-#endif
-
-#if defined(MODE_DMR)
-CDMRIdleRX dmrIdleRX;
-CDMRRX dmrRX;
-CDMRTX dmrTX;
-
-CDMRDMORX dmrDMORX;
-CDMRDMOTX dmrDMOTX;
-
-CCalDMR calDMR;
-#endif
-
-#if defined(MODE_YSF)
-CYSFRX ysfRX;
-CYSFTX ysfTX;
-#endif
-
-#if defined(MODE_P25)
-CP25RX p25RX;
-CP25TX p25TX;
-
-CCalP25 calP25;
-#endif
-
-#if defined(MODE_NXDN)
-CNXDNRX nxdnRX;
-CNXDNTX nxdnTX;
-
-CCalNXDN calNXDN;
-#endif
-
-#if defined(MODE_M17)
-CM17RX m17RX;
-CM17TX m17TX;
-
-CCalM17 calM17;
-#endif
-
-#if defined(MODE_POCSAG)
-CPOCSAGTX  pocsagTX;
-CCalPOCSAG calPOCSAG;
-#endif
-
-#if defined(MODE_FM)
-CFM    fm;
-CCalFM calFM;
-#endif
-
-#if defined(MODE_AX25)
-CAX25RX ax25RX;
-CAX25TX ax25TX;
-#endif
-
-CCalRSSI calRSSI;
-
-CCWIdTX cwIdTX;
-
-CSerialPort serial;
-CIO io;
-
-void setup()
-{
-  serial.start();
-}
-
-void loop()
-{
-  serial.process();
-  
-  io.process();
-
-  // The following is for transmitting
-#if defined(MODE_DSTAR)
-  if (m_dstarEnable && m_modemState == STATE_DSTAR)
-    dstarTX.process();
-#endif
-
-#if defined(MODE_DMR)
-  if (m_dmrEnable && m_modemState == STATE_DMR) {
-    if (m_duplex)
-      dmrTX.process();
-    else
-      dmrDMOTX.process();
-  }
-#endif
-
-#if defined(MODE_YSF)
-  if (m_ysfEnable && m_modemState == STATE_YSF)
-    ysfTX.process();
-#endif
-
-#if defined(MODE_P25)
-  if (m_p25Enable && m_modemState == STATE_P25)
-    p25TX.process();
-#endif
-
-#if defined(MODE_NXDN)
-  if (m_nxdnEnable && m_modemState == STATE_NXDN)
-    nxdnTX.process();
-#endif
-
-#if defined(MODE_M17)
-  if (m_m17Enable && m_modemState == STATE_M17)
-    m17TX.process();
-#endif
-
-#if defined(MODE_POCSAG)
-  if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
-    pocsagTX.process();
-#endif
-
-#if defined(MODE_AX25)
-  if (m_ax25Enable && (m_modemState == STATE_IDLE || m_modemState == STATE_FM))
-    ax25TX.process();
-#endif
-
-#if defined(MODE_FM)
-  if (m_fmEnable && m_modemState == STATE_FM)
-    fm.process();
-#endif
-
-#if defined(MODE_DSTAR)
-  if (m_modemState == STATE_DSTARCAL)
-    calDStarTX.process();
-#endif
-
-#if defined(MODE_DMR)
-  if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K || m_modemState == STATE_DMRDMO1K)
-    calDMR.process();
-#endif
-
-#if defined(MODE_FM)
-  if (m_modemState == STATE_FMCAL10K || m_modemState == STATE_FMCAL12K || m_modemState == STATE_FMCAL15K || m_modemState == STATE_FMCAL20K || m_modemState == STATE_FMCAL25K || m_modemState == STATE_FMCAL30K)
-    calFM.process();
-#endif
-
-#if defined(MODE_P25)
-  if (m_modemState == STATE_P25CAL1K)
-    calP25.process();
-#endif
-
-#if defined(MODE_NXDN)
-  if (m_modemState == STATE_NXDNCAL1K)
-    calNXDN.process();
-#endif
-
-#if defined(MODE_M17)
-  if (m_modemState == STATE_M17CAL)
-    calM17.process();
-#endif
-
-#if defined(MODE_POCSAG)
-  if (m_modemState == STATE_POCSAGCAL)
-    calPOCSAG.process();
-#endif
-
-  if (m_modemState == STATE_IDLE)
-    cwIdTX.process();
-}
-

Makefile

@@ -1,413 +0,0 @@
-#  Copyright (C) 2016,2017,2018 by Andy Uribe CA6JAU
-#  Copyright (C) 2016 by Jim McLaughlin KI6ZUM
-
-#  This program is free software; you can redistribute it and/or modify
-#  it under the terms of the GNU General Public License as published by
-#  the Free Software Foundation; either version 2 of the License, or
-#  (at your option) any later version.
-
-#  This program is distributed in the hope that it will be useful,
-#  but WITHOUT ANY WARRANTY; without even the implied warranty of
-#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-#  GNU General Public License for more details.
-
-#  You should have received a copy of the GNU General Public License
-#  along with this program; if not, write to the Free Software
-#  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-
-# MMDVM source files
-MMDVM_PATH=.
-
-# STM32 library paths
-F4_LIB_PATH=./STM32F4XX_Lib
-F7_LIB_PATH=./STM32F7XX_Lib
-
-# MCU external clock frequency (Hz)
-CLK_MMDVM_PI=12000000
-CLK_NUCLEO=8000000
-CLK_12MHZ=12000000
-
-# Directory Structure
-BINDIR=bin
-OBJDIR_F4=obj_f4
-OBJDIR_F7=obj_f7
-
-# Output files
-BINELF_F4=mmdvm_f4.elf
-BINHEX_F4=mmdvm_f4.hex
-BINBIN_F4=mmdvm_f4.bin
-BINELF_F7=mmdvm_f7.elf
-BINHEX_F7=mmdvm_f7.hex
-BINBIN_F7=mmdvm_f7.bin
-
-# Header directories
-INC_F4= . $(F4_LIB_PATH)/CMSIS/Include/ $(F4_LIB_PATH)/Device/ $(F4_LIB_PATH)/STM32F4xx_StdPeriph_Driver/include/
-INCLUDES_F4=$(INC_F4:%=-I%)
-INC_F7= . $(F7_LIB_PATH)/CMSIS/Include/ $(F7_LIB_PATH)/Device/ $(F7_LIB_PATH)/STM32F7xx_StdPeriph_Driver/inc/
-INCLUDES_F7=$(INC_F7:%=-I%)
-
-# CMSIS libraries
-INCLUDES_LIBS_F4=$(F4_LIB_PATH)/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a
-INCLUDES_LIBS_F7=$(F7_LIB_PATH)/CMSIS/Lib/GCC/libarm_cortexM7lfsp_math.a
-
-# STM32F4 Standard Peripheral Libraries source path
-STD_LIB_F4=$(F4_LIB_PATH)/STM32F4xx_StdPeriph_Driver/source
-
-# STM32F7 Standard Peripheral Libraries source path
-STD_LIB_F7=$(F7_LIB_PATH)/STM32F7xx_StdPeriph_Driver/src
-
-# STM32F4 system source path
-SYS_DIR_F4=$(F4_LIB_PATH)/Device
-STARTUP_DIR_F4=$(F4_LIB_PATH)/Device/startup
-
-# STM32F7 system source path
-SYS_DIR_F7=$(F7_LIB_PATH)/Device
-STARTUP_DIR_F7=$(F7_LIB_PATH)/Device/startup
-
-# GNU ARM Embedded Toolchain
-CC=arm-none-eabi-gcc
-CXX=arm-none-eabi-g++
-LD=arm-none-eabi-ld
-AR=arm-none-eabi-ar
-AS=arm-none-eabi-as
-CP=arm-none-eabi-objcopy
-OD=arm-none-eabi-objdump
-NM=arm-none-eabi-nm
-SIZE=arm-none-eabi-size
-A2L=arm-none-eabi-addr2line
-
-# "SystemRoot" is only defined in Windows
-ifdef SYSTEMROOT
-	CLEANCMD=del /S *.o *.hex *.bin *.elf GitVersion.h
-	MDDIRS=md $@
-else ifdef SystemRoot
-	CLEANCMD=del /S *.o *.hex *.bin *.elf GitVersion.h
-	MDDIRS=md $@
-else
-	CLEANCMD=rm -f $(OBJ_F4) $(OBJ_F7) $(BINDIR)/*.hex $(BINDIR)/*.bin $(BINDIR)/*.elf GitVersion.h
-	MDDIRS=mkdir $@
-endif
-
-# Default reference oscillator frequencies
-ifndef $(OSC)
-	ifeq ($(MAKECMDGOALS),pi)
-		OSC=$(CLK_MMDVM_PI)
-	else ifeq ($(MAKECMDGOALS),pi-f722)
-		OSC=$(CLK_MMDVM_PI)
-	else ifeq ($(MAKECMDGOALS),drcc_nqf)
-		OSC=$(CLK_12MHZ)
-	else
-		OSC=$(CLK_NUCLEO)
-	endif
-endif
-
-# Build object lists
-CXXSRC=$(wildcard $(MMDVM_PATH)/*.cpp)
-CSRC_STD_F4=$(wildcard $(STD_LIB_F4)/*.c)
-SYS_F4=$(wildcard $(SYS_DIR_F4)/*.c)
-STARTUP_F4=$(wildcard $(STARTUP_DIR_F4)/*.c)
-CSRC_STD_F7=$(wildcard $(STD_LIB_F7)/*.c)
-SYS_F7=$(wildcard $(SYS_DIR_F7)/*.c)
-STARTUP_F7=$(wildcard $(STARTUP_DIR_F7)/*.c)
-OBJ_F4=$(CXXSRC:$(MMDVM_PATH)/%.cpp=$(OBJDIR_F4)/%.o) $(CSRC_STD_F4:$(STD_LIB_F4)/%.c=$(OBJDIR_F4)/%.o) $(SYS_F4:$(SYS_DIR_F4)/%.c=$(OBJDIR_F4)/%.o) $(STARTUP_F4:$(STARTUP_DIR_F4)/%.c=$(OBJDIR_F4)/%.o)
-OBJ_F7=$(CXXSRC:$(MMDVM_PATH)/%.cpp=$(OBJDIR_F7)/%.o) $(CSRC_STD_F7:$(STD_LIB_F7)/%.c=$(OBJDIR_F7)/%.o) $(SYS_F7:$(SYS_DIR_F7)/%.c=$(OBJDIR_F7)/%.o) $(STARTUP_F7:$(STARTUP_DIR_F7)/%.c=$(OBJDIR_F7)/%.o)
-
-# MCU flags
-MCFLAGS_F4=-mcpu=cortex-m4 -mthumb -mlittle-endian -mfpu=fpv4-sp-d16 -mfloat-abi=hard -mthumb-interwork
-MCFLAGS_F7=-mcpu=cortex-m7 -mthumb -mlittle-endian -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb-interwork
-
-# Compile flags
-# STM32F4 Discovery board:
-DEFS_DIS=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_DISCOVERY -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# MMDVM-Pi board:
-DEFS_PI=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_PI -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# MMDVM-F4M F0DEI board:
-DEFS_F4M=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_F4M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# STM32F4 Nucleo-64 F446RE board:
-DEFS_NUCLEO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_NUCLEO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# STM32F7 Nucleo-144 F767ZI board:
-DEFS_NUCLEO_F767=-DUSE_HAL_DRIVER -DSTM32F767xx -DSTM32F7XX -DSTM32F7_NUCLEO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# MMDVM-Pi F722 board:
-DEFS_PI_F722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_PI -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# MMDVM-F7M F0DEI board:
-DEFS_F7M=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_F7M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# MMDVM_RPT_Hat F0DEI, DB9MAT, DF2ET board:
-DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# RB STM32F4_DVM board:
-DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# RB STM32F7 DVM board:
-DEFS_DVM722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F7_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# MMDVM_RPT_Hat BG4TGO, BG5HHP board:
-DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# DRCC_DVM BG7NQF board:
-DEFS_DRCC_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DDRCC_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# WA0EDA F405 MTR2K, MASTR3 board:
-DEFS_EDA_405=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_EDA_405 -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-# WA0EDA F446 MTR2K, MASTR3 board:
-DEFS_EDA_446=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_EDA_446 -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
-
-
-# Build compiler flags
-CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
-CXXFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
-CFLAGS_F7=-c $(MCFLAGS_F7) $(INCLUDES_F7)
-CXXFLAGS_F7=-c $(MCFLAGS_F7) $(INCLUDES_F7)
-
-# Linker flags
-LDFLAGS_F4 =-T stm32f4xx_link.ld $(MCFLAGS_F4) --specs=nosys.specs $(INCLUDES_LIBS_F4)
-LDFLAGS_F767 =-T stm32f767_link.ld $(MCFLAGS_F7) --specs=nosys.specs $(INCLUDES_LIBS_F7)
-LDFLAGS_F722 =-T stm32f722_link.ld $(MCFLAGS_F7) --specs=nosys.specs $(INCLUDES_LIBS_F7)
-
-# Common flags
-CFLAGS=-Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
-CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
-LDFLAGS=-Os --specs=nano.specs -Wl,-Map=bin/mmdvm.map
-
-# Build Rules
-.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm drcc_nqf clean
-
-# Default target: Nucleo-64 F446RE board
-all: nucleo
-
-pi: GitVersion.h
-pi: CFLAGS+=$(CFLAGS_F4) $(DEFS_PI)
-pi: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_PI)
-pi: LDFLAGS+=$(LDFLAGS_F4)
-pi: release_f4
-
-pi-f722: GitVersion.h
-pi-f722: CFLAGS+=$(CFLAGS_F7) $(DEFS_PI_F722)
-pi-f722: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_PI_F722)
-pi-f722: LDFLAGS+=$(LDFLAGS_F722)
-pi-f722: release_f7
-
-f4m: GitVersion.h
-f4m: CFLAGS+=$(CFLAGS_F4) $(DEFS_F4M)
-f4m: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_F4M)
-f4m: LDFLAGS+=$(LDFLAGS_F4)
-f4m: release_f4
-
-f7m: GitVersion.h
-f7m: CFLAGS+=$(CFLAGS_F7) $(DEFS_F7M)
-f7m: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_F7M)
-f7m: LDFLAGS+=$(LDFLAGS_F722)
-f7m: release_f7
-
-rpt_hat: GitVersion.h
-rpt_hat: CFLAGS+=$(CFLAGS_F7) $(DEFS_RPT_HAT)
-rpt_hat: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_RPT_HAT)
-rpt_hat: LDFLAGS+=$(LDFLAGS_F722)
-rpt_hat: release_f7
-
-rpt_hat_tgo: GitVersion.h
-rpt_hat_tgo: CFLAGS+=$(CFLAGS_F4) $(DEFS_RPT_HAT_TGO)
-rpt_hat_tgo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_RPT_HAT_TGO)
-rpt_hat_tgo: LDFLAGS+=$(LDFLAGS_F4)
-rpt_hat_tgo: release_f4
-
-nucleo: GitVersion.h
-nucleo: CFLAGS+=$(CFLAGS_F4) $(DEFS_NUCLEO)
-nucleo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_NUCLEO)
-nucleo: LDFLAGS+=$(LDFLAGS_F4)
-nucleo: release_f4
-
-dis: GitVersion.h
-dis: CFLAGS+=$(CFLAGS_F4) $(DEFS_DIS)
-dis: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DIS)
-dis: LDFLAGS+=$(LDFLAGS_F4)
-dis: release_f4
-
-f767: GitVersion.h
-f767: CFLAGS+=$(CFLAGS_F7) $(DEFS_NUCLEO_F767)
-f767: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_NUCLEO_F767)
-f767: LDFLAGS+=$(LDFLAGS_F767)
-f767: release_f7
-
-dvm: GitVersion.h
-dvm: CFLAGS+=$(CFLAGS_F4) $(DEFS_DVM) -DDRCC_DVM_446
-dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM) -DDRCC_DVM_446
-dvm: LDFLAGS+=$(LDFLAGS_F4)
-dvm: release_f4
-
-dvm722: GitVersion.h
-dvm722: CFLAGS+=$(CFLAGS_F7) $(DEFS_DVM722) -DDRCC_DVM_722
-dvm722: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_DVM722) -DDRCC_DVM_722
-dvm722: LDFLAGS+=$(LDFLAGS_F722)
-dvm722: release_f7
-
-drcc_nqf: GitVersion.h
-drcc_nqf: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
-drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
-drcc_nqf: LDFLAGS+=$(LDFLAGS_F4)
-drcc_nqf: release_f4
-
-hhp446: GitVersion.h
-hhp446: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_HHP446
-hhp446: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_HHP446
-hhp446: LDFLAGS+=$(LDFLAGS_F4)
-hhp446: release_f4
-
-eda405: GitVersion.h
-eda405: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_405)
-eda405: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_405)
-eda405: LDFLAGS+=$(LDFLAGS_F4)
-eda405: release_f4
-
-eda446: GitVersion.h
-eda446: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_446)
-eda446: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_446)
-eda446: LDFLAGS+=$(LDFLAGS_F4)
-eda446: release_f4
-
-release_f4: $(BINDIR)
-release_f4: $(OBJDIR_F4)
-release_f4: $(BINDIR)/$(BINHEX_F4)
-release_f4: $(BINDIR)/$(BINBIN_F4)
-
-release_f7: $(BINDIR)
-release_f7: $(OBJDIR_F7)
-release_f7: $(BINDIR)/$(BINHEX_F7)
-release_f7: $(BINDIR)/$(BINBIN_F7)
-
-$(BINDIR):
-	$(MDDIRS)
-
-$(OBJDIR_F4):
-	$(MDDIRS)
-
-$(OBJDIR_F7):
-	$(MDDIRS)
-
-$(BINDIR)/$(BINHEX_F4): $(BINDIR)/$(BINELF_F4)
-	$(CP) -O ihex $< $@
-	@echo "Objcopy from ELF to IHEX complete!\n"
-
-$(BINDIR)/$(BINBIN_F4): $(BINDIR)/$(BINELF_F4)
-	$(CP) -O binary $< $@
-	@echo "Objcopy from ELF to BINARY complete!\n"
-
-$(BINDIR)/$(BINELF_F4): $(OBJ_F4)
-	$(CXX) $(OBJ_F4) $(LDFLAGS) -o $@
-	@echo "Linking complete!\n"
-	$(SIZE) $(BINDIR)/$(BINELF_F4)
-
-$(BINDIR)/$(BINHEX_F7): $(BINDIR)/$(BINELF_F7)
-	$(CP) -O ihex $< $@
-	@echo "Objcopy from ELF to IHEX complete!\n"
-
-$(BINDIR)/$(BINBIN_F7): $(BINDIR)/$(BINELF_F7)
-	$(CP) -O binary $< $@
-	@echo "Objcopy from ELF to BINARY complete!\n"
-
-$(BINDIR)/$(BINELF_F7): $(OBJ_F7)
-	$(CXX) $(OBJ_F7) $(LDFLAGS) -o $@
-	@echo "Linking complete!\n"
-	$(SIZE) $(BINDIR)/$(BINELF_F7)
-
-$(OBJDIR_F4)/%.o: $(MMDVM_PATH)/%.cpp
-	$(CXX) $(CXXFLAGS) $< -o $@
-	@echo "Compiled "$<"!\n"
-
-$(OBJDIR_F7)/%.o: $(MMDVM_PATH)/%.cpp
-	$(CXX) $(CXXFLAGS) $< -o $@
-	@echo "Compiled "$<"!\n"
-
-$(OBJDIR_F4)/%.o: $(STD_LIB_F4)/%.c
-	$(CC) $(CFLAGS) $< -o $@
-	@echo "Compiled "$<"!\n"
-
-$(OBJDIR_F7)/%.o: $(STD_LIB_F7)/%.c
-	$(CC) $(CFLAGS) $< -o $@
-	@echo "Compiled "$<"!\n"
-
-$(OBJDIR_F4)/%.o: $(SYS_DIR_F4)/%.c
-	$(CC) $(CFLAGS) $< -o $@
-	@echo "Compiled "$<"!\n"
-
-$(OBJDIR_F4)/%.o: $(STARTUP_DIR_F4)/%.c
-	$(CC) $(CFLAGS) $< -o $@
-	@echo "Compiled "$<"!\n"
-
-$(OBJDIR_F7)/%.o: $(SYS_DIR_F7)/%.c
-	$(CC) $(CFLAGS) $< -o $@
-	@echo "Compiled "$<"!\n"
-
-$(OBJDIR_F7)/%.o: $(STARTUP_DIR_F7)/%.c
-	$(CC) $(CFLAGS) $< -o $@
-	@echo "Compiled "$<"!\n"
-
-clean:
-	$(CLEANCMD)
-
-deploy:
-ifneq ($(wildcard /usr/bin/openocd),)
-	/usr/bin/openocd -f /usr/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/share/openocd/scripts/target/stm32f4x.cfg -c "program bin/$(BINELF_F4) verify reset exit"
-endif
-
-ifneq ($(wildcard /usr/local/bin/openocd),)
-	/usr/local/bin/openocd -f /usr/local/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/local/share/openocd/scripts/target/stm32f4x.cfg -c "program bin/$(BINELF_F4) verify reset exit"
-endif
-
-ifneq ($(wildcard /opt/openocd/bin/openocd),)
-	/opt/openocd/bin/openocd -f /opt/openocd/share/openocd/scripts/interface/stlink-v2-1.cfg -f /opt/openocd/share/openocd/scripts/target/stm32f4x.cfg -c "program bin/$(BINELF_F4) verify reset exit"
-endif
-
-deploy-f7:
-ifneq ($(wildcard /usr/bin/openocd),)
-	/usr/bin/openocd -f /usr/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/share/openocd/scripts/target/stm32f7x.cfg -c "program bin/$(BINELF_F7) verify reset exit"
-endif
-
-ifneq ($(wildcard /usr/local/bin/openocd),)
-	/usr/local/bin/openocd -f /usr/local/share/openocd/scripts/interface/stlink-v2-1.cfg -f /usr/local/share/openocd/scripts/target/stm32f7x.cfg -c "program bin/$(BINELF_F7) verify reset exit"
-endif
-
-ifneq ($(wildcard /opt/openocd/bin/openocd),)
-	/opt/openocd/bin/openocd -f /opt/openocd/share/openocd/scripts/interface/stlink-v2-1.cfg -f /opt/openocd/share/openocd/scripts/target/stm32f7x.cfg -c "program bin/$(BINELF_F7) verify reset exit"
-endif
-
-deploy-pi:
-ifneq ($(wildcard /usr/local/bin/stm32flash),)
-	-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R /dev/ttyAMA0
-endif
-
-ifneq ($(wildcard /usr/bin/stm32flash),)
-	-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	/usr/bin/stm32flash -v -w bin/$(BINBIN_F4) -g 0x0 -R /dev/ttyAMA0
-endif
-
-deploy-f4m: deploy-pi
-deploy-dvm: deploy-pi
-deploy-eda405: deploy-pi
-deploy-eda446: deploy-pi
-
-deploy-pi-f7:
-ifneq ($(wildcard /usr/local/bin/stm32flash),)
-	-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R /dev/ttyAMA0
-
-else ifneq ($(wildcard /usr/bin/stm32flash),)
-	-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-	/usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R /dev/ttyAMA0
-endif
-
-deploy-f7m:   deploy-pi-f7
-deploy-rpt_hat: deploy-pi-f7
-
-# Export the current git version if the index file exists, else 000...
-GitVersion.h:
-ifdef SYSTEMROOT
-	echo #define GITVERSION "0000000" > $@
-else ifdef SystemRoot
-	echo #define GITVERSION "0000000" > $@
-else
-ifneq ("$(wildcard .git/index)","")
-	echo "#define GITVERSION \"$(shell git rev-parse --short HEAD)\"" > $@
-else
-	echo "#define GITVERSION \"0000000\"" > $@
-endif
-endif
-
-flash_f4:
-	@echo "flashing firmware..."
-	st-flash write bin/$(BINBIN_F4) 0x8000000

Makefile.Arduino

@@ -1,189 +0,0 @@
-#!/usr/bin/make
-# makefile for the arduino due (works with arduino IDE 1.6.12)
-#
-# The original file can be found at https://github.com/pauldreik/arduino-due-makefile
-#
-# USAGE: put this file in the same dir as your .ino file is.
-# configure the PORT variable and ADIR at the top of the file
-# to match your local configuration.
-# Type make upload to compile and upload.
-#
-
-#user specific settings:
-#where to find the IDE
-ADIR:=$(HOME)/.arduino15
-#which serial port to use (add a file with SUBSYSTEMS=="usb",
-#ATTRS{product}=="Arduino Due Prog. Port", ATTRS{idProduct}=="003d",
-#ATTRS{idVendor}=="2341", SYMLINK+="arduino_due" in /etc/udev/rules.d/
-#to get this working). Do not prefix the port with /dev/, just take
-#the basename.
-PORT:=ttyACM0
-#if you want to verify the bossac upload, define this to -v
-VERIFY:=-v
-
-
-#end of user configuration.
-
-
-#then some general settings. They should not be necessary to modify.
-#CXX:=$(ADIR)/tools/g++_arm_none_eabi/bin/arm-none-eabi-g++
-CXX:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-g++
-#CC:=$(ADIR)/tools/g++_arm_none_eabi/bin/arm-none-eabi-gcc
-CC:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-gcc
-OBJCOPY:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-objcopy
-
-C:=$(CC)
-#SAM:=arduino/sam/
-SAM:=$(ADIR)/packages/arduino/hardware/sam/1.6.12
-#CMSIS:=arduino/sam/system/CMSIS/
-#LIBSAM:=arduino/sam/system/libsam
-TMPDIR:=$(PWD)/build
-AR:=$(ADIR)/tools/g++_arm_none_eabi/bin/arm-none-eabi-ar 
-AR:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-ar
-
-
-#all these values are hard coded and should maybe be configured somehow else,
-#like olikraus does in his makefile.
-DEFINES:=-Dprintf=iprintf -DF_CPU=84000000  -DARDUINO=10611 -D__SAM3X8E__ -DUSB_PID=0x003e -DUSB_VID=0x2341 -DUSBCON \
-         -DARDUINO_SAM_DUE -DARDUINO_ARCH_SAM '-DUSB_MANUFACTURER="Arduino LLC"' '-DUSB_PRODUCT="Arduino Due"' \
-         -DMADEBYMAKEFILE
-
-INCLUDES:=-I$(SAM)/system/libsam -I$(SAM)/system/CMSIS/CMSIS/Include/ \
-          -I$(SAM)/system/CMSIS/Device/ATMEL/ -I$(SAM)/cores/arduino \
-          -I$(SAM)/variants/arduino_due_x
-
-#also include the current dir for convenience
-INCLUDES += -I.
-
-#compilation flags common to both c and c++ 
-COMMON_FLAGS:=-g -Os -w -ffunction-sections -fdata-sections -nostdlib \
-              --param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb \
-               -fno-threadsafe-statics
-#for compiling c (do not warn, this is not our code)
-CFLAGS:=$(COMMON_FLAGS) -std=gnu11
-#for compiling c++
-CXXFLAGS:=$(COMMON_FLAGS) -fno-rtti -fno-exceptions -std=gnu++11 -Wall -Wextra
-
-#let the results be named after the project
-PROJNAME:=$(shell basename *.ino .ino)
-
-#we will make a new mainfile from the ino file.
-NEWMAINFILE:=$(TMPDIR)/$(PROJNAME).ino.cpp
-
-#our own sourcefiles is the (converted) ino file and any local cpp files
-MYSRCFILES:=$(NEWMAINFILE) $(shell ls *.cpp 2>/dev/null)
-MYOBJFILES:=$(addsuffix .o,$(addprefix $(TMPDIR)/,$(notdir $(MYSRCFILES))))
-
-#These source files are the ones forming core.a
-CORESRCXX:=$(shell ls ${SAM}/cores/arduino/*.cpp ${SAM}/cores/arduino/USB/*.cpp  ${SAM}/variants/arduino_due_x/variant.cpp)
-CORESRC:=$(shell ls ${SAM}/cores/arduino/*.c)
-
-#hey this one is needed too: $(SAM)/cores/arduino/wiring_pulse_asm.S" add -x assembler-with-cpp
-#and this one: /1.6.11/cores/arduino/avr/dtostrf.c but it seems to work
-#anyway, probably because I do not use that functionality.
-
-#convert the core source files to object files. assume no clashes.
-COREOBJSXX:=$(addprefix $(TMPDIR)/core/,$(notdir $(CORESRCXX)) )
-COREOBJSXX:=$(addsuffix .o,$(COREOBJSXX))
-COREOBJS:=$(addprefix $(TMPDIR)/core/,$(notdir $(CORESRC)) )
-COREOBJS:=$(addsuffix .o,$(COREOBJS))
-
-default:
-	@echo default rule, does nothing. Try make compile or make upload.
-
-#This rule is good to just make sure stuff compiles, without having to wait
-#for bossac.
-compile: GitVersion.h $(TMPDIR)/$(PROJNAME).elf $(TMPDIR)/$(PROJNAME).bin
-
-#This is a make rule template to create object files from the source files.
-# arg 1=src file
-# arg 2=object file
-# arg 3= XX if c++, empty if c
-define OBJ_template
-$(2): $(1)
-	$(C$(3)) -MD -c $(C$(3)FLAGS) $(DEFINES) $(INCLUDES) $(1) -o $(2)
-endef
-#now invoke the template both for c++ sources
-$(foreach src,$(CORESRCXX), $(eval $(call OBJ_template,$(src),$(addsuffix .o,$(addprefix $(TMPDIR)/core/,$(notdir $(src)))),XX) ) )
-#...and for c sources:
-$(foreach src,$(CORESRC), $(eval $(call OBJ_template,$(src),$(addsuffix .o,$(addprefix $(TMPDIR)/core/,$(notdir $(src)))),) ) )
-
-#and our own c++ sources
-$(foreach src,$(MYSRCFILES), $(eval $(call OBJ_template,$(src),$(addsuffix .o,$(addprefix $(TMPDIR)/,$(notdir $(src)))),XX) ) )
-
-
-clean:
-	test ! -d $(TMPDIR) || rm -rf $(TMPDIR)
-	$(RM) GitVersion.h
-
-.PHONY: .FORCE upload default
-
-$(TMPDIR):
-	mkdir -p $(TMPDIR)
-
-$(TMPDIR)/core:
-	mkdir -p $(TMPDIR)/core
-
-#creates the cpp file from the .ino file
-$(NEWMAINFILE): $(PROJNAME).ino
-	cat $(SAM)/cores/arduino/main.cpp > $(NEWMAINFILE)
-	cat $(PROJNAME).ino >> $(NEWMAINFILE)
-	echo 'extern "C" void __cxa_pure_virtual() {while (true);}' >> $(NEWMAINFILE)
-
-#include the dependencies for our own files
--include $(MYOBJFILES:.o=.d)
-
-#create the core library from the core objects. Do this EXACTLY as the
-#arduino IDE does it, seems *really* picky about this.
-#Sorry for the hard coding.
-$(TMPDIR)/core.a: $(TMPDIR)/core $(COREOBJS) $(COREOBJSXX)
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_shift.c.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_analog.c.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/itoa.c.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/cortex_handlers.c.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/hooks.c.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring.c.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/WInterrupts.c.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/syscalls_sam3.c.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/iar_calls_sam3.c.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_digital.c.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/Print.cpp.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/USARTClass.cpp.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/WString.cpp.o
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/PluggableUSB.cpp.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/USBCore.cpp.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/CDC.cpp.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_pulse.cpp.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/UARTClass.cpp.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/main.cpp.o
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/new.cpp.o
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/watchdog.cpp.o
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/Stream.cpp.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/RingBuffer.cpp.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/IPAddress.cpp.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/Reset.cpp.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/WMath.cpp.o 
-	$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/variant.cpp.o
-
-#link our own object files with core to form the elf file
-$(TMPDIR)/$(PROJNAME).elf: $(TMPDIR)/core.a $(TMPDIR)/core/syscalls_sam3.c.o $(MYOBJFILES) 
-	$(CC) -mcpu=cortex-m3 -mthumb -Os -Wl,--gc-sections -T$(SAM)/variants/arduino_due_x/linker_scripts/gcc/flash.ld -Wl,-Map,$(NEWMAINFILE).map -o $@ -L$(TMPDIR) -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group -u _sbrk -u link -u _close -u _fstat -u _isatty -u _lseek -u _read -u _write -u _exit -u kill -u _getpid $(MYOBJFILES) $(TMPDIR)/core/variant.cpp.o $(SAM)/variants/arduino_due_x/libsam_sam3x8e_gcc_rel.a $(SAM)/system/CMSIS/CMSIS/Lib/GCC/libarm_cortexM3l_math.a $(TMPDIR)/core.a -Wl,--end-group -lm -gcc
-
-#copy from the hex to our bin file (why?)
-$(TMPDIR)/$(PROJNAME).bin: $(TMPDIR)/$(PROJNAME).elf 
-	$(OBJCOPY) -O binary $< $@
-
-#upload to the arduino by first resetting it (stty) and the running bossac
-upload: compile
-	stty -F /dev/$(PORT) cs8 1200 hupcl
-	$(ADIR)/packages/arduino/tools/bossac/1.6.1-arduino/bossac -i --port=$(PORT) -U false -e -w $(VERIFY) -b $(TMPDIR)/$(PROJNAME).bin -R
-
-# Export the current git version if the index file exists, else 000...
-GitVersion.h: .FORCE
-ifneq ("$(wildcard .git/index)","")
-	echo "#define GITVERSION \"$(shell git rev-parse --short HEAD)\"" > $@
-else
-	echo "#define GITVERSION \"0000000\"" > $@
-endif
-
-.FORCE:

STM32Utils.h

@@ -1,52 +0,0 @@
-/*
- *   Copyright (C) 2017 by Wojciech Krutnik N0CALL
- *
- *   Source: http://mightydevices.com/?p=144
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#if !defined(STM32UTILS_H)
-#define STM32UTILS_H
-
-#include <stdint.h>
-
-/* ram function */
-#define RAMFUNC __attribute__ ((long_call, section (".data")))
-/* eeprom data */
-/* for placing variables in eeprom memory */
-#define EEMEM 	__attribute__((section(".eeprom")))
-
-/* bitband type */
-typedef volatile uint32_t * const bitband_t;
-
-/* base address for bit banding */
-#define BITBAND_SRAM_REF               		(0x20000000)
-/* base address for bit banding */
-#define BITBAND_SRAM_BASE              		(0x22000000)
-/* base address for bit banding */
-#define BITBAND_PERIPH_REF               	(0x40000000)
-/* base address for bit banding */
-#define BITBAND_PERIPH_BASE              	(0x42000000)
-
-/* sram bit band */
-#define BITBAND_SRAM(address, bit)     ((void*)(BITBAND_SRAM_BASE +   \
-		(((uint32_t)address) - BITBAND_SRAM_REF) * 32 + (bit) * 4))
-
-/* periph bit band */
-#define BITBAND_PERIPH(address, bit)   ((void *)(BITBAND_PERIPH_BASE + \
-		(((uint32_t)address) - BITBAND_PERIPH_REF) * 32 + (bit) * 4))
-
-#endif

STMUART.cpp

@@ -1,100 +0,0 @@
-/*
- *   Copyright (c) 2020 by Jonathan Naylor G4KLX
- *   Copyright (c) 2020 by Geoffrey Merck F4FXL - KC3FRA   
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#if defined(STM32F4XX) || defined(STM32F7XX)
-
-#include "STMUART.h"
-
-CSTMUART::CSTMUART() :
-m_usart(NULL)
-{
-
-}
-
-void CSTMUART::init(USART_TypeDef* usart)
-{
-  m_usart = usart;
-}
-
-void CSTMUART::write(const uint8_t * data, uint16_t length)
-{
-  if(length == 0U || m_usart == NULL)
-    return;
-
-
-  m_txFifo.put(data[0]);
-  USART_ITConfig(m_usart, USART_IT_TXE, ENABLE);//switch TX IRQ is on
-
-  for(uint16_t i = 1U; i < length; i++) {
-    m_txFifo.put(data[i]);
-  }
-
-  USART_ITConfig(m_usart, USART_IT_TXE, ENABLE);//make sure TX IRQ is on
-}
-
-uint8_t CSTMUART::read()
-{
-  return m_rxFifo.get();
-}
-
-void CSTMUART::handleIRQ()
-{
-  if(m_usart == NULL)
-    return;
-
-  if (USART_GetITStatus(m_usart, USART_IT_RXNE)) {
-    if(!m_rxFifo.isFull())
-      m_rxFifo.put((uint8_t) USART_ReceiveData(m_usart));
-    USART_ClearITPendingBit(USART1, USART_IT_RXNE);
-  }
-
-  if (USART_GetITStatus(m_usart, USART_IT_TXE)) {
-    if(!m_txFifo.isEmpty())
-      USART_SendData(m_usart, m_txFifo.get());
-
-    USART_ClearITPendingBit(m_usart, USART_IT_TXE);
-
-    if (m_txFifo.isEmpty()) // if there's no more data to transmit then turn off TX interrupts
-      USART_ITConfig(m_usart, USART_IT_TXE, DISABLE);
-  }
-}
-
-  // Flushes the transmit shift register
-// warning: this call is blocking
-void CSTMUART::flush()
-{
-  if(m_usart == NULL)
-    return;
-
-   // wait until the TXE shows the shift register is empty
-   while (USART_GetITStatus(m_usart, USART_FLAG_TXE))
-      ;
-}
-
-uint16_t CSTMUART::available()
-{
-  return m_rxFifo.isEmpty() ? 0U : 1U;
-}
-
-uint16_t CSTMUART::availableForWrite()
-{
-  return m_txFifo.isFull() ? 0U : 1U;
-}
-
-#endif

STMUART.h

@@ -1,91 +0,0 @@
-/*
- *   Copyright (c) 2020 by Jonathan Naylor G4KLX
- *   Copyright (c) 2020 by Geoffrey Merck F4FXL - KC3FRA   
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#if defined(STM32F4XX) || defined(STM32F7XX)
-#if !defined(STMUART_H)
-#define STMUART_H
-
-#if defined(STM32F4XX)
-#include "stm32f4xx.h"
-#elif defined(STM32F7XX)
-#include "stm32f7xx.h"
-#endif
-
-const uint16_t BUFFER_SIZE = 2048U; //needs to be a power of 2 !
-const uint16_t BUFFER_MASK = BUFFER_SIZE - 1;
-
-class CSTMUARTFIFO {
-public:
-  CSTMUARTFIFO() :
-  m_head(0U),
-  m_tail(0U)
-  {
-  }
-
-  void put(uint8_t data)
-  {
-    m_buffer[BUFFER_MASK & (m_head++)] = data;
-  }
-
-  uint8_t get()
-  {
-    return m_buffer[BUFFER_MASK & (m_tail++)];
-  }
-
-  void reset()
-  {
-    m_tail = 0U;
-    m_head = 0U;
-  }
-
-  bool isEmpty()
-  {
-    return m_tail == m_head;
-  }
-
-  bool isFull()
-  {
-    return ((m_head + 1U) & BUFFER_MASK) == (m_tail & BUFFER_MASK);
-  }
-
-private:
-  volatile uint8_t  m_buffer[BUFFER_SIZE];
-  volatile uint16_t m_head;
-  volatile uint16_t m_tail;
-};
-
-class CSTMUART {
-public:
-  CSTMUART();
-  void init(USART_TypeDef* usart);
-  void write(const uint8_t * data, uint16_t length);
-  uint8_t read();
-  void handleIRQ();
-  void flush();
-  uint16_t available();
-  uint16_t availableForWrite();
-
-private:
-  USART_TypeDef * m_usart;
-  CSTMUARTFIFO    m_rxFifo;
-  CSTMUARTFIFO    m_txFifo;
-};
-
-#endif
-#endif

SerialArduino.cpp

@@ -1,112 +0,0 @@
-/*
- *   Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include "Config.h"
-#include "Globals.h"
-
-#include "SerialPort.h"
-
-#if defined(VK6MST_TEENSY_PI3_SHIELD_I2C)
-//it will load I2CTeensy.cpp
-
-#elif defined(__SAM3X8E__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
-
-void CSerialPort::beginInt(uint8_t n, int speed)
-{
-  switch (n) {
-    case 1U:
-      Serial.begin(speed);
-      break;
-    case 2U:
-      Serial2.begin(speed);
-      break;
-    case 3U:
-      Serial3.begin(speed);
-      break;
-    default:
-      break;
-  }
-}
-
-int CSerialPort::availableForReadInt(uint8_t n)
-{
-  switch (n) {
-    case 1U:
-      return Serial.available();
-    case 2U:
-      return Serial2.available();
-    case 3U:
-      return Serial3.available();
-    default:
-      return false;
-  }
-}
-
-int CSerialPort::availableForWriteInt(uint8_t n)
-{
-  switch (n) {
-    case 1U:
-      return Serial.availableForWrite();
-    case 2U:
-      return Serial2.availableForWrite();
-    case 3U:
-      return Serial3.availableForWrite();
-    default:
-      return false;
-  }
-}
-
-uint8_t CSerialPort::readInt(uint8_t n)
-{
-  switch (n) {
-    case 1U:
-      return Serial.read();
-    case 2U:
-      return Serial2.read();
-    case 3U:
-      return Serial3.read();
-    default:
-      return 0U;
-  }
-}
-
-void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
-{
-  switch (n) {
-    case 1U:
-      Serial.write(data, length);
-      if (flush)
-        Serial.flush();
-      break;
-    case 2U:
-      Serial2.write(data, length);
-      if (flush)
-        Serial2.flush();
-      break;
-    case 3U:
-      Serial3.write(data, length);
-      if (flush)
-        Serial3.flush();
-      break;
-    default:
-      break;
-  }
-}
-
-#endif
-

SerialSTM.cpp

@@ -1,451 +0,0 @@
-/*
- *   Copyright (C) 2016 by Jim McLaughlin KI6ZUM
- *   Copyright (C) 2016,2017,2018 by Andy Uribe CA6JAU
- *   Copyright (c) 2017 by Jonathan Naylor G4KLX
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#include "Config.h"
-#include "Globals.h"
-
-#include "SerialPort.h"
-
-/*
-Pin definitions:
-
-- Host communication:
-USART1 - TXD PA9  - RXD PA10 (MMDVM-Pi board, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, STM32F7-DVM board)
-USART2 - TXD PA2  - RXD PA3  (Nucleo64 F446RE board, Morpho or Arduino header, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
-USART3 - TXD PC10 - RXD PC11 (Discovery board)
-USART3 - TXD PD8  - RXD PD9  (Nucleo144 F767ZI board)
-
-- Serial repeater:
-USART1 - TXD PA9  - RXD PA10 (Nucleo with Arduino header)
-UART5  - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, STM32F7-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
-*/
-
-#if defined(STM32F4XX) || defined(STM32F7XX)
-
-#include "STMUART.h"
-extern "C" {
-   void USART1_IRQHandler();
-   void USART2_IRQHandler();
-   void USART3_IRQHandler();
-   void UART5_IRQHandler();
-}
-
-/* ************* USART1 ***************** */
-#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
-
-
-static CSTMUART m_USART1;
-
-void USART1_IRQHandler()
-{
-  m_USART1.handleIRQ();
-}
-
-void InitUSART1(int speed)
-{
-   // USART1 - TXD PA9  - RXD PA10 - pins on mmdvm pi board
-   GPIO_InitTypeDef GPIO_InitStructure;
-   USART_InitTypeDef USART_InitStructure;
-   NVIC_InitTypeDef NVIC_InitStructure;
-
-   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
-   RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
-   GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_USART1);
-   GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_USART1);
-
-   // USART IRQ init
-   NVIC_InitStructure.NVIC_IRQChannel    = USART1_IRQn;
-   NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-   NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
-   NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 1;
-   NVIC_Init(&NVIC_InitStructure);
-
-   // Configure USART as alternate function
-   GPIO_StructInit(&GPIO_InitStructure);
-   GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
-   GPIO_InitStructure.GPIO_PuPd  = GPIO_PuPd_UP;
-   GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_AF;
-   GPIO_InitStructure.GPIO_Pin   = GPIO_Pin_9 | GPIO_Pin_10; //  Tx | Rx
-   GPIO_InitStructure.GPIO_Speed = GPIO_Fast_Speed;
-   GPIO_Init(GPIOA, &GPIO_InitStructure);
-
-   // Configure USART baud rate
-   USART_StructInit(&USART_InitStructure);
-   USART_InitStructure.USART_BaudRate   = speed;
-   USART_InitStructure.USART_WordLength = USART_WordLength_8b;
-   USART_InitStructure.USART_StopBits   = USART_StopBits_1;
-   USART_InitStructure.USART_Parity     = USART_Parity_No;
-   USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
-   USART_InitStructure.USART_Mode       = USART_Mode_Rx | USART_Mode_Tx;
-   USART_Init(USART1, &USART_InitStructure);
-
-   USART_Cmd(USART1, ENABLE);
-
-   USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
-
-   m_USART1.init(USART1);
-}
-
-#endif
-
-/* ************* USART2 ***************** */
-#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) || defined(DRCC_DVM)
-
-static CSTMUART m_USART2;
-
-
-void USART2_IRQHandler()
-{
-   m_USART2.handleIRQ();
-}
-
-void InitUSART2(int speed)
-{
-   // USART2 - TXD PA2  - RXD PA3
-   GPIO_InitTypeDef GPIO_InitStructure;
-   USART_InitTypeDef USART_InitStructure;
-   NVIC_InitTypeDef NVIC_InitStructure;
-
-   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
-   RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
-   GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_USART2);
-   GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_USART2);
-
-   // USART IRQ init
-   NVIC_InitStructure.NVIC_IRQChannel    = USART2_IRQn;
-   NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-   NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
-   NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 1;
-   NVIC_Init(&NVIC_InitStructure);
-
-   // Configure USART as alternate function
-   GPIO_StructInit(&GPIO_InitStructure);
-   GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
-   GPIO_InitStructure.GPIO_PuPd  = GPIO_PuPd_UP;
-   GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_AF;
-   GPIO_InitStructure.GPIO_Pin   = GPIO_Pin_2 | GPIO_Pin_3; //  Tx | Rx
-   GPIO_InitStructure.GPIO_Speed = GPIO_Fast_Speed;
-   GPIO_Init(GPIOA, &GPIO_InitStructure);
-
-   // Configure USART baud rate
-   USART_StructInit(&USART_InitStructure);
-   USART_InitStructure.USART_BaudRate   = speed;
-   USART_InitStructure.USART_WordLength = USART_WordLength_8b;
-   USART_InitStructure.USART_StopBits   = USART_StopBits_1;
-   USART_InitStructure.USART_Parity     = USART_Parity_No;
-   USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
-   USART_InitStructure.USART_Mode       = USART_Mode_Rx | USART_Mode_Tx;
-   USART_Init(USART2, &USART_InitStructure);
-
-   USART_Cmd(USART2, ENABLE);
-
-   USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
-
-   m_USART2.init(USART2);
-}
-
-#endif
-
-/* ************* USART3 ***************** */
-#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
-
-static CSTMUART m_USART3;
-
-void USART3_IRQHandler()
-{
-   m_USART3.handleIRQ();
-}
-
-#if defined(STM32F7_NUCLEO)
-// USART3 - TXD PD8 - RXD PD9
-#define USART3_GPIO_PinSource_TX   GPIO_PinSource8
-#define USART3_GPIO_PinSource_RX   GPIO_PinSource9
-#define USART3_GPIO_Pin_TX         GPIO_Pin_8
-#define USART3_GPIO_Pin_RX         GPIO_Pin_9
-#define USART3_GPIO_PORT           GPIOD
-#define USART3_RCC_Periph          RCC_AHB1Periph_GPIOD
-#else
-// USART3 - TXD PC10 - RXD PC11
-#define USART3_GPIO_PinSource_TX   GPIO_PinSource10
-#define USART3_GPIO_PinSource_RX   GPIO_PinSource11
-#define USART3_GPIO_Pin_TX         GPIO_Pin_10
-#define USART3_GPIO_Pin_RX         GPIO_Pin_11
-#define USART3_GPIO_PORT           GPIOC
-#define USART3_RCC_Periph          RCC_AHB1Periph_GPIOC
-#endif
-
-void InitUSART3(int speed)
-{
-   GPIO_InitTypeDef GPIO_InitStructure;
-   USART_InitTypeDef USART_InitStructure;
-   NVIC_InitTypeDef NVIC_InitStructure;
-
-   RCC_AHB1PeriphClockCmd(USART3_RCC_Periph, ENABLE);
-   RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
-   GPIO_PinAFConfig(USART3_GPIO_PORT, USART3_GPIO_PinSource_TX, GPIO_AF_USART3);
-   GPIO_PinAFConfig(USART3_GPIO_PORT, USART3_GPIO_PinSource_RX, GPIO_AF_USART3);
-
-   // USART IRQ init
-   NVIC_InitStructure.NVIC_IRQChannel    = USART3_IRQn;
-   NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-   NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
-   NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 1;
-   NVIC_Init(&NVIC_InitStructure);
-
-   // Configure USART as alternate function
-   GPIO_StructInit(&GPIO_InitStructure);
-   GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
-   GPIO_InitStructure.GPIO_PuPd  = GPIO_PuPd_UP;
-   GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_AF;
-   GPIO_InitStructure.GPIO_Pin   = USART3_GPIO_Pin_TX | USART3_GPIO_Pin_RX; //  Tx | Rx
-   GPIO_InitStructure.GPIO_Speed = GPIO_Fast_Speed;
-   GPIO_Init(USART3_GPIO_PORT, &GPIO_InitStructure);
-
-   // Configure USART baud rate
-   USART_StructInit(&USART_InitStructure);
-   USART_InitStructure.USART_BaudRate   = speed;
-   USART_InitStructure.USART_WordLength = USART_WordLength_8b;
-   USART_InitStructure.USART_StopBits   = USART_StopBits_1;
-   USART_InitStructure.USART_Parity     = USART_Parity_No;
-   USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
-   USART_InitStructure.USART_Mode       = USART_Mode_Rx | USART_Mode_Tx;
-   USART_Init(USART3, &USART_InitStructure);
-
-   USART_Cmd(USART3, ENABLE);
-
-   USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
-
-   m_USART3.init(USART3);
-}
-
-#endif
-
-/* ************* UART5 ***************** */
-#if !(defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
-
-static CSTMUART m_UART5;
-
-void UART5_IRQHandler()
-{
-   m_UART5.handleIRQ();
-}
-
-void InitUART5(int speed)
-{
-   // UART5 - TXD PC12 - RXD PD2
-   GPIO_InitTypeDef GPIO_InitStructure;
-   USART_InitTypeDef USART_InitStructure;
-   NVIC_InitTypeDef NVIC_InitStructure;
-
-   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
-   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
-   RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART5, ENABLE);
-   GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_UART5);
-   GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_UART5);
-
-   // USART IRQ init
-   NVIC_InitStructure.NVIC_IRQChannel    = UART5_IRQn;
-   NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
-   NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
-   NVIC_InitStructure.NVIC_IRQChannelSubPriority        = 1;
-   NVIC_Init(&NVIC_InitStructure);
-
-   // Configure USART as alternate function
-   GPIO_StructInit(&GPIO_InitStructure);
-   GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
-   GPIO_InitStructure.GPIO_PuPd  = GPIO_PuPd_UP;
-   GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_AF;
-   GPIO_InitStructure.GPIO_Pin   = GPIO_Pin_12; //  Tx
-   GPIO_InitStructure.GPIO_Speed = GPIO_Fast_Speed;
-   GPIO_Init(GPIOC, &GPIO_InitStructure);
-
-   GPIO_InitStructure.GPIO_Pin   = GPIO_Pin_2; //  Rx
-   GPIO_Init(GPIOD, &GPIO_InitStructure);
-
-   // Configure USART baud rate
-   USART_StructInit(&USART_InitStructure);
-   USART_InitStructure.USART_BaudRate   = speed;
-   USART_InitStructure.USART_WordLength = USART_WordLength_8b;
-   USART_InitStructure.USART_StopBits   = USART_StopBits_1;
-   USART_InitStructure.USART_Parity     = USART_Parity_No;
-   USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
-   USART_InitStructure.USART_Mode       = USART_Mode_Rx | USART_Mode_Tx;
-   USART_Init(UART5, &USART_InitStructure);
-
-   USART_Cmd(UART5, ENABLE);
-
-   USART_ITConfig(UART5, USART_IT_RXNE, ENABLE);
-
-   m_UART5.init(UART5);
-}
-
-#endif
-/////////////////////////////////////////////////////////////////
-
-void CSerialPort::beginInt(uint8_t n, int speed)
-{
-   switch (n) {
-      case 1U:
-         #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
-         InitUSART3(speed);
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
-         InitUSART1(speed);
-         #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
-         InitUSART2(speed);
-         #elif defined(DRCC_DVM)
-         InitUSART1(speed);
-         #endif
-         break;
-      case 3U:
-         #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
-         InitUSART1(speed);
-         #elif defined(DRCC_DVM)
-         InitUSART2(speed);
-         #else
-         InitUART5(speed);
-         #endif
-         break;
-      default:
-         break;
-   }
-}
-
-int CSerialPort::availableForReadInt(uint8_t n)
-{
-   switch (n) {
-      case 1U:
-         #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
-         return m_USART3.available();//AvailUSART3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
-         return m_USART1.available();//AvailUSART1();
-         #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
-         return m_USART2.available();//AvailUSART2();
-         #elif defined(DRCC_DVM)
-         return m_USART1.available();//AvailUSART1();
-         #endif
-      case 3U:
-         #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
-         return m_USART1.available(); //AvailUSART1();
-         #elif defined(DRCC_DVM)
-         return m_USART2.available(); //AvailUSART2();
-         #else
-         return m_UART5.available();//AvailUART5();
-         #endif
-      default:
-         return 0;
-   }
-}
-
-int CSerialPort::availableForWriteInt(uint8_t n)
-{
-   switch (n) {
-      case 1U:
-         #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
-         return m_USART3.availableForWrite(); //AvailForWriteUSART3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
-         return m_USART1.availableForWrite(); //AvailForWriteUSART1();
-         #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
-         return m_USART2.availableForWrite();//AvailForWriteUSART2();
-         #elif defined(DRCC_DVM)
-         return m_USART1.availableForWrite();//AvailForWriteUSART1();
-         #endif
-      case 3U:
-         #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
-         return m_USART1.availableForWrite(); //AvailForWriteUSART1();
-         #elif defined(DRCC_DVM)
-         return m_USART2.availableForWrite();//AvailForWriteUSART2();
-         #else
-         return m_UART5.availableForWrite();//AvailForWriteUART5();
-         #endif
-      default:
-         return 0;
-   }
-}
-
-uint8_t CSerialPort::readInt(uint8_t n)
-{
-   switch (n) {
-      case 1U:
-         #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
-         return m_USART3.read();//ReadUSART3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
-         return m_USART1.read();//ReadUSART1();
-         #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
-         return m_USART2.read();//ReadUSART2();
-         #elif defined(DRCC_DVM)
-         return m_USART1.read();//ReadUSART1();
-         #endif
-      case 3U:
-         #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
-         return m_USART1.read();//ReadUSART1();
-         #elif defined(DRCC_DVM)
-         return m_USART2.read();//ReadUSART2();
-         #else
-         return m_UART5.read();//ReadUART5();
-         #endif
-      default:
-         return 0U;
-   }
-}
-
-void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
-{
-   switch (n) {
-      case 1U:
-         #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
-         m_USART3.write(data, length); //WriteUSART3(data, length);
-         if (flush)
-            m_USART3.flush();//TXSerialFlush3();
-         #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F7_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446)
-         m_USART1.write(data, length);//WriteUSART1(data, length);
-         if (flush)
-            m_USART1.flush();//TXSerialFlush1();
-         #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
-         m_USART2.write(data, length);//WriteUSART2(data, length);
-         if (flush)
-            m_USART2.flush();//TXSerialFlush2();
-         #elif defined(DRCC_DVM)
-         m_USART1.write(data, length);//WriteUSART1(data, length);
-         if (flush)
-            m_USART1.flush();//TXSerialFlush1();
-         #endif
-         break;
-      case 3U:
-         #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
-         m_USART1.write(data, length); //WriteUSART1(data, length);
-         if (flush)
-            m_USART1.flush();
-         #elif defined(DRCC_DVM)
-         m_USART2.write(data, length);//WriteUSART2(data, length);
-         if (flush)
-            m_USART2.flush();//TXSerialFlush2();
-         #else
-         m_UART5.write(data, length);//WriteUART5(data, length);
-         if (flush)
-            m_UART5.flush();//TXSerialFlush5();
-         #endif
-         break;
-      default:
-         break;
-   }
-}
-
-#endif
-

SerialTeensy.cpp

@@ -1,237 +0,0 @@
-/*
- *   Copyright (C) 2017 by Chris Huitema
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- *   28-4-2017 Created for MMDVM Pi shield for Teensy by Chris Huitema
- */
-
-#include "Config.h"
-#include "Globals.h"
-
-#if defined(VK6MST_TEENSY_PI3_SHIELD_I2C)
-
-#include <i2c_t3.h>   //available here https://github.com/nox771/i2c_t3 or maybe the normal wire will work #include <wire.h> justs need to test i guess
-
-#define I2C_ADDRESS   0x22
-#define I2C_SPEED     100000
-
-// Function prototypes
-void receiveEvent(size_t count);
-void requestEvent(void);
-
-#define TX_FIFO_SIZE 512U
-#define RX_FIFO_SIZE 512U
-
-volatile uint8_t  TXfifo[TX_FIFO_SIZE];
-volatile uint8_t  RXfifo[RX_FIFO_SIZE];
-volatile uint16_t TXfifohead, TXfifotail;
-volatile uint16_t RXfifohead, RXfifotail;
-
-// Init queues
-void TXfifoinit(void)
-{
-   TXfifohead = 0U;
-   TXfifotail = 0U;
-}
-
-void RXfifoinit()
-{
-   RXfifohead = 0U;
-   RXfifotail = 0U;
-}
-
-// How full is queue
-
-uint16_t TXfifolevel(void)
-{
-   uint32_t tail = TXfifotail;
-   uint32_t head = TXfifohead;
-
-   if (tail > head)
-      return TX_FIFO_SIZE + head - tail;
-   else
-      return head - tail;
-}
-
-uint16_t RXfifolevel(void)
-{
-   uint32_t tail = RXfifotail;
-   uint32_t head = RXfifohead;
-
-   if (tail > head)
-      return RX_FIFO_SIZE + head - tail;
-   else
-      return head - tail;
-}
-
-
-uint8_t TXfifoput(uint8_t next)
-{
-   if (TXfifolevel() < TX_FIFO_SIZE) {
-      TXfifo[TXfifohead] = next;
-
-      TXfifohead++;
-      if (TXfifohead >= TX_FIFO_SIZE)
-         TXfifohead = 0U;
-      return 1U;
-   } else {
-      return 0U; // signal an overflow occurred by returning a zero count
-   }
-}
-
-void I2Cbegin(void)
-{
-  // Setup for Slave mode, address 0x22, pins 18/19, external pullups, speed in hz
-  Wire.begin(I2C_SLAVE, I2C_ADDRESS, I2C_PINS_18_19, I2C_PULLUP_EXT, I2C_SPEED);
-
-    // register events
-    Wire.onReceive(receiveEvent);
-    Wire.onRequest(requestEvent);
-
-    // initialize the fifos
-    TXfifoinit();
-    RXfifoinit();
-}
-
-
-int I2Cavailable(void)
-{
-  if (RXfifolevel() > 0U)
-      return 1U;
-    else
-      return 0U;
-}
-
-
-uint8_t I2Cread(void)
-{
-  uint8_t data_c = RXfifo[RXfifotail];
-
-   RXfifotail++;
-   if (RXfifotail >= RX_FIFO_SIZE)
-      RXfifotail = 0U;
-
-   return data_c;
-}
-
-
-void I2Cwrite(const uint8_t* data, uint16_t length)
-{
-   for (uint16_t i = 0U; i < length; i++)
-      TXfifoput(data[i]);   //puts it in the fifo
-}
-
-//
-// handle Rx Event (incoming I2C data)
-//
-void receiveEvent(size_t count)
-{
-  for (uint16_t i = 0U; i < count; i++)
-  {
-    if (RXfifolevel() < RX_FIFO_SIZE) {
-      RXfifo[RXfifohead] = Wire.readByte();
-      if (RXfifo[RXfifohead] != -1){
-        RXfifohead++;
-        if (RXfifohead >= RX_FIFO_SIZE) RXfifohead = 0U;
-      }
-    } else {
-      Wire.readByte();                  // drop data if mem full.
-    }
-    
-  }
-}
-
-//
-// handle Tx Event (outgoing I2C data)
-//
-void requestEvent(void)
-{
-    if (TXfifolevel() > 0) {
-      if (Wire.write(TXfifo[TXfifotail])){  //write to i2c
-        TXfifotail++;
-        if (TXfifotail >= TX_FIFO_SIZE) TXfifotail = 0U;
-      }  
-    }
-}
-
-
-
-/************************************/
-
-void CSerialPort::beginInt(uint8_t n, int speed)
-{
-  switch (n) {
-    case 1U:
-      return I2Cbegin();
-    case 3U:
-      Serial3.begin(speed);
-      break;
-    default:
-      break;
-  }
-}
-
-int CSerialPort::availableForReadInt(uint8_t n)
-{
-  switch (n) {
-    case 1U:
-      return I2Cavailable();
-    case 3U:
-      return Serial3.available();
-    default:
-      return false;
-  }
-}
-
-int CSerialPort::availableForWriteInt(uint8_t n)
-{
-  switch (n) {
-    case 3U:
-      return Serial3.availableForWrite();
-    default:
-      return false;
-  }
-}
-
-uint8_t CSerialPort::readInt(uint8_t n)
-{
-  switch (n) {
-    case 1U:
-      return I2Cread();
-    case 3U:
-      return Serial3.read();
-    default:
-      return 0U;
-  }
-}
-
-void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
-{
-  switch (n) {
-    case 1U:
-      I2Cwrite(data, length);
-      break;
-    case 3U:
-      Serial3.write(data, length);
-      if (flush)
-        Serial3.flush();
-      break;
-    default:
-      break;
-  }
-}
-
-#endif

Tools/FMGenerateFilterCoefficients.py

@@ -1,46 +0,0 @@
-# based on https://github.com/berndporr/iir_fixed_point/blob/master/gen_coeff.py
-
-import numpy as np
-import scipy.signal as signal
-import pylab as pl
-
-# Calculate the coefficients for a pure fixed point
-# integer filter
-
-# sampling rate
-fs = 24000
-
-# cutoffs
-f1 = 300
-f2 = 2700
-# ripple
-rp = 0.2
-
-# scaling factor in bits, do not change !
-q = 15
-# scaling factor as facor...
-scaling_factor = 2**q
-
-# let's generate a sequence of 2nd order IIR filters
-sos = signal.cheby1(3,rp,[f1, f2],'bandpass', output='sos', fs=fs)
-#os = signal.cheby1(4, rp, f2, 'lowpass', output='sos', fs=fs) #deemphasis filter
-#sos = signal.cheby1(1, rp, 2122, 'highpass', output='sos', fs=fs) #deemphasis filter
-
-sosrounded = np.round((sos) * scaling_factor)
-
-# print coefficients
-for biquad in sosrounded:
-    for coeff in biquad:
-        print(int(coeff),",",sep="",end="")
-        #print((coeff),",",sep="",end="")
-    print("")
-
-# plot the frequency response
-b,a = signal.sos2tf(sos)
-w,h = signal.freqz(b,a, worN=2048)
-pl.plot(w/np.pi/2*fs,20*np.log(np.abs(h)))
-pl.xlabel('frequency/Hz');
-pl.ylabel('gain/dB');
-pl.ylim(top=1,bottom=-30);
-pl.xlim(left=250, right=12000);
-pl.show()

Tools/emphasis.txt

@@ -1,58 +0,0 @@
-% GNU Octave script to generate pre and deemphasis filters
-% https://dsp.stackexchange.com/questions/34605/biquad-cookbook-formula-for-broadcast-fm-de-emphasis
-% PACKAGES
-
-pkg load control
-pkg load signal
-
-clear all;
-clc;
-
-fs = 24000;
-samplingtime = 1/fs;
-
-% analog prototype
-A2 = [1];
-B2 = [0.000075 1];
-
-% Pre
-Ds = tf(B2, A2);
-% De
-% Ds = tf(A2, B2);
- 
-Ds = Ds/dcgain(Ds);
-
-% MZT
-T1 = 0.000075; % 75us
-z1 = -exp(-1.0/(fs*T1));
-p1 = 1+z1;
-
-a0 = 1.0;
-a1 = p1;
-a2 = 0;
-
-b0 = 1.0;
-b1 = z1;
-b2 = 0;
-
-% swap between a1, b1 to select pre- or de-emphasis
-
-# Pre
-Bmzt = [b0 a1 b2]
-Amzt = [a0 b1 a2]
-% De
-% Bmzt = [b0 b1 b2]
-% Amzt = [a0 a1 a2]
-
-DzMZT = tf(Amzt, Bmzt, samplingtime);
-DzMZT = DzMZT/dcgain(DzMZT);
-
-%% Plot
-wmin = 2 * pi * 20.0; % 20Hz
-wmax = 2 * pi * ((fs/2.0) - (fs/2 - 20000)); %20kHz
-
-figure(1);
-bode(Ds, 'b', DzMZT, 'c', {wmin, wmax});
-legend('Analog prototype', 'MZT 2nd order','location', 'northwest');
-grid on;
-pause();

openocd.cfg

@@ -1,2 +0,0 @@
-source [find interface/stlink-v2.cfg]
-source [find target/stm32f1x.cfg]

pins/pins_f4_discovery.h

@@ -1,96 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F4_DISCOVERY_H
-#define _PINS_F4_DISCOVERY_H
-
-/*
-Pin definitions for STM32F4 Discovery Board:
-
-PTT      PB13   output           P1 Pin37
-COSLED   PA7    output           P1 Pin17
-LED      PD15   output           P1 Pin47
-COS      PA5    input            P1 Pin15
-
-DSTAR    PD12   output           P1 Pin44
-DMR      PD13   output           P1 Pin45
-YSF      PD14   output           P1 Pin46
-P25      PD11   output           P1 Pin43
-NXDN     PD10   output           P1 Pin42
-
-RX       PA0    analog input     P1 Pin12
-RSSI     PA1    analog input     P1 Pin11
-TX       PA4    analog output    P1 Pin16
-
-EXT_CLK  PA15   input            P2 Pin40
-*/
-
-#define PIN_COS           GPIO_Pin_5
-#define PORT_COS          GPIOA
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOA
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_7
-#define PORT_COSLED       GPIOA
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOA
-
-#define PIN_LED           GPIO_Pin_15
-#define PORT_LED          GPIOD
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOD
-
-#define PIN_P25           GPIO_Pin_11
-#define PORT_P25          GPIOD
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOD
-
-#define PIN_NXDN          GPIO_Pin_10
-#define PORT_NXDN         GPIOD
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOD
-
-#define PIN_DSTAR         GPIO_Pin_12
-#define PORT_DSTAR        GPIOD
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOD
-
-#define PIN_DMR           GPIO_Pin_13
-#define PORT_DMR          GPIOD
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOD
-
-#define PIN_YSF           GPIO_Pin_14
-#define PORT_YSF          GPIOD
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOD
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_1
-#define PIN_RSSI_CH       ADC_Channel_1
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#endif

pins/pins_f4_drcc_hhp446.h

@@ -1,143 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F4_DRCC_HHP446_H
-#define _PINS_F4_DRCC_HHP446_H
-
-/*
-Pin definitions for DRCC_DVM BG5HHP F446 board rev1
-
-TX/PTT_LED  PB12   output
-RX/COS_LED  PB5    output
-STATUS_LED  PB10   output
-
-COS_IN      PB13   input
-
-DSTAR       N/A
-DMR         N/A
-YSF         N/A
-P25         N/A
-NXDN        N/A
-POCSAG      N/A
-
-MDMR/BIT0   PB8    output
-MYSF/BIT1   PB9    output
-MDSTAR/BIT2 PB14   output
-MP25/BIT3   PB15   output          Generic Mode Pins
-MNXDN       N/A
-MPOCSAG     N/A
-
-RX          PA0    analog input
-RSSI        PA1    analog input
-TX          PA4    analog output
-
-EXT_CLK     N/A
-
-UART1_TX    PA9    output
-UART1_RX    PA10   output          Host Data Communication
-
-UART2_TX    PA2    output
-UART2_RX    PA3    output          Nextion Data Communication
-
-I2C1_SCL    PB6    output
-I2C1_SDA    PB7    output          OLED Data Communication as master
-
-*/
-
-#define PIN_COS           GPIO_Pin_13
-#define PORT_COS          GPIOB
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
-
-#define PIN_PTT           GPIO_Pin_12
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_5
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_10
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_TXLED         GPIO_Pin_4
-#define PORT_TXLED        GPIOB
-#define RCC_Per_TXLED     RCC_AHB1Periph_GPIOB
-
-// #define PIN_P25           GPIO_Pin_3
-// #define PORT_P25          GPIOB
-// #define RCC_Per_P25       RCC_AHB1Periph_GPIOB
-
-// #define PIN_NXDN          GPIO_Pin_10
-// #define PORT_NXDN         GPIOA
-// #define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
-
-// #define PIN_POCSAG        GPIO_Pin_12
-// #define PORT_POCSAG       GPIOB
-// #define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
-
-// #define PIN_DSTAR         GPIO_Pin_10
-// #define PORT_DSTAR        GPIOB
-// #define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
-
-// #define PIN_DMR           GPIO_Pin_4
-// #define PORT_DMR          GPIOB
-// #define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
-
-// #define PIN_YSF           GPIO_Pin_5
-// #define PORT_YSF          GPIOB
-// #define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
-
-#if defined(MODE_PINS)
-#define PIN_MP25          GPIO_Pin_15
-#define PORT_MP25         GPIOB
-#define RCC_Per_MP25      RCC_AHB1Periph_GPIOB
-
-#define PIN_MDSTAR        GPIO_Pin_9
-#define PORT_MDSTAR       GPIOB
-#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOB
-
-#define PIN_MDMR          GPIO_Pin_8
-#define PORT_MDMR         GPIOB
-#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOB
-
-#define PIN_MYSF          GPIO_Pin_14
-#define PORT_MYSF         GPIOB
-#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOB
-#endif
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_1
-#define PIN_RSSI_CH       ADC_Channel_1
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-#define PORT_TX           GPIOA
-#define RCC_Per_TX        RCC_AHB1Periph_GPIOA
-
-#endif

pins/pins_f4_drcc_nqf.h

@@ -1,144 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F4_DRCC_NQF_H
-#define _PINS_F4_DRCC_NQF_H
-
-/*
-Pin definitions for DRCC_DVM BG7NQF  board rev1
-
-TX/PTT_LED  PB12   output
-RX/COS_LED  PB5    output
-STATUS_LED  PB10   output
-
-COS_IN      PB13   input
-
-DSTAR       N/A
-DMR         N/A
-YSF         N/A
-P25         N/A
-NXDN        N/A
-POCSAG      N/A
-
-MDMR/BIT0   PB8    output
-MYSF/BIT1   PB9    output
-MDSTAR/BIT2 PB14   output
-MP25/BIT3   PB15   output          Generic Mode Pins
-MNXDN       N/A
-MPOCSAG     N/A
-
-RX          PA0    analog input
-RSSI        PA1    analog input
-TX          PA4    analog output
-
-EXT_CLK     PA15   input
-
-UART1_TX    PA9    output
-UART1_RX    PA10   output          Host Data Communication
-
-UART2_TX    PA2    output
-UART2_RX    PA3    output          Nextion Data Communication
-
-I2C1_SCL    PB6    output
-I2C1_SDA    PB7    output          OLED Data Communication as master
-
-*/
-
-#define PIN_COS           GPIO_Pin_13
-#define PORT_COS          GPIOB
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
-
-#define PIN_PTT           GPIO_Pin_12
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_5
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_10
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_TXLED         GPIO_Pin_4
-#define PORT_TXLED        GPIOB
-#define RCC_Per_TXLED     RCC_AHB1Periph_GPIOB
-
-// #define PIN_P25           GPIO_Pin_3
-// #define PORT_P25          GPIOB
-// #define RCC_Per_P25       RCC_AHB1Periph_GPIOB
-
-// #define PIN_NXDN          GPIO_Pin_10
-// #define PORT_NXDN         GPIOA
-// #define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
-
-// #define PIN_POCSAG        GPIO_Pin_12
-// #define PORT_POCSAG       GPIOB
-// #define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
-
-// #define PIN_DSTAR         GPIO_Pin_10
-// #define PORT_DSTAR        GPIOB
-// #define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
-
-// #define PIN_DMR           GPIO_Pin_4
-// #define PORT_DMR          GPIOB
-// #define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
-
-// #define PIN_YSF           GPIO_Pin_5
-// #define PORT_YSF          GPIOB
-// #define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
-
-#if defined(MODE_PINS)
-#define PIN_MP25          GPIO_Pin_15
-#define PORT_MP25         GPIOB
-#define RCC_Per_MP25      RCC_AHB1Periph_GPIOB
-
-#define PIN_MDSTAR        GPIO_Pin_9
-#define PORT_MDSTAR       GPIOB
-#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOB
-
-#define PIN_MDMR          GPIO_Pin_8
-#define PORT_MDMR         GPIOB
-#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOB
-
-#define PIN_MYSF          GPIO_Pin_14
-#define PORT_MYSF         GPIOB
-#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOB
-
-#endif
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_1
-#define PIN_RSSI_CH       ADC_Channel_1
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-#define PORT_TX           GPIOA
-#define RCC_Per_TX        RCC_AHB1Periph_GPIOA
-
-#endif

pins/pins_f4_f4m.h

@@ -1,101 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F4_F4M_H
-#define _PINS_F4_F4M_H
-
-/*
-Pin definitions for MMDVM-F4M Pi-Hat F0DEI board:
-
-PTT      PB13   output
-COSLED   PB14   output
-LED      PB15   output
-COS      PC0    input
-
-DSTAR    PC7    output
-DMR      PC8    output
-YSF      PA8    output
-P25      PC9    output
-NXDN     PB1    output
-POCSAG   PB12   output
-
-RX       PA0    analog input
-RSSI     PA7    analog input
-TX       PA4    analog output
-
-EXT_CLK  PA15   input
-*/
-
-#define PIN_COS           GPIO_Pin_0
-#define PORT_COS          GPIOC
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_14
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_15
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_9
-#define PORT_P25          GPIOC
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
-
-#define PIN_NXDN          GPIO_Pin_1
-#define PORT_NXDN         GPIOB
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
-
-#define PIN_POCSAG        GPIO_Pin_12
-#define PORT_POCSAG       GPIOB
-#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_7
-#define PORT_DSTAR        GPIOC
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
-
-#define PIN_DMR           GPIO_Pin_8
-#define PORT_DMR          GPIOC
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
-
-#define PIN_YSF           GPIO_Pin_8
-#define PORT_YSF          GPIOA
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_7
-#define PIN_RSSI_CH       ADC_Channel_7
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#endif

pins/pins_f4_nucleo_arduino.h

@@ -1,101 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F4_NUCLEO_ARDUINO_H
-#define _PINS_F4_NUCLEO_ARDUINO_H
-
-/*
-Pin definitions for STM32F4 Nucleo boards (Arduino header):
-
-PTT      PB10   output           CN9 Pin7
-COSLED   PB3    output           CN9 Pin4
-LED      PB5    output           CN9 Pin5
-COS      PB4    input            CN9 Pin6
-
-DSTAR    PA1    output           CN8 Pin2
-DMR      PA4    output           CN8 Pin3
-YSF      PB0    output           CN8 Pin4
-P25      PC1    output           CN8 Pin5
-NXDN     PA3    output           CN9 Pin1
-POCSAG   PB12   output
-
-RX       PA0    analog input     CN8 Pin1
-RSSI     PC0    analog input     CN8 Pin6
-TX       PA5    analog output    CN5 Pin6
-
-EXT_CLK  PB8    input            CN5 Pin10
-*/
-
-#define PIN_COS           GPIO_Pin_4
-#define PORT_COS          GPIOB
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
-
-#define PIN_PTT           GPIO_Pin_10
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_3
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_5
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_1
-#define PORT_P25          GPIOC
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
-
-#define PIN_NXDN          GPIO_Pin_3
-#define PORT_NXDN         GPIOA
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
-
-#define PIN_POCSAG        GPIO_Pin_12
-#define PORT_POCSAG       GPIOB
-#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_1
-#define PORT_DSTAR        GPIOA
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOA
-
-#define PIN_DMR           GPIO_Pin_4
-#define PORT_DMR          GPIOA
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOA
-
-#define PIN_YSF           GPIO_Pin_0
-#define PORT_YSF          GPIOB
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
-
-#define PIN_EXT_CLK       GPIO_Pin_8
-#define SRC_EXT_CLK       GPIO_PinSource8
-#define PORT_EXT_CLK      GPIOB
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_0
-#define PIN_RSSI_CH       ADC_Channel_10
-#define PORT_RSSI         GPIOC
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOC
-
-#define PIN_TX            GPIO_Pin_5
-#define PIN_TX_CH         DAC_Channel_2
-
-#endif

pins/pins_f4_nucleo_morpho.h

@@ -1,134 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F4_NUCLEO_MORPHO_H
-#define _PINS_F4_NUCLEO_MORPHO_H
-
-/*
-Pin definitions for STM32F4 Nucleo boards (ST Morpho header):
-
-PTT      PB13   output           CN10 Pin30
-COSLED   PB14   output           CN10 Pin28
-LED      PA5    output           CN10 Pin11
-COS      PB15   input            CN10 Pin26
-
-DSTAR    PB10   output           CN10 Pin25
-DMR      PB4    output           CN10 Pin27
-YSF      PB5    output           CN10 Pin29
-P25      PB3    output           CN10 Pin31
-NXDN     PA10   output           CN10 Pin33
-POCSAG   PB12   output           CN10 Pin16
-
-MDSTAR   PC4    output           CN10 Pin34
-MDMR     PC5    output           CN10 Pin6
-MYSF     PC2    output           CN7 Pin35
-MP25     PC3    output           CN7 Pin37
-MNXDN    PC6    output           CN10 Pin4
-MPOCSAG  PC8    output           CN10 Pin2
-
-RX       PA0    analog input     CN7 Pin28
-RSSI     PA1    analog input     CN7 Pin30
-TX       PA4    analog output    CN7 Pin32
-
-EXT_CLK  PA15   input            CN7 Pin17
-*/
-
-#define PIN_COS           GPIO_Pin_15
-#define PORT_COS          GPIOB
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_14
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_5
-#define PORT_LED          GPIOA
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
-
-#define PIN_P25           GPIO_Pin_3
-#define PORT_P25          GPIOB
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
-
-#define PIN_NXDN          GPIO_Pin_10
-#define PORT_NXDN         GPIOA
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
-
-#define PIN_POCSAG        GPIO_Pin_12
-#define PORT_POCSAG       GPIOB
-#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_10
-#define PORT_DSTAR        GPIOB
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
-
-#define PIN_DMR           GPIO_Pin_4
-#define PORT_DMR          GPIOB
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
-
-#define PIN_YSF           GPIO_Pin_5
-#define PORT_YSF          GPIOB
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
-
-#if defined(MODE_PINS)
-#define PIN_MP25          GPIO_Pin_3
-#define PORT_MP25         GPIOC
-#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
-
-#define PIN_MNXDN         GPIO_Pin_6
-#define PORT_MNXDN        GPIOC
-#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
-
-#define PIN_MDSTAR        GPIO_Pin_4
-#define PORT_MDSTAR       GPIOC
-#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
-
-#define PIN_MDMR          GPIO_Pin_5
-#define PORT_MDMR         GPIOC
-#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
-
-#define PIN_MYSF          GPIO_Pin_2
-#define PORT_MYSF         GPIOC
-#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
-
-#define PIN_MPOCSAG       GPIO_Pin_8
-#define PORT_MPOCSAG      GPIOC
-#define RCC_Per_MPOCSAG   RCC_AHB1Periph_GPIOC
-#endif
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_1
-#define PIN_RSSI_CH       ADC_Channel_1
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#endif

pins/pins_f4_pi.h

@@ -1,101 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F4_PI_H
-#define _PINS_F4_PI_H
-
-/*
-Pin definitions for STM32F4 Pi Board:
-
-PTT      PB13   output
-COSLED   PB14   output
-LED      PB15   output
-COS      PC0    input
-
-DSTAR    PC7    output
-DMR      PC8    output
-YSF      PA8    output
-P25      PC9    output
-NXDN     PB1    output
-POCSAG   PB12   output
-
-RX       PA0    analog input
-RSSI     PA7    analog input
-TX       PA4    analog output
-
-EXT_CLK  PA15   input
-*/
-
-#define PIN_COS           GPIO_Pin_0
-#define PORT_COS          GPIOC
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_14
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_15
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_9
-#define PORT_P25          GPIOC
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
-
-#define PIN_NXDN          GPIO_Pin_1
-#define PORT_NXDN         GPIOB
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
-
-#define PIN_POCSAG        GPIO_Pin_12
-#define PORT_POCSAG       GPIOB
-#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_7
-#define PORT_DSTAR        GPIOC
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
-
-#define PIN_DMR           GPIO_Pin_8
-#define PORT_DMR          GPIOC
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
-
-#define PIN_YSF           GPIO_Pin_8
-#define PORT_YSF          GPIOA
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_7
-#define PIN_RSSI_CH       ADC_Channel_7
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#endif

pins/pins_f4_rpt_tgo.h

@@ -1,134 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F4_RPT_TGO_H
-#define _PINS_F4_RPT_TGO_H
-
-/*
-Pin definitions for MMDVM_RPT_Hat Pi-Hat BG4TGO  board::
-
-PTT      PB13   output           CN10 Pin30
-COSLED   PB14   output           CN10 Pin28
-LED      PA5    output           CN10 Pin11
-COS      PB15   input            CN10 Pin26
-
-DSTAR    PB10   output           CN10 Pin25
-DMR      PB4    output           CN10 Pin27
-YSF      PB5    output           CN10 Pin29
-P25      PB3    output           CN10 Pin31
-NXDN     PA10   output           CN10 Pin33
-POCSAG   PB12   output           CN10 Pin16
-
-MDSTAR   PC4    output           CN10 Pin34
-MDMR     PC5    output           CN10 Pin6
-MYSF     PC2    output           CN7 Pin35
-MP25     PC3    output           CN7 Pin37
-MNXDN    PC6    output           CN10 Pin4
-MPOCSAG  PC8    output           CN10 Pin2
-
-RX       PA0    analog input     CN7 Pin28
-RSSI     PA1    analog input     CN7 Pin30
-TX       PA4    analog output    CN7 Pin32
-
-EXT_CLK  PA15   input            CN7 Pin17
-*/
-
-#define PIN_COS           GPIO_Pin_15
-#define PORT_COS          GPIOB
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_14
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_5
-#define PORT_LED          GPIOA
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
-
-#define PIN_P25           GPIO_Pin_3
-#define PORT_P25          GPIOB
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
-
-#define PIN_NXDN          GPIO_Pin_10
-#define PORT_NXDN         GPIOA
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
-
-#define PIN_POCSAG        GPIO_Pin_12
-#define PORT_POCSAG       GPIOB
-#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_10
-#define PORT_DSTAR        GPIOB
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
-
-#define PIN_DMR           GPIO_Pin_4
-#define PORT_DMR          GPIOB
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
-
-#define PIN_YSF           GPIO_Pin_5
-#define PORT_YSF          GPIOB
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
-
-#if defined(MODE_PINS)
-#define PIN_MP25          GPIO_Pin_3
-#define PORT_MP25         GPIOC
-#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
-
-#define PIN_MNXDN         GPIO_Pin_6
-#define PORT_MNXDN        GPIOC
-#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
-
-#define PIN_MDSTAR        GPIO_Pin_4
-#define PORT_MDSTAR       GPIOC
-#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
-
-#define PIN_MDMR          GPIO_Pin_5
-#define PORT_MDMR         GPIOC
-#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
-
-#define PIN_MYSF          GPIO_Pin_2
-#define PORT_MYSF         GPIOC
-#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
-
-#define PIN_MPOCSAG       GPIO_Pin_8
-#define PORT_MPOCSAG      GPIOC
-#define RCC_Per_MPOCSAG   RCC_AHB1Periph_GPIOC
-#endif
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_1
-#define PIN_RSSI_CH       ADC_Channel_1
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#endif

pins/pins_f4_stm32dvm_v3.h

@@ -1,108 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F4_STM32DVM_V3_H
-#define _PINS_F4_STM32DVM_V3_H
-
-/*
-Pin definitions for STM32F4 STM32-DVM rev 3 Board:
-
-COS      PB13   input
-PTT      PB12   output
-COSLED   PB4    output
-LED      PB3    output
-
-P25      PB8    output
-NXDN     PB9    output
-DSTAR    PB6    output
-DMR      PB5    output
-YSF      PB7    output
-POCSAG   PC10   output (Not Valid)
-FM       PB14   output
-
-RX       PB0    analog input
-RSSI     PB1    analog input
-TX       PA4    analog output
-
-EXT_CLK  PA15   input
-*/
-
-#define PIN_COS           GPIO_Pin_13
-#define PORT_COS          GPIOB
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
-
-#define PIN_PTT           GPIO_Pin_12
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_4
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_3
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_8
-#define PORT_P25          GPIOB
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
-
-#define PIN_NXDN          GPIO_Pin_9
-#define PORT_NXDN         GPIOB
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_6
-#define PORT_DSTAR        GPIOB
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
-
-#define PIN_DMR           GPIO_Pin_5
-#define PORT_DMR          GPIOB
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
-
-#define PIN_YSF           GPIO_Pin_7
-#define PORT_YSF          GPIOB
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
-
-/*
-#define PIN_POCSAG        GPIO_Pin_10
-#define PORT_POCSAG       GPIOC
-#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOC
-*/
-
-#define PIN_FM            GPIO_Pin_14
-#define PORT_FM           GPIOB
-#define RCC_Per_FM        RCC_AHB1Periph_GPIOB
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_8
-#define PORT_RX           GPIOB
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOB
-
-#define PIN_RSSI          GPIO_Pin_1
-#define PIN_RSSI_CH       ADC_Channel_9
-#define PORT_RSSI         GPIOB
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOB
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#endif

pins/pins_f4_stm32eda.h

@@ -1,108 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F4_STM32EDA
-#define _PINS_F4_STM32EDA
-
-/*
-Pin definitions for STM32F4 STM32-DVM-MTR2K & STM32-DVM-MASTR3:
-
-COS      PB13   input
-PTT      PB12   output
-COSLED   PB4    output
-LED      PB3    output
-
-P25      PB8    output
-NXDN     PB9    output
-DSTAR    PB6    output
-DMR      PB5    output
-YSF      PB7    output
-POCSAG   PC10   output
-FM       PB14   output
-
-RX       PB0    analog input
-RSSI     PB1    analog input
-TX       PA4    analog output
-
-EXT_CLK  PA15   input
-*/
-
-#define PIN_COS           GPIO_Pin_13
-#define PORT_COS          GPIOB
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
-
-
-#define PIN_PTT           GPIO_Pin_12
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_4
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_3
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_8
-#define PORT_P25          GPIOB
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
-
-#define PIN_NXDN          GPIO_Pin_9
-#define PORT_NXDN         GPIOB
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_6
-#define PORT_DSTAR        GPIOB
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
-
-#define PIN_DMR           GPIO_Pin_5
-#define PORT_DMR          GPIOB
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
-
-#define PIN_YSF           GPIO_Pin_7
-#define PORT_YSF          GPIOB
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
-
-#define PIN_POCSAG        GPIO_Pin_10
-#define PORT_POCSAG       GPIOC
-#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOC
-
-#define PIN_FM            GPIO_Pin_14
-#define PORT_FM           GPIOB
-#define RCC_Per_FM        RCC_AHB1Periph_GPIOB
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_8
-#define PORT_RX           GPIOB
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOB
-
-#define PIN_RSSI          GPIO_Pin_1
-#define PIN_RSSI_CH       ADC_Channel_9
-#define PORT_RSSI         GPIOB
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOB
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#endif
-

pins/pins_f7_f7m.h

@@ -1,101 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F7_F7M_H
-#define _PINS_F7_F7M_H
-
-/*
-Pin definitions for MMDVM-F7M Pi-Hat F0DEI board:
-
-PTT      PB13   output
-COSLED   PB14   output
-LED      PB15   output
-COS      PC0    input
-
-DSTAR    PC7    output
-DMR      PC8    output
-YSF      PA8    output
-P25      PC9    output
-NXDN     PB1    output
-POCSAG   PB12   output
-
-RX       PA0    analog input
-RSSI     PA7    analog input
-TX       PA4    analog output
-
-EXT_CLK  PA15   input
-*/
-
-#define PIN_COS           GPIO_Pin_0
-#define PORT_COS          GPIOC
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_14
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_15
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_9
-#define PORT_P25          GPIOC
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
-
-#define PIN_NXDN          GPIO_Pin_1
-#define PORT_NXDN         GPIOB
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
-
-#define PIN_POCSAG        GPIO_Pin_12
-#define PORT_POCSAG       GPIOB
-#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_7
-#define PORT_DSTAR        GPIOC
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
-
-#define PIN_DMR           GPIO_Pin_8
-#define PORT_DMR          GPIOC
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
-
-#define PIN_YSF           GPIO_Pin_8
-#define PORT_YSF          GPIOA
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_7
-#define PIN_RSSI_CH       ADC_Channel_7
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#endif

pins/pins_f7_nucleo.h

@@ -1,129 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F7_NUCLEO_H
-#define _PINS_F7_NUCLEO_H
-
-/*
-Pin definitions for STM32F7 Nucleo boards (ST Morpho header):
-
-PTT      PB13   output           CN12 Pin30
-COSLED   PB14   output           CN12 Pin28
-LED      PA5    output           CN12 Pin11
-COS      PB15   input            CN12 Pin26
-
-DSTAR    PB10   output           CN12 Pin25
-DMR      PB4    output           CN12 Pin27
-YSF      PB5    output           CN12 Pin29
-P25      PB3    output           CN12 Pin31
-NXDN     PA10   output           CN12 Pin33
-POCSAG   PB12   output           CN12 Pin16
-
-MDSTAR   PC4    output           CN12 Pin34
-MDMR     PC5    output           CN12 Pin6
-MYSF     PC2    output           CN11 Pin35
-MP25     PC3    output           CN11 Pin37
-MNXDN    PC6    output           CN12 Pin4
-
-RX       PA0    analog input     CN11 Pin28
-RSSI     PA1    analog input     CN11 Pin30
-TX       PA4    analog output    CN11 Pin32
-
-EXT_CLK  PA15   input            CN11 Pin17
-*/
-
-#define PIN_COS           GPIO_Pin_15
-#define PORT_COS          GPIOB
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_14
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_5
-#define PORT_LED          GPIOA
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
-
-#define PIN_P25           GPIO_Pin_3
-#define PORT_P25          GPIOB
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
-
-#define PIN_NXDN          GPIO_Pin_10
-#define PORT_NXDN         GPIOA
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
-
-#define PIN_POCSAG        GPIO_Pin_12
-#define PORT_POCSAG       GPIOB
-#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_10
-#define PORT_DSTAR        GPIOB
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
-
-#define PIN_DMR           GPIO_Pin_4
-#define PORT_DMR          GPIOB
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
-
-#define PIN_YSF           GPIO_Pin_5
-#define PORT_YSF          GPIOB
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
-
-#if defined(MODE_PINS)
-#define PIN_MP25          GPIO_Pin_3
-#define PORT_MP25         GPIOC
-#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
-
-#define PIN_MNXDN         GPIO_Pin_6
-#define PORT_MNXDN        GPIOC
-#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
-
-#define PIN_MDSTAR        GPIO_Pin_4
-#define PORT_MDSTAR       GPIOC
-#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
-
-#define PIN_MDMR          GPIO_Pin_5
-#define PORT_MDMR         GPIOC
-#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
-
-#define PIN_MYSF          GPIO_Pin_2
-#define PORT_MYSF         GPIOC
-#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
-#endif
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_1
-#define PIN_RSSI_CH       ADC_Channel_1
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#endif

pins/pins_f7_pi.h

@@ -1,101 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F7_PI_H
-#define _PINS_F7_PI_H
-
-/*
-Pin definitions for STM32F722 Pi Board:
-
-PTT      PB13   output
-COSLED   PB14   output
-LED      PB15   output
-COS      PC0    input
-
-DSTAR    PC7    output
-DMR      PC8    output
-YSF      PA8    output
-P25      PC9    output
-NXDN     PB1    output
-POCSAG   PB12   output
-
-RX       PA0    analog input
-RSSI     PA7    analog input
-TX       PA4    analog output
-
-EXT_CLK  PA15   input
-*/
-
-#define PIN_COS           GPIO_Pin_0
-#define PORT_COS          GPIOC
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
-
-#define PIN_PTT           GPIO_Pin_13
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_14
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_15
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_9
-#define PORT_P25          GPIOC
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
-
-#define PIN_NXDN          GPIO_Pin_1
-#define PORT_NXDN         GPIOB
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
-
-#define PIN_POCSAG        GPIO_Pin_12
-#define PORT_POCSAG       GPIOB
-#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_7
-#define PORT_DSTAR        GPIOC
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
-
-#define PIN_DMR           GPIO_Pin_8
-#define PORT_DMR          GPIOC
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
-
-#define PIN_YSF           GPIO_Pin_8
-#define PORT_YSF          GPIOA
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_7
-#define PIN_RSSI_CH       ADC_Channel_7
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#endif

pins/pins_f7_rpt_hat.h

@@ -1,144 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F7_RPT_HAT_H
-#define _PINS_F7_RPT_HAT_H
-
-/*
-Pin definitions for MMDVM_RPT_Hat Pi-Hat F0DEI DB9MAT DF2ET board:
-
-PTT      PB14   output
-COSLED   PB13   output
-LED      PB12   output
-COS      PC0    input
-
-DSTAR    PB15   output
-DMR      PC6    output
-YSF      PC7    output
-P25      PC8    output
-NXDN     PC9    output
-POCSAG   PA8    output
-FM       PA11   output
-
-MDSTAR   PC1    output
-MDMR     PC2    output
-MYSF     PC3    output
-MP25     PC4    output
-MNXDN    PC10   output
-MPOCSAG  PC11   output
-MFM      PC13   output
-
-RX       PA0    analog input
-RSSI     PA7    analog input
-TX       PA4    analog output
-
-EXT_CLK  PA15   input
-*/
-
-#define PIN_COS           GPIO_Pin_0
-#define PORT_COS          GPIOC
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
-
-#define PIN_PTT           GPIO_Pin_14
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_13
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_12
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_8
-#define PORT_P25          GPIOC
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
-
-#define PIN_NXDN          GPIO_Pin_9
-#define PORT_NXDN         GPIOC
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOC
-
-#define PIN_POCSAG        GPIO_Pin_8
-#define PORT_POCSAG       GPIOA
-#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOA
-
-#define PIN_FM            GPIO_Pin_11
-#define PORT_FM           GPIOA
-#define RCC_Per_FM        RCC_AHB1Periph_GPIOA
-
-#define PIN_DSTAR         GPIO_Pin_15
-#define PORT_DSTAR        GPIOB
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
-
-#define PIN_DMR           GPIO_Pin_6
-#define PORT_DMR          GPIOC
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
-
-#define PIN_YSF           GPIO_Pin_7
-#define PORT_YSF          GPIOC
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOC
-
-#if defined(MODE_PINS)
-#define PIN_MP25          GPIO_Pin_4
-#define PORT_MP25         GPIOC
-#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
-
-#define PIN_MNXDN         GPIO_Pin_10
-#define PORT_MNXDN        GPIOC
-#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
-
-#define PIN_MDSTAR        GPIO_Pin_1
-#define PORT_MDSTAR       GPIOC
-#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
-
-#define PIN_MDMR          GPIO_Pin_2
-#define PORT_MDMR         GPIOC
-#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
-
-#define PIN_MYSF          GPIO_Pin_3
-#define PORT_MYSF         GPIOC
-#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
-
-#define PIN_MPOCSAG       GPIO_Pin_11
-#define PORT_MPOCSAG      GPIOC
-#define RCC_Per_MPOCSAG   RCC_AHB1Periph_GPIOC
-
-#define PIN_MFM           GPIO_Pin_13
-#define PORT_MFM          GPIOC
-#define RCC_Per_MFM       RCC_AHB1Periph_GPIOC
-#endif
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_0
-#define PORT_RX           GPIOA
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
-
-#define PIN_RSSI          GPIO_Pin_7
-#define PIN_RSSI_CH       ADC_Channel_7
-#define PORT_RSSI         GPIOA
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#endif

pins/pins_f7_stm32dvm_v5.h

@@ -1,108 +0,0 @@
-/*
- *   Copyright (C) 2019,2020 by BG5HHP
- *
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef _PINS_F7_STM32DVM_V5_H
-#define _PINS_F7_STM32DVM_V5_H
-
-/*
-Pin definitions for STM32F7 STM32-DVM rev 5 Board:
-
-COS      PB13   input
-PTT      PB12   output
-COSLED   PB4    output
-LED      PB3    output
-
-P25      PB8    output
-NXDN     PB9    output
-DSTAR    PB6    output
-DMR      PB5    output
-YSF      PB7    output
-POCSAG   PC10   output (Not Valid)
-FM       PB14   output
-
-RX       PB0    analog input
-RSSI     PB1    analog input
-TX       PA4    analog output
-
-EXT_CLK  PA15   input
-*/
-
-#define PIN_COS           GPIO_Pin_13
-#define PORT_COS          GPIOB
-#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
-
-#define PIN_PTT           GPIO_Pin_12
-#define PORT_PTT          GPIOB
-#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
-
-#define PIN_COSLED        GPIO_Pin_4
-#define PORT_COSLED       GPIOB
-#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
-
-#define PIN_LED           GPIO_Pin_3
-#define PORT_LED          GPIOB
-#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
-
-#define PIN_P25           GPIO_Pin_8
-#define PORT_P25          GPIOB
-#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
-
-#define PIN_NXDN          GPIO_Pin_9
-#define PORT_NXDN         GPIOB
-#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
-
-#define PIN_DSTAR         GPIO_Pin_6
-#define PORT_DSTAR        GPIOB
-#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
-
-#define PIN_DMR           GPIO_Pin_5
-#define PORT_DMR          GPIOB
-#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
-
-#define PIN_YSF           GPIO_Pin_7
-#define PORT_YSF          GPIOB
-#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
-
-/*
-#define PIN_POCSAG        GPIO_Pin_10
-#define PORT_POCSAG       GPIOC
-#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOC
-*/
-
-#define PIN_FM            GPIO_Pin_14
-#define PORT_FM           GPIOB
-#define RCC_Per_FM        RCC_AHB1Periph_GPIOB
-
-#define PIN_EXT_CLK       GPIO_Pin_15
-#define SRC_EXT_CLK       GPIO_PinSource15
-#define PORT_EXT_CLK      GPIOA
-
-#define PIN_RX            GPIO_Pin_0
-#define PIN_RX_CH         ADC_Channel_8
-#define PORT_RX           GPIOB
-#define RCC_Per_RX        RCC_AHB1Periph_GPIOB
-
-#define PIN_RSSI          GPIO_Pin_1
-#define PIN_RSSI_CH       ADC_Channel_9
-#define PORT_RSSI         GPIOB
-#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOB
-
-#define PIN_TX            GPIO_Pin_4
-#define PIN_TX_CH         DAC_Channel_1
-
-#endif

platformio.ini

@@ -0,0 +1,25 @@
+; PlatformIO Project Configuration File
+;
+;   Build options: build flags, source filter
+;   Upload options: custom upload port, speed and extra flags
+;   Library options: dependencies, extra library storages
+;   Advanced options: extra scripting
+;
+; Please visit documentation for the other options and examples
+; https://docs.platformio.org/page/projectconf.html
+
+[env:MMDVM]
+platform = ststm32
+board = genericSTM32F446RE
+framework = arduino
+build_unflags = -O0
+monitor_speed = 460800
+build_flags = 
+	-O3
+	-Wall
+	-D HSE_VALUE=12000000U
+	-D ARM_MATH_CM4
+	-mfpu=fpv4-sp-d16
+	-mfloat-abi=hard
+	-D SERIAL_RX_BUFFER_SIZE=2048
+	-D SERIAL_TX_BUFFER_SIZE=2048

src/AX25/AX25Demodulator.cpp

@@ -25,12 +25,11 @@
 #include "AX25Demodulator.h"
 #include "AX25Defines.h"
 
-const float32_t SAMPLE_RATE = 24000.0F;
-const float32_t SYMBOL_RATE = 1200.0F;
+const uint32_t SYMBOL_RATE = 1200U;
 
 const uint16_t DELAY_LEN = 11U;
 
-const float32_t SAMPLES_PER_SYMBOL = SAMPLE_RATE / SYMBOL_RATE;
+const float32_t SAMPLES_PER_SYMBOL = float32_t(SAMPLE_RATE / SYMBOL_RATE);
 const float32_t PLL_LIMIT          = SAMPLES_PER_SYMBOL / 2.0F;
 
 const uint32_t LPF_FILTER_LEN = 48U;

src/AX25/AX25RX.cpp

@@ -193,7 +193,7 @@ void CAX25RX::initRand() //Can also be used to seed the rng with more entropy du
 {
   m_a = (m_a ^ m_c ^ m_x);
   m_b = (m_b + m_a);
-  m_c = (m_c + (m_b >> 1) ^ m_a);
+  m_c = (m_c + ((m_b >> 1) ^ m_a));
 }
 
 uint8_t CAX25RX::rand()
@@ -202,7 +202,7 @@ uint8_t CAX25RX::rand()
 
   m_a = (m_a ^ m_c ^ m_x);         //note the mix of addition and XOR
   m_b = (m_b + m_a);               //And the use of very few instructions
-  m_c = (m_c + (m_b >> 1) ^ m_a);  //the right shift is to ensure that high-order bits from b can affect  
+  m_c = (m_c + ((m_b >> 1) ^ m_a));  //the right shift is to ensure that high-order bits from b can affect  
 
   return uint8_t(m_c);             //low order bits of other variables
 }

src/CMSIS/arm_biquad_cascade_df1_q31.c

@@ -0,0 +1,509 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_q31.c
+ * Description:  Processing function for the Q31 Biquad cascade filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 Biquad cascade filter.
+  @param[in]     S         points to an instance of the Q31 Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize  number of samples to process
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
+                   After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
+                   1.31 format by discarding the low 32 bits.
+  @remark
+                   Refer to \ref arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+__STATIC_INLINE void arm_biquad_cascade_df1_q31(
+  const arm_biquad_casd_df1_inst_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+    const q31_t    *pIn = pSrc; /*  input pointer initialization  */
+    q31_t          *pOut = pDst;        /*  output pointer initialization */
+    int             shift;
+    uint32_t        stages = S->numStages;      /*  loop counters                 */
+    int             postShift = S->postShift;
+    q31x4_t         b0Coeffs, b1Coeffs, a0Coeffs, a1Coeffs;     /*  Coefficients vector           */
+    q31x4_t         stateVec = { 0 };
+    q31_t          *pState = S->pState; /*  pState pointer initialization */
+    q31x4_t         inVec0;
+    int64_t         acc;
+    const q31_t          *pCoeffs = S->pCoeffs;       /*  coeff pointer initialization  */
+    q31_t           out, out1;
+
+
+    shift = (postShift + 1 + 8);
+
+    do {
+        /*
+         * Reading the coefficients
+         * generates :
+         * Fwd0 { b2  b1  b0  0  }
+         * Fwd1 { 0   b2  b1  b0 }
+         * Bwd0 { 0   0   a2  a1 }
+         * Bwd0 { 0   0   a1  a2 }
+         * (can be moved in init)
+         */
+        b0Coeffs = vdupq_n_s32(0);
+        a0Coeffs = vdupq_n_s32(0);
+
+        b0Coeffs[0] = pCoeffs[2];       // b2
+        b0Coeffs[1] = pCoeffs[1];       // b1
+        b0Coeffs[2] = pCoeffs[0];       // b0
+
+        b1Coeffs = b0Coeffs;
+        uint32_t        zero = 0;
+        b1Coeffs = vshlcq_s32(b1Coeffs, &zero, 32);
+
+        a0Coeffs[2] = pCoeffs[4];
+        a0Coeffs[3] = pCoeffs[3];
+        a1Coeffs = vrev64q_s32(a0Coeffs);
+
+
+        /*
+         * prologue consumes history samples
+         */
+
+        /* 2 first elements are garbage, will be updated with history */
+        inVec0 = vld1q(pIn - 2);
+
+        inVec0[0] = pState[1];
+        inVec0[1] = pState[0];
+
+        stateVec[2] = pState[3];
+        stateVec[3] = pState[2];
+
+        acc = vrmlaldavhq(b0Coeffs, inVec0);
+        acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+        acc = lsll(acc, shift);
+        out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+        stateVec[2] = out;
+        acc = vrmlaldavhq(b1Coeffs, inVec0);
+        acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
+
+        acc = lsll(acc, shift);
+        out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+
+
+        inVec0 = vld1q(pIn);
+        pIn += 2;
+
+        /*
+         * main loop
+         */
+        uint32_t            sample = (blockSize - 2) >> 2U;
+        /*
+         * First part of the processing with loop unrolling.
+         * Compute 4 outputs at a time.
+         */
+        while (sample > 0U) {
+
+            stateVec[3] = out1;
+
+            *pOut++ = out;
+            *pOut++ = out1;
+
+            /*
+             * in         { x0  x1  x2  x3 }
+             *                    x
+             * b0Coeffs   { b2  b1  b0  0  }
+             */
+            acc = vrmlaldavhq(b0Coeffs, inVec0);
+            /*
+             * out         { 0   0   yn2 yn1 }
+             *                    x
+             * a0Coeffs    { 0   0   a2  a1  }
+             */
+            acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            stateVec[2] = out;
+
+            /*
+             * in         { x0  x1  x2  x3 }
+             *                    x
+             * b0Coeffs   {  0  b2  b1  b0 }
+             */
+            acc = vrmlaldavhq(b1Coeffs, inVec0);
+            /*
+             * out         { 0   0   y0  yn1 }
+             *                    x
+             * a0Coeffs    { 0   0   a1  a2  }
+             */
+            acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            stateVec[3] = out1;
+
+            inVec0 = vld1q(pIn);
+            pIn += 2;
+
+            /* unrolled part */
+            *pOut++ = out;
+            *pOut++ = out1;
+
+            acc = vrmlaldavhq(b0Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            stateVec[2] = out;
+
+            acc = vrmlaldavhq(b1Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            inVec0 = vld1q(pIn);
+            pIn += 2;
+
+            sample--;
+        }
+
+        *pOut++ = out;
+        *pOut++ = out1;
+
+        /*
+         * Tail handling
+         */
+        int32_t         loopRemainder = blockSize & 3;
+        if (loopRemainder == 2) {
+            /*
+             * Store the updated state variables back into the pState array
+             */
+            pState[0] = inVec0[1];
+            pState[1] = inVec0[0];
+            pState[3] = out;
+            pState[2] = out1;
+        } else if (loopRemainder == 1) {
+            stateVec[3] = out1;
+
+            acc = vrmlaldavhq(b0Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            stateVec[2] = out;
+
+            acc = vrmlaldavhq(b1Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            stateVec[3] = out1;
+
+            inVec0 = vld1q(pIn);
+            pIn += 2;
+
+            *pOut++ = out;
+            *pOut++ = out1;
+
+            acc = vrmlaldavhq(b0Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            *pOut++ = out;
+
+            /*
+             * Store the updated state variables back into the pState array
+             */
+            pState[0] = inVec0[2];
+            pState[1] = inVec0[1];
+            pState[3] = out1;
+            pState[2] = out;
+        } else if (loopRemainder == 0) {
+            stateVec[3] = out1;
+
+            acc = vrmlaldavhq(b0Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            stateVec[2] = out;
+
+            acc = vrmlaldavhq(b1Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            *pOut++ = out;
+            *pOut++ = out1;
+
+            /*
+             * Store the updated state variables back into the pState array
+             */
+            pState[0] = inVec0[3];
+            pState[1] = inVec0[2];
+            pState[3] = out;
+            pState[2] = out1;
+        } else {
+            stateVec[3] = out1;
+
+            acc = vrmlaldavhq(b0Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            *pOut++ = out;
+
+            /*
+             * Store the updated state variables back into the pState array
+             */
+            pState[0] = inVec0[2];
+            pState[1] = inVec0[1];
+            pState[3] = out1;
+            pState[2] = out;
+        }
+
+
+        pCoeffs += 5;
+        pState += 4;
+
+        /*  The first stage goes from the input buffer to the output buffer. */
+        /*  Subsequent stages occur in-place in the output buffer */
+        pIn = pDst;
+
+        /* Reset to destination pointer */
+        pOut = pDst;
+    }
+    while (--stages);
+}
+#else
+void arm_biquad_cascade_df1_q31(
+  const arm_biquad_casd_df1_inst_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+  const q31_t *pIn = pSrc;                             /* Source pointer */
+        q31_t *pOut = pDst;                            /* Destination pointer */
+        q31_t *pState = S->pState;                     /* pState pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q63_t acc;                                     /* Accumulator */
+        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q31_t Xn1, Xn2, Yn1, Yn2;                      /* Filter pState variables */
+        q31_t Xn;                                      /* Temporary input */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /* Shift to be applied to the output */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc_l, acc_h;                            /* temporary output variables */
+#endif
+
+  do
+  {
+    /* Reading the coefficients */
+    b0 = *pCoeffs++;
+    b1 = *pCoeffs++;
+    b2 = *pCoeffs++;
+    a1 = *pCoeffs++;
+    a2 = *pCoeffs++;
+
+    /* Reading the pState values */
+    Xn1 = pState[0];
+    Xn2 = pState[1];
+    Yn1 = pState[2];
+    Yn2 = pState[3];
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Apply loop unrolling and compute 4 output values simultaneously. */
+    /* Variable acc hold output values that are being computed:
+     *
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    sample = blockSize >> 2U;
+
+    while (sample > 0U)
+    {
+      /* Read the first input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
+
+      /* The result is converted to 1.31 , Yn2 variable is reused */
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn2;
+
+      /* Read the second input */
+      Xn2 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn2) + ((q63_t) b1 * Xn) + ((q63_t) b2 * Xn1) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
+
+      /* The result is converted to 1.31, Yn1 variable is reused  */
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn1;
+
+      /* Read the third input */
+      Xn1 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn1) + ((q63_t) b1 * Xn2) + ((q63_t) b2 * Xn) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
+
+      /* The result is converted to 1.31, Yn2 variable is reused  */
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn2;
+
+      /* Read the forth input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
+
+      /* The result is converted to 1.31, Yn1 variable is reused  */
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn1;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    sample = blockSize & 0x3U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
+
+      /* The result is converted to 1.31  */
+      acc = acc >> lShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = (q31_t) acc;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+      Yn2 = Yn1;
+      Yn1 = (q31_t) acc;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Store the updated state variables back into the pState array */
+    *pState++ = Xn1;
+    *pState++ = Xn2;
+    *pState++ = Yn1;
+    *pState++ = Yn2;
+
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent numStages occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset output pointer */
+    pOut = pDst;
+
+    /* decrement loop counter */
+    stage--;
+
+  } while (stage > 0U);
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */

src/CMSIS/arm_fir_fast_q15.c

@@ -0,0 +1,332 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_fast_q15.c
+ * Description:  Q15 Fast FIR filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 FIR filter (fast version).
+  @param[in]     S          points to an instance of the Q15 FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
+                   The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
+
+  @remark
+                   Refer to \ref arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.  Both the slow and the fast versions use the same instance structure.
+                   Use function \ref arm_fir_init_q15() to initialize the filter structure.
+ */
+
+void arm_fir_fast_q15(
+  const arm_fir_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t acc0;                                    /* Accumulators */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
+   * The variables acc0 ... acc3 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
+    px = pState;
+
+    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
+    pb = pCoeffs;
+
+    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
+    x0 = read_q15x2_ia (&px);
+
+    /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
+    x2 = read_q15x2_ia (&px);
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numTaps-(numTaps%4) coefficients. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
+      acc0 = __SMLAD(x0, c0, acc0);
+
+      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
+      acc2 = __SMLAD(x2, c0, acc2);
+
+      /* pack  x[n-N-1] and x[n-N-2] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* Read state x[n-N-4], x[n-N-5] */
+      x0 = read_q15x2_ia (&px);
+
+      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
+      acc1 = __SMLADX(x1, c0, acc1);
+
+      /* pack  x[n-N-3] and x[n-N-4] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x0, x2, 0);
+#else
+      x1 = __PKHBT(x2, x0, 0);
+#endif
+
+      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
+      acc3 = __SMLADX(x1, c0, acc3);
+
+      /* Read coefficients b[N-2], b[N-3] */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
+      acc0 = __SMLAD(x2, c0, acc0);
+
+      /* Read state x[n-N-6], x[n-N-7] with offset */
+      x2 = read_q15x2_ia (&px);
+
+      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
+      acc2 = __SMLAD(x0, c0, acc2);
+
+      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
+      acc1 = __SMLADX(x1, c0, acc1);
+
+      /* pack  x[n-N-5] and x[n-N-6] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
+      acc3 = __SMLADX(x1, c0, acc3);
+
+      /* Decrement tap count */
+      tapCnt--;
+    }
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps.
+       This is always be 2 taps since the filter length is even. */
+    if ((numTaps & 0x3U) != 0U)
+    {
+      /* Read last two coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Perform the multiply-accumulates */
+      acc0 = __SMLAD(x0, c0, acc0);
+      acc2 = __SMLAD(x2, c0, acc2);
+
+      /* pack state variables */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* Read last state variables */
+      x0 = read_q15x2 (px);
+
+      /* Perform the multiply-accumulates */
+      acc1 = __SMLADX(x1, c0, acc1);
+
+      /* pack state variables */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x0, x2, 0);
+#else
+      x1 = __PKHBT(x2, x0, 0);
+#endif
+
+      /* Perform the multiply-accumulates */
+      acc3 = __SMLADX(x1, c0, acc3);
+    }
+
+    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
+       Then store the 4 outputs in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy two samples into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0;
+
+    /* Use SIMD to hold states and coefficients */
+    px = pState;
+    pb = pCoeffs;
+
+    tapCnt = numTaps >> 1U;
+
+    do
+    {
+      acc0 += (q31_t) *px++ * *pb++;
+	  acc0 += (q31_t) *px++ * *pb++;
+
+      tapCnt--;
+    }
+    while (tapCnt > 0U);
+
+    /* The result is in 2.30 format. Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
+    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR group
+ */

src/CMSIS/arm_fir_interpolate_q15.c

@@ -0,0 +1,774 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_interpolate_q15.c
+ * Description:  Q15 FIR interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Interpolate
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 FIR interpolator.
+  @param[in]     S          points to an instance of the Q15 FIR interpolator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+__STATIC_INLINE void arm_fir_interpolate_q15(
+  const arm_fir_interpolate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+    q15_t    *pState = S->pState;   /* State pointer */
+    const q15_t    *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+    q15_t    *pStateCurnt;      /* Points to the current sample of the state */
+    const q15_t    *ptr1, *ptr2;      /* Temporary pointers for state and coefficient buffers */
+
+    uint32_t  i, blkCnt;        /* Loop counters */
+    uint16_t  phaseLen = S->phaseLength;    /* Length of each polyphase filter component */
+    uint16_t  strides[8] = {
+        0, 1 * S->L, 2 * S->L, 3 * S->L,
+        4 * S->L, 5 * S->L, 6 * S->L, 7 * S->L
+        };
+    uint16x8_t vec_strides0 = *(uint16x8_t *) strides;
+    uint16x8_t vec_strides1 = vec_strides0 + 1;
+    uint16x8_t vec_strides2 = vec_strides0 + 2;
+    uint16x8_t vec_strides3 = vec_strides0 + 3;
+    q15x8_t vecState, vecCoef;
+
+    /*
+     * S->pState buffer contains previous frame (phaseLen - 1) samples
+     * pStateCurnt points to the location where the new input data should be written
+     */
+    pStateCurnt = S->pState + ((q15_t) phaseLen - 1);
+    /*
+     * Total number of intput samples
+     */
+    blkCnt = blockSize;
+    /*
+     * Loop over the blockSize.
+     */
+    while (blkCnt > 0U)
+    {
+        /*
+         * Copy new input sample into the state buffer
+         */
+        *pStateCurnt++ = *pSrc++;
+        /*
+         * Loop over the Interpolation factor.
+         */
+        i = S->L;
+        while (i > 0U)
+        {
+            /*
+             * Initialize state pointer
+             */
+            ptr1 = pState;
+            if (i >= 4)
+            {
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1 - 3U);
+
+                q63_t     acc0 = 0LL;
+                q63_t     acc1 = 0LL;
+                q63_t     acc2 = 0LL;
+                q63_t     acc3 = 0LL;
+
+                uint32_t  tapCnt = phaseLen >> 3;
+                while (tapCnt > 0U)
+                {
+                    vecState = vldrhq_s16(ptr1);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides3);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides2);
+                    acc1 = vmlaldavaq(acc1, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1);
+                    acc2 = vmlaldavaq(acc2, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0);
+                    acc3 = vmlaldavaq(acc3, vecState, vecCoef);
+
+                    ptr1 += 8;
+                    ptr2 = ptr2 + S->L * 8;
+                    tapCnt--;
+                }
+                tapCnt = phaseLen & 7;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp16q(tapCnt);
+
+                    vecState = vldrhq_z_s16(ptr1, p0);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides3, p0);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides2, p0);
+                    acc1 = vmlaldavaq(acc1, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0);
+                    acc2 = vmlaldavaq(acc2, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0);
+                    acc3 = vmlaldavaq(acc3, vecState, vecCoef);
+                }
+
+                acc0 = asrl(acc0, 15);
+                acc1 = asrl(acc1, 15);
+                acc2 = asrl(acc2, 15);
+                acc3 = asrl(acc3, 15);
+
+                *pDst++ = (q15_t) __SSAT(acc0, 16);
+                *pDst++ = (q15_t) __SSAT(acc1, 16);
+                *pDst++ = (q15_t) __SSAT(acc2, 16);
+                *pDst++ = (q15_t) __SSAT(acc3, 16);
+                i -= 4;
+            }
+            else if (i >= 3)
+            {
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1U - 2);
+
+                q63_t     acc0 = 0LL;
+                q63_t     acc1 = 0LL;
+                q63_t     acc2 = 0LL;
+
+                uint32_t  tapCnt = phaseLen >> 3;
+                while (tapCnt > 0U)
+                {
+                    vecState = vldrhq_s16(ptr1);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides2);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1);
+                    acc1 = vmlaldavaq(acc1, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0);
+                    acc2 = vmlaldavaq(acc2, vecState, vecCoef);
+
+                    ptr1 += 8;
+                    ptr2 = ptr2 + S->L * 8;
+                    tapCnt--;
+                }
+                tapCnt = phaseLen & 7;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp16q(tapCnt);
+
+                    vecState = vldrhq_z_s16(ptr1, p0);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides2, p0);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0);
+                    acc1 = vmlaldavaq(acc1, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0);
+                    acc2 = vmlaldavaq(acc2, vecState, vecCoef);
+                }
+
+                acc0 = asrl(acc0, 15);
+                acc1 = asrl(acc1, 15);
+                acc2 = asrl(acc2, 15);
+
+                *pDst++ = (q15_t) __SSAT(acc0, 16);;
+                *pDst++ = (q15_t) __SSAT(acc1, 16);;
+                *pDst++ = (q15_t) __SSAT(acc2, 16);;
+                i -= 3;
+            }
+            else if (i >= 2)
+            {
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1U - 1);
+
+                q63_t     acc0 = 0LL;
+                q63_t     acc1 = 0LL;
+
+                uint32_t  tapCnt = phaseLen >> 3;
+                while (tapCnt > 0U)
+                {
+                    vecState = vldrhq_s16(ptr1);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0);
+                    acc1 = vmlaldavaq(acc1, vecState, vecCoef);
+
+                    ptr1 += 8;
+                    ptr2 = ptr2 + S->L * 8;
+                    tapCnt--;
+                }
+                tapCnt = phaseLen & 7;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp16q(tapCnt);
+
+                    vecState = vldrhq_z_s16(ptr1, p0);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0);
+                    acc1 = vmlaldavaq(acc1, vecState, vecCoef);
+                }
+
+                acc0 = asrl(acc0, 15);
+                acc1 = asrl(acc1, 15);
+
+                *pDst++ = (q15_t) __SSAT(acc0, 16);
+                *pDst++ = (q15_t) __SSAT(acc1, 16);
+                i -= 2;
+            }
+            else
+            {
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1U);
+
+                q63_t     acc0 = 0LL;
+
+                uint32_t  tapCnt = phaseLen >> 3;
+                while (tapCnt > 0U)
+                {
+                    vecState = vldrhq_s16(ptr1);
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0);
+
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    ptr1 += 8;
+                    ptr2 = ptr2 + S->L * 8;
+                    tapCnt--;
+                }
+                tapCnt = phaseLen & 7;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp16q(tapCnt);
+
+                    vecState = vldrhq_z_s16(ptr1, p0);
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+                }
+
+                acc0 = asrl(acc0, 15);
+                *pDst++ = (q15_t) __SSAT(acc0, 16);
+                /*
+                 * Decrement the loop counter
+                 */
+                i--;
+            }
+        }
+        /*
+         * Advance the state pointer by 1
+         * * to process the next group of interpolation factor number samples
+         */
+        pState = pState + 1;
+        /*
+         * Decrement the loop counter
+         */
+        blkCnt--;
+    }
+
+    /*
+     * Processing is complete.
+     * Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+     * This prepares the state buffer for the next function call.
+     */
+
+    /*
+     * Points to the start of the state buffer
+     */
+    pStateCurnt = S->pState;
+    blkCnt = (phaseLen - 1U) >> 3;
+    while (blkCnt > 0U)
+    {
+        vstrhq_s16(pStateCurnt, vldrhq_s16(pState));
+        pState += 8;
+        pStateCurnt += 8;
+        blkCnt--;
+    }
+    blkCnt = (phaseLen - 1U) & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vstrhq_p_s16(pStateCurnt, vldrhq_s16(pState), p0);
+    }
+}
+#else
+void arm_fir_interpolate_q15(
+  const arm_fir_interpolate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q15_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+        uint32_t j;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2, acc3;
+        q15_t x0, x1, x2, x3;
+        q15_t c0, c1, c2, c3;
+#endif
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = (S->L);
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length. Unroll by a factor of 4.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      tapCnt = phaseLen >> 2U;
+
+      x0 = *(ptr1++);
+      x1 = *(ptr1++);
+      x2 = *(ptr1++);
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
+
+        /* Read the coefficient */
+        c1 = *(ptr2 + S->L);
+
+        /* Read the input sample */
+        x0 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x1 * c1;
+        acc1 += (q63_t) x2 * c1;
+        acc2 += (q63_t) x3 * c1;
+        acc3 += (q63_t) x0 * c1;
+
+        /* Read the coefficient */
+        c2 = *(ptr2 + S->L * 2);
+
+        /* Read the input sample */
+        x1 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x2 * c2;
+        acc1 += (q63_t) x3 * c2;
+        acc2 += (q63_t) x0 * c2;
+        acc3 += (q63_t) x1 * c2;
+
+        /* Read the coefficient */
+        c3 = *(ptr2 + S->L * 3);
+
+        /* Read the input sample */
+        x2 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x3 * c3;
+        acc1 += (q63_t) x0 * c3;
+        acc2 += (q63_t) x1 * c3;
+        acc3 += (q63_t) x2 * c3;
+
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += 4 * S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      tapCnt = phaseLen % 0x4U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* update states for next sample processing */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *(pDst           ) = (q15_t) (__SSAT((acc0 >> 15), 16));
+      *(pDst +     S->L) = (q15_t) (__SSAT((acc1 >> 15), 16));
+      *(pDst + 2 * S->L) = (q15_t) (__SSAT((acc2 >> 15), 16));
+      *(pDst + 3 * S->L) = (q15_t) (__SSAT((acc3 >> 15), 16));
+
+      pDst++;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 4;
+
+    pDst += S->L * 3;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 4 outputs at a time */
+      tapCnt = phaseLen >> 2U;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      tapCnt = phaseLen % 0x4U;
+
+#else
+
+      /* Initialize tapCnt with number of samples */
+      tapCnt = phaseLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  tapCnt = (phaseLen - 1U) >> 2U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  tapCnt = (phaseLen - 1U) % 0x04U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = (phaseLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q15_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+  /* Total number of intput samples */
+  blkCnt = blockSize;
+
+  /* Loop over the blockSize. */
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (i - 1U);
+
+      /* Loop over the polyPhase length */
+      tapCnt = phaseLen;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += ((q63_t) *ptr1++ * *ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      /* Store the result after converting to 1.15 format in the destination buffer. */
+      *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  tapCnt = phaseLen - 1U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+#endif /* defined(ARM_MATH_MVEI)*/
+/**
+  @} end of FIR_Interpolate group
+ */

src/CMSIS/arm_q15_to_q31.c

@@ -0,0 +1,181 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q15_to_q31.c
+ * Description:  Converts the elements of the Q15 vector to Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup q15_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q15 vector to Q31 vector.
+  @param[in]     pSrc       points to the Q15 input vector
+  @param[out]    pDst       points to the Q31 output vector
+  @param[in]     blockSize  number of samples in each vector
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.
+  </pre>
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+__STATIC_INLINE void arm_q15_to_q31(
+  const q15_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+
+  uint32_t blkCnt;
+
+  q31x4_t         vecDst;
+
+  blkCnt = blockSize>> 2;
+  while (blkCnt > 0U)
+  {
+
+        /* C = (q31_t)A << 16 */
+        /* convert from q15 to q31 and then store the results in the destination buffer */
+        /* load q15 + 32-bit widening */
+        vecDst = vldrhq_s32((q15_t const *) pSrc);
+        vecDst = vshlq_n(vecDst, 16);
+        vstrwq_s32(pDst, vecDst);
+
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pDst += 4;
+        pSrc += 4;
+        blkCnt --;
+    }
+
+  blkCnt = blockSize & 3;
+  while (blkCnt > 0U)
+  {
+    /* C = (q31_t) A << 16 */
+
+    /* Convert from q15 to q31 and store result in destination buffer */
+    *pDst++ = (q31_t) *pSrc++ << 16;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_q15_to_q31(
+  const q15_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in1, in2;
+        q31_t out1, out2, out3, out4;
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q31_t)A << 16 */
+
+    /* Convert from q15 to q31 and store result in destination buffer */
+    in1 = read_q15x2_ia (&pIn);
+    in2 = read_q15x2_ia (&pIn);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+    /* extract lower 16 bits to 32 bit result */
+    out1 = in1 << 16U;
+    /* extract upper 16 bits to 32 bit result */
+    out2 = in1 & 0xFFFF0000;
+    /* extract lower 16 bits to 32 bit result */
+    out3 = in2 << 16U;
+    /* extract upper 16 bits to 32 bit result */
+    out4 = in2 & 0xFFFF0000;
+
+#else
+
+    /* extract upper 16 bits to 32 bit result */
+    out1 = in1 & 0xFFFF0000;
+    /* extract lower 16 bits to 32 bit result */
+    out2 = in1 << 16U;
+    /* extract upper 16 bits to 32 bit result */
+    out3 = in2 & 0xFFFF0000;
+    /* extract lower 16 bits to 32 bit result */
+    out4 = in2 << 16U;
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    *pDst++ = out1;
+    *pDst++ = out2;
+    *pDst++ = out3;
+    *pDst++ = out4;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q31_t) A << 16 */
+
+    /* Convert from q15 to q31 and store result in destination buffer */
+    *pDst++ = (q31_t) *pIn++ << 16;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of q15_to_x group
+ */

src/CMSIS/arm_sin_q31.c

@@ -0,0 +1,82 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sin_q31.c
+ * Description:  Fast sine calculation for Q31 values
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup sin
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric sine function for Q31 data.
+  @param[in]     x  Scaled input value in radians
+  @return        sin(x)
+
+  The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
+ */
+
+q31_t arm_sin_q31(
+  q31_t x)
+{
+  q31_t sinVal;                                  /* Temporary variables for input, output */
+  int32_t index;                                 /* Index variable */
+  q31_t a, b;                                    /* Two nearest output values */
+  q31_t fract;                                   /* Temporary values for fractional values */
+
+  if (x < 0)
+  { /* convert negative numbers to corresponding positive ones */
+    x = (uint32_t)x + 0x80000000;
+  }
+
+  /* Calculate the nearest index */
+  index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
+
+  /* Calculation of fractional value */
+  fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
+
+  /* Read two nearest values of input value from the sin table */
+  a = sinTable_q31[index];
+  b = sinTable_q31[index+1];
+
+  /* Linear interpolation process */
+  sinVal = (q63_t) (0x80000000 - fract) * a >> 32;
+  sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) fract * b)) >> 32);
+
+  /* Return output value */
+  return (sinVal << 1);
+}
+
+/**
+  @} end of sin group
+ */

src/Config.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015,2016,2017,2018,2020,2024 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -50,50 +50,15 @@
 // Enable AX.25 support, this is only enabled if FM is also enabled.
 #define MODE_AX25
 
-// Allow for the use of high quality external clock oscillators
-// The number is the frequency of the oscillator in Hertz.
-//
-// The frequency of the TCXO must be an integer multiple of 48000.
-// Frequencies such as 12.0 Mhz (48000 * 250) and 14.4 Mhz (48000 * 300) are suitable.
-// Frequencies such as 10.0 Mhz (48000 * 208.333) or 20 Mhz (48000 * 416.666) are not suitable.
-//
-// For 12 MHz
-#define EXTERNAL_OSC 12000000
-// For 12.288 MHz
-// #define EXTERNAL_OSC 12288000
-// For 14.4 MHz
-// #define EXTERNAL_OSC 14400000
-// For 19.2 MHz
-// #define EXTERNAL_OSC 19200000
-
 // Select a baud rate for host communication. The faster speeds are needed for external FM to work.
-// #define SERIAL_SPEED 115200 // Suitable for most older boards (Arduino Due, etc). External FM will NOT work with this!
-// #define SERIAL_SPEED 230400 // Only works on newer boards like fast M4, M7, Teensy 3.x. External FM might work with this
-#define SERIAL_SPEED 460800	// Only works on newer boards like fast M4, M7, Teensy 3.x. External FM should work with this
+// #define SERIAL_SPEED 115200 // Suitable for most older boards. External FM will NOT work with this!
+// #define SERIAL_SPEED 230400 // Only works on newer boards like fast M4, M7. External FM might work with this
+#define SERIAL_SPEED 460800	// Only works on newer boards like fast M4, M7. External FM will work with this
 //#define SERIAL_SPEED 500000  // Used with newer boards and Armbian on AllWinner SOCs (H2, H3) that do not support 460800
 
 // Use pins to output the current mode via LEDs
 #define MODE_LEDS
 
-// For the original Arduino Due pin layout
-// #define ARDUINO_DUE_PAPA
-
-// For the ZUM V1.0 and V1.0.1 boards pin layout
-// #define ARDUINO_DUE_ZUM_V10
-
-// For the SP8NTH board
-// #define ARDUINO_DUE_NTH
-
-// For ST Nucleo-64 STM32F446RE board
-// #define STM32F4_NUCLEO_MORPHO_HEADER
-// #define STM32F4_NUCLEO_ARDUINO_HEADER
-
-// Use separate mode pins to switch external channel/filters/bandwidth for example
-// #define MODE_PINS
-
-// For the VK6MST Pi3 Shield communicating over i2c. i2c address & speed defined in i2cTeensy.cpp
-// #define VK6MST_TEENSY_PI3_SHIELD_I2C
-
 // Pass RSSI information to the host
 #define SEND_RSSI_DATA
 
@@ -109,6 +74,16 @@
 // To reduce CPU load, you can remove the DC blocker by commenting out the next line
 #define USE_DCBLOCKER
 
+// Choose the type of modem board in use, only one.
+// The KI6ZUM v0.9 Pi hat, STM32F446 CPU
+#define ZUM_V09_PI
+// The KI6ZUM v1.0 Pi hat, STM32F722 CPU
+// #define ZUM_V10_PI
+// The Repeater Builder V3 board, STM32F446 CPU
+// #define RB_V3_PI
+// The Repeater Builder V5 board, STM32F722 CPU
+// #define RB_V5_PI
+
 // Constant Service LED once repeater is running 
 // Do not use if employing an external hardware watchdog 
 // #define CONSTANT_SRV_LED