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1a270642cd
18
IOTeensy.cpp
18
IOTeensy.cpp
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@ -34,8 +34,8 @@
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#define PIN_DMR 10
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#define PIN_YSF 11
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#define PIN_P25 12
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#define PIN_ADC 5 // A0, Pin 14
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#define PIN_RSSI 8 // A2, Pin 16
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#define PIN_ADC 5 // A0, Pin 14
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#define PIN_RSSI 4 // Teensy 3.5/3.6, A16, Pin 35. Teensy 3.1/3.2, A17, Pin 28
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#define PDB_CHnC1_TOS 0x0100
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#define PDB_CHnC1_EN 0x0001
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@ -87,7 +87,7 @@ void CIO::startInt()
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ADC0_SC2 = ADC_SC2_REFSEL(1) | ADC_SC2_ADTRG; // Voltage ref internal, hardware trigger
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ADC0_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
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ADC0_SC3 = ADC_SC3_CAL;
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ADC0_SC3 |= ADC_SC3_CAL;
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while (ADC0_SC3 & ADC_SC3_CAL) // Wait for calibration
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;
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@ -108,7 +108,7 @@ void CIO::startInt()
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ADC1_SC2 = ADC_SC2_REFSEL(1); // Voltage ref internal, software trigger
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ADC1_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
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ADC1_SC3 = ADC_SC3_CAL;
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ADC1_SC3 |= ADC_SC3_CAL;
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while (ADC1_SC3 & ADC_SC3_CAL) // Wait for calibration
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;
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@ -117,13 +117,13 @@ void CIO::startInt()
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sum1 = (sum1 / 2U) | 0x8000U;
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ADC1_PG = sum1;
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ADC1_SC1A = ADC_SC1_AIEN | PIN_RSSI; // Enable ADC interrupt, use A2
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NVIC_ENABLE_IRQ(IRQ_ADC1);
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#endif
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#if defined(EXTERNAL_OSC)
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// Set ADC0 to trigger from the LPTMR at 24 kHz
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SIM_SOPT7 = SIM_SOPT7_ADC0ALTTRGEN | // Enable ADC0 alternate trigger
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SIM_SOPT7_ADC0PRETRGSEL | // Enable ADC0 pre-trigger
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SIM_SOPT7_ADC0TRGSEL(14); // Trigger ADC0 by LPTMR0
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CORE_PIN13_CONFIG = PORT_PCR_MUX(3);
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@ -131,16 +131,14 @@ void CIO::startInt()
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SIM_SCGC5 |= SIM_SCGC5_LPTIMER; // Enable Low Power Timer Access
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LPTMR0_CSR = 0; // Disable
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LPTMR0_PSR = LPTMR_PSR_PBYP; // Bypass prescaler/filter
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LPTMR0_CMR = EXTERNAL_OSC / 24000;
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LPTMR0_CSR = LPTMR_CSR_TIE | // Interrupt Enable
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LPTMR_CSR_TPS(2) | // Pin: 0=CMP0, 1=xtal, 2=pin13
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LPTMR_CSR_TFC | // Free-Running Counter
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LPTMR0_CMR = (EXTERNAL_OSC / 24000) - 1; // Frequency divided by CMR + 1
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LPTMR0_CSR = LPTMR_CSR_TPS(2) | // Pin: 0=CMP0, 1=xtal, 2=pin13
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LPTMR_CSR_TMS; // Mode Select, 0=timer, 1=counter
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LPTMR0_CSR |= LPTMR_CSR_TEN; // Enable
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#else
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// Setup PDB for ADC0 at 24 kHz
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SIM_SCGC6 |= SIM_SCGC6_PDB; // Enable PDB clock
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PDB0_MOD = F_BUS / 24000; // Timer period
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PDB0_MOD = (F_BUS / 24000) - 1; // Timer period - 1
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PDB0_IDLY = 0; // Interrupt delay
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PDB0_CH0C1 = PDB_CHnC1_TOS | PDB_CHnC1_EN; // Enable pre-trigger for ADC0
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PDB0_SC = PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | // SW trigger, enable interrupts, continuous mode
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