mirror of https://github.com/g4klx/MMDVM.git
214 lines
7.0 KiB
C++
214 lines
7.0 KiB
C++
/*
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* Copyright (C) 2020,2021 by Jonathan Naylor G4KLX
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include "Config.h"
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#if defined(MODE_OLED)
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#include "I2C3.h"
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#include "Globals.h"
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#define I2C_WRITE_REG(REG, VAL) ((REG) = (VAL))
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#define I2C_READ_REG(REG) ((REG))
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#define I2C_CLEAR_FLAG(__FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? (I2C3->ISR |= (__FLAG__)) : (I2C3->ICR = (__FLAG__)))
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#define I2C_GET_FLAG(__FLAG__) ((((I2C3->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
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#define I2C_RESET_CR2() (I2C3->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
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#define I2C_MODIFY_REG(REG, CLEARMASK, SETMASK) I2C_WRITE_REG((REG), (((I2C_READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
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CI2C3::CI2C3()
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{
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}
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void CI2C3::init()
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{
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// Enable I2C3
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C3, ENABLE);
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// LL_RCC_SetI2CClockSource(LL_RCC_I2C3_CLKSOURCE_PCLK1);
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/*
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2C3;
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PeriphClkInitStruct.I2c3ClockSelection = RCC_I2C3CLKSOURCE_PCLK1;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
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{
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Error_Handler();
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}
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*/
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// Enable the GPIOs for the SCL/SDA Pins
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOC, ENABLE);
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// LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC);
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// LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
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// LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC);
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// LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
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/*
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOA_CLK_ENABLE();
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*/
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// Configure and initialize the GPIOs
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_High_Speed;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_Speed = GPIO_High_Speed;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
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GPIO_Init(GPIOC, &GPIO_InitStructure);
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/*
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GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
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GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
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LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = LL_GPIO_PIN_8;
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GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
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GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
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GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
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GPIO_InitStruct.Alternate = LL_GPIO_AF_4;
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LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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*/
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// LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C3);
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// Connect GPIO pins to I2C3
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource8, GPIO_AF4_I2C3);
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GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF4_I2C3);
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// Configure and Initialize I2C3
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I2C_InitTypeDef I2C_InitStructure;
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I2C_InitStructure.I2C_Timing = 0x0010061AU; // 400kHz (Fast Mode)
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I2C_InitStructure.I2C_AnalogFilter = I2C_AnalogFilter_Enable;
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I2C_InitStructure.I2C_DigitalFilter = 0U; // No digital filter
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I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
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I2C_InitStructure.I2C_OwnAddress1 = 0x00U; // We are the master. We don't need this
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I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
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I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
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// Initialize the Peripheral
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I2C_Init(I2C3, &I2C_InitStructure);
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// I2C Peripheral Enable
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I2C_Cmd(I2C3, ENABLE);
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/*
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LL_I2C_EnableAutoEndMode(I2C3);
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LL_I2C_SetOwnAddress2(I2C3, 0, LL_I2C_OWNADDRESS2_NOMASK);
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LL_I2C_DisableOwnAddress2(I2C3);
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LL_I2C_DisableGeneralCall(I2C3);
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LL_I2C_EnableClockStretching(I2C3);
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I2C_InitStruct.PeripheralMode = LL_I2C_MODE_I2C;
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I2C_InitStruct.Timing = 0x0010061A;
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I2C_InitStruct.AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
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I2C_InitStruct.DigitalFilter = 0;
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I2C_InitStruct.OwnAddress1 = 0;
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I2C_InitStruct.TypeAcknowledge = LL_I2C_ACK;
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I2C_InitStruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
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LL_I2C_Init(I2C3, &I2C_InitStruct);
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*/
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/*
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hi2c3.Instance = I2C3;
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hi2c3.Init.Timing = 0x0010061A;
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hi2c3.Init.OwnAddress1 = 0;
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hi2c3.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
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hi2c3.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
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hi2c3.Init.OwnAddress2 = 0;
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hi2c3.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
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hi2c3.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
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hi2c3.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
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if (HAL_I2C_Init(&hi2c3) != HAL_OK)
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{
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Error_Handler();
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}
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// Configure Analogue filter
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if (HAL_I2CEx_ConfigAnalogFilter(&hi2c3, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
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{
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Error_Handler();
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}
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// Configure Digital filter
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if (HAL_I2CEx_ConfigDigitalFilter(&hi2c3, 0) != HAL_OK)
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{
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Error_Handler();
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}
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*/
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}
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void CI2C3::write(uint8_t addr, const uint8_t* data, uint8_t length)
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{
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DEBUG2("OLED Data", addr);
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DEBUG_DUMP(data, length);
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// Wait for the I2C transmitter to become free
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while (I2C_GET_FLAG(I2C_FLAG_BUSY) == SET)
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;
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// Configure the data transfer
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transferConfig(addr, length, I2C_CR2_AUTOEND, I2C_Generate_Start_Write);
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// Start Writing Data
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for (uint16_t i = 0U; i < length; i++) {
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// Wait for the TXIS flag to be set
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while (I2C_GET_FLAG(I2C_FLAG_TXIS) == RESET)
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;
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// Write the byte to the TXDR
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I2C3->TXDR = data[i];
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}
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// No need to Check TC flag, with AUTOEND mode the stop is automatically generated Wait until STOPF flag is set
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while (I2C_GET_FLAG(I2C_FLAG_STOPF) == RESET)
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;
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// Clear STOP flag
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I2C_CLEAR_FLAG(I2C_FLAG_STOPF);
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// Clear Configuration Register 2
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I2C_RESET_CR2();
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}
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void CI2C3::transferConfig(uint16_t addr, uint8_t length, uint32_t mode, uint32_t request)
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{
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// Update CR2 register
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I2C_MODIFY_REG(I2C3->CR2, ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \
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(I2C_CR2_RD_WRN & (uint32_t)(request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP)), \
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(uint32_t)(((uint32_t)addr & I2C_CR2_SADD) |
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(((uint32_t)length << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | (uint32_t)mode | (uint32_t)request));
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}
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#endif
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