Merge branch 'master' into TXHang

Fix led alternate macro names

CWIdTX.cpp

@@ -77,6 +77,7 @@ const struct {
   {',', 0xEEAEE000U, 22U},
   {'-', 0xEAAE0000U, 18U},
   {'=', 0xEAB80000U, 16U},
+  {'.', 0xBAEB8000U, 20U},
   {' ', 0x00000000U, 4U},
   {0U,  0x00000000U, 0U}
 };
@@ -170,4 +171,3 @@ void CCWIdTX::reset()
   m_poPtr = 0U;
   m_n     = 0U;
 }
-

CalFM.cpp

@@ -38,13 +38,13 @@ const struct TONE_TABLE {
 const uint8_t TONE_TABLE_DATA_LEN = 6U;
 
 CCalFM::CCalFM() :
-m_tone(NULL),
 m_frequency(0),
 m_length(0),
+m_tone(NULL),
 m_level(128*32),
 m_transmit(false),
-m_lastState(STATE_IDLE),
+m_audioSeq(0),
-m_audioSeq(0)
+m_lastState(STATE_IDLE)
 {
 }
 

Config.h

@@ -85,6 +85,6 @@
 // #define USE_ALTERNATE_POCSAG_LEDS
 
 // Use the D-Star and YSF LEDs for FM
-// #define USE_ALTERNATE_FM_LEDS
+#define USE_ALTERNATE_FM_LEDS
 
 #endif

FM.cpp

@@ -29,6 +29,7 @@ m_timeoutTone(),
 m_state(FS_LISTENING),
 m_callsignAtStart(false),
 m_callsignAtEnd(false),
+m_callsignAtLatch(false),
 m_callsignTimer(),
 m_timeoutTimer(),
 m_holdoffTimer(),
@@ -43,21 +44,28 @@ m_preemphasis(32768,  13967, 0, 32768, -18801, 0),//75µS 24kHz sampling rate
 m_deemphasis (32768, -18801, 0, 32768,  13967, 0),//75µS 24kHz sampling rate
 m_blanking(),
 m_useCOS(true),
+m_cosInvert(false),
 m_rfAudioBoost(1U),
-m_downsampler(1024)//Size might need adjustement
+m_downsampler(128)//Size might need adjustement
 {
 }
 
 void CFM::samples(bool cos, q15_t* samples, uint8_t length)
 {
-  if (!m_useCOS)
+  if (m_useCOS) {
+    if (m_cosInvert)
+      cos = !cos;
+  } else {
     cos = true;
+  }
+
+  clock(length);
 
   uint8_t i = 0U;
   for (; i < length; i++) {
     q15_t currentSample = samples[i];//save to a local variable to avoid indirection on every access
 
-    CTCSSState ctcssState = m_ctcssRX.process(currentSample);
+    uint8_t ctcssState = m_ctcssRX.process(currentSample);
 
     if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
       //Not enough samples to determine if you have CTCSS, just carry on
@@ -65,26 +73,26 @@ void CFM::samples(bool cos, q15_t* samples, uint8_t length)
     } else if (CTCSS_READY(ctcssState) && m_modemState != STATE_FM) {
       //we had enough samples for CTCSS and we are in some other mode than FM
       bool validCTCSS = CTCSS_VALID(ctcssState);
-      stateMachine(validCTCSS && cos, i + 1U);
+      stateMachine(validCTCSS && cos);
       if (m_modemState != STATE_FM)
         continue;
     } else if (CTCSS_READY(ctcssState) && m_modemState == STATE_FM) {
       //We had enough samples for CTCSS and we are in FM mode, trigger the state machine
       bool validCTCSS = CTCSS_VALID(ctcssState);
-      stateMachine(validCTCSS && cos, i + 1U);
+      stateMachine(validCTCSS && cos);
       if (m_modemState != STATE_FM)
         break;
     } else if (CTCSS_NOT_READY(ctcssState) && m_modemState == STATE_FM && i == length - 1) {
       //Not enough samples for CTCSS but we already are in FM, trigger the state machine
       //but do not trigger the state machine on every single sample, save CPU!
       bool validCTCSS = CTCSS_VALID(ctcssState);
-      stateMachine(validCTCSS && cos, i + 1U);
+      stateMachine(validCTCSS && cos);
     }
 
     // Only let audio through when relaying audio
     if (m_state == FS_RELAYING || m_state == FS_KERCHUNK) {    
-      currentSample = m_deemphasis.filter(currentSample);
+      // currentSample = m_deemphasis.filter(currentSample);
-      m_downsampler.addSample(currentSample);
+      // m_downsampler.addSample(currentSample);
       currentSample = m_blanking.process(currentSample);
       currentSample *= m_rfAudioBoost;
     } else {
@@ -106,7 +114,7 @@ void CFM::samples(bool cos, q15_t* samples, uint8_t length)
 
     currentSample = m_filterStage3.filter(m_filterStage2.filter(m_filterStage1.filter(currentSample)));
 
-    currentSample = m_preemphasis.filter(currentSample);
+    // currentSample = m_preemphasis.filter(currentSample);
 
     currentSample += m_ctcssTX.getAudio();
 
@@ -123,13 +131,26 @@ void CFM::process()
 
 void CFM::reset()
 {
+  m_state = FS_LISTENING;
+
+  m_callsignTimer.stop();
+  m_timeoutTimer.stop();
+  m_kerchunkTimer.stop();
+  m_ackMinTimer.stop();
+  m_ackDelayTimer.stop();
+  m_hangTimer.stop();
+
   m_ctcssRX.reset();
+  m_rfAck.stop();
+  m_callsign.stop();
+  m_timeoutTone.stop();
 }
 
-uint8_t CFM::setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd)
+uint8_t CFM::setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd, bool callsignAtLatch)
 {
   m_callsignAtStart = callsignAtStart;
   m_callsignAtEnd   = callsignAtEnd;
+  m_callsignAtLatch = callsignAtLatch;
 
   uint16_t holdoffTime  = holdoff * 60U;
   uint16_t callsignTime = time * 60U;
@@ -146,14 +167,18 @@ uint8_t CFM::setCallsign(const char* callsign, uint8_t speed, uint16_t frequency
 uint8_t CFM::setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_t minTime, uint16_t delay, uint8_t level)
 {
   m_ackDelayTimer.setTimeout(0U, delay);
-  m_ackMinTimer.setTimeout(minTime, 0U);
+
+  if (minTime > 0U)
+    m_ackMinTimer.setTimeout(minTime, delay);
 
   return m_rfAck.setParams(rfAck, speed, frequency, level, level);
 }
 
-uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel)
+uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel)
 {
   m_useCOS    = useCOS;
+  m_cosInvert = cosInvert;
+
   m_rfAudioBoost = q15_t(rfAudioBoost);
 
   m_timeoutTimer.setTimeout(timeout, 0U);
@@ -170,16 +195,8 @@ uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFreque
   return m_ctcssTX.setParams(ctcssFrequency, ctcssLevel);
 }
 
-void CFM::stateMachine(bool validSignal, uint8_t length)
+void CFM::stateMachine(bool validSignal)
 {
-  m_callsignTimer.clock(length);
-  m_timeoutTimer.clock(length);
-  m_holdoffTimer.clock(length);
-  m_kerchunkTimer.clock(length);
-  m_ackMinTimer.clock(length);
-  m_ackDelayTimer.clock(length);
-  m_hangTimer.clock(length);
-
   switch (m_state) {
     case FS_LISTENING:
       listeningState(validSignal);
@@ -220,6 +237,17 @@ void CFM::stateMachine(bool validSignal, uint8_t length)
   }
 }
 
+void CFM::clock(uint8_t length)
+{
+  m_callsignTimer.clock(length);
+  m_timeoutTimer.clock(length);
+  m_holdoffTimer.clock(length);
+  m_kerchunkTimer.clock(length);
+  m_ackMinTimer.clock(length);
+  m_ackDelayTimer.clock(length);
+  m_hangTimer.clock(length);
+}
+
 void CFM::listeningState(bool validSignal)
 {
   if (validSignal) {
@@ -227,6 +255,8 @@ void CFM::listeningState(bool validSignal)
       DEBUG1("State to KERCHUNK");
       m_state = FS_KERCHUNK;
       m_kerchunkTimer.start();
+      if (m_callsignAtStart && !m_callsignAtLatch)
+        sendCallsign();
     } else {
       DEBUG1("State to RELAYING");
       m_state = FS_RELAYING;
@@ -250,6 +280,10 @@ void CFM::kerchunkState(bool validSignal)
       DEBUG1("State to RELAYING");
       m_state = FS_RELAYING;
       m_kerchunkTimer.stop();
+      if (m_callsignAtStart && m_callsignAtLatch) {
+        sendCallsign();
+        m_callsignTimer.start();
+      }
     }
   } else {
     DEBUG1("State to LISTENING");

FM.h

@@ -53,9 +53,9 @@ public:
 
   void reset();
 
-  uint8_t setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd);
+  uint8_t setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd, bool callsignAtLatch);
   uint8_t setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_t minTime, uint16_t delay, uint8_t level);
-  uint8_t setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel);
+  uint8_t setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel);
 
 private:
   CFMKeyer             m_callsign;
@@ -66,6 +66,7 @@ private:
   FM_STATE             m_state;
   bool                 m_callsignAtStart;
   bool                 m_callsignAtEnd;
+  bool                 m_callsignAtLatch;
   CFMTimer             m_callsignTimer;
   CFMTimer             m_timeoutTimer;
   CFMTimer             m_holdoffTimer;
@@ -80,10 +81,11 @@ private:
   CFMDirectFormI       m_deemphasis;
   CFMBlanking          m_blanking;
   bool                 m_useCOS;
+  bool                 m_cosInvert;
   q15_t                m_rfAudioBoost;
   CFMDownsampler       m_downsampler;
 
-  void stateMachine(bool validSignal, uint8_t length);
+  void stateMachine(bool validSignal);
   void listeningState(bool validSignal);
   void kerchunkState(bool validSignal);
   void relayingState(bool validSignal);
@@ -92,6 +94,8 @@ private:
   void timeoutWaitState(bool validSignal);
   void hangState(bool validSignal);
 
+  void clock(uint8_t length);
+
   void sendCallsign();
   void beginRelaying();
 };

FMCTCSSRX.cpp

@@ -93,7 +93,7 @@ m_rxLevelInverse(1)
 
 uint8_t CFMCTCSSRX::setParams(uint8_t frequency, uint8_t threshold, uint8_t level)
 {
-  m_rxLevelInverse = 511 / q15_t(level);
+  m_rxLevelInverse = q15Division(65535, q15_t(level * 128));
 
   m_coeffDivTwo = 0;
 
@@ -112,11 +112,11 @@ uint8_t CFMCTCSSRX::setParams(uint8_t frequency, uint8_t threshold, uint8_t leve
   return 0U;
 }
 
-CTCSSState CFMCTCSSRX::process(q15_t sample)
+uint8_t CFMCTCSSRX::process(q15_t sample)
 {
   q31_t sample31 = q31_t(sample) * m_rxLevelInverse;
 
-  m_result = m_result & (~CTS_READY); 
+  m_result &= ~CTS_READY;
 
   q31_t q2 = m_q1;
   m_q1 = m_q0;
@@ -150,11 +150,11 @@ CTCSSState CFMCTCSSRX::process(q15_t sample)
     q31_t value = t2 + t4 - t9;
 
     bool previousCTCSSValid = CTCSS_VALID(m_result);
-    m_result = m_result | CTS_READY;
+    m_result |= CTS_READY;
     if (value >= m_threshold)
-      m_result = m_result | CTS_VALID;
+      m_result |= CTS_VALID;
     else
-      m_result = m_result & ~CTS_VALID;
+      m_result &= ~CTS_VALID;
 
     if (previousCTCSSValid != CTCSS_VALID(m_result))
       DEBUG4("CTCSS Value / Threshold / Valid", value, m_threshold, CTCSS_VALID(m_result));
@@ -167,11 +167,6 @@ CTCSSState CFMCTCSSRX::process(q15_t sample)
   return m_result;
 }
 
-CTCSSState CFMCTCSSRX::getState()
-{
-  return m_result;
-}
-
 void CFMCTCSSRX::reset()
 {
   m_q0 = 0;
@@ -179,3 +174,16 @@ void CFMCTCSSRX::reset()
   m_result = CTS_NONE;
   m_count  = 0U;
 }
+
+//Taken from https://en.wikipedia.org/wiki/Q_(number_format)#Division
+q15_t CFMCTCSSRX::q15Division(q15_t a, q15_t divisor)
+{
+  q31_t a31 = q31_t(a) << 16;
+
+  if (((a >> 31) & 1) == ((divisor >> 15) & 1))
+    a31 += divisor >> 1;
+  else
+    a31 -= divisor >> 1;
+
+  return a31 / divisor;
+}

FMCTCSSRX.h

@@ -21,28 +21,9 @@
 
 #include "Config.h"
 
-enum CTCSSState
+const uint8_t CTS_NONE  = 0U;
-{
+const uint8_t CTS_READY = 1U;
-  CTS_NONE  = 0,
+const uint8_t CTS_VALID = 2U;
-  CTS_READY = 1,
-  CTS_VALID = 2,
-  CTS_READY_VALID = CTS_READY | CTS_VALID
-};
-
-inline CTCSSState operator|(CTCSSState a, CTCSSState b)
-{
-  return static_cast<CTCSSState>(static_cast<uint8_t>(a) | static_cast<uint8_t>(b));
-}
-
-inline CTCSSState operator&(CTCSSState a, CTCSSState b)
-{
-  return static_cast<CTCSSState>(static_cast<uint8_t>(a) & static_cast<uint8_t>(b));
-}
-
-inline CTCSSState operator~(CTCSSState a)
-{
-  return static_cast<CTCSSState>(~(static_cast<uint8_t>(a)));
-}
 
 #define CTCSS_READY(a) ((a & CTS_READY) != 0)
 #define CTCSS_NOT_READY(a) ((a & CTS_READY) == 0)
@@ -55,9 +36,7 @@ public:
 
   uint8_t setParams(uint8_t frequency, uint8_t threshold, uint8_t level);
   
-  CTCSSState process(q15_t sample);
+  uint8_t process(q15_t sample);
-
-  CTCSSState getState();
 
   void reset();
 
@@ -67,8 +46,10 @@ private:
   uint16_t m_count;
   q31_t    m_q0;
   q31_t    m_q1;
-  CTCSSState m_result;
+  uint8_t  m_result;
   q15_t    m_rxLevelInverse;
+
+  q15_t q15Division(q15_t a, q15_t divisor);
 };
 
 #endif

FMKeyer.cpp

@@ -66,6 +66,7 @@ const struct {
   {',', 0xEEAEE000U, 22U},
   {'-', 0xEAAE0000U, 18U},
   {'=', 0xEAB80000U, 16U},
+  {'.', 0xBAEB8000U, 20U},
   {' ', 0x00000000U, 4U},
   {0U,  0x00000000U, 0U}
 };

IOPins.h

@@ -0,0 +1,70 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _IO_PINS_H
+#define _IO_PINS_H
+
+#if !defined(CONFIG_H)
+#error "Requires Config.h to be included first!"
+#endif
+
+#if defined(STM32F4_RPT_HAT_TGO)
+    #include "pins/pins_f4_rpt_tgo.h"
+
+#elif defined(STM32F4_DISCOVERY)
+    #include "pins/pins_f4_discovery.h"
+
+#elif defined(STM32F4_PI)
+    #include "pins/pins_f4_pi.h"
+
+#elif defined(STM32F722_PI)
+    #include "pins/pins_f7_pi.h"
+
+#elif defined(STM32F4_F4M)
+    #include "pins/pins_f4_f4m.h"
+
+#elif defined(STM32F722_F7M)
+    #include "pins/pins_f7_f7m.h"
+
+#elif defined(STM32F722_RPT_HAT)
+    #include "pins/pins_f7_rpt_hat.h"
+
+#elif defined(STM32F4_NUCLEO)
+    #if defined(STM32F4_NUCLEO_MORPHO_HEADER)
+        #include "pins/pins_f4_nucleo_morpho.h"
+    #elif defined(STM32F4_NUCLEO_ARDUINO_HEADER)
+        #include "pins/pins_f4_nucleo_arduino.h"
+    #else
+        #error "Either STM32F4_NUCLEO_MORPHO_HEADER or STM32F4_NUCLEO_ARDUINO_HEADER need to be defined"
+    #endif
+
+#elif defined(STM32F7_NUCLEO)
+    #include "pins/pins_f7_nucleo.h"
+
+#elif defined(STM32F4_DVM)
+    #include "pins/pins_f4_stm32dvm_v3.h"
+
+#elif defined(DRCC_DVM_NQF)
+    #include "pins/pins_f4_drcc_nqf.h"
+
+#else
+    #error "A valid board type macro need to be defined."
+
+#endif
+
+#endif  //#ifndef _IO_PINS_H

IOSTM_CMSIS.cpp

@@ -85,7 +85,7 @@ USART1_RXD PA10  input (AF)
 #define PIN_POCSAG        11
 #define PORT_POCSAG       GPIOB
 #define BB_POCSAG         *((bitband_t)BITBAND_PERIPH(&PORT_POCSAG->ODR, PIN_POCSAG))
-#define PIN_FM            12
+#define PIN_FM            14
 #define PORT_FM           GPIOB
 #define BB_FM             *((bitband_t)BITBAND_PERIPH(&PORT_FM->ODR, PIN_FM))
 
@@ -158,15 +158,34 @@ void GPIOConfigPin(GPIO_TypeDef *port_ptr, uint32_t pin, uint32_t mode_cnf_value
 #if defined(STM32F1_POG)
 void FancyLEDEffect()
 {
-  bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25, &BB_NXDN, &BB_POCSAG, &BB_FM};
+  int ledCount = 10;
 
-  for(int i=0; i<10; i++){
+  bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25,
+#if defined(USE_ALTERNATE_NXDN_LEDS)
+	NULL,
+#else
+	&BB_NXDN,
+#endif
+#if defined(USE_ALTERNATE_POCSAG_LEDS)
+	NULL,
+#else
+  	&BB_POCSAG,
+#endif
+#if defined(USE_ALTERNATE_FM_LEDS)
+	NULL};
+#else
+	&BB_FM};
+#endif
+
+  for(int i=0; i<ledCount; i++){
+    if(foo[i] != NULL)
       *foo[i] = 0x01;
   }
   GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1);
   *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
   delay(SystemCoreClock/1000*100);
-  for(int i=0; i<7; i++){
+  for(int i=0; i<ledCount; i++){
+    if(foo[i] != NULL)
       *foo[i] = 0x00;
   }
   *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
@@ -176,18 +195,22 @@ void FancyLEDEffect()
   *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
   
   *foo[0] = 0x01;
-  for(int i=1; i<10; i++){
+  for(int i=1; i<ledCount; i++){
     delay(SystemCoreClock/1000*10);
+    if (foo[i-1] != NULL)
       *foo[i-1] = 0x00;
+    if (foo[i] != NULL)
       *foo[i] = 0x01;
   }
-  for(int i=10; i>=0; i--){
+  for(int i=ledCount - 2; i>=0; i--) {
     delay(SystemCoreClock/1000*10);
+    if (foo[i+1] != NULL)
       *foo[i+1] = 0x00;
+    if (foo[i] != NULL)
       *foo[i] = 0x01;
   }
   delay(SystemCoreClock/1000*10);
-  *foo[5+1-6] = 0x00;
+  *foo[0] = 0x00;
   *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
   delay(SystemCoreClock/1000*10);
   *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;

MMDVM_STM32F4xx.coproj

@@ -1,340 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no"?>
-<Project version="2G - 1.7.8" name="MMDVM_STM32F4xx">
-  <Target name="MMDVM_Discovery_407" isCurrent="1">
-    <Device manufacturerId="9" manufacturerName="ST" chipId="344" chipName="STM32F407VG" boardId="" boardName=""/>
-    <BuildOption>
-      <Compile>
-        <Option name="OptimizationLevel" value="4"/>
-        <Option name="UseFPU" value="0"/>
-        <Option name="UserEditCompiler" value=""/>
-        <Option name="SupportCPlusplus" value="1"/>
-        <Option name="FPU" value="2"/>
-        <Includepaths>
-          <Includepath path="."/>
-        </Includepaths>
-        <DefinedSymbols>
-          <Define name="STM32F4XX"/>
-          <Define name="USE_STDPERIPH_DRIVER"/>
-          <Define name="__ASSEMBLY__"/>
-          <Define name="SUPPORT_CPLUSPLUS"/>
-          <Define name="STM32F40_41xxx"/>
-          <Define name="HSE_VALUE=8000000"/>
-          <Define name="STM32F4_DISCOVERY"/>
-          <Define name="__FPU_USED"/>
-        </DefinedSymbols>
-      </Compile>
-      <Link useDefault="0">
-        <Option name="DiscardUnusedSection" value="0"/>
-        <Option name="UserEditLinkder" value=""/>
-        <Option name="UseMemoryLayout" value="0"/>
-        <Option name="nostartfiles" value="1"/>
-        <Option name="LTO" value="0"/>
-        <Option name="IsNewStartupCode" value="1"/>
-        <Option name="Library" value="Semihosting"/>
-        <Option name="UserEditLinker" value="-lstdc++; --specs=nano.specs;"/>
-        <LinkedLibraries>
-          <Libset dir="stm32f4xx_lib\cmsis\lib\gcc\" libs="arm_cortexm4lf_math"/>
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-  </Target>
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-  </Components>
-  <Files>
-    <File name="DMRIdleRX.h" path="DMRIdleRX.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_dac.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_dac.c" type="1"/>
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-    <File name="STM32F4XX_Lib/CMSIS" path="" type="2"/>
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-    <File name="DStarTX.cpp" path="DStarTX.cpp" type="1"/>
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-    <File name="SampleRB.h" path="SampleRB.h" type="1"/>
-    <File name="YSFTX.h" path="YSFTX.h" type="1"/>
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-    <File name="CalRSSI.h" path="CalRSSI.h" type="1"/>
-    <File name="IOTeensy.cpp" path="IOTeensy.cpp" type="1"/>
-    <File name="MMDVM.cpp" path="MMDVM.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Include/core_cmSimd.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmSimd.h" type="1"/>
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-    <File name="SerialPort.h" path="SerialPort.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_dac.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_dac.h" type="1"/>
-    <File name="CWIdTX.h" path="CWIdTX.h" type="1"/>
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-    <File name="STM32F4XX_Lib/Device/startup" path="" type="2"/>
-    <File name="SerialRB.h" path="SerialRB.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_gpio.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_gpio.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver" path="" type="2"/>
-    <File name="DMRDefines.h" path="DMRDefines.h" type="1"/>
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-    <File name="CalFM.cpp" path="CalFM.cpp" type="1"/>
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-    <File name="SerialSTM.cpp" path="SerialSTM.cpp" type="1"/>
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-    <File name="Globals.h" path="Globals.h" type="1"/>
-    <File name="STM32F4XX_Lib/Device" path="" type="2"/>
-    <File name="CalDStarRX.cpp" path="CalDStarRX.cpp" type="1"/>
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-    <File name="CalDStarRX.h" path="CalDStarRX.h" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include" path="" type="2"/>
-    <File name="IO.h" path="IO.h" type="1"/>
-    <File name="Utils.cpp" path="Utils.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/.DS_Store" path="STM32F4XX_Lib/CMSIS/.DS_Store" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Lib/.DS_Store" path="STM32F4XX_Lib/CMSIS/Lib/.DS_Store" type="1"/>
-    <File name="Utils.h" path="Utils.h" type="1"/>
-    <File name="STM32F4XX_Lib/CMSIS/Lib" path="" type="2"/>
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-    <File name="STM32F4XX_Lib/CMSIS/Include/arm_math.h" path="STM32F4XX_Lib/CMSIS/Include/arm_math.h" type="1"/>
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-    <File name="DStarTX.h" path="DStarTX.h" type="1"/>
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-    <File name="STM32F4XX_Lib/Device/.DS_Store" path="STM32F4XX_Lib/Device/.DS_Store" type="1"/>
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-    <File name="P25Defines.h" path="P25Defines.h" type="1"/>
-    <File name="DMRSlotType.h" path="DMRSlotType.h" type="1"/>
-    <File name="Debug.h" path="Debug.h" type="1"/>
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-    <File name="P25TX.h" path="P25TX.h" type="1"/>
-    <File name="RSSIRB.cpp" path="RSSIRB.cpp" type="1"/>
-    <File name="DStarRX.cpp" path="DStarRX.cpp" type="1"/>
-    <File name="DMRSlotRX.cpp" path="DMRSlotRX.cpp" type="1"/>
-    <File name="IOSTM.cpp" path="IOSTM.cpp" type="1"/>
-    <File name="P25TX.cpp" path="P25TX.cpp" type="1"/>
-    <File name="SerialRB.cpp" path="SerialRB.cpp" type="1"/>
-    <File name="CWIdTX.cpp" path="CWIdTX.cpp" type="1"/>
-    <File name="DMRIdleRX.cpp" path="DMRIdleRX.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_usart.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_usart.h" type="1"/>
-    <File name="STM32F4XX_Lib/.DS_Store" path="STM32F4XX_Lib/.DS_Store" type="1"/>
-    <File name="YSFTX.cpp" path="YSFTX.cpp" type="1"/>
-    <File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_gpio.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_gpio.c" type="1"/>
-  </Files>
-</Project>

Makefile

@@ -25,6 +25,7 @@ F7_LIB_PATH=./STM32F7XX_Lib
 # MCU external clock frequency (Hz)
 CLK_MMDVM_PI=12000000
 CLK_NUCLEO=8000000
+CLK_12MHZ=12000000
 
 # Directory Structure
 BINDIR=bin
@@ -93,6 +94,8 @@ ifndef $(OSC)
 		OSC=$(CLK_MMDVM_PI)
 	else ifeq ($(MAKECMDGOALS),pi-f722)
 		OSC=$(CLK_MMDVM_PI)
+	else ifeq ($(MAKECMDGOALS),drcc_nqf)
+		OSC=$(CLK_12MHZ)
 	else
 		OSC=$(CLK_NUCLEO)
 	endif
@@ -134,6 +137,9 @@ DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHS
 DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
 # MMDVM_RPT_Hat BG4TGO, BG5HHP board:
 DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
+# DRCC_DVM BG7NQF board:
+DEFS_DRCC_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DDRCC_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
+
 
 # Build compiler flags
 CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
@@ -152,7 +158,7 @@ CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -f
 LDFLAGS=-Os --specs=nano.specs
 
 # Build Rules
-.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm clean
+.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm drcc_nqf clean
 
 # Default target: Nucleo-64 F446RE board
 all: nucleo
@@ -217,6 +223,12 @@ dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM)
 dvm: LDFLAGS+=$(LDFLAGS_F4)
 dvm: release_f4
 
+drcc_nqf: GitVersion.h
+drcc_nqf: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
+drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
+drcc_nqf: LDFLAGS+=$(LDFLAGS_F4)
+drcc_nqf: release_f4
+
 release_f4: $(BINDIR)
 release_f4: $(OBJDIR_F4)
 release_f4: $(BINDIR)/$(BINHEX_F4)
@@ -365,3 +377,7 @@ else
 	echo "#define GITVERSION \"0000000\"" > $@
 endif
 endif
+
+flash_f4:
+	@echo "flashing firmware..."
+	st-flash write bin/$(BINBIN_F4) 0x8000000

NXDNTX.cpp

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2009-2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2009-2018,2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2017 by Andy Uribe CA6JAU
  *
  *   This program is free software; you can redistribute it and/or modify
@@ -53,7 +53,9 @@ m_sincState(),
 m_poBuffer(),
 m_poLen(0U),
 m_poPtr(0U),
-m_txDelay(240U)      // 200ms
+m_txDelay(240U),     // 200ms
+m_txHang(6000U),     // 5s
+m_txCount(0U)
 {
   ::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
   ::memset(m_sincState,  0x00U, 70U * sizeof(q15_t));
@@ -70,7 +72,7 @@ m_txDelay(240U)      // 200ms
 
 void CNXDNTX::process()
 {
-  if (m_buffer.getData() == 0U && m_poLen == 0U)
+  if (m_buffer.getData() == 0U && m_poLen == 0U && m_txCount == 0U)
     return;
 
   if (m_poLen == 0U) {
@@ -98,6 +100,8 @@ void CNXDNTX::process()
       writeByte(c);
 
       space -= 4U * NXDN_RADIO_SYMBOL_LENGTH;
+      if (m_duplex)
+        m_txCount = m_txHang;
       
       if (m_poPtr >= m_poLen) {
         m_poPtr = 0U;
@@ -105,6 +109,19 @@ void CNXDNTX::process()
         return;
       }
     }
+  } else if (m_txCount > 0U) {
+    // Transmit silence until the hang timer has expired.
+    uint16_t space = io.getSpace();
+
+    while (space > (4U * NXDN_RADIO_SYMBOL_LENGTH)) {
+      writeSilence();
+
+      space -= 4U * NXDN_RADIO_SYMBOL_LENGTH;
+      m_txCount--;
+
+      if (m_txCount == 0U)
+        return;
+    }
   }
 }
 
@@ -155,6 +172,19 @@ void CNXDNTX::writeByte(uint8_t c)
   io.write(STATE_NXDN, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
 }
 
+void CNXDNTX::writeSilence()
+{
+  q15_t inBuffer[4U] = {0x00U, 0x00U, 0x00U, 0x00U};
+  q15_t intBuffer[NXDN_RADIO_SYMBOL_LENGTH * 4U];
+  q15_t outBuffer[NXDN_RADIO_SYMBOL_LENGTH * 4U];
+
+  ::arm_fir_interpolate_q15(&m_modFilter, inBuffer, intBuffer, 4U);
+
+  ::arm_fir_fast_q15(&m_sincFilter, intBuffer, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
+
+  io.write(STATE_NXDN, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
+}
+
 void CNXDNTX::setTXDelay(uint8_t delay)
 {
   m_txDelay = 300U + uint16_t(delay) * 6U;        // 500ms + tx delay
@@ -168,3 +198,7 @@ uint8_t CNXDNTX::getSpace() const
   return m_buffer.getSpace() / NXDN_FRAME_LENGTH_BYTES;
 }
 
+void CNXDNTX::setParams(uint8_t txHang)
+{
+  m_txHang = txHang * 1200U;
+}

NXDNTX.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -35,6 +35,8 @@ public:
 
   uint8_t getSpace() const;
 
+  void setParams(uint8_t txHang);
+
 private:
   CSerialRB                        m_buffer;
   arm_fir_interpolate_instance_q15 m_modFilter;
@@ -45,9 +47,11 @@ private:
   uint16_t                         m_poLen;
   uint16_t                         m_poPtr;
   uint16_t                         m_txDelay;
+  uint32_t                         m_txHang;
+  uint32_t                         m_txCount;
 
   void writeByte(uint8_t c);
+  void writeSilence();
 };
 
 #endif
-

P25TX.cpp

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2016,2017,2020 by Jonathan Naylor G4KLX
  *   Copyright (C) 2017 by Andy Uribe CA6JAU
  *
  *   This program is free software; you can redistribute it and/or modify
@@ -51,7 +51,9 @@ m_lpState(),
 m_poBuffer(),
 m_poLen(0U),
 m_poPtr(0U),
-m_txDelay(240U)       // 200ms
+m_txDelay(240U),      // 200ms
+m_txHang(6000U),      // 5s
+m_txCount(0U)
 {
   ::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
   ::memset(m_lpState,  0x00U, 60U * sizeof(q15_t));
@@ -68,7 +70,7 @@ m_txDelay(240U)       // 200ms
 
 void CP25TX::process()
 {
-  if (m_buffer.getData() == 0U && m_poLen == 0U)
+  if (m_buffer.getData() == 0U && m_poLen == 0U && m_txCount == 0U)
     return;
 
   if (m_poLen == 0U) {
@@ -94,6 +96,8 @@ void CP25TX::process()
       writeByte(c);
 
       space -= 4U * P25_RADIO_SYMBOL_LENGTH;
+       if (m_duplex)
+        m_txCount = m_txHang;
 
       if (m_poPtr >= m_poLen) {
         m_poPtr = 0U;
@@ -101,6 +105,19 @@ void CP25TX::process()
         return;
       }
     }
+  } else if (m_txCount > 0U) {
+    // Transmit silence until the hang timer has expired.
+    uint16_t space = io.getSpace();
+
+    while (space > (4U * P25_RADIO_SYMBOL_LENGTH)) {
+      writeSilence();
+
+      space -= 4U * P25_RADIO_SYMBOL_LENGTH;
+      m_txCount--;
+
+      if (m_txCount == 0U)
+        return;
+    }
   }
 }
 
@@ -152,6 +169,19 @@ void CP25TX::writeByte(uint8_t c)
   io.write(STATE_P25, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
 }
 
+void CP25TX::writeSilence()
+{
+  q15_t inBuffer[4U] = {0x00U, 0x00U, 0x00U, 0x00U};
+  q15_t intBuffer[P25_RADIO_SYMBOL_LENGTH * 4U];
+  q15_t outBuffer[P25_RADIO_SYMBOL_LENGTH * 4U];
+
+  ::arm_fir_interpolate_q15(&m_modFilter, inBuffer, intBuffer, 4U);
+
+  ::arm_fir_fast_q15(&m_lpFilter, intBuffer, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
+
+  io.write(STATE_P25, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
+}
+
 void CP25TX::setTXDelay(uint8_t delay)
 {
   m_txDelay = 600U + uint16_t(delay) * 12U;        // 500ms + tx delay
@@ -164,3 +194,8 @@ uint8_t CP25TX::getSpace() const
 {
   return m_buffer.getSpace() / P25_LDU_FRAME_LENGTH_BYTES;
 }
+
+void CP25TX::setParams(uint8_t txHang)
+{
+  m_txHang = txHang * 1200U;
+}

P25TX.h

@@ -1,5 +1,5 @@
 /*
- *   Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
+ *   Copyright (C) 2016,2017,2020 by Jonathan Naylor G4KLX
  *
  *   This program is free software; you can redistribute it and/or modify
  *   it under the terms of the GNU General Public License as published by
@@ -35,6 +35,8 @@ public:
 
   uint8_t getSpace() const;
 
+  void setParams(uint8_t txHang);
+
 private:
   CSerialRB                        m_buffer;
   arm_fir_interpolate_instance_q15 m_modFilter;
@@ -45,9 +47,11 @@ private:
   uint16_t                         m_poLen;
   uint16_t                         m_poPtr;
   uint16_t                         m_txDelay;
+  uint32_t                         m_txHang;
+  uint32_t                         m_txCount;
 
   void writeByte(uint8_t c);
+  void writeSilence();
 };
 
 #endif
-

SerialPort.cpp

@@ -95,13 +95,15 @@ const uint8_t MMDVM_DEBUG5       = 0xF5U;
 #define TCXO "NO TCXO"
 #endif
 
-#if defined(STM32F4_RPT_HAT_TGO)
+#if defined(DRCC_DVM_NQF)
+#define	HW_TYPE	"MMDVM DRCC_DVM_NQF"
+#elif defined(STM32F4_RPT_HAT_TGO)
 #define	HW_TYPE	"MMDVM RPT_HAT_TGO"
 #else
 #define	HW_TYPE	"MMDVM"
 #endif
 
-#define DESCRIPTION "20200429 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
+#define DESCRIPTION "20200506 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
 
 #if defined(GITVERSION)
 #define concat(h, a, b, c) h " " a " " b " GitID #" c ""
@@ -262,7 +264,7 @@ void CSerialPort::getVersion()
 
 uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
 {
-  if (length < 19U)
+  if (length < 21U)
     return 4U;
 
   bool rxInvert  = (data[0U] & 0x01U) == 0x01U;
@@ -329,7 +331,11 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
 
   uint8_t fmTXLevel     = data[18U];
 
-  m_modemState  = modemState;
+  uint8_t p25TXHang     = data[19U];
+
+  uint8_t nxdnTXHang    = data[20U];
+
+  setMode(modemState);
 
   m_dstarEnable  = dstarEnable;
   m_dmrEnable    = dmrEnable;
@@ -354,6 +360,8 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
   dmrIdleRX.setColorCode(colorCode);
 
   ysfTX.setParams(ysfLoDev, ysfTXHang);
+  p25TX.setParams(p25TXHang);
+  nxdnTX.setParams(nxdnTXHang);
 
   io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, nxdnTXLevel, pocsagTXLevel, fmTXLevel, txDCOffset, rxDCOffset);
 
@@ -376,6 +384,7 @@ uint8_t CSerialPort::setFMParams1(const uint8_t* data, uint8_t length)
 
   bool callAtStart = (data[6U] & 0x01U) == 0x01U;
   bool callAtEnd   = (data[6U] & 0x02U) == 0x02U;
+  bool callAtLatch = (data[6U] & 0x04U) == 0x04U;
 
   char callsign[50U];
   uint8_t n = 0U;
@@ -383,7 +392,7 @@ uint8_t CSerialPort::setFMParams1(const uint8_t* data, uint8_t length)
     callsign[n] = data[i];
   callsign[n] = '\0';
 
-  return fm.setCallsign(callsign, speed, frequency, time, holdoff, highLevel, lowLevel, callAtStart, callAtEnd);
+  return fm.setCallsign(callsign, speed, frequency, time, holdoff, highLevel, lowLevel, callAtStart, callAtEnd, callAtLatch);
 }
 
 uint8_t CSerialPort::setFMParams2(const uint8_t* data, uint8_t length)
@@ -422,12 +431,13 @@ uint8_t CSerialPort::setFMParams3(const uint8_t* data, uint8_t length)
   uint8_t  hangTime       = data[6U];
 
   bool     useCOS         = (data[7U] & 0x01U) == 0x01U;
+  bool     cosInvert      = (data[7U] & 0x02U) == 0x02U;
 
   uint8_t  rfAudioBoost   = data[8U];
   uint8_t  maxDev         = data[9U];
   uint8_t  rxLevel        = data[10U];
 
-  return fm.setMisc(timeout, timeoutLevel, ctcssFrequency, ctcssThreshold, ctcssLevel, kerchunkTime, hangTime, useCOS, rfAudioBoost, maxDev, rxLevel);
+  return fm.setMisc(timeout, timeoutLevel, ctcssFrequency, ctcssThreshold, ctcssLevel, kerchunkTime, hangTime, useCOS, cosInvert, rfAudioBoost, maxDev, rxLevel);
 }
 
 uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)

SerialSTM.cpp

@@ -50,7 +50,7 @@ extern "C" {
 }
 
 /* ************* USART1 ***************** */
-#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
+#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM)
 
 volatile uint8_t  TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
 volatile uint8_t  RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
@@ -241,7 +241,7 @@ void WriteUSART1(const uint8_t* data, uint16_t length)
 #endif
 
 /* ************* USART2 ***************** */
-#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
+#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) || defined(DRCC_DVM)
 
 volatile uint8_t  TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
 volatile uint8_t  RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
@@ -845,11 +845,15 @@ void CSerialPort::beginInt(uint8_t n, int speed)
          InitUSART1(speed);
          #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          InitUSART2(speed);
+         #elif defined(DRCC_DVM)
+         InitUSART1(speed);
          #endif
          break;
       case 3U:
          #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
          InitUSART1(speed);
+         #elif defined(DRCC_DVM)
+         InitUSART2(speed);
          #else
          InitUART5(speed);
          #endif
@@ -869,10 +873,14 @@ int CSerialPort::availableInt(uint8_t n)
          return AvailUSART1();
          #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          return AvailUSART2();
+         #elif defined(DRCC_DVM)
+         return AvailUSART1();
          #endif
       case 3U:
          #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
          return AvailUSART1();
+         #elif defined(DRCC_DVM)
+         return AvailUSART2();
          #else
          return AvailUART5();
          #endif
@@ -891,10 +899,14 @@ int CSerialPort::availableForWriteInt(uint8_t n)
          return AvailForWriteUSART1();
          #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          return AvailForWriteUSART2();
+         #elif defined(DRCC_DVM)
+         return AvailForWriteUSART1();
          #endif
       case 3U:
          #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
          return AvailForWriteUSART1();
+         #elif defined(DRCC_DVM)
+         AvailForWriteUSART2();
          #else
          return AvailForWriteUART5();
          #endif
@@ -913,10 +925,14 @@ uint8_t CSerialPort::readInt(uint8_t n)
          return ReadUSART1();
          #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
          return ReadUSART2();
+         #elif defined(DRCC_DVM)
+         return ReadUSART1();
          #endif
       case 3U:
          #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
          return ReadUSART1();
+         #elif defined(DRCC_DVM)
+         return ReadUSART2();
          #else
          return ReadUART5();
          #endif
@@ -941,6 +957,10 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
          WriteUSART2(data, length);
          if (flush)
             TXSerialFlush2();
+         #elif defined(DRCC_DVM)
+         WriteUSART1(data, length);
+         if (flush)
+            TXSerialFlush1();
          #endif
          break;
       case 3U:
@@ -948,6 +968,10 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
          WriteUSART1(data, length);
          if (flush)
             TXSerialFlush1();
+         #elif defined(DRCC_DVM)
+         WriteUSART2(data, length);
+         if (flush)
+            TXSerialFlush2();
          #else
          WriteUART5(data, length);
          if (flush)

pins/pins_f4_discovery.h

@@ -0,0 +1,96 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_DISCOVERY_H
+#define _PINS_F4_DISCOVERY_H
+
+/*
+Pin definitions for STM32F4 Discovery Board:
+
+PTT      PB13   output           P1 Pin37
+COSLED   PA7    output           P1 Pin17
+LED      PD15   output           P1 Pin47
+COS      PA5    input            P1 Pin15
+
+DSTAR    PD12   output           P1 Pin44
+DMR      PD13   output           P1 Pin45
+YSF      PD14   output           P1 Pin46
+P25      PD11   output           P1 Pin43
+NXDN     PD10   output           P1 Pin42
+
+RX       PA0    analog input     P1 Pin12
+RSSI     PA1    analog input     P1 Pin11
+TX       PA4    analog output    P1 Pin16
+
+EXT_CLK  PA15   input            P2 Pin40
+*/
+
+#define PIN_COS           GPIO_Pin_5
+#define PORT_COS          GPIOA
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOA
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_7
+#define PORT_COSLED       GPIOA
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOA
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOD
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOD
+
+#define PIN_P25           GPIO_Pin_11
+#define PORT_P25          GPIOD
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOD
+
+#define PIN_NXDN          GPIO_Pin_10
+#define PORT_NXDN         GPIOD
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOD
+
+#define PIN_DSTAR         GPIO_Pin_12
+#define PORT_DSTAR        GPIOD
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOD
+
+#define PIN_DMR           GPIO_Pin_13
+#define PORT_DMR          GPIOD
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOD
+
+#define PIN_YSF           GPIO_Pin_14
+#define PORT_YSF          GPIOD
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOD
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_drcc_nqf.h

@@ -0,0 +1,140 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_DRCC_NQF_H
+#define _PINS_F4_DRCC_NQF_H
+
+/*
+Pin definitions for DRCC_DVM BG7NQF  board rev1
+
+PTT      PB12   output
+LED_PTT  PB4    output
+LED_COS  PB5    output
+LED_SRV  PB10   output
+COS      PB13   input
+
+DSTAR    N/A
+DMR      N/A
+YSF      N/A
+P25      N/A
+NXDN     N/A
+POCSAG   N/A
+
+MDSTAR   PB14   output
+MDMR     PB8    output
+MYSF     PB9    output
+MP25     PB15   output
+MNXDN    N/A
+MPOCSAG  N/A
+
+RX       PB0    analog input
+RSSI     PB1    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+
+UART1_TX PA9    output
+UART1_RX PA10   output
+UART2_TX PA2    output
+UART2_RX PA3    output
+
+*/
+
+#define PIN_COS           GPIO_Pin_13
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_12
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_5
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_10
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_TXLED         GPIO_Pin_4
+#define PORT_TXLED        GPIOB
+#define RCC_Per_TXLED     RCC_AHB1Periph_GPIOB
+
+// #define PIN_P25           GPIO_Pin_3
+// #define PORT_P25          GPIOB
+// #define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+// #define PIN_NXDN          GPIO_Pin_10
+// #define PORT_NXDN         GPIOA
+// #define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+// #define PIN_POCSAG        GPIO_Pin_12
+// #define PORT_POCSAG       GPIOB
+// #define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+// #define PIN_DSTAR         GPIO_Pin_10
+// #define PORT_DSTAR        GPIOB
+// #define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+// #define PIN_DMR           GPIO_Pin_4
+// #define PORT_DMR          GPIOB
+// #define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+// #define PIN_YSF           GPIO_Pin_5
+// #define PORT_YSF          GPIOB
+// #define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_15
+#define PORT_MP25         GPIOB
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOB
+
+#define PIN_MDSTAR        GPIO_Pin_9
+#define PORT_MDSTAR       GPIOB
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOB
+
+#define PIN_MDMR          GPIO_Pin_8
+#define PORT_MDMR         GPIOB
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOB
+
+#define PIN_MYSF          GPIO_Pin_14
+#define PORT_MYSF         GPIOB
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOB
+
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOB
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOB
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOB
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOB
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+#define PORT_TX           GPIOA
+#define RCC_Per_TX        RCC_AHB1Periph_GPIOA
+
+#endif

pins/pins_f4_f4m.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_F4M_H
+#define _PINS_F4_F4M_H
+
+/*
+Pin definitions for MMDVM-F4M Pi-Hat F0DEI board:
+
+PTT      PB13   output
+COSLED   PB14   output
+LED      PB15   output
+COS      PC0    input
+
+DSTAR    PC7    output
+DMR      PC8    output
+YSF      PA8    output
+P25      PC9    output
+NXDN     PB1    output
+POCSAG   PB12   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_9
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_1
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_7
+#define PORT_DSTAR        GPIOC
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
+
+#define PIN_DMR           GPIO_Pin_8
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_8
+#define PORT_YSF          GPIOA
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_nucleo_arduino.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_NUCLEO_ARDUINO_H
+#define _PINS_F4_NUCLEO_ARDUINO_H
+
+/*
+Pin definitions for STM32F4 Nucleo boards (Arduino header):
+
+PTT      PB10   output           CN9 Pin7
+COSLED   PB3    output           CN9 Pin4
+LED      PB5    output           CN9 Pin5
+COS      PB4    input            CN9 Pin6
+
+DSTAR    PA1    output           CN8 Pin2
+DMR      PA4    output           CN8 Pin3
+YSF      PB0    output           CN8 Pin4
+P25      PC1    output           CN8 Pin5
+NXDN     PA3    output           CN9 Pin1
+POCSAG   PB12   output
+
+RX       PA0    analog input     CN8 Pin1
+RSSI     PC0    analog input     CN8 Pin6
+TX       PA5    analog output    CN5 Pin6
+
+EXT_CLK  PB8    input            CN5 Pin10
+*/
+
+#define PIN_COS           GPIO_Pin_4
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_10
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_3
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_5
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_1
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_3
+#define PORT_NXDN         GPIOA
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_1
+#define PORT_DSTAR        GPIOA
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOA
+
+#define PIN_DMR           GPIO_Pin_4
+#define PORT_DMR          GPIOA
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOA
+
+#define PIN_YSF           GPIO_Pin_0
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#define PIN_EXT_CLK       GPIO_Pin_8
+#define SRC_EXT_CLK       GPIO_PinSource8
+#define PORT_EXT_CLK      GPIOB
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_0
+#define PIN_RSSI_CH       ADC_Channel_10
+#define PORT_RSSI         GPIOC
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOC
+
+#define PIN_TX            GPIO_Pin_5
+#define PIN_TX_CH         DAC_Channel_2
+
+#endif

pins/pins_f4_nucleo_morpho.h

@@ -0,0 +1,134 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_NUCLEO_MORPHO_H
+#define _PINS_F4_NUCLEO_MORPHO_H
+
+/*
+Pin definitions for STM32F4 Nucleo boards (ST Morpho header):
+
+PTT      PB13   output           CN10 Pin30
+COSLED   PB14   output           CN10 Pin28
+LED      PA5    output           CN10 Pin11
+COS      PB15   input            CN10 Pin26
+
+DSTAR    PB10   output           CN10 Pin25
+DMR      PB4    output           CN10 Pin27
+YSF      PB5    output           CN10 Pin29
+P25      PB3    output           CN10 Pin31
+NXDN     PA10   output           CN10 Pin33
+POCSAG   PB12   output           CN10 Pin16
+
+MDSTAR   PC4    output           CN10 Pin34
+MDMR     PC5    output           CN10 Pin6
+MYSF     PC2    output           CN7 Pin35
+MP25     PC3    output           CN7 Pin37
+MNXDN    PC6    output           CN10 Pin4
+MPOCSAG  PC8    output           CN10 Pin2
+
+RX       PA0    analog input     CN7 Pin28
+RSSI     PA1    analog input     CN7 Pin30
+TX       PA4    analog output    CN7 Pin32
+
+EXT_CLK  PA15   input            CN7 Pin17
+*/
+
+#define PIN_COS           GPIO_Pin_15
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_5
+#define PORT_LED          GPIOA
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
+
+#define PIN_P25           GPIO_Pin_3
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_10
+#define PORT_NXDN         GPIOA
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_10
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_4
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_5
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_3
+#define PORT_MP25         GPIOC
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
+
+#define PIN_MNXDN         GPIO_Pin_6
+#define PORT_MNXDN        GPIOC
+#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
+
+#define PIN_MDSTAR        GPIO_Pin_4
+#define PORT_MDSTAR       GPIOC
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
+
+#define PIN_MDMR          GPIO_Pin_5
+#define PORT_MDMR         GPIOC
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
+
+#define PIN_MYSF          GPIO_Pin_2
+#define PORT_MYSF         GPIOC
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
+
+#define PIN_MPOCSAG       GPIO_Pin_8
+#define PORT_MPOCSAG      GPIOC
+#define RCC_Per_MPOCSAG   RCC_AHB1Periph_GPIOC
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_pi.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_PI_H
+#define _PINS_F4_PI_H
+
+/*
+Pin definitions for STM32F4 Pi Board:
+
+PTT      PB13   output
+COSLED   PB14   output
+LED      PB15   output
+COS      PC0    input
+
+DSTAR    PC7    output
+DMR      PC8    output
+YSF      PA8    output
+P25      PC9    output
+NXDN     PB1    output
+POCSAG   PB12   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_9
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_1
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_7
+#define PORT_DSTAR        GPIOC
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
+
+#define PIN_DMR           GPIO_Pin_8
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_8
+#define PORT_YSF          GPIOA
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_rpt_tgo.h

@@ -0,0 +1,134 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_RPT_TGO_H
+#define _PINS_F4_RPT_TGO_H
+
+/*
+Pin definitions for MMDVM_RPT_Hat Pi-Hat BG4TGO  board::
+
+PTT      PB13   output           CN10 Pin30
+COSLED   PB14   output           CN10 Pin28
+LED      PA5    output           CN10 Pin11
+COS      PB15   input            CN10 Pin26
+
+DSTAR    PB10   output           CN10 Pin25
+DMR      PB4    output           CN10 Pin27
+YSF      PB5    output           CN10 Pin29
+P25      PB3    output           CN10 Pin31
+NXDN     PA10   output           CN10 Pin33
+POCSAG   PB12   output           CN10 Pin16
+
+MDSTAR   PC4    output           CN10 Pin34
+MDMR     PC5    output           CN10 Pin6
+MYSF     PC2    output           CN7 Pin35
+MP25     PC3    output           CN7 Pin37
+MNXDN    PC6    output           CN10 Pin4
+MPOCSAG  PC8    output           CN10 Pin2
+
+RX       PA0    analog input     CN7 Pin28
+RSSI     PA1    analog input     CN7 Pin30
+TX       PA4    analog output    CN7 Pin32
+
+EXT_CLK  PA15   input            CN7 Pin17
+*/
+
+#define PIN_COS           GPIO_Pin_15
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_5
+#define PORT_LED          GPIOA
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
+
+#define PIN_P25           GPIO_Pin_3
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_10
+#define PORT_NXDN         GPIOA
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_10
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_4
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_5
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_3
+#define PORT_MP25         GPIOC
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
+
+#define PIN_MNXDN         GPIO_Pin_6
+#define PORT_MNXDN        GPIOC
+#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
+
+#define PIN_MDSTAR        GPIO_Pin_4
+#define PORT_MDSTAR       GPIOC
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
+
+#define PIN_MDMR          GPIO_Pin_5
+#define PORT_MDMR         GPIOC
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
+
+#define PIN_MYSF          GPIO_Pin_2
+#define PORT_MYSF         GPIOC
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
+
+#define PIN_MPOCSAG       GPIO_Pin_8
+#define PORT_MPOCSAG      GPIOC
+#define RCC_Per_MPOCSAG   RCC_AHB1Periph_GPIOC
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f4_stm32dvm_v3.h

@@ -0,0 +1,102 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F4_STM32DVM_V3_H
+#define _PINS_F4_STM32DVM_V3_H
+
+/*
+Pin definitions for STM32F4 STM32-DVM rev 3 Board:
+
+COS      PB13   input
+PTT      PB12   output
+COSLED   PB4    output
+LED      PB3    output
+
+P25      PB8    output
+NXDN     PB9    output
+DSTAR    PB6    output
+DMR      PB5    output
+YSF      PB7    output
+POCSAG   PC10   output
+
+RX       PB0    analog input
+RSSI     PB1    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_13
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+
+#define PIN_PTT           GPIO_Pin_12
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_4
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_3
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_8
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_9
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_6
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_5
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_7
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_10
+#define PORT_POCSAG       GPIOC
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOC
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_8
+#define PORT_RX           GPIOB
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOB
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_9
+#define PORT_RSSI         GPIOB
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOB
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f7_f7m.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_F7M_H
+#define _PINS_F7_F7M_H
+
+/*
+Pin definitions for MMDVM-F7M Pi-Hat F0DEI board:
+
+PTT      PB13   output
+COSLED   PB14   output
+LED      PB15   output
+COS      PC0    input
+
+DSTAR    PC7    output
+DMR      PC8    output
+YSF      PA8    output
+P25      PC9    output
+NXDN     PB1    output
+POCSAG   PB12   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_9
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_1
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_7
+#define PORT_DSTAR        GPIOC
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
+
+#define PIN_DMR           GPIO_Pin_8
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_8
+#define PORT_YSF          GPIOA
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f7_nucleo.h

@@ -0,0 +1,129 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_NUCLEO_H
+#define _PINS_F7_NUCLEO_H
+
+/*
+Pin definitions for STM32F7 Nucleo boards (ST Morpho header):
+
+PTT      PB13   output           CN12 Pin30
+COSLED   PB14   output           CN12 Pin28
+LED      PA5    output           CN12 Pin11
+COS      PB15   input            CN12 Pin26
+
+DSTAR    PB10   output           CN12 Pin25
+DMR      PB4    output           CN12 Pin27
+YSF      PB5    output           CN12 Pin29
+P25      PB3    output           CN12 Pin31
+NXDN     PA10   output           CN12 Pin33
+POCSAG   PB12   output           CN12 Pin16
+
+MDSTAR   PC4    output           CN12 Pin34
+MDMR     PC5    output           CN12 Pin6
+MYSF     PC2    output           CN11 Pin35
+MP25     PC3    output           CN11 Pin37
+MNXDN    PC6    output           CN12 Pin4
+
+RX       PA0    analog input     CN11 Pin28
+RSSI     PA1    analog input     CN11 Pin30
+TX       PA4    analog output    CN11 Pin32
+
+EXT_CLK  PA15   input            CN11 Pin17
+*/
+
+#define PIN_COS           GPIO_Pin_15
+#define PORT_COS          GPIOB
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOB
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_5
+#define PORT_LED          GPIOA
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOA
+
+#define PIN_P25           GPIO_Pin_3
+#define PORT_P25          GPIOB
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOB
+
+#define PIN_NXDN          GPIO_Pin_10
+#define PORT_NXDN         GPIOA
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOA
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_10
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_4
+#define PORT_DMR          GPIOB
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOB
+
+#define PIN_YSF           GPIO_Pin_5
+#define PORT_YSF          GPIOB
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOB
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_3
+#define PORT_MP25         GPIOC
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
+
+#define PIN_MNXDN         GPIO_Pin_6
+#define PORT_MNXDN        GPIOC
+#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
+
+#define PIN_MDSTAR        GPIO_Pin_4
+#define PORT_MDSTAR       GPIOC
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
+
+#define PIN_MDMR          GPIO_Pin_5
+#define PORT_MDMR         GPIOC
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
+
+#define PIN_MYSF          GPIO_Pin_2
+#define PORT_MYSF         GPIOC
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_1
+#define PIN_RSSI_CH       ADC_Channel_1
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f7_pi.h

@@ -0,0 +1,101 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_PI_H
+#define _PINS_F7_PI_H
+
+/*
+Pin definitions for STM32F722 Pi Board:
+
+PTT      PB13   output
+COSLED   PB14   output
+LED      PB15   output
+COS      PC0    input
+
+DSTAR    PC7    output
+DMR      PC8    output
+YSF      PA8    output
+P25      PC9    output
+NXDN     PB1    output
+POCSAG   PB12   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_13
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_14
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_15
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_9
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_1
+#define PORT_NXDN         GPIOB
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
+
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_POCSAG       GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
+#define PIN_DSTAR         GPIO_Pin_7
+#define PORT_DSTAR        GPIOC
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
+
+#define PIN_DMR           GPIO_Pin_8
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_8
+#define PORT_YSF          GPIOA
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOA
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif

pins/pins_f7_rpt_hat.h

@@ -0,0 +1,144 @@
+/*
+ *   Copyright (C) 2019,2020 by BG5HHP
+ *
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef _PINS_F7_RPT_HAT_H
+#define _PINS_F7_RPT_HAT_H
+
+/*
+Pin definitions for MMDVM_RPT_Hat Pi-Hat F0DEI DB9MAT DF2ET board:
+
+PTT      PB14   output
+COSLED   PB13   output
+LED      PB12   output
+COS      PC0    input
+
+DSTAR    PB15   output
+DMR      PC6    output
+YSF      PC7    output
+P25      PC8    output
+NXDN     PC9    output
+POCSAG   PA8    output
+FM       PA11   output
+
+MDSTAR   PC1    output
+MDMR     PC2    output
+MYSF     PC3    output
+MP25     PC4    output
+MNXDN    PC10   output
+MPOCSAG  PC11   output
+MFM      PC13   output
+
+RX       PA0    analog input
+RSSI     PA7    analog input
+TX       PA4    analog output
+
+EXT_CLK  PA15   input
+*/
+
+#define PIN_COS           GPIO_Pin_0
+#define PORT_COS          GPIOC
+#define RCC_Per_COS       RCC_AHB1Periph_GPIOC
+
+#define PIN_PTT           GPIO_Pin_14
+#define PORT_PTT          GPIOB
+#define RCC_Per_PTT       RCC_AHB1Periph_GPIOB
+
+#define PIN_COSLED        GPIO_Pin_13
+#define PORT_COSLED       GPIOB
+#define RCC_Per_COSLED    RCC_AHB1Periph_GPIOB
+
+#define PIN_LED           GPIO_Pin_12
+#define PORT_LED          GPIOB
+#define RCC_Per_LED       RCC_AHB1Periph_GPIOB
+
+#define PIN_P25           GPIO_Pin_8
+#define PORT_P25          GPIOC
+#define RCC_Per_P25       RCC_AHB1Periph_GPIOC
+
+#define PIN_NXDN          GPIO_Pin_9
+#define PORT_NXDN         GPIOC
+#define RCC_Per_NXDN      RCC_AHB1Periph_GPIOC
+
+#define PIN_POCSAG        GPIO_Pin_8
+#define PORT_POCSAG       GPIOA
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOA
+
+#define PIN_FM            GPIO_Pin_11
+#define PORT_FM           GPIOA
+#define RCC_Per_FM        RCC_AHB1Periph_GPIOA
+
+#define PIN_DSTAR         GPIO_Pin_15
+#define PORT_DSTAR        GPIOB
+#define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOB
+
+#define PIN_DMR           GPIO_Pin_6
+#define PORT_DMR          GPIOC
+#define RCC_Per_DMR       RCC_AHB1Periph_GPIOC
+
+#define PIN_YSF           GPIO_Pin_7
+#define PORT_YSF          GPIOC
+#define RCC_Per_YSF       RCC_AHB1Periph_GPIOC
+
+#if defined(MODE_PINS)
+#define PIN_MP25          GPIO_Pin_4
+#define PORT_MP25         GPIOC
+#define RCC_Per_MP25      RCC_AHB1Periph_GPIOC
+
+#define PIN_MNXDN         GPIO_Pin_10
+#define PORT_MNXDN        GPIOC
+#define RCC_Per_MNXDN     RCC_AHB1Periph_GPIOC
+
+#define PIN_MDSTAR        GPIO_Pin_1
+#define PORT_MDSTAR       GPIOC
+#define RCC_Per_MDSTAR    RCC_AHB1Periph_GPIOC
+
+#define PIN_MDMR          GPIO_Pin_2
+#define PORT_MDMR         GPIOC
+#define RCC_Per_MDMR      RCC_AHB1Periph_GPIOC
+
+#define PIN_MYSF          GPIO_Pin_3
+#define PORT_MYSF         GPIOC
+#define RCC_Per_MYSF      RCC_AHB1Periph_GPIOC
+
+#define PIN_MPOCSAG       GPIO_Pin_11
+#define PORT_MPOCSAG      GPIOC
+#define RCC_Per_MPOCSAG   RCC_AHB1Periph_GPIOC
+
+#define PIN_MFM           GPIO_Pin_13
+#define PORT_MFM          GPIOC
+#define RCC_Per_MFM       RCC_AHB1Periph_GPIOC
+#endif
+
+#define PIN_EXT_CLK       GPIO_Pin_15
+#define SRC_EXT_CLK       GPIO_PinSource15
+#define PORT_EXT_CLK      GPIOA
+
+#define PIN_RX            GPIO_Pin_0
+#define PIN_RX_CH         ADC_Channel_0
+#define PORT_RX           GPIOA
+#define RCC_Per_RX        RCC_AHB1Periph_GPIOA
+
+#define PIN_RSSI          GPIO_Pin_7
+#define PIN_RSSI_CH       ADC_Channel_7
+#define PORT_RSSI         GPIOA
+#define RCC_Per_RSSI      RCC_AHB1Periph_GPIOA
+
+#define PIN_TX            GPIO_Pin_4
+#define PIN_TX_CH         DAC_Channel_1
+
+#endif