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2
Commits
| Author | SHA1 | Date | |
|---|---|---|---|
 Jonathan Naylor
|
07e18ffcfb | ||
|
Jonathan Naylor
|
0092d6d9c3 |
@@ -1,49 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019 by Florian Wolters DF2ET
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
#include "CalPOCSAG.h"
|
||||
|
||||
|
||||
CCalPOCSAG::CCalPOCSAG() :
|
||||
m_state(POCSAGCAL_IDLE)
|
||||
{
|
||||
}
|
||||
|
||||
void CCalPOCSAG::process()
|
||||
{
|
||||
if (m_state == POCSAGCAL_IDLE)
|
||||
return;
|
||||
|
||||
uint16_t space = io.getSpace();
|
||||
if (space <= 165U)
|
||||
return;
|
||||
|
||||
pocsagTX.writeByte(0xAAU);
|
||||
}
|
||||
|
||||
uint8_t CCalPOCSAG::write(const uint8_t* data, uint8_t length)
|
||||
{
|
||||
if (length != 1U)
|
||||
return 4U;
|
||||
|
||||
m_state = data[0U] == 1U ? POCSAGCAL_TX : POCSAGCAL_IDLE;
|
||||
|
||||
return 0U;
|
||||
}
|
||||
-41
@@ -1,41 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2019 by Florian Wolters DF2ET
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if !defined(CALPOCSAG_H)
|
||||
#define CALPOCSAG_H
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
enum POCSAGCAL {
|
||||
POCSAGCAL_IDLE,
|
||||
POCSAGCAL_TX
|
||||
};
|
||||
|
||||
class CCalPOCSAG {
|
||||
public:
|
||||
CCalPOCSAG();
|
||||
|
||||
void process();
|
||||
|
||||
uint8_t write(const uint8_t* data, uint8_t length);
|
||||
|
||||
private:
|
||||
POCSAGCAL m_state;
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -38,8 +38,8 @@
|
||||
// Allow the use of the COS line to lockout the modem
|
||||
// #define USE_COS_AS_LOCKOUT
|
||||
|
||||
// Use pins to output the current mode via LEDs
|
||||
// #define MODE_LEDS
|
||||
// Use pins to output the current mode
|
||||
// #define MODE_PINS
|
||||
|
||||
// For the original Arduino Due pin layout
|
||||
// #define ARDUINO_DUE_PAPA
|
||||
@@ -57,11 +57,8 @@
|
||||
// #define STM32F4_NUCLEO_MORPHO_HEADER
|
||||
// #define STM32F4_NUCLEO_ARDUINO_HEADER
|
||||
|
||||
// Use separate mode pins to switch external channel/filters/bandwidth for example
|
||||
// #define MODE_PINS
|
||||
|
||||
// For the VK6MST Pi3 Shield communicating over i2c. i2c address & speed defined in i2cTeensy.cpp
|
||||
// #define VK6MST_TEENSY_PI3_SHIELD_I2C
|
||||
// Use separate mode pins to switch external filters/bandwidth for example
|
||||
// #define STM32F4_NUCLEO_MODE_PINS
|
||||
|
||||
// Pass RSSI information to the host
|
||||
// #define SEND_RSSI_DATA
|
||||
|
||||
+1
-1
@@ -388,7 +388,7 @@ void CDStarTX::txHeader(const uint8_t* in, uint8_t* out) const
|
||||
if (i < 660U) {
|
||||
if (d & 0x08U)
|
||||
out[INTERLEAVE_TABLE_TX[i * 2U]] |= (0x01U << INTERLEAVE_TABLE_TX[i * 2U + 1U]);
|
||||
i++;
|
||||
i++;
|
||||
|
||||
if (d & 0x04U)
|
||||
out[INTERLEAVE_TABLE_TX[i * 2U]] |= (0x01U << INTERLEAVE_TABLE_TX[i * 2U + 1U]);
|
||||
|
||||
@@ -60,9 +60,7 @@ enum MMDVM_STATE {
|
||||
STATE_RSSICAL = 96,
|
||||
STATE_CWID = 97,
|
||||
STATE_DMRCAL = 98,
|
||||
STATE_DSTARCAL = 99,
|
||||
STATE_INTCAL = 100,
|
||||
STATE_POCSAGCAL = 101
|
||||
STATE_DSTARCAL = 99
|
||||
};
|
||||
|
||||
#include "SerialPort.h"
|
||||
@@ -85,7 +83,6 @@ enum MMDVM_STATE {
|
||||
#include "CalDMR.h"
|
||||
#include "CalP25.h"
|
||||
#include "CalNXDN.h"
|
||||
#include "CalPOCSAG.h"
|
||||
#include "CalRSSI.h"
|
||||
#include "CWIdTX.h"
|
||||
#include "Debug.h"
|
||||
@@ -100,12 +97,6 @@ const uint16_t RX_BLOCK_SIZE = 2U;
|
||||
const uint16_t TX_RINGBUFFER_SIZE = 500U;
|
||||
const uint16_t RX_RINGBUFFER_SIZE = 600U;
|
||||
|
||||
#if defined(STM32F105xC) || defined(__MK20DX256__)
|
||||
const uint16_t TX_BUFFER_LEN = 2000U;
|
||||
#else
|
||||
const uint16_t TX_BUFFER_LEN = 4000U;
|
||||
#endif
|
||||
|
||||
extern MMDVM_STATE m_modemState;
|
||||
|
||||
extern bool m_dstarEnable;
|
||||
@@ -149,7 +140,6 @@ extern CCalDStarTX calDStarTX;
|
||||
extern CCalDMR calDMR;
|
||||
extern CCalP25 calP25;
|
||||
extern CCalNXDN calNXDN;
|
||||
extern CCalPOCSAG calPOCSAG;
|
||||
extern CCalRSSI calRSSI;
|
||||
|
||||
extern CCWIdTX cwIdTX;
|
||||
|
||||
-235
@@ -1,235 +0,0 @@
|
||||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
* 28-4-2017 Created for MMDVM Pi shield for Teensy by Chris Huitema
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
|
||||
#if defined(VK6MST_TEENSY_PI3_SHIELD_I2C)
|
||||
|
||||
#include <i2c_t3.h> //available here https://github.com/nox771/i2c_t3 or maybe the normal wire will work #include <wire.h> justs need to test i guess
|
||||
|
||||
#define I2C_ADDRESS 0x22
|
||||
#define I2C_SPEED 100000
|
||||
|
||||
// Function prototypes
|
||||
void receiveEvent(size_t count);
|
||||
void requestEvent(void);
|
||||
|
||||
#define TX_FIFO_SIZE 512U
|
||||
#define RX_FIFO_SIZE 512U
|
||||
|
||||
volatile uint8_t TXfifo[TX_FIFO_SIZE];
|
||||
volatile uint8_t RXfifo[RX_FIFO_SIZE];
|
||||
volatile uint16_t TXfifohead, TXfifotail;
|
||||
volatile uint16_t RXfifohead, RXfifotail;
|
||||
|
||||
// Init queues
|
||||
void TXfifoinit(void)
|
||||
{
|
||||
TXfifohead = 0U;
|
||||
TXfifotail = 0U;
|
||||
}
|
||||
|
||||
void RXfifoinit()
|
||||
{
|
||||
RXfifohead = 0U;
|
||||
RXfifotail = 0U;
|
||||
}
|
||||
|
||||
// How full is queue
|
||||
|
||||
uint16_t TXfifolevel(void)
|
||||
{
|
||||
uint32_t tail = TXfifotail;
|
||||
uint32_t head = TXfifohead;
|
||||
|
||||
if (tail > head)
|
||||
return TX_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
uint16_t RXfifolevel(void)
|
||||
{
|
||||
uint32_t tail = RXfifotail;
|
||||
uint32_t head = RXfifohead;
|
||||
|
||||
if (tail > head)
|
||||
return RX_FIFO_SIZE + head - tail;
|
||||
else
|
||||
return head - tail;
|
||||
}
|
||||
|
||||
|
||||
uint8_t TXfifoput(uint8_t next)
|
||||
{
|
||||
if (TXfifolevel() < TX_FIFO_SIZE) {
|
||||
TXfifo[TXfifohead] = next;
|
||||
|
||||
TXfifohead++;
|
||||
if (TXfifohead >= TX_FIFO_SIZE)
|
||||
TXfifohead = 0U;
|
||||
return 1U;
|
||||
} else {
|
||||
return 0U; // signal an overflow occurred by returning a zero count
|
||||
}
|
||||
}
|
||||
|
||||
void I2Cbegin(void)
|
||||
{
|
||||
// Setup for Slave mode, address 0x22, pins 18/19, external pullups, speed in hz
|
||||
Wire.begin(I2C_SLAVE, I2C_ADDRESS, I2C_PINS_18_19, I2C_PULLUP_EXT, I2C_SPEED);
|
||||
|
||||
// register events
|
||||
Wire.onReceive(receiveEvent);
|
||||
Wire.onRequest(requestEvent);
|
||||
|
||||
// initialize the fifos
|
||||
TXfifoinit();
|
||||
RXfifoinit();
|
||||
}
|
||||
|
||||
|
||||
int I2Cavailable(void)
|
||||
{
|
||||
if (RXfifolevel() > 0U)
|
||||
return 1U;
|
||||
else
|
||||
return 0U;
|
||||
}
|
||||
|
||||
|
||||
uint8_t I2Cread(void)
|
||||
{
|
||||
uint8_t data_c = RXfifo[RXfifotail];
|
||||
|
||||
RXfifotail++;
|
||||
if (RXfifotail >= RX_FIFO_SIZE)
|
||||
RXfifotail = 0U;
|
||||
|
||||
return data_c;
|
||||
}
|
||||
|
||||
|
||||
void I2Cwrite(const uint8_t* data, uint16_t length)
|
||||
{
|
||||
for (uint16_t i = 0U; i < length; i++)
|
||||
TXfifoput(data[i]); //puts it in the fifo
|
||||
}
|
||||
|
||||
//
|
||||
// handle Rx Event (incoming I2C data)
|
||||
//
|
||||
void receiveEvent(size_t count)
|
||||
{
|
||||
for (uint16_t i = 0U; i < count; i++)
|
||||
{
|
||||
if (RXfifolevel() < RX_FIFO_SIZE) {
|
||||
RXfifo[RXfifohead] = Wire.readByte();
|
||||
if (RXfifo[RXfifohead] != -1){
|
||||
RXfifohead++;
|
||||
if (RXfifohead >= RX_FIFO_SIZE) RXfifohead = 0U;
|
||||
}
|
||||
} else {
|
||||
Wire.readByte(); // drop data if mem full.
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
//
|
||||
// handle Tx Event (outgoing I2C data)
|
||||
//
|
||||
void requestEvent(void)
|
||||
{
|
||||
if (TXfifolevel() > 0) {
|
||||
if (Wire.write(TXfifo[TXfifotail])){ //write to i2c
|
||||
TXfifotail++;
|
||||
if (TXfifotail >= TX_FIFO_SIZE) TXfifotail = 0U;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/************************************/
|
||||
|
||||
void CSerialPort::beginInt(uint8_t n, int speed)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return I2Cbegin();
|
||||
case 3U:
|
||||
Serial3.begin(speed);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
int CSerialPort::availableInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return I2Cavailable();
|
||||
case 3U:
|
||||
return Serial3.available();
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
int CSerialPort::availableForWriteInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 3U:
|
||||
return Serial3.availableForWrite();
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t CSerialPort::readInt(uint8_t n)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
return I2Cread();
|
||||
case 3U:
|
||||
return Serial3.read();
|
||||
default:
|
||||
return 0U;
|
||||
}
|
||||
}
|
||||
|
||||
void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
|
||||
{
|
||||
switch (n) {
|
||||
case 1U:
|
||||
I2Cwrite(data, length);
|
||||
break;
|
||||
case 3U:
|
||||
Serial3.write(data, length);
|
||||
if (flush)
|
||||
Serial3.flush();
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -137,7 +137,7 @@ void CIO::selfTest()
|
||||
// We exclude PTT to avoid trigger the transmitter
|
||||
setLEDInt(ledValue);
|
||||
setCOSInt(ledValue);
|
||||
#if defined(MODE_LEDS)
|
||||
#if defined(MODE_PINS)
|
||||
setDStarInt(ledValue);
|
||||
setDMRInt(ledValue);
|
||||
setYSFInt(ledValue);
|
||||
@@ -148,7 +148,7 @@ void CIO::selfTest()
|
||||
delayInt(250);
|
||||
}
|
||||
|
||||
#if defined(MODE_LEDS)
|
||||
#if defined(MODE_PINS)
|
||||
setDStarInt(true);
|
||||
setDMRInt(false);
|
||||
setYSFInt(false);
|
||||
@@ -546,7 +546,7 @@ void CIO::setADCDetection(bool detect)
|
||||
|
||||
void CIO::setMode()
|
||||
{
|
||||
#if defined(MODE_LEDS)
|
||||
#if defined(MODE_PINS)
|
||||
setDStarInt(m_modemState == STATE_DSTAR);
|
||||
setDMRInt(m_modemState == STATE_DMR);
|
||||
setYSFInt(m_modemState == STATE_YSF);
|
||||
|
||||
@@ -95,19 +95,15 @@ void CIO::initInt()
|
||||
pinMode(PIN_LED, OUTPUT);
|
||||
pinMode(PIN_COS, INPUT);
|
||||
|
||||
#if defined(MODE_LEDS)
|
||||
#if defined(MODE_PINS)
|
||||
// Set up the mode output pins
|
||||
pinMode(PIN_DSTAR, OUTPUT);
|
||||
pinMode(PIN_DMR, OUTPUT);
|
||||
pinMode(PIN_YSF, OUTPUT);
|
||||
pinMode(PIN_P25, OUTPUT);
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
pinMode(PIN_NXDN, OUTPUT);
|
||||
#endif
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
pinMode(PIN_POCSAG, OUTPUT);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::startInt()
|
||||
|
||||
@@ -24,120 +24,7 @@
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F7XX)
|
||||
|
||||
#if defined(STM32F4_RPT_HAT_TGO)
|
||||
/*
|
||||
Pin definitions for MMDVM_RPT_Hat Pi-Hat BG4TGO board::
|
||||
|
||||
PTT PB13 output CN10 Pin30
|
||||
COSLED PB14 output CN10 Pin28
|
||||
LED PA5 output CN10 Pin11
|
||||
COS PB15 input CN10 Pin26
|
||||
|
||||
DSTAR PB10 output CN10 Pin25
|
||||
DMR PB4 output CN10 Pin27
|
||||
YSF PB5 output CN10 Pin29
|
||||
P25 PB3 output CN10 Pin31
|
||||
NXDN PA10 output CN10 Pin33
|
||||
POCSAG PB12 output CN10 Pin16
|
||||
|
||||
MDSTAR PC4 output CN10 Pin34
|
||||
MDMR PC5 output CN10 Pin6
|
||||
MYSF PC2 output CN7 Pin35
|
||||
MP25 PC3 output CN7 Pin37
|
||||
MNXDN PC6 output CN10 Pin4
|
||||
MPOCSAG PC8 output CN10 Pin2
|
||||
|
||||
RX PA0 analog input CN7 Pin28
|
||||
RSSI PA1 analog input CN7 Pin30
|
||||
TX PA4 analog output CN7 Pin32
|
||||
|
||||
EXT_CLK PA15 input CN7 Pin17
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_15
|
||||
#define PORT_COS GPIOB
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_PTT GPIO_Pin_13
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_14
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_5
|
||||
#define PORT_LED GPIOA
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_P25 GPIO_Pin_3
|
||||
#define PORT_P25 GPIOB
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_10
|
||||
#define PORT_NXDN GPIOA
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_10
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DMR GPIO_Pin_4
|
||||
#define PORT_DMR GPIOB
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_YSF GPIO_Pin_5
|
||||
#define PORT_YSF GPIOB
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#if defined(MODE_PINS)
|
||||
#define PIN_MP25 GPIO_Pin_3
|
||||
#define PORT_MP25 GPIOC
|
||||
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MNXDN GPIO_Pin_6
|
||||
#define PORT_MNXDN GPIOC
|
||||
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDSTAR GPIO_Pin_4
|
||||
#define PORT_MDSTAR GPIOC
|
||||
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDMR GPIO_Pin_5
|
||||
#define PORT_MDMR GPIOC
|
||||
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MYSF GPIO_Pin_2
|
||||
#define PORT_MYSF GPIOC
|
||||
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MPOCSAG GPIO_Pin_8
|
||||
#define PORT_MPOCSAG GPIOC
|
||||
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
|
||||
#endif
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_1
|
||||
#define PIN_RSSI_CH ADC_Channel_1
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#elif defined(STM32F4_DISCOVERY)
|
||||
#if defined(STM32F4_DISCOVERY)
|
||||
/*
|
||||
Pin definitions for STM32F4 Discovery Board:
|
||||
|
||||
@@ -226,7 +113,6 @@ DMR PC8 output
|
||||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
NXDN PB1 output
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
@@ -259,10 +145,6 @@ EXT_CLK PA15 input
|
||||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
@@ -306,7 +188,6 @@ DMR PC8 output
|
||||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
NXDN PB1 output
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
@@ -339,10 +220,6 @@ EXT_CLK PA15 input
|
||||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
@@ -386,7 +263,6 @@ DMR PC8 output
|
||||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
NXDN PB1 output
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
@@ -419,10 +295,6 @@ EXT_CLK PA15 input
|
||||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
@@ -466,7 +338,6 @@ DMR PC8 output
|
||||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
NXDN PB1 output
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
@@ -499,10 +370,6 @@ EXT_CLK PA15 input
|
||||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
@@ -532,119 +399,6 @@ EXT_CLK PA15 input
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#elif defined(STM32F722_RPT_HAT)
|
||||
/*
|
||||
Pin definitions for MMDVM_RPT_Hat Pi-Hat F0DEI DB9MAT DF2ET board:
|
||||
|
||||
PTT PB14 output
|
||||
COSLED PB13 output
|
||||
LED PB12 output
|
||||
COS PC0 input
|
||||
|
||||
DSTAR PB15 output
|
||||
DMR PC6 output
|
||||
YSF PC7 output
|
||||
P25 PC8 output
|
||||
NXDN PC9 output
|
||||
POCSAG PA8 output
|
||||
|
||||
MDSTAR PC1 output
|
||||
MDMR PC2 output
|
||||
MYSF PC3 output
|
||||
MP25 PC4 output
|
||||
MNXDN PC10 output
|
||||
MPOCSAG PC11 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
TX PA4 analog output
|
||||
|
||||
EXT_CLK PA15 input
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_0
|
||||
#define PORT_COS GPIOC
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_PTT GPIO_Pin_14
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_13
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_12
|
||||
#define PORT_LED GPIOB
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_P25 GPIO_Pin_8
|
||||
#define PORT_P25 GPIOC
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_9
|
||||
#define PORT_NXDN GPIOC
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_8
|
||||
#define PORT_POCSAG GPIOA
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_15
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DMR GPIO_Pin_6
|
||||
#define PORT_DMR GPIOC
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_YSF GPIO_Pin_7
|
||||
#define PORT_YSF GPIOC
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOC
|
||||
|
||||
#if defined(MODE_PINS)
|
||||
#define PIN_MP25 GPIO_Pin_4
|
||||
#define PORT_MP25 GPIOC
|
||||
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MNXDN GPIO_Pin_10
|
||||
#define PORT_MNXDN GPIOC
|
||||
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDSTAR GPIO_Pin_1
|
||||
#define PORT_MDSTAR GPIOC
|
||||
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDMR GPIO_Pin_2
|
||||
#define PORT_MDMR GPIOC
|
||||
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MYSF GPIO_Pin_3
|
||||
#define PORT_MYSF GPIOC
|
||||
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MPOCSAG GPIO_Pin_11
|
||||
#define PORT_MPOCSAG GPIOC
|
||||
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
|
||||
#endif
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_7
|
||||
#define PIN_RSSI_CH ADC_Channel_7
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
|
||||
#if defined(STM32F4_NUCLEO_MORPHO_HEADER)
|
||||
@@ -661,14 +415,12 @@ DMR PB4 output CN10 Pin27
|
||||
YSF PB5 output CN10 Pin29
|
||||
P25 PB3 output CN10 Pin31
|
||||
NXDN PA10 output CN10 Pin33
|
||||
POCSAG PB12 output CN10 Pin16
|
||||
|
||||
MDSTAR PC4 output CN10 Pin34
|
||||
MDMR PC5 output CN10 Pin6
|
||||
MYSF PC2 output CN7 Pin35
|
||||
MP25 PC3 output CN7 Pin37
|
||||
MNXDN PC6 output CN10 Pin4
|
||||
MPOCSAG PC8 output CN10 Pin2
|
||||
|
||||
RX PA0 analog input CN7 Pin28
|
||||
RSSI PA1 analog input CN7 Pin30
|
||||
@@ -701,10 +453,6 @@ EXT_CLK PA15 input CN7 Pin17
|
||||
#define PORT_NXDN GPIOA
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_10
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
@@ -717,7 +465,7 @@ EXT_CLK PA15 input CN7 Pin17
|
||||
#define PORT_YSF GPIOB
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#if defined(MODE_PINS)
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS)
|
||||
#define PIN_MP25 GPIO_Pin_3
|
||||
#define PORT_MP25 GPIOC
|
||||
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||
@@ -737,10 +485,6 @@ EXT_CLK PA15 input CN7 Pin17
|
||||
#define PIN_MYSF GPIO_Pin_2
|
||||
#define PORT_MYSF GPIOC
|
||||
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MPOCSAG GPIO_Pin_8
|
||||
#define PORT_MPOCSAG GPIOC
|
||||
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
|
||||
#endif
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
@@ -774,7 +518,6 @@ DMR PA4 output CN8 Pin3
|
||||
YSF PB0 output CN8 Pin4
|
||||
P25 PC1 output CN8 Pin5
|
||||
NXDN PA3 output CN9 Pin1
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input CN8 Pin1
|
||||
RSSI PC0 analog input CN8 Pin6
|
||||
@@ -807,10 +550,6 @@ EXT_CLK PB8 input CN5 Pin10
|
||||
#define PORT_NXDN GPIOA
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_1
|
||||
#define PORT_DSTAR GPIOA
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOA
|
||||
@@ -858,7 +597,6 @@ DMR PB4 output CN12 Pin27
|
||||
YSF PB5 output CN12 Pin29
|
||||
P25 PB3 output CN12 Pin31
|
||||
NXDN PA10 output CN12 Pin33
|
||||
POCSAG PB12 output CN12 Pin16
|
||||
|
||||
MDSTAR PC4 output CN12 Pin34
|
||||
MDMR PC5 output CN12 Pin6
|
||||
@@ -897,10 +635,6 @@ EXT_CLK PA15 input CN11 Pin17
|
||||
#define PORT_NXDN GPIOA
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_10
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
@@ -913,7 +647,7 @@ EXT_CLK PA15 input CN11 Pin17
|
||||
#define PORT_YSF GPIOB
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#if defined(MODE_PINS)
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS)
|
||||
#define PIN_MP25 GPIO_Pin_3
|
||||
#define PORT_MP25 GPIOC
|
||||
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||
@@ -966,7 +700,6 @@ NXDN PB9 output
|
||||
DSTAR PB6 output
|
||||
DMR PB5 output
|
||||
YSF PB7 output
|
||||
POCSAG PC10 output
|
||||
|
||||
RX PB0 analog input
|
||||
RSSI PB1 analog input
|
||||
@@ -1012,10 +745,6 @@ EXT_CLK PA15 input
|
||||
#define PORT_YSF GPIOB
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_10
|
||||
#define PORT_POCSAG GPIOC
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
@@ -1083,7 +812,7 @@ void CIO::initInt()
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
|
||||
GPIO_Init(PORT_COS, &GPIO_InitStruct);
|
||||
|
||||
#if defined(MODE_LEDS)
|
||||
#if defined(MODE_PINS)
|
||||
// DSTAR pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_DSTAR, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_DSTAR;
|
||||
@@ -1108,7 +837,6 @@ void CIO::initInt()
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_P25, &GPIO_InitStruct);
|
||||
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
// NXDN pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_NXDN, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_NXDN;
|
||||
@@ -1116,16 +844,7 @@ void CIO::initInt()
|
||||
GPIO_Init(PORT_NXDN, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
// POCSAG pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_POCSAG, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_POCSAG;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_POCSAG, &GPIO_InitStruct);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
|
||||
// DSTAR mode pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_MDSTAR, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_MDSTAR;
|
||||
@@ -1150,22 +869,12 @@ void CIO::initInt()
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_MP25, &GPIO_InitStruct);
|
||||
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
// NXDN mode pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_MNXDN, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_MNXDN;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_MNXDN, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
// POCSAG mode pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_MPOCSAG, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_MPOCSAG;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_MPOCSAG, &GPIO_InitStruct);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::startInt()
|
||||
@@ -1375,7 +1084,7 @@ void CIO::setCOSInt(bool on)
|
||||
void CIO::setDStarInt(bool on)
|
||||
{
|
||||
GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
|
||||
GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
}
|
||||
@@ -1383,7 +1092,7 @@ void CIO::setDStarInt(bool on)
|
||||
void CIO::setDMRInt(bool on)
|
||||
{
|
||||
GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
|
||||
GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
}
|
||||
@@ -1391,7 +1100,7 @@ void CIO::setDMRInt(bool on)
|
||||
void CIO::setYSFInt(bool on)
|
||||
{
|
||||
GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
|
||||
GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
}
|
||||
@@ -1399,7 +1108,7 @@ void CIO::setYSFInt(bool on)
|
||||
void CIO::setP25Int(bool on)
|
||||
{
|
||||
GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
|
||||
GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
}
|
||||
@@ -1409,13 +1118,13 @@ void CIO::setNXDNInt(bool on)
|
||||
#if defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
|
||||
GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#else
|
||||
GPIO_WriteBit(PORT_NXDN, PIN_NXDN, on ? Bit_SET : Bit_RESET);
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
|
||||
GPIO_WriteBit(PORT_MNXDN, PIN_MNXDN, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#endif
|
||||
@@ -1425,16 +1134,11 @@ void CIO::setPOCSAGInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
|
||||
GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#else
|
||||
GPIO_WriteBit(PORT_POCSAG, PIN_POCSAG, on ? Bit_SET : Bit_RESET);
|
||||
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
|
||||
GPIO_WriteBit(PORT_MPOCSAG, PIN_MPOCSAG, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
@@ -222,12 +222,8 @@ static inline void GPIOInit()
|
||||
GPIOConfigPin(PORT_DMR, PIN_DMR, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_YSF, PIN_YSF, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_P25, PIN_P25, GPIO_CRL_MODE0_1);
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
GPIOConfigPin(PORT_NXDN, PIN_NXDN, GPIO_CRL_MODE0_1);
|
||||
#endif
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
GPIOConfigPin(PORT_POCSAG, PIN_POCSAG, GPIO_CRL_MODE0_1);
|
||||
#endif
|
||||
|
||||
GPIOConfigPin(PORT_RX, PIN_RX, 0);
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
@@ -369,9 +365,7 @@ void CIO::interrupt()
|
||||
{
|
||||
uint8_t control = MARK_NONE;
|
||||
uint16_t sample = DC_OFFSET;
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
uint16_t rawRSSI = 0U;
|
||||
#endif
|
||||
bitband_t eoc = (bitband_t)BITBAND_PERIPH(&ADC1->SR, ADC_SR_EOS_Pos);
|
||||
bitband_t adon = (bitband_t)BITBAND_PERIPH(&ADC1->CR2, ADC_CR2_ADON_Pos);
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
|
||||
+1
-5
@@ -64,19 +64,15 @@ void CIO::initInt()
|
||||
pinMode(PIN_LED, OUTPUT);
|
||||
pinMode(PIN_COS, INPUT);
|
||||
|
||||
#if defined(MODE_LEDS)
|
||||
#if defined(MODE_PINS)
|
||||
// Set up the mode output pins
|
||||
pinMode(PIN_DSTAR, OUTPUT);
|
||||
pinMode(PIN_DMR, OUTPUT);
|
||||
pinMode(PIN_YSF, OUTPUT);
|
||||
pinMode(PIN_P25, OUTPUT);
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
pinMode(PIN_NXDN, OUTPUT);
|
||||
#endif
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
pinMode(PIN_POCSAG, OUTPUT);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::startInt()
|
||||
|
||||
@@ -64,7 +64,6 @@ CCalDStarTX calDStarTX;
|
||||
CCalDMR calDMR;
|
||||
CCalP25 calP25;
|
||||
CCalNXDN calNXDN;
|
||||
CCalPOCSAG calPOCSAG;
|
||||
CCalRSSI calRSSI;
|
||||
|
||||
CCWIdTX cwIdTX;
|
||||
@@ -103,7 +102,7 @@ void loop()
|
||||
if (m_nxdnEnable && m_modemState == STATE_NXDN)
|
||||
nxdnTX.process();
|
||||
|
||||
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
|
||||
if (m_pocsagEnable && m_modemState == STATE_POCSAG)
|
||||
pocsagTX.process();
|
||||
|
||||
if (m_modemState == STATE_DSTARCAL)
|
||||
@@ -118,9 +117,6 @@ void loop()
|
||||
if (m_modemState == STATE_NXDNCAL1K)
|
||||
calNXDN.process();
|
||||
|
||||
if (m_modemState == STATE_POCSAGCAL)
|
||||
calPOCSAG.process();
|
||||
|
||||
if (m_modemState == STATE_IDLE)
|
||||
cwIdTX.process();
|
||||
}
|
||||
|
||||
@@ -61,7 +61,6 @@ CCalDStarTX calDStarTX;
|
||||
CCalDMR calDMR;
|
||||
CCalP25 calP25;
|
||||
CCalNXDN calNXDN;
|
||||
CCalPOCSAG calPOCSAG;
|
||||
CCalRSSI calRSSI;
|
||||
|
||||
CCWIdTX cwIdTX;
|
||||
@@ -100,7 +99,7 @@ void loop()
|
||||
if (m_nxdnEnable && m_modemState == STATE_NXDN)
|
||||
nxdnTX.process();
|
||||
|
||||
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
|
||||
if (m_pocsagEnable && m_modemState == STATE_POCSAG)
|
||||
pocsagTX.process();
|
||||
|
||||
if (m_modemState == STATE_DSTARCAL)
|
||||
@@ -115,9 +114,6 @@ void loop()
|
||||
if (m_modemState == STATE_NXDNCAL1K)
|
||||
calNXDN.process();
|
||||
|
||||
if (m_modemState == STATE_POCSAGCAL)
|
||||
calPOCSAG.process();
|
||||
|
||||
if (m_modemState == STATE_IDLE)
|
||||
cwIdTX.process();
|
||||
}
|
||||
|
||||
@@ -97,7 +97,7 @@
|
||||
<Define name="STM32F446xx"/>
|
||||
<Define name="HSE_VALUE=12000000"/>
|
||||
<Define name="STM32F4_PI"/>
|
||||
<Define name="MODE_LEDS"/>
|
||||
<Define name="MODE_PINS"/>
|
||||
</DefinedSymbols>
|
||||
</Compile>
|
||||
<Link useDefault="0">
|
||||
|
||||
@@ -128,12 +128,8 @@ DEFS_NUCLEO_F767=-DUSE_HAL_DRIVER -DSTM32F767xx -DSTM32F7XX -DSTM32F7_NUCLEO -DH
|
||||
DEFS_PI_F722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_PI -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# MMDVM-F7M F0DEI board:
|
||||
DEFS_F7M=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_F7M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# MMDVM_RPT_Hat F0DEI, DB9MAT, DF2ET board:
|
||||
DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# STM32F4 DVM board:
|
||||
DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# MMDVM_RPT_Hat BG4TGO, BG5HHP board:
|
||||
DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
|
||||
# Build compiler flags
|
||||
CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
|
||||
@@ -152,7 +148,7 @@ CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -f
|
||||
LDFLAGS=-Os --specs=nano.specs
|
||||
|
||||
# Build Rules
|
||||
.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm clean
|
||||
.PHONY: all release dis pi pi_f722 f4m nucleo f767 dvm clean
|
||||
|
||||
# Default target: Nucleo-64 F446RE board
|
||||
all: nucleo
|
||||
@@ -181,18 +177,6 @@ f7m: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_F7M)
|
||||
f7m: LDFLAGS+=$(LDFLAGS_F722)
|
||||
f7m: release_f7
|
||||
|
||||
rpt_hat: GitVersion.h
|
||||
rpt_hat: CFLAGS+=$(CFLAGS_F7) $(DEFS_RPT_HAT)
|
||||
rpt_hat: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_RPT_HAT)
|
||||
rpt_hat: LDFLAGS+=$(LDFLAGS_F722)
|
||||
rpt_hat: release_f7
|
||||
|
||||
rpt_hat_tgo: GitVersion.h
|
||||
rpt_hat_tgo: CFLAGS+=$(CFLAGS_F4) $(DEFS_RPT_HAT_TGO)
|
||||
rpt_hat_tgo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_RPT_HAT_TGO)
|
||||
rpt_hat_tgo: LDFLAGS+=$(LDFLAGS_F4)
|
||||
rpt_hat_tgo: release_f4
|
||||
|
||||
nucleo: GitVersion.h
|
||||
nucleo: CFLAGS+=$(CFLAGS_F4) $(DEFS_NUCLEO)
|
||||
nucleo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_NUCLEO)
|
||||
@@ -352,8 +336,7 @@ ifneq ($(wildcard /usr/bin/stm32flash),)
|
||||
/usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
|
||||
endif
|
||||
|
||||
deploy-f7m: deploy-pi-f7
|
||||
deploy-rpt_hat: deploy-pi-f7
|
||||
deploy-f7m: deploy-pi-f7
|
||||
|
||||
# Export the current git version if the index file exists, else 000...
|
||||
GitVersion.h:
|
||||
|
||||
+3
-17
@@ -65,7 +65,7 @@ COMMON_FLAGS =-mthumb -mlittle-endian -mcpu=$(MCPU)
|
||||
COMMON_FLAGS+= -Wall
|
||||
COMMON_FLAGS+= -I. -I$(CMSISDIR)/Include -I$(CMSISDIR)/Device/ST/STM32F1xx/Include -I$(SYSDIR)
|
||||
COMMON_FLAGS+= $(addprefix -I,$(INCDIR))
|
||||
COMMON_FLAGS+= -D$(MCU) -DMADEBYMAKEFILE
|
||||
COMMON_FLAGS+= -D$(MCU)
|
||||
COMMON_FLAGS+= -Os -flto -ffunction-sections -fdata-sections
|
||||
COMMON_FLAGS+= -g
|
||||
# Assembler flags
|
||||
@@ -91,7 +91,7 @@ DEPENDS:=$(CSRC:%.c=$(OBJDIR)/%.d) $(CXXSRC:%.cpp=$(OBJDIR)/%.d)
|
||||
|
||||
# Targets
|
||||
.PHONY: all
|
||||
all: GitVersion.h $(DIS) $(HEX)
|
||||
all: $(DIS) $(HEX)
|
||||
$(SIZE) $(ELF)
|
||||
|
||||
.PHONY: program
|
||||
@@ -116,7 +116,7 @@ debug: $(ELF)
|
||||
|
||||
.PHONY: clean
|
||||
clean:
|
||||
$(RM) $(OBJ) $(HEX) $(ELF) $(DIS) $(MAP) $(DEPENDS) GitVersion.h
|
||||
$(RM) $(OBJ) $(HEX) $(ELF) $(DIS) $(MAP) $(DEPENDS)
|
||||
|
||||
# implicit rules
|
||||
.elf.hex:
|
||||
@@ -149,17 +149,3 @@ $(DIS): $(ELF)
|
||||
|
||||
# include dependecies
|
||||
-include $(DEPENDS)
|
||||
|
||||
# Export the current git version if the index file exists, else 000...
|
||||
GitVersion.h:
|
||||
ifdef SYSTEMROOT
|
||||
echo #define GITVERSION "0000000" > $@
|
||||
else ifdef SystemRoot
|
||||
echo #define GITVERSION "0000000" > $@
|
||||
else
|
||||
ifneq ("$(wildcard .git/index)","")
|
||||
echo "#define GITVERSION \"$(shell git rev-parse --short HEAD)\"" > $@
|
||||
else
|
||||
echo "#define GITVERSION \"0000000\"" > $@
|
||||
endif
|
||||
endif
|
||||
|
||||
+1
-1
@@ -45,7 +45,7 @@ const uint8_t NXDN_PREAMBLE[] = {0x57U, 0x75U, 0xFDU};
|
||||
const uint8_t NXDN_SYNC = 0x5FU;
|
||||
|
||||
CNXDNTX::CNXDNTX() :
|
||||
m_buffer(TX_BUFFER_LEN),
|
||||
m_buffer(4000U),
|
||||
m_modFilter(),
|
||||
m_sincFilter(),
|
||||
m_modState(),
|
||||
|
||||
@@ -47,11 +47,6 @@ const unsigned int P25_TSDU_FRAME_LENGTH_BITS = P25_TSDU_FRAME_LENGTH_BYTES
|
||||
const unsigned int P25_TSDU_FRAME_LENGTH_SYMBOLS = P25_TSDU_FRAME_LENGTH_BYTES * 4U;
|
||||
const unsigned int P25_TSDU_FRAME_LENGTH_SAMPLES = P25_TSDU_FRAME_LENGTH_SYMBOLS * P25_RADIO_SYMBOL_LENGTH;
|
||||
|
||||
const unsigned int P25_PDU_HDR_FRAME_LENGTH_BYTES = 45U;
|
||||
const unsigned int P25_PDU_HDR_FRAME_LENGTH_BITS = P25_PDU_HDR_FRAME_LENGTH_BYTES * 8U;
|
||||
const unsigned int P25_PDU_HDR_FRAME_LENGTH_SYMBOLS = P25_PDU_HDR_FRAME_LENGTH_BYTES * 4U;
|
||||
const unsigned int P25_PDU_HDR_FRAME_LENGTH_SAMPLES = P25_PDU_HDR_FRAME_LENGTH_SYMBOLS * P25_RADIO_SYMBOL_LENGTH;
|
||||
|
||||
const unsigned int P25_SYNC_LENGTH_BYTES = 6U;
|
||||
const unsigned int P25_SYNC_LENGTH_BITS = P25_SYNC_LENGTH_BYTES * 8U;
|
||||
const unsigned int P25_SYNC_LENGTH_SYMBOLS = P25_SYNC_LENGTH_BYTES * 4U;
|
||||
|
||||
@@ -199,19 +199,7 @@ void CP25RX::processHdr(q15_t sample)
|
||||
serial.writeP25Hdr(frame, P25_HDR_FRAME_LENGTH_BYTES + 1U);
|
||||
}
|
||||
break;
|
||||
case P25_DUID_PDU: {
|
||||
calculateLevels(m_hdrSyncPtr, P25_PDU_HDR_FRAME_LENGTH_SYMBOLS);
|
||||
|
||||
DEBUG4("P25RX: sync found in PDU pos/centre/threshold", m_hdrSyncPtr, m_centreVal, m_thresholdVal);
|
||||
|
||||
uint8_t frame[P25_PDU_HDR_FRAME_LENGTH_BYTES + 1U];
|
||||
samplesToBits(m_hdrSyncPtr, P25_PDU_HDR_FRAME_LENGTH_SYMBOLS, frame, 8U, m_centreVal, m_thresholdVal);
|
||||
|
||||
frame[0U] = 0x01U;
|
||||
serial.writeP25Hdr(frame, P25_PDU_HDR_FRAME_LENGTH_BYTES + 1U);
|
||||
}
|
||||
break;
|
||||
case P25_DUID_TSDU: {
|
||||
case P25_DUID_TSDU: {
|
||||
calculateLevels(m_hdrStartPtr, P25_TSDU_FRAME_LENGTH_SYMBOLS);
|
||||
|
||||
DEBUG4("P25RX: sync found in TSDU pos/centre/threshold", m_hdrSyncPtr, m_centreVal, m_thresholdVal);
|
||||
|
||||
@@ -43,7 +43,7 @@ const q15_t P25_LEVELD = -1260;
|
||||
const uint8_t P25_START_SYNC = 0x77U;
|
||||
|
||||
CP25TX::CP25TX() :
|
||||
m_buffer(TX_BUFFER_LEN),
|
||||
m_buffer(4000U),
|
||||
m_modFilter(),
|
||||
m_lpFilter(),
|
||||
m_modState(),
|
||||
|
||||
+7
-11
@@ -57,9 +57,11 @@ void CPOCSAGTX::process()
|
||||
|
||||
if (m_poLen == 0U) {
|
||||
if (!m_tx) {
|
||||
DEBUG1("MMDVM, sending preamble");
|
||||
for (uint16_t i = 0U; i < m_txDelay; i++)
|
||||
m_poBuffer[m_poLen++] = POCSAG_SYNC;
|
||||
} else {
|
||||
DEBUG2("MMDVM, sending", m_buffer.get());
|
||||
for (uint8_t i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++) {
|
||||
uint8_t c = m_buffer.get();
|
||||
m_poBuffer[m_poLen++] = c;
|
||||
@@ -87,24 +89,18 @@ void CPOCSAGTX::process()
|
||||
}
|
||||
}
|
||||
|
||||
bool CPOCSAGTX::busy()
|
||||
{
|
||||
if (m_poLen > 0U || m_buffer.getData() > 0U)
|
||||
return true;
|
||||
else
|
||||
return false;
|
||||
}
|
||||
|
||||
uint8_t CPOCSAGTX::writeData(const uint8_t* data, uint8_t length)
|
||||
{
|
||||
if (length != POCSAG_FRAME_LENGTH_BYTES)
|
||||
if (length != (POCSAG_FRAME_LENGTH_BYTES + 1U))
|
||||
return 4U;
|
||||
|
||||
uint16_t space = m_buffer.getSpace();
|
||||
if (space < POCSAG_FRAME_LENGTH_BYTES)
|
||||
if (space < (POCSAG_FRAME_LENGTH_BYTES + 1U))
|
||||
return 5U;
|
||||
|
||||
for (uint8_t i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++)
|
||||
DEBUG2("MMDVM, queueing", data[0U]);
|
||||
|
||||
for (uint8_t i = 0U; i < (POCSAG_FRAME_LENGTH_BYTES + 1U); i++)
|
||||
m_buffer.put(data[i]);
|
||||
|
||||
return 0U;
|
||||
|
||||
+3
-5
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2015-2019 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -29,16 +29,12 @@ public:
|
||||
|
||||
uint8_t writeData(const uint8_t* data, uint8_t length);
|
||||
|
||||
void writeByte(uint8_t c);
|
||||
|
||||
void process();
|
||||
|
||||
void setTXDelay(uint8_t delay);
|
||||
|
||||
uint8_t getSpace() const;
|
||||
|
||||
bool busy();
|
||||
|
||||
private:
|
||||
CSerialRB m_buffer;
|
||||
arm_fir_instance_q15 m_modFilter;
|
||||
@@ -47,6 +43,8 @@ private:
|
||||
uint16_t m_poLen;
|
||||
uint16_t m_poPtr;
|
||||
uint16_t m_txDelay;
|
||||
|
||||
void writeByte(uint8_t c);
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
+1
-4
@@ -21,10 +21,7 @@
|
||||
|
||||
#include "SerialPort.h"
|
||||
|
||||
#if defined(VK6MST_TEENSY_PI3_SHIELD_I2C)
|
||||
//it will load I2CTeensy.cpp
|
||||
|
||||
#elif defined(__SAM3X8E__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
|
||||
#if defined(__SAM3X8E__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
|
||||
|
||||
void CSerialPort::beginInt(uint8_t n, int speed)
|
||||
{
|
||||
|
||||
+7
-17
@@ -71,7 +71,6 @@ const uint8_t MMDVM_NAK = 0x7FU;
|
||||
const uint8_t MMDVM_SERIAL = 0x80U;
|
||||
|
||||
const uint8_t MMDVM_TRANSPARENT = 0x90U;
|
||||
const uint8_t MMDVM_QSO_INFO = 0x91U;
|
||||
|
||||
const uint8_t MMDVM_DEBUG1 = 0xF1U;
|
||||
const uint8_t MMDVM_DEBUG2 = 0xF2U;
|
||||
@@ -91,20 +90,14 @@ const uint8_t MMDVM_DEBUG5 = 0xF5U;
|
||||
#define TCXO "NO TCXO"
|
||||
#endif
|
||||
|
||||
#if defined(STM32F4_RPT_HAT_TGO)
|
||||
#define HW_TYPE "MMDVM_RPT_HAT_TGO"
|
||||
#else
|
||||
#define HW_TYPE "MMDVM"
|
||||
#endif
|
||||
|
||||
#define DESCRIPTION "20180723 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG)"
|
||||
#define DESCRIPTION "MMDVM 20180327 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG)"
|
||||
|
||||
#if defined(GITVERSION)
|
||||
#define concat(h, a, b, c) h " " a " " b " GitID #" c ""
|
||||
const char HARDWARE[] = concat(HW_TYPE, DESCRIPTION, TCXO, GITVERSION);
|
||||
#define concat(a, b, c) a " " b " GitID #" c ""
|
||||
const char HARDWARE[] = concat(DESCRIPTION, TCXO, GITVERSION);
|
||||
#else
|
||||
#define concat(h, a, b, c, d) h " " a " " b " (Build: " c " " d ")"
|
||||
const char HARDWARE[] = concat(HW_TYPE, DESCRIPTION, TCXO, __TIME__, __DATE__);
|
||||
#define concat(a, b, c, d) a " " b " (Build: " c " " d ")"
|
||||
const char HARDWARE[] = concat(DESCRIPTION, TCXO, __TIME__, __DATE__);
|
||||
#endif
|
||||
|
||||
const uint8_t PROTOCOL_VERSION = 1U;
|
||||
@@ -280,7 +273,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
|
||||
|
||||
MMDVM_STATE modemState = MMDVM_STATE(data[3U]);
|
||||
|
||||
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K && modemState != STATE_POCSAGCAL)
|
||||
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K)
|
||||
return 4U;
|
||||
if (modemState == STATE_DSTAR && !dstarEnable)
|
||||
return 4U;
|
||||
@@ -360,7 +353,7 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
|
||||
if (modemState == m_modemState)
|
||||
return 0U;
|
||||
|
||||
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K && modemState != STATE_POCSAGCAL)
|
||||
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K)
|
||||
return 4U;
|
||||
if (modemState == STATE_DSTAR && !m_dstarEnable)
|
||||
return 4U;
|
||||
@@ -617,8 +610,6 @@ void CSerialPort::process()
|
||||
err = calP25.write(m_buffer + 3U, m_len - 3U);
|
||||
if (m_modemState == STATE_NXDNCAL1K)
|
||||
err = calNXDN.write(m_buffer + 3U, m_len - 3U);
|
||||
if (m_modemState == STATE_POCSAGCAL)
|
||||
err = calPOCSAG.write(m_buffer + 3U, m_len - 3U);
|
||||
if (err == 0U) {
|
||||
sendACK();
|
||||
} else {
|
||||
@@ -823,7 +814,6 @@ void CSerialPort::process()
|
||||
break;
|
||||
|
||||
case MMDVM_TRANSPARENT:
|
||||
case MMDVM_QSO_INFO:
|
||||
// Do nothing on the MMDVM.
|
||||
break;
|
||||
|
||||
|
||||
+1
-1
@@ -32,7 +32,7 @@ Boston, MA 02110-1301, USA.
|
||||
#include <Arduino.h>
|
||||
#endif
|
||||
|
||||
const uint16_t SERIAL_RINGBUFFER_SIZE = 370U;
|
||||
const uint16_t SERIAL_RINGBUFFER_SIZE = 2000U;
|
||||
|
||||
class CSerialRB {
|
||||
public:
|
||||
|
||||
+14
-14
@@ -28,13 +28,13 @@ Pin definitions:
|
||||
|
||||
- Host communication:
|
||||
USART1 - TXD PA9 - RXD PA10 (MMDVM-Pi board, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board)
|
||||
USART2 - TXD PA2 - RXD PA3 (Nucleo64 F446RE board, Morpho or Arduino header, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
|
||||
USART2 - TXD PA2 - RXD PA3 (Nucleo64 F446RE board, Morpho or Arduino header)
|
||||
USART3 - TXD PC10 - RXD PC11 (Discovery board)
|
||||
USART3 - TXD PD8 - RXD PD9 (Nucleo144 F767ZI board)
|
||||
|
||||
- Serial repeater:
|
||||
USART1 - TXD PA9 - RXD PA10 (Nucleo with Arduino header)
|
||||
UART5 - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
|
||||
UART5 - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI)
|
||||
*/
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F7XX)
|
||||
@@ -50,7 +50,7 @@ extern "C" {
|
||||
}
|
||||
|
||||
/* ************* USART1 ***************** */
|
||||
#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
|
||||
#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
|
||||
|
||||
volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
|
||||
@@ -241,7 +241,7 @@ void WriteUSART1(const uint8_t* data, uint16_t length)
|
||||
#endif
|
||||
|
||||
/* ************* USART2 ***************** */
|
||||
#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
#if defined(STM32F4_NUCLEO)
|
||||
|
||||
volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
|
||||
@@ -841,9 +841,9 @@ void CSerialPort::beginInt(uint8_t n, int speed)
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
InitUSART3(speed);
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
|
||||
InitUSART1(speed);
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
InitUSART2(speed);
|
||||
#endif
|
||||
break;
|
||||
@@ -865,9 +865,9 @@ int CSerialPort::availableInt(uint8_t n)
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
return AvailUSART3();
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
|
||||
return AvailUSART1();
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
return AvailUSART2();
|
||||
#endif
|
||||
case 3U:
|
||||
@@ -887,9 +887,9 @@ int CSerialPort::availableForWriteInt(uint8_t n)
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
return AvailForWriteUSART3();
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
|
||||
return AvailForWriteUSART1();
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
return AvailForWriteUSART2();
|
||||
#endif
|
||||
case 3U:
|
||||
@@ -909,9 +909,9 @@ uint8_t CSerialPort::readInt(uint8_t n)
|
||||
case 1U:
|
||||
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
|
||||
return ReadUSART3();
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
|
||||
return ReadUSART1();
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
return ReadUSART2();
|
||||
#endif
|
||||
case 3U:
|
||||
@@ -933,11 +933,11 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
|
||||
WriteUSART3(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush3();
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
|
||||
WriteUSART1(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush1();
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
WriteUSART2(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush2();
|
||||
|
||||
@@ -44,7 +44,7 @@ const uint8_t YSF_END_SYNC = 0xFFU;
|
||||
const uint8_t YSF_HANG = 0x00U;
|
||||
|
||||
CYSFTX::CYSFTX() :
|
||||
m_buffer(TX_BUFFER_LEN),
|
||||
m_buffer(4000U),
|
||||
m_modFilter(),
|
||||
m_modState(),
|
||||
m_poBuffer(),
|
||||
|
||||
+1
-1
@@ -83,7 +83,7 @@ EOF
|
||||
"3") sed -e 's/\/\/ #define EXTERNAL_OSC 14400000/#define EXTERNAL_OSC 14400000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "14.400 MHz clock enabled";;
|
||||
"4") sed -e 's/\/\/ #define EXTERNAL_OSC 19200000/#define EXTERNAL_OSC 19200000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "19.200 MHz clock enabled";;
|
||||
"5") sed -e 's/\/\/ #define USE_COS_AS_LOCKOUT /#define USE_COS_AS_LOCKOUT/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "COS as Lockout enabled";;
|
||||
"6") sed -e 's/\/\/ #define MODE_LEDS/#define MODE_LEDS/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Mode pins enabled";;
|
||||
"6") sed -e 's/\/\/ #define MODE_PINS/#define MODE_PINS/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Mode pins enabled";;
|
||||
"7") sed -e 's/\/\/ #define ARDUINO_DUE_PAPA/#define ARDUINO_DUE_PAPA/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for the PAPA board enabled";;
|
||||
"8") sed -e 's/\/\/ #define ARDUINO_DUE_ZUM_V10/#define ARDUINO_DUE_ZUM_V10/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for ZUM V1.0 and V1.0.1 boards enabled";;
|
||||
"9") sed -e 's/\/\/ #define ARDUINO_DUE_NTH/#define ARDUINO_DUE_NTH/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for SP8NTH board enabled";;
|
||||
|
||||
Reference in New Issue
Block a user