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merge into: Superminaren/MMDVM:boxcar
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Superminaren/MMDVM:master Superminaren/MMDVM:mqtt Superminaren/MMDVM:PlatformIO Superminaren/MMDVM:dPMR Superminaren/MMDVM:ll Superminaren/MMDVM:M17_AX25_FM Superminaren/MMDVM:EOF Superminaren/MMDVM:I2C Superminaren/MMDVM:dstar_correlator_fm Superminaren/MMDVM:M17 Superminaren/MMDVM:AX25_FM Superminaren/MMDVM:AX25 Superminaren/MMDVM:FM_Ext Superminaren/MMDVM:FM Superminaren/MMDVM:boxcar Superminaren/MMDVM:boxcar_dstar_correlator Superminaren/MMDVM:boxcar_dstar_correlator_fm Superminaren/MMDVM:dstar_correlator Superminaren/MMDVM:boxcar_fm Superminaren/MMDVM:TXHang Superminaren/MMDVM:revert-241-FM Superminaren/MMDVM:revert-229-FM Superminaren/MMDVM:pocsagcal Superminaren/MMDVM:48kHz Superminaren/MMDVM:POCSAGmodePins Superminaren/MMDVM:pocsag Superminaren/MMDVM:pocsag_test Superminaren/MMDVM:nxdn Superminaren/MMDVM:boxcar_dstar_correlator_48k Superminaren/MMDVM:c4fmdemod
Superminaren/MMDVM:v1.0
..
pull from: Superminaren/MMDVM:pocsag_test
Branches Tags
Superminaren/MMDVM:master Superminaren/MMDVM:mqtt Superminaren/MMDVM:PlatformIO Superminaren/MMDVM:dPMR Superminaren/MMDVM:ll Superminaren/MMDVM:M17_AX25_FM Superminaren/MMDVM:EOF Superminaren/MMDVM:I2C Superminaren/MMDVM:dstar_correlator_fm Superminaren/MMDVM:M17 Superminaren/MMDVM:AX25_FM Superminaren/MMDVM:AX25 Superminaren/MMDVM:FM_Ext Superminaren/MMDVM:FM Superminaren/MMDVM:boxcar Superminaren/MMDVM:boxcar_dstar_correlator Superminaren/MMDVM:boxcar_dstar_correlator_fm Superminaren/MMDVM:dstar_correlator Superminaren/MMDVM:boxcar_fm Superminaren/MMDVM:TXHang Superminaren/MMDVM:revert-241-FM Superminaren/MMDVM:revert-229-FM Superminaren/MMDVM:pocsagcal Superminaren/MMDVM:48kHz Superminaren/MMDVM:POCSAGmodePins Superminaren/MMDVM:pocsag Superminaren/MMDVM:pocsag_test Superminaren/MMDVM:nxdn Superminaren/MMDVM:boxcar_dstar_correlator_48k Superminaren/MMDVM:c4fmdemod
Superminaren/MMDVM:v1.0
2 Commits
boxcar .. pocsag_test
Author SHA1 Message Date
Jonathan Naylor 07e18ffcfb Merge branch 'pocsag' into pocsag_test 2018-07-04 18:41:35 +01:00
Jonathan Naylor 0092d6d9c3 Debug version of the POCSAG TX. 2018-06-27 20:56:22 +01:00
73 changed files with 1551 additions and 5101 deletions
Expand all files Collapse all files
.gitmodules
-3
View File
@@ -4,6 +4,3 @@
[submodule "STM32F7XX_Lib"] [submodule "STM32F7XX_Lib"]
path = STM32F7XX_Lib path = STM32F7XX_Lib
url = https://github.com/juribeparada/STM32F7XX_Lib.git url = https://github.com/juribeparada/STM32F7XX_Lib.git
[submodule "STM32F10X_Lib"]
path = STM32F10X_Lib
url = https://github.com/shawnchain/STM32F10X_Lib.git
CWIdTX.cpp
+1 -1
View File
@@ -77,7 +77,6 @@ const struct {
{',', 0xEEAEE000U, 22U}, {',', 0xEEAEE000U, 22U},
{'-', 0xEAAE0000U, 18U}, {'-', 0xEAAE0000U, 18U},
{'=', 0xEAB80000U, 16U}, {'=', 0xEAB80000U, 16U},
{'.', 0xBAEB8000U, 20U},
{' ', 0x00000000U, 4U}, {' ', 0x00000000U, 4U},
{0U, 0x00000000U, 0U} {0U, 0x00000000U, 0U}
}; };
@@ -171,3 +170,4 @@ void CCWIdTX::reset()
m_poPtr = 0U; m_poPtr = 0U;
m_n = 0U; m_n = 0U;
} }
CalFM.cpp
-127
View File
@@ -1,127 +0,0 @@
/*
* Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
* Copyright (C) 2020 by Phil Taylor M0VSE
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "CalFM.h"
const struct TONE_TABLE {
uint16_t frequency;
uint16_t length;
q31_t increment;
} TONE_TABLE_DATA[] = {
{2495U, 10U, 223248821},
{2079U, 12U, 186025772},
{1633U, 15U, 146118367},
{1247U, 19U, 111579672},
{1039U, 23U, 93012886},
{956U, 25U, 85541432}};
const uint8_t TONE_TABLE_DATA_LEN = 6U;
CCalFM::CCalFM() :
m_frequency(0),
m_length(0),
m_tone(NULL),
m_level(128 * 12),
m_transmit(false),
m_audioSeq(0),
m_lastState(STATE_IDLE)
{
}
void CCalFM::process()
{
const TONE_TABLE* entry = NULL;
if (m_modemState!=m_lastState)
{
switch (m_modemState) {
case STATE_FMCAL10K:
m_frequency = 956U;
break;
case STATE_FMCAL12K:
m_frequency = 1039U;
break;
case STATE_FMCAL15K:
m_frequency = 1247U;
break;
case STATE_FMCAL20K:
m_frequency = 1633U;
break;
case STATE_FMCAL25K:
m_frequency = 2079U;
break;
case STATE_FMCAL30K:
m_frequency = 2495U;
break;
default:
m_frequency = 0U;
break;
}
for (uint8_t i = 0U; i < TONE_TABLE_DATA_LEN; i++) {
if (TONE_TABLE_DATA[i].frequency == m_frequency) {
entry = TONE_TABLE_DATA + i;
break;
}
}
if (entry == NULL)
return;
m_length = entry->length;
delete[] m_tone;
m_tone = new q15_t[m_length];
q31_t arg = 0;
for (uint16_t i = 0U; i < m_length; i++) {
q63_t value = ::arm_sin_q31(arg) * q63_t(m_level);
m_tone[i] = q15_t(__SSAT((value >> 31), 16));
arg += entry->increment;
}
m_lastState=m_modemState;
}
if (m_transmit)
{
uint16_t space = io.getSpace();
while (space > m_length)
{
io.write(m_modemState,m_tone,m_length);
space -= m_length;
}
}
}
uint8_t CCalFM::write(const uint8_t* data, uint8_t length)
{
if (length != 1U)
return 4U;
m_transmit = data[0U] == 1U;
return 0U;
}
CalFM.h
-51
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@@ -1,51 +0,0 @@
/*
* Copyright (C) 2009-2015 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML
* Copyright (C) 2020 by Phil Taylor M0VSE
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(CALFM_H)
#define CALFM_H
#include "Config.h"
class CCalFM {
public:
CCalFM();
void process();
void fm10kcal();
void fm12k5cal();
void fm15kcal();
void fm20kcal();
void fm25kcal();
void fm30kcal();
uint8_t write(const uint8_t* data, uint8_t length);
private:
uint16_t m_frequency;
uint16_t m_length;
q15_t* m_tone;
q15_t m_level;
bool m_transmit;
uint8_t m_audioSeq;
uint8_t m_lastState;
};
#endif
CalPOCSAG.cpp
-49
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@@ -1,49 +0,0 @@
/*
* Copyright (C) 2019 by Florian Wolters DF2ET
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "CalPOCSAG.h"
CCalPOCSAG::CCalPOCSAG() :
m_state(POCSAGCAL_IDLE)
{
}
void CCalPOCSAG::process()
{
if (m_state == POCSAGCAL_IDLE)
return;
uint16_t space = io.getSpace();
if (space <= 165U)
return;
pocsagTX.writeByte(0xAAU);
}
uint8_t CCalPOCSAG::write(const uint8_t* data, uint8_t length)
{
if (length != 1U)
return 4U;
m_state = data[0U] == 1U ? POCSAGCAL_TX : POCSAGCAL_IDLE;
return 0U;
}
CalPOCSAG.h
-41
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@@ -1,41 +0,0 @@
/*
* Copyright (C) 2019 by Florian Wolters DF2ET
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(CALPOCSAG_H)
#define CALPOCSAG_H
#include "Config.h"
enum POCSAGCAL {
POCSAGCAL_IDLE,
POCSAGCAL_TX
};
class CCalPOCSAG {
public:
CCalPOCSAG();
void process();
uint8_t write(const uint8_t* data, uint8_t length);
private:
POCSAGCAL m_state;
};
#endif
Config.h
+9 -16
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX * Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@@ -38,19 +38,17 @@
// Allow the use of the COS line to lockout the modem // Allow the use of the COS line to lockout the modem
// #define USE_COS_AS_LOCKOUT // #define USE_COS_AS_LOCKOUT
// Use pins to output the current mode via LEDs // Use pins to output the current mode
// #define MODE_LEDS // #define MODE_PINS
// For the original Arduino Due pin layout // For the original Arduino Due pin layout
// #define ARDUINO_DUE_PAPA // #define ARDUINO_DUE_PAPA
#if defined(STM32F1)
// For the SQ6POG board
#define STM32F1_POG
#else
// For the ZUM V1.0 and V1.0.1 boards pin layout // For the ZUM V1.0 and V1.0.1 boards pin layout
#define ARDUINO_DUE_ZUM_V10 #define ARDUINO_DUE_ZUM_V10
#endif
// For the SQ6POG board
// #define STM32F1_POG
// For the SP8NTH board // For the SP8NTH board
// #define ARDUINO_DUE_NTH // #define ARDUINO_DUE_NTH
@@ -59,11 +57,8 @@
// #define STM32F4_NUCLEO_MORPHO_HEADER // #define STM32F4_NUCLEO_MORPHO_HEADER
// #define STM32F4_NUCLEO_ARDUINO_HEADER // #define STM32F4_NUCLEO_ARDUINO_HEADER
// Use separate mode pins to switch external channel/filters/bandwidth for example // Use separate mode pins to switch external filters/bandwidth for example
// #define MODE_PINS // #define STM32F4_NUCLEO_MODE_PINS
// For the VK6MST Pi3 Shield communicating over i2c. i2c address & speed defined in i2cTeensy.cpp
// #define VK6MST_TEENSY_PI3_SHIELD_I2C
// Pass RSSI information to the host // Pass RSSI information to the host
// #define SEND_RSSI_DATA // #define SEND_RSSI_DATA
@@ -84,7 +79,5 @@
// Use the D-Star and DMR LEDs for POCSAG // Use the D-Star and DMR LEDs for POCSAG
// #define USE_ALTERNATE_POCSAG_LEDS // #define USE_ALTERNATE_POCSAG_LEDS
// Use the D-Star and YSF LEDs for FM
#define USE_ALTERNATE_FM_LEDS
#endif #endif
DStarTX.cpp
+1 -1
View File
@@ -388,7 +388,7 @@ void CDStarTX::txHeader(const uint8_t* in, uint8_t* out) const
if (i < 660U) { if (i < 660U) {
if (d & 0x08U) if (d & 0x08U)
out[INTERLEAVE_TABLE_TX[i * 2U]] |= (0x01U << INTERLEAVE_TABLE_TX[i * 2U + 1U]); out[INTERLEAVE_TABLE_TX[i * 2U]] |= (0x01U << INTERLEAVE_TABLE_TX[i * 2U + 1U]);
i++; i++;
if (d & 0x04U) if (d & 0x04U)
out[INTERLEAVE_TABLE_TX[i * 2U]] |= (0x01U << INTERLEAVE_TABLE_TX[i * 2U + 1U]); out[INTERLEAVE_TABLE_TX[i * 2U]] |= (0x01U << INTERLEAVE_TABLE_TX[i * 2U + 1U]);
FM.cpp
-490
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@@ -1,490 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "FM.h"
CFM::CFM() :
m_callsign(),
m_rfAck(),
m_ctcssRX(),
m_ctcssTX(),
m_timeoutTone(),
m_state(FS_LISTENING),
m_callsignAtStart(false),
m_callsignAtEnd(false),
m_callsignAtLatch(false),
m_callsignTimer(),
m_timeoutTimer(),
m_holdoffTimer(),
m_kerchunkTimer(),
m_ackMinTimer(),
m_ackDelayTimer(),
m_hangTimer(),
m_filterStage1( 724, 1448, 724, 32768, -37895, 21352),//3rd order Cheby Filter 300 to 2700Hz, 0.2dB passband ripple, sampling rate 24kHz
m_filterStage2(32768, 0,-32768, 32768, -50339, 19052),
m_filterStage3(32768, -65536, 32768, 32768, -64075, 31460),
m_blanking(),
m_useCOS(true),
m_cosInvert(false),
m_rfAudioBoost(1U),
m_downsampler(128U),//Size might need adjustement
m_rxLevel(1),
m_inputRB(4800U), // 200ms of audio
m_outputRB(2400U) // 100ms of audio
{
insertDelay(100U);
}
void CFM::samples(bool cos, const q15_t* samples, uint8_t length)
{
if (m_useCOS) {
if (m_cosInvert)
cos = !cos;
} else {
cos = true;
}
clock(length);
uint8_t i = 0U;
for (; i < length; i++) {
// ARMv7-M has hardware integer division
q15_t currentSample = q15_t((q31_t(samples[i]) << 8) / m_rxLevel);
uint8_t ctcssState = m_ctcssRX.process(currentSample);
if (!m_useCOS) {
// Delay the audio by 100ms to better match the CTCSS detector output
m_inputRB.put(currentSample);
m_inputRB.get(currentSample);
}
if (CTCSS_NOT_READY(ctcssState) && m_modemState != STATE_FM) {
//Not enough samples to determine if you have CTCSS, just carry on
continue;
} else if (CTCSS_READY(ctcssState) && m_modemState != STATE_FM) {
//we had enough samples for CTCSS and we are in some other mode than FM
bool validCTCSS = CTCSS_VALID(ctcssState);
stateMachine(validCTCSS && cos);
if (m_modemState != STATE_FM)
continue;
} else if (CTCSS_READY(ctcssState) && m_modemState == STATE_FM) {
//We had enough samples for CTCSS and we are in FM mode, trigger the state machine
bool validCTCSS = CTCSS_VALID(ctcssState);
stateMachine(validCTCSS && cos);
if (m_modemState != STATE_FM)
break;
} else if (CTCSS_NOT_READY(ctcssState) && m_modemState == STATE_FM && i == length - 1) {
//Not enough samples for CTCSS but we already are in FM, trigger the state machine
//but do not trigger the state machine on every single sample, save CPU!
bool validCTCSS = CTCSS_VALID(ctcssState);
stateMachine(validCTCSS && cos);
}
// Only let audio through when relaying audio
if (m_state == FS_RELAYING || m_state == FS_KERCHUNK) {
// m_downsampler.addSample(currentSample);
currentSample = m_blanking.process(currentSample);
currentSample *= m_rfAudioBoost;
} else {
currentSample = 0;
}
if (!m_callsign.isRunning())
currentSample += m_rfAck.getHighAudio();
if (!m_rfAck.isRunning()) {
if (m_state == FS_LISTENING)
currentSample += m_callsign.getHighAudio();
else
currentSample += m_callsign.getLowAudio();
}
if (!m_callsign.isRunning() && !m_rfAck.isRunning())
currentSample += m_timeoutTone.getAudio();
currentSample = m_filterStage3.filter(m_filterStage2.filter(m_filterStage1.filter(currentSample)));
currentSample += m_ctcssTX.getAudio();
if (m_modemState == STATE_FM)
m_outputRB.put(currentSample);
}
}
void CFM::process()
{
q15_t sample;
while (io.getSpace() >= 3U && m_outputRB.get(sample))
io.write(STATE_FM, &sample, 1U);
}
void CFM::reset()
{
m_state = FS_LISTENING;
m_callsignTimer.stop();
m_timeoutTimer.stop();
m_kerchunkTimer.stop();
m_ackMinTimer.stop();
m_ackDelayTimer.stop();
m_hangTimer.stop();
m_ctcssRX.reset();
m_rfAck.stop();
m_callsign.stop();
m_timeoutTone.stop();
m_outputRB.reset();
}
uint8_t CFM::setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd, bool callsignAtLatch)
{
m_callsignAtStart = callsignAtStart;
m_callsignAtEnd = callsignAtEnd;
m_callsignAtLatch = callsignAtLatch;
uint16_t holdoffTime = holdoff * 60U;
uint16_t callsignTime = time * 60U;
m_holdoffTimer.setTimeout(holdoffTime, 0U);
m_callsignTimer.setTimeout(callsignTime, 0U);
if (holdoffTime > 0U)
m_holdoffTimer.start();
return m_callsign.setParams(callsign, speed, frequency, highLevel, lowLevel);
}
uint8_t CFM::setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_t minTime, uint16_t delay, uint8_t level)
{
m_ackDelayTimer.setTimeout(0U, delay);
if (minTime > 0U)
m_ackMinTimer.setTimeout(minTime, delay);
return m_rfAck.setParams(rfAck, speed, frequency, level, level);
}
uint8_t CFM::setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel)
{
m_useCOS = useCOS;
m_cosInvert = cosInvert;
m_rfAudioBoost = q15_t(rfAudioBoost);
m_timeoutTimer.setTimeout(timeout, 0U);
m_kerchunkTimer.setTimeout(kerchunkTime, 0U);
m_hangTimer.setTimeout(hangTime, 0U);
m_timeoutTone.setParams(timeoutLevel);
m_blanking.setParams(maxDev, timeoutLevel);
m_rxLevel = rxLevel; //q15_t(255)/q15_t(rxLevel >> 1);
uint8_t ret = m_ctcssRX.setParams(ctcssFrequency, ctcssHighThreshold, ctcssLowThreshold);
if (ret != 0U)
return ret;
return m_ctcssTX.setParams(ctcssFrequency, ctcssLevel);
}
void CFM::stateMachine(bool validSignal)
{
switch (m_state) {
case FS_LISTENING:
listeningState(validSignal);
break;
case FS_KERCHUNK:
kerchunkState(validSignal);
break;
case FS_RELAYING:
relayingState(validSignal);
break;
case FS_RELAYING_WAIT:
relayingWaitState(validSignal);
break;
case FS_TIMEOUT:
timeoutState(validSignal);
break;
case FS_TIMEOUT_WAIT:
timeoutWaitState(validSignal);
break;
case FS_HANG:
hangState(validSignal);
break;
default:
break;
}
if (m_state == FS_LISTENING && m_modemState == STATE_FM) {
if (!m_callsign.isWanted() && !m_rfAck.isWanted()) {
DEBUG1("Change to STATE_IDLE");
m_modemState = STATE_IDLE;
m_callsignTimer.stop();
m_timeoutTimer.stop();
m_kerchunkTimer.stop();
m_ackMinTimer.stop();
m_ackDelayTimer.stop();
m_hangTimer.stop();
}
}
}
void CFM::clock(uint8_t length)
{
m_callsignTimer.clock(length);
m_timeoutTimer.clock(length);
m_holdoffTimer.clock(length);
m_kerchunkTimer.clock(length);
m_ackMinTimer.clock(length);
m_ackDelayTimer.clock(length);
m_hangTimer.clock(length);
}
void CFM::listeningState(bool validSignal)
{
if (validSignal) {
if (m_kerchunkTimer.getTimeout() > 0U) {
DEBUG1("State to KERCHUNK");
m_state = FS_KERCHUNK;
m_kerchunkTimer.start();
if (m_callsignAtStart && !m_callsignAtLatch)
sendCallsign();
} else {
DEBUG1("State to RELAYING");
m_state = FS_RELAYING;
if (m_callsignAtStart)
sendCallsign();
}
insertSilence(50U);
beginRelaying();
m_callsignTimer.start();
io.setDecode(true);
io.setADCDetection(true);
DEBUG1("Change to STATE_FM");
m_modemState = STATE_FM;
}
}
void CFM::kerchunkState(bool validSignal)
{
if (validSignal) {
if (m_kerchunkTimer.hasExpired()) {
DEBUG1("State to RELAYING");
m_state = FS_RELAYING;
m_kerchunkTimer.stop();
if (m_callsignAtStart && m_callsignAtLatch) {
sendCallsign();
m_callsignTimer.start();
}
}
} else {
io.setDecode(false);
io.setADCDetection(false);
DEBUG1("State to LISTENING");
m_state = FS_LISTENING;
m_kerchunkTimer.stop();
m_timeoutTimer.stop();
m_ackMinTimer.stop();
m_callsignTimer.stop();
}
}
void CFM::relayingState(bool validSignal)
{
if (validSignal) {
if (m_timeoutTimer.isRunning() && m_timeoutTimer.hasExpired()) {
DEBUG1("State to TIMEOUT");
m_state = FS_TIMEOUT;
m_ackMinTimer.stop();
m_timeoutTimer.stop();
m_timeoutTone.start();
}
} else {
io.setDecode(false);
io.setADCDetection(false);
DEBUG1("State to RELAYING_WAIT");
m_state = FS_RELAYING_WAIT;
m_ackDelayTimer.start();
}
if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
sendCallsign();
m_callsignTimer.start();
}
}
void CFM::relayingWaitState(bool validSignal)
{
if (validSignal) {
io.setDecode(true);
io.setADCDetection(true);
DEBUG1("State to RELAYING");
m_state = FS_RELAYING;
m_ackDelayTimer.stop();
} else {
if (m_ackDelayTimer.isRunning() && m_ackDelayTimer.hasExpired()) {
DEBUG1("State to HANG");
m_state = FS_HANG;
if (m_ackMinTimer.isRunning()) {
if (m_ackMinTimer.hasExpired()) {
DEBUG1("Send ack");
m_rfAck.start();
m_ackMinTimer.stop();
}
} else {
DEBUG1("Send ack");
m_rfAck.start();
m_ackMinTimer.stop();
}
m_ackDelayTimer.stop();
m_timeoutTimer.stop();
m_hangTimer.start();
}
}
if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
sendCallsign();
m_callsignTimer.start();
}
}
void CFM::hangState(bool validSignal)
{
if (validSignal) {
io.setDecode(true);
io.setADCDetection(true);
DEBUG1("State to RELAYING");
m_state = FS_RELAYING;
DEBUG1("Stop ack");
m_rfAck.stop();
beginRelaying();
} else {
if (m_hangTimer.isRunning() && m_hangTimer.hasExpired()) {
DEBUG1("State to LISTENING");
m_state = FS_LISTENING;
m_hangTimer.stop();
if (m_callsignAtEnd)
sendCallsign();
m_callsignTimer.stop();
}
}
if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
sendCallsign();
m_callsignTimer.start();
}
}
void CFM::timeoutState(bool validSignal)
{
if (!validSignal) {
io.setDecode(false);
io.setADCDetection(false);
DEBUG1("State to TIMEOUT_WAIT");
m_state = FS_TIMEOUT_WAIT;
m_ackDelayTimer.start();
}
if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
sendCallsign();
m_callsignTimer.start();
}
}
void CFM::timeoutWaitState(bool validSignal)
{
if (validSignal) {
io.setDecode(true);
io.setADCDetection(true);
DEBUG1("State to TIMEOUT");
m_state = FS_TIMEOUT;
m_ackDelayTimer.stop();
} else {
if (m_ackDelayTimer.isRunning() && m_ackDelayTimer.hasExpired()) {
DEBUG1("State to HANG");
m_state = FS_HANG;
m_timeoutTone.stop();
DEBUG1("Send ack");
m_rfAck.start();
m_ackDelayTimer.stop();
m_ackMinTimer.stop();
m_timeoutTimer.stop();
m_hangTimer.start();
}
}
if (m_callsignTimer.isRunning() && m_callsignTimer.hasExpired()) {
sendCallsign();
m_callsignTimer.start();
}
}
void CFM::sendCallsign()
{
if (m_holdoffTimer.isRunning()) {
if (m_holdoffTimer.hasExpired()) {
DEBUG1("Send callsign");
m_callsign.start();
m_holdoffTimer.start();
}
} else {
DEBUG1("Send callsign");
m_callsign.start();
}
}
void CFM::beginRelaying()
{
m_timeoutTimer.start();
m_ackMinTimer.start();
}
void CFM::insertDelay(uint16_t ms)
{
uint32_t nSamples = ms * 24U;
for (uint32_t i = 0U; i < nSamples; i++)
m_inputRB.put(0);
}
void CFM::insertSilence(uint16_t ms)
{
uint32_t nSamples = ms * 24U;
for (uint32_t i = 0U; i < nSamples; i++)
m_outputRB.put(0);
}
FM.h
-108
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@@ -1,108 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(FM_H)
#define FM_H
#include "Config.h"
#include "FMBlanking.h"
#include "FMCTCSSRX.h"
#include "FMCTCSSTX.h"
#include "FMTimeout.h"
#include "FMKeyer.h"
#include "FMTimer.h"
#include "FMRB.h"
#include "FMDirectForm1.h"
#include "FMDownsampler.h"
enum FM_STATE {
FS_LISTENING,
FS_KERCHUNK,
FS_RELAYING,
FS_RELAYING_WAIT,
FS_TIMEOUT,
FS_TIMEOUT_WAIT,
FS_HANG
};
class CFM {
public:
CFM();
void samples(bool cos, const q15_t* samples, uint8_t length);
void process();
void reset();
uint8_t setCallsign(const char* callsign, uint8_t speed, uint16_t frequency, uint8_t time, uint8_t holdoff, uint8_t highLevel, uint8_t lowLevel, bool callsignAtStart, bool callsignAtEnd, bool callsignAtLatch);
uint8_t setAck(const char* rfAck, uint8_t speed, uint16_t frequency, uint8_t minTime, uint16_t delay, uint8_t level);
uint8_t setMisc(uint16_t timeout, uint8_t timeoutLevel, uint8_t ctcssFrequency, uint8_t ctcssHighThreshold, uint8_t ctcssLowThreshold, uint8_t ctcssLevel, uint8_t kerchunkTime, uint8_t hangTime, bool useCOS, bool cosInvert, uint8_t rfAudioBoost, uint8_t maxDev, uint8_t rxLevel);
private:
CFMKeyer m_callsign;
CFMKeyer m_rfAck;
CFMCTCSSRX m_ctcssRX;
CFMCTCSSTX m_ctcssTX;
CFMTimeout m_timeoutTone;
FM_STATE m_state;
bool m_callsignAtStart;
bool m_callsignAtEnd;
bool m_callsignAtLatch;
CFMTimer m_callsignTimer;
CFMTimer m_timeoutTimer;
CFMTimer m_holdoffTimer;
CFMTimer m_kerchunkTimer;
CFMTimer m_ackMinTimer;
CFMTimer m_ackDelayTimer;
CFMTimer m_hangTimer;
CFMDirectFormI m_filterStage1;
CFMDirectFormI m_filterStage2;
CFMDirectFormI m_filterStage3;
CFMBlanking m_blanking;
bool m_useCOS;
bool m_cosInvert;
q15_t m_rfAudioBoost;
CFMDownsampler m_downsampler;
q15_t m_rxLevel;
CFMRB m_inputRB;
CFMRB m_outputRB;
void stateMachine(bool validSignal);
void listeningState(bool validSignal);
void kerchunkState(bool validSignal);
void relayingState(bool validSignal);
void relayingWaitState(bool validSignal);
void timeoutState(bool validSignal);
void timeoutWaitState(bool validSignal);
void hangState(bool validSignal);
void clock(uint8_t length);
void sendCallsign();
void beginRelaying();
void insertDelay(uint16_t ms);
void insertSilence(uint16_t ms);
};
#endif
FMBlanking.cpp
-82
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@@ -1,82 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "FMBlanking.h"
// 2000 Hz sine wave at 24000 Hz sample rate
const q31_t TONE[] = {0, 16384, 28378, 32767, 28378, 16384, 0, -16383, -28377, -32767, -28377, -16383};
const uint8_t TONE_LEN = 12U;
const uint32_t BLEEP_LEN = 2400U; // 100ms
CFMBlanking::CFMBlanking() :
m_posValue(0),
m_negValue(0),
m_level(128 * 128),
m_running(false),
m_pos(0U),
m_n(0U)
{
}
void CFMBlanking::setParams(uint8_t value, uint8_t level)
{
m_posValue = q15_t(value * 128);
m_negValue = -m_posValue;
m_level = q15_t(level * 128);
}
q15_t CFMBlanking::process(q15_t sample)
{
if (m_posValue == 0)
return sample;
if (!m_running) {
if (sample >= m_posValue) {
m_running = true;
m_pos = 0U;
m_n = 0U;
} else if (sample <= m_negValue) {
m_running = true;
m_pos = 0U;
m_n = 0U;
}
}
if (!m_running)
return sample;
if (m_pos <= BLEEP_LEN) {
q31_t value = TONE[m_n++] * m_level;
sample = q15_t(__SSAT((value >> 15), 16));
if (m_n >= TONE_LEN)
m_n = 0U;
} else {
sample = 0;
}
m_pos++;
if (m_pos >= 12000U)
m_running = false;
return sample;
}
FMBlanking.h
-41
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@@ -1,41 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(FMBlanking_H)
#define FMBlanking_H
#include "Config.h"
class CFMBlanking {
public:
CFMBlanking();
void setParams(uint8_t value, uint8_t level);
q15_t process(q15_t sample);
private:
q15_t m_posValue;
q15_t m_negValue;
q15_t m_level;
bool m_running;
uint32_t m_pos;
uint8_t m_n;
};
#endif
FMCTCSSRX.cpp
-181
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@@ -1,181 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "FMCTCSSRX.h"
const struct RX_CTCSS_TABLE {
uint8_t frequency;
q63_t coeffDivTwo;
} RX_CTCSS_TABLE_DATA[] = {
{ 67U, 2147153298},
{ 69U, 2147130228},
{ 71U, 2147103212},
{ 74U, 2147076297},
{ 77U, 2147047330},
{ 79U, 2147016195},
{ 82U, 2146982775},
{ 85U, 2146946945},
{ 88U, 2146907275},
{ 91U, 2146867538},
{ 94U, 2146822298},
{ 97U, 2146785526},
{100U, 2146747759},
{103U, 2146695349},
{107U, 2146637984},
{110U, 2146578604},
{114U, 2146513835},
{118U, 2146445080},
{123U, 2146370355},
{127U, 2146291161},
{131U, 2146205372},
{136U, 2146112589},
{141U, 2146014479},
{146U, 2145910829},
{151U, 2145796971},
{156U, 2145676831},
{159U, 2145604646},
{162U, 2145547790},
{165U, 2145468230},
{167U, 2145409363},
{171U, 2145324517},
{173U, 2145261046},
{177U, 2145170643},
{179U, 2145102321},
{183U, 2145006080},
{186U, 2144932648},
{189U, 2144830280},
{192U, 2144748638},
{196U, 2144639788},
{199U, 2144555290},
{203U, 2144436713},
{206U, 2144346237},
{210U, 2144217348},
{218U, 2143983951},
{225U, 2143735870},
{229U, 2143622139},
{233U, 2143469001},
{241U, 2143182299},
{250U, 2142874683},
{254U, 2142733729}};
const uint8_t CTCSS_TABLE_DATA_LEN = 50U;
// 4Hz bandwidth
const uint16_t N = 24000U / 4U;
CFMCTCSSRX::CFMCTCSSRX() :
m_coeffDivTwo(0),
m_highThreshold(0),
m_lowThreshold(0),
m_count(0U),
m_q0(0),
m_q1(0),
m_result(CTS_NONE)
{
}
uint8_t CFMCTCSSRX::setParams(uint8_t frequency, uint8_t highThreshold, uint8_t lowThreshold)
{
m_coeffDivTwo = 0;
for (uint8_t i = 0U; i < CTCSS_TABLE_DATA_LEN; i++) {
if (RX_CTCSS_TABLE_DATA[i].frequency == frequency) {
m_coeffDivTwo = RX_CTCSS_TABLE_DATA[i].coeffDivTwo;
break;
}
}
if (m_coeffDivTwo == 0)
return 4U;
m_highThreshold = q31_t(highThreshold);
m_lowThreshold = q31_t(lowThreshold);
return 0U;
}
uint8_t CFMCTCSSRX::process(q15_t sample)
{
//get more dynamic into the decoder by multiplying the sample by 1.5
q31_t sample31 = q31_t(sample) + (q31_t(sample) >> 1);
m_result &= ~CTS_READY;
q31_t q2 = m_q1;
m_q1 = m_q0;
// Q31 multiplication, t3 = m_coeffDivTwo * 2 * m_q1
q63_t t1 = m_coeffDivTwo * m_q1;
q31_t t2 = __SSAT((t1 >> 31), 31);
q31_t t3 = t2 * 2;
// m_q0 = m_coeffDivTwo * m_q1 * 2 - q2 + sample
m_q0 = t3 - q2 + sample31;
m_count++;
if (m_count == N) {
// Q31 multiplication, t2 = m_q0 * m_q0
q63_t t1 = q63_t(m_q0) * q63_t(m_q0);
q31_t t2 = __SSAT((t1 >> 31), 31);
// Q31 multiplication, t4 = m_q0 * m_q0
q63_t t3 = q63_t(m_q1) * q63_t(m_q1);
q31_t t4 = __SSAT((t3 >> 31), 31);
// Q31 multiplication, t9 = m_q0 * m_q1 * m_coeffDivTwo * 2
q63_t t5 = q63_t(m_q0) * q63_t(m_q1);
q31_t t6 = __SSAT((t5 >> 31), 31);
q63_t t7 = t6 * m_coeffDivTwo;
q31_t t8 = __SSAT((t7 >> 31), 31);
q31_t t9 = t8 * 2;
// value = m_q0 * m_q0 + m_q1 * m_q1 - m_q0 * m_q1 * m_coeffDivTwo * 2
q31_t value = t2 + t4 - t9;
bool previousCTCSSValid = CTCSS_VALID(m_result);
q31_t threshold = m_highThreshold;
if (previousCTCSSValid)
threshold = m_lowThreshold;
m_result |= CTS_READY;
if (value >= threshold)
m_result |= CTS_VALID;
else
m_result &= ~CTS_VALID;
if (previousCTCSSValid != CTCSS_VALID(m_result))
DEBUG4("CTCSS Value / Threshold / Valid", value, threshold, CTCSS_VALID(m_result));
m_count = 0U;
m_q0 = 0;
m_q1 = 0;
}
return m_result;
}
void CFMCTCSSRX::reset()
{
m_q0 = 0;
m_q1 = 0;
m_result = CTS_NONE;
m_count = 0U;
}
FMCTCSSRX.h
-53
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@@ -1,53 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(FMCTCSSRX_H)
#define FMCTCSSRX_H
#include "Config.h"
const uint8_t CTS_NONE = 0U;
const uint8_t CTS_READY = 1U;
const uint8_t CTS_VALID = 2U;
#define CTCSS_READY(a) ((a & CTS_READY) != 0)
#define CTCSS_NOT_READY(a) ((a & CTS_READY) == 0)
#define CTCSS_VALID(a) ((a & CTS_VALID) != 0)
#define CTCSS_NOT_VALID(a) ((a & CTS_VALID) == 0)
class CFMCTCSSRX {
public:
CFMCTCSSRX();
uint8_t setParams(uint8_t frequency, uint8_t highThreshold, uint8_t lowThreshold);
uint8_t process(q15_t sample);
void reset();
private:
q63_t m_coeffDivTwo;
q31_t m_highThreshold;
q31_t m_lowThreshold;
uint16_t m_count;
q31_t m_q0;
q31_t m_q1;
uint8_t m_result;
};
#endif
FMCTCSSTX.cpp
-125
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@@ -1,125 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "FMCTCSSTX.h"
const struct TX_CTCSS_TABLE {
uint8_t frequency;
uint16_t length;
q31_t increment;
} TX_CTCSS_TABLE_DATA[] = {
{ 67U, 358U, 5995059},
{ 69U, 346U, 6200860},
{ 71U, 334U, 6433504},
{ 74U, 323U, 6657200},
{ 77U, 312U, 6889844},
{ 79U, 301U, 7131436},
{ 82U, 291U, 7381976},
{ 85U, 281U, 7641463},
{ 88U, 271U, 7918846},
{ 91U, 262U, 8187282},
{ 94U, 253U, 8482561},
{ 97U, 246U, 8715205},
{100U, 240U, 8947849},
{103U, 232U, 9261024},
{107U, 224U, 9592094},
{110U, 216U, 9923165},
{114U, 209U, 10272131},
{118U, 202U, 10630045},
{123U, 195U, 11005854},
{127U, 189U, 11390612},
{131U, 182U, 11793265},
{136U, 176U, 12213814},
{141U, 170U, 12643310},
{146U, 164U, 13081755},
{151U, 159U, 13547043},
{156U, 153U, 14021279},
{159U, 150U, 14298662},
{162U, 148U, 14513411},
{165U, 145U, 14808690},
{167U, 143U, 15023438},
{171U, 140U, 15327665},
{173U, 138U, 15551361},
{177U, 135U, 15864536},
{179U, 133U, 16097180},
{183U, 131U, 16419303},
{186U, 129U, 16660894},
{189U, 126U, 16991965},
{192U, 124U, 17251452},
{196U, 122U, 17591471},
{199U, 120U, 17850958},
{203U, 118U, 18208872},
{206U, 116U, 18477308},
{210U, 114U, 18853117},
{218U, 110U, 19515258},
{225U, 106U, 20195295},
{229U, 105U, 20499521},
{233U, 103U, 20902175},
{241U, 99U, 21635898},
{250U, 96U, 22396465},
{254U, 94U, 22736484}};
const uint8_t CTCSS_TABLE_DATA_LEN = 50U;
CFMCTCSSTX::CFMCTCSSTX() :
m_values(NULL),
m_length(0U),
m_n(0U)
{
}
uint8_t CFMCTCSSTX::setParams(uint8_t frequency, uint8_t level)
{
const TX_CTCSS_TABLE* entry = NULL;
for (uint8_t i = 0U; i < CTCSS_TABLE_DATA_LEN; i++) {
if (TX_CTCSS_TABLE_DATA[i].frequency == frequency) {
entry = TX_CTCSS_TABLE_DATA + i;
break;
}
}
if (entry == NULL)
return 4U;
m_length = entry->length;
delete[] m_values;
m_values = new q15_t[m_length];
q31_t arg = 0;
for (uint16_t i = 0U; i < m_length; i++) {
q63_t value = ::arm_sin_q31(arg) * q63_t(level * 13);
m_values[i] = q15_t(__SSAT((value >> 31), 16));
arg += entry->increment;
}
return 0U;
}
q15_t CFMCTCSSTX::getAudio()
{
q15_t sample = m_values[m_n++];
if(m_n >= m_length)
m_n = 0U;
return sample;
}
FMCTCSSTX.h
-38
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@@ -1,38 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(FMCTCSSTX_H)
#define FMCTCSSTX_H
#include "Config.h"
class CFMCTCSSTX {
public:
CFMCTCSSTX();
uint8_t setParams(uint8_t frequency, uint8_t level);
q15_t getAudio();
private:
q15_t* m_values;
uint16_t m_length;
uint16_t m_n;
};
#endif
FMDirectForm1.h
-111
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@@ -1,111 +0,0 @@
/*******************************************************************************
This header file has been taken from:
"A Collection of Useful C++ Classes for Digital Signal Processing"
By Vinnie Falco
Bernd Porr adapted it for Linux and turned it into a filter using
fixed point arithmetic.
--------------------------------------------------------------------------------
License: MIT License (http://www.opensource.org/licenses/mit-license.php)
Copyright (c) 2009 by Vinnie Falco
Copyright (C) 2013-2017, Bernd Porr, [email protected]
Copyright (C) 2020 , Mario Molitor , [email protected]
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in
all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
THE SOFTWARE.
*******************************************************************************/
// based on https://raw.githubusercontent.com/berndporr/iir_fixed_point/master/DirectFormI.h
#include "Globals.h"
#ifndef DIRECTFORMI_H_
#define DIRECTFORMI_H_
class CFMDirectFormI
{
public:
// convenience function which takes the a0 argument but ignores it!
CFMDirectFormI(const q31_t b0, const q31_t b1, const q31_t b2,
const q31_t, const q31_t a1, const q31_t a2)
{
// FIR coefficients
c_b0 = b0;
c_b1 = b1;
c_b2 = b2;
// IIR coefficients
c_a1 = a1;
c_a2 = a2;
reset();
}
CFMDirectFormI(const CFMDirectFormI &my)
{
// delay line
m_x2 = my.m_x2; // x[n-2]
m_y2 = my.m_y2; // y[n-2]
m_x1 = my.m_x1; // x[n-1]
m_y1 = my.m_y1; // y[n-1]
// coefficients
c_b0 = my.c_b0;
c_b1 = my.c_b1;
c_b2 = my.c_b2; // FIR
c_a1 = my.c_a1;
c_a2 = my.c_a2; // IIR
}
void reset ()
{
m_x1 = 0;
m_x2 = 0;
m_y1 = 0;
m_y2 = 0;
}
// filtering operation: one sample in and one out
inline q15_t filter(const q15_t in)
{
// calculate the output
register q31_t out_upscaled = c_b0 * in
+ c_b1 * m_x1
+ c_b2 * m_x2
- c_a1 * m_y1
- c_a2 * m_y2;
q15_t out = __SSAT(out_upscaled >> 15, 15);
// update the delay lines
m_x2 = m_x1;
m_y2 = m_y1;
m_x1 = in;
m_y1 = out;
return out;
}
private:
// delay line
q31_t m_x2; // x[n-2]
q31_t m_y2; // y[n-2]
q31_t m_x1; // x[n-1]
q31_t m_y1; // y[n-1]
// coefficients
q31_t c_b0,c_b1,c_b2; // FIR
q31_t c_a1,c_a2; // IIR
};
#endif /* DIRECTFORMI_H */
FMDownsampleRB.cpp
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/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "FMDownsampleRB.h"
CFMDownsampleRB::CFMDownsampleRB(uint16_t length) :
m_length(length),
m_head(0U),
m_tail(0U),
m_full(false),
m_overflow(false)
{
m_samples = new uint8_t[length];
}
uint16_t CFMDownsampleRB::getSpace() const
{
uint16_t n = 0U;
if (m_tail == m_head)
n = m_full ? 0U : m_length;
else if (m_tail < m_head)
n = m_length - m_head + m_tail;
else
n = m_tail - m_head;
if (n > m_length)
n = 0U;
return n;
}
uint16_t CFMDownsampleRB::getData() const
{
if (m_tail == m_head)
return m_full ? m_length : 0U;
else if (m_tail < m_head)
return m_head - m_tail;
else
return m_length - m_tail + m_head;
}
bool CFMDownsampleRB::put(uint8_t sample)
{
if (m_full) {
m_overflow = true;
return false;
}
m_samples[m_head] = sample;
m_head++;
if (m_head >= m_length)
m_head = 0U;
if (m_head == m_tail)
m_full = true;
return true;
}
bool CFMDownsampleRB::get(uint8_t& sample)
{
if (m_head == m_tail && !m_full)
return false;
sample = m_samples[m_tail];
m_full = false;
m_tail++;
if (m_tail >= m_length)
m_tail = 0U;
return true;
}
bool CFMDownsampleRB::hasOverflowed()
{
bool overflow = m_overflow;
m_overflow = false;
return overflow;
}
FMDownsampleRB.h
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@@ -1,68 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(FMDOWNSAMPLERB_H)
#define FMDOWNSAMPLERB_H
#if defined(STM32F4XX)
#include "stm32f4xx.h"
#elif defined(STM32F7XX)
#include "stm32f7xx.h"
#elif defined(STM32F105xC)
#include "stm32f1xx.h"
#include <cstddef>
#else
#include <Arduino.h>
#endif
#if defined(__SAM3X8E__) || defined(STM32F105xC)
#define ARM_MATH_CM3
#elif defined(STM32F7XX)
#define ARM_MATH_CM7
#elif defined(STM32F4XX) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
#define ARM_MATH_CM4
#else
#error "Unknown processor type"
#endif
#include <arm_math.h>
class CFMDownsampleRB {
public:
CFMDownsampleRB(uint16_t length);
uint16_t getSpace() const;
uint16_t getData() const;
bool put(uint8_t sample);
bool get(uint8_t& sample);
bool hasOverflowed();
private:
uint16_t m_length;
volatile uint8_t* m_samples;
volatile uint16_t m_head;
volatile uint16_t m_tail;
volatile bool m_full;
bool m_overflow;
};
#endif
FMDownsampler.cpp
-63
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@@ -1,63 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
* Copyright (C) 2020 by Geoffrey Merck F4FXL - KC3FRA
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "FMDownsampler.h"
CFMDownsampler::CFMDownsampler(uint16_t length) :
m_ringBuffer(length),//length might need tweaking
m_packIndex(0),
m_downSampleIndex(0)
{
m_samplePack = 0;
}
void CFMDownsampler::addSample(q15_t sample)
{
//only take one of three samples
if(m_downSampleIndex == 0) {
switch(m_packIndex){
case 0:
m_samplePack = int32_t(sample) << 12;
break;
case 1:{
m_samplePack |= int32_t(sample);
//we did not use MSB; skip it
m_ringBuffer.put(m_samplePackBytes[1]);
m_ringBuffer.put(m_samplePackBytes[2]);
m_ringBuffer.put(m_samplePackBytes[3]);
m_samplePack = 0;
}
break;
default:
//should never happen
break;
}
m_packIndex++;
if(m_packIndex >= 2)
m_packIndex = 0;
}
m_downSampleIndex++;
if(m_downSampleIndex >= 3)
m_downSampleIndex = 0;
}
FMDownsampler.h
-43
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@@ -1,43 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
* Copyright (C) 2020 by Geoffrey Merck F4FXL - KC3FRA
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(FMDOWNSAMPLER_H)
#define FMDOWNSAMPLER_H
#include "Config.h"
#include "FMDownsampleRB.h"
class CFMDownsampler {
public:
CFMDownsampler(uint16_t length);
void addSample(q15_t sample);
inline bool getPackedData(uint8_t& data){ return m_ringBuffer.get(data); };
inline bool hasOverflowed() { return m_ringBuffer.hasOverflowed(); };
private:
CFMDownsampleRB m_ringBuffer;
union {
int32_t m_samplePack;
int8_t m_samplePackBytes[4];
};
uint8_t m_packIndex;
uint8_t m_downSampleIndex;
};
#endif
FMKeyer.cpp
-216
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@@ -1,216 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "FMKeyer.h"
const struct {
char c;
uint32_t pattern;
uint8_t length;
} SYMBOL_LIST[] = {
{'A', 0xB8000000U, 8U},
{'B', 0xEA800000U, 12U},
{'C', 0xEBA00000U, 14U},
{'D', 0xEA000000U, 10U},
{'E', 0x80000000U, 4U},
{'F', 0xAE800000U, 12U},
{'G', 0xEE800000U, 12U},
{'H', 0xAA000000U, 10U},
{'I', 0xA0000000U, 6U},
{'J', 0xBBB80000U, 16U},
{'K', 0xEB800000U, 12U},
{'L', 0xBA800000U, 12U},
{'M', 0xEE000000U, 10U},
{'N', 0xE8000000U, 8U},
{'O', 0xEEE00000U, 14U},
{'P', 0xBBA00000U, 14U},
{'Q', 0xEEB80000U, 16U},
{'R', 0xBA000000U, 10U},
{'S', 0xA8000000U, 8U},
{'T', 0xE0000000U, 6U},
{'U', 0xAE000000U, 10U},
{'V', 0xAB800000U, 12U},
{'W', 0xBB800000U, 12U},
{'X', 0xEAE00000U, 14U},
{'Y', 0xEBB80000U, 16U},
{'Z', 0xEEA00000U, 14U},
{'1', 0xBBBB8000U, 20U},
{'2', 0xAEEE0000U, 18U},
{'3', 0xABB80000U, 16U},
{'4', 0xAAE00000U, 14U},
{'5', 0xAA800000U, 12U},
{'6', 0xEAA00000U, 14U},
{'7', 0xEEA80000U, 16U},
{'8', 0xEEEA0000U, 18U},
{'9', 0xEEEE8000U, 20U},
{'0', 0xEEEEE000U, 22U},
{'/', 0xEAE80000U, 16U},
{'?', 0xAEEA0000U, 18U},
{',', 0xEEAEE000U, 22U},
{'-', 0xEAAE0000U, 18U},
{'=', 0xEAB80000U, 16U},
{'.', 0xBAEB8000U, 20U},
{' ', 0x00000000U, 4U},
{0U, 0x00000000U, 0U}
};
const uint8_t BIT_MASK_TABLE[] = {0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U};
#define WRITE_BIT_FM(p,i,b) p[(i)>>3] = (b) ? (p[(i)>>3] | BIT_MASK_TABLE[(i)&7]) : (p[(i)>>3] & ~BIT_MASK_TABLE[(i)&7])
#define READ_BIT_FM(p,i) (p[(i)>>3] & BIT_MASK_TABLE[(i)&7])
CFMKeyer::CFMKeyer() :
m_wanted(false),
m_poBuffer(),
m_poLen(0U),
m_poPos(0U),
m_dotLen(0U),
m_dotPos(0U),
m_audio(NULL),
m_audioLen(0U),
m_audioPos(0U),
m_highLevel(0U),
m_lowLevel(0)
{
}
uint8_t CFMKeyer::setParams(const char* text, uint8_t speed, uint16_t frequency, uint8_t highLevel, uint8_t lowLevel)
{
m_poLen = 0U;
for (uint8_t i = 0U; text[i] != '\0'; i++) {
for (uint8_t j = 0U; SYMBOL_LIST[j].c != 0U; j++) {
if (SYMBOL_LIST[j].c == text[i]) {
uint32_t MASK = 0x80000000U;
for (uint8_t k = 0U; k < SYMBOL_LIST[j].length; k++, m_poLen++, MASK >>= 1) {
bool b = (SYMBOL_LIST[j].pattern & MASK) == MASK;
WRITE_BIT_FM(m_poBuffer, m_poLen, b);
if (m_poLen >= 995U) {
m_poLen = 0U;
return 4U;
}
}
break;
}
}
}
m_highLevel = q15_t(highLevel);
m_lowLevel = q15_t(lowLevel);
m_dotLen = 24000U / speed; // In samples
m_audioLen = 24000U / frequency; // In samples
delete[] m_audio;
m_audio = new bool[m_audioLen];
for (uint16_t i = 0U; i < m_audioLen; i++) {
if (i < (m_audioLen / 2U))
m_audio[i] = true;
else
m_audio[i] = false;
}
return 0U;
}
q15_t CFMKeyer::getHighAudio()
{
q15_t output = 0U;
if (!m_wanted)
return 0U;
bool b = READ_BIT_FM(m_poBuffer, m_poPos);
if (b)
output = m_audio[m_audioPos] ? m_highLevel : -m_highLevel;
m_audioPos++;
if (m_audioPos >= m_audioLen)
m_audioPos = 0U;
m_dotPos++;
if (m_dotPos >= m_dotLen) {
m_dotPos = 0U;
m_poPos++;
if (m_poPos >= m_poLen) {
stop();
return output;
}
}
return output;
}
q15_t CFMKeyer::getLowAudio()
{
q15_t output = 0U;
if (!m_wanted)
return 0U;
bool b = READ_BIT_FM(m_poBuffer, m_poPos);
if (b)
output = m_audio[m_audioPos] ? m_lowLevel : -m_lowLevel;
m_audioPos++;
if (m_audioPos >= m_audioLen)
m_audioPos = 0U;
m_dotPos++;
if (m_dotPos >= m_dotLen) {
m_dotPos = 0U;
m_poPos++;
if (m_poPos >= m_poLen) {
stop();
return output;
}
}
return output;
}
void CFMKeyer::start()
{
if (isRunning())
return;
m_wanted = true;
m_poPos = 0U;
m_dotPos = 0U;
m_audioPos = 0U;
}
void CFMKeyer::stop()
{
m_wanted = false;
m_poPos = 0U;
m_dotPos = 0U;
m_audioPos = 0U;
}
bool CFMKeyer::isWanted() const
{
return m_wanted;
}
bool CFMKeyer::isRunning() const
{
return m_poPos > 0U || m_dotPos > 0U || m_audioPos > 0U;
}
FMKeyer.h
-54
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@@ -1,54 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(FMKeyer_H)
#define FMKeyer_H
#include "Config.h"
class CFMKeyer {
public:
CFMKeyer();
uint8_t setParams(const char* text, uint8_t speed, uint16_t frequency, uint8_t highLevel, uint8_t lowLevel);
q15_t getHighAudio();
q15_t getLowAudio();
void start();
void stop();
bool isRunning() const;
bool isWanted() const;
private:
bool m_wanted;
uint8_t m_poBuffer[1000U];
uint16_t m_poLen;
uint16_t m_poPos;
uint16_t m_dotLen;
uint16_t m_dotPos;
bool* m_audio;
uint16_t m_audioLen;
uint16_t m_audioPos;
q15_t m_highLevel;
q15_t m_lowLevel;
};
#endif
FMRB.cpp
-110
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@@ -1,110 +0,0 @@
/*
TX fifo control - Copyright (C) KI6ZUM 2015
Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
You should have received a copy of the GNU Library General Public
License along with this library; if not, write to the
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#include "FMRB.h"
CFMRB::CFMRB(uint16_t length) :
m_length(length),
m_head(0U),
m_tail(0U),
m_full(false),
m_overflow(false)
{
m_samples = new q15_t[length];
}
uint16_t CFMRB::getSpace() const
{
uint16_t n = 0U;
if (m_tail == m_head)
n = m_full ? 0U : m_length;
else if (m_tail < m_head)
n = m_length - m_head + m_tail;
else
n = m_tail - m_head;
if (n > m_length)
n = 0U;
return n;
}
uint16_t CFMRB::getData() const
{
if (m_tail == m_head)
return m_full ? m_length : 0U;
else if (m_tail < m_head)
return m_head - m_tail;
else
return m_length - m_tail + m_head;
}
bool CFMRB::put(q15_t sample)
{
if (m_full) {
m_overflow = true;
return false;
}
m_samples[m_head] = sample;
m_head++;
if (m_head >= m_length)
m_head = 0U;
if (m_head == m_tail)
m_full = true;
return true;
}
bool CFMRB::get(q15_t& sample)
{
if (m_head == m_tail && !m_full)
return false;
sample = m_samples[m_tail];
m_full = false;
m_tail++;
if (m_tail >= m_length)
m_tail = 0U;
return true;
}
bool CFMRB::hasOverflowed()
{
bool overflow = m_overflow;
m_overflow = false;
return overflow;
}
void CFMRB::reset()
{
m_head = 0U;
m_tail = 0U;
m_full = false;
m_overflow = false;
}
FMRB.h
-72
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@@ -1,72 +0,0 @@
/*
Serial fifo control - Copyright (C) KI6ZUM 2015
Copyright (C) 2015,2016,2020 by Jonathan Naylor G4KLX
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Library General Public
License as published by the Free Software Foundation; either
version 2 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Library General Public License for more details.
You should have received a copy of the GNU Library General Public
License along with this library; if not, write to the
Free Software Foundation, Inc., 51 Franklin St, Fifth Floor,
Boston, MA 02110-1301, USA.
*/
#if !defined(FMRB_H)
#define FMRB_H
#if defined(STM32F4XX)
#include "stm32f4xx.h"
#elif defined(STM32F7XX)
#include "stm32f7xx.h"
#elif defined(STM32F105xC)
#include "stm32f1xx.h"
#include <cstddef>
#else
#include <Arduino.h>
#endif
#if defined(__SAM3X8E__) || defined(STM32F105xC)
#define ARM_MATH_CM3
#elif defined(STM32F7XX)
#define ARM_MATH_CM7
#elif defined(STM32F4XX) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
#define ARM_MATH_CM4
#else
#error "Unknown processor type"
#endif
#include <arm_math.h>
class CFMRB {
public:
CFMRB(uint16_t length);
uint16_t getSpace() const;
uint16_t getData() const;
bool put(q15_t sample);
bool get(q15_t& sample);
bool hasOverflowed();
void reset();
private:
uint16_t m_length;
volatile q15_t* m_samples;
volatile uint16_t m_head;
volatile uint16_t m_tail;
volatile bool m_full;
bool m_overflow;
};
#endif
FMTimeout.cpp
-76
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@@ -1,76 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "FMTimeout.h"
// 400 Hz sine wave at 24000 Hz sample rate
const q15_t BUSY_AUDIO[] = {0, 3426, 6813, 10126, 13328, 16384, 19261, 21926, 24351, 26510, 28378, 29935, 31164, 32052, 32588, 32767, 32588, 32052, 31164, 29935, 28378, 26510, 24351,
21926, 19261, 16384, 13328, 10126, 6813, 3425, 0, -3425, -6813, -10126, -13328, -16384, -19261, -21926, -24351, -26510, -28378, -29935, -31164, -32052,
-32588, -32768, -32588, -32052, -31164, -29935, -28378, -26510, -24351, -21926, -19261, -16384, -13328, -10126, -6813, -3425};
const uint8_t BUSY_AUDIO_LEN = 60U;
CFMTimeout::CFMTimeout() :
m_level(128 * 128),
m_running(false),
m_pos(0U),
m_n(0U)
{
}
void CFMTimeout::setParams(uint8_t level)
{
m_level = q15_t(level * 128);
}
q15_t CFMTimeout::getAudio()
{
q15_t sample = 0U;
if (!m_running)
return sample;
if (m_pos > 12000U) {
q31_t sample = BUSY_AUDIO[m_n] * m_level;
sample = q15_t(__SSAT((sample >> 15), 16));
m_n++;
if (m_n >= BUSY_AUDIO_LEN)
m_n = 0U;
} else {
sample = 0U;
}
m_pos++;
if (m_pos >= 24000U)
m_pos = 0U;
return sample;
}
void CFMTimeout::start()
{
m_running = true;
m_pos = 0U;
m_n = 0U;
}
void CFMTimeout::stop()
{
m_running = false;
}
FMTimeout.h
-42
View File
@@ -1,42 +0,0 @@
/*
* Copyright (C) 2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(FMTimeout_H)
#define FMTimeout_H
#include "Config.h"
class CFMTimeout {
public:
CFMTimeout();
void setParams(uint8_t level);
void start();
void stop();
q15_t getAudio();
private:
q15_t m_level;
bool m_running;
uint32_t m_pos;
uint8_t m_n;
};
#endif
FMTimer.cpp
-70
View File
@@ -1,70 +0,0 @@
/*
* Copyright (C) 2009,2010,2015,2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include "Config.h"
#include "Globals.h"
#include "FMTimer.h"
CFMTimer::CFMTimer() :
m_timeout(0U),
m_timer(0U)
{
}
void CFMTimer::setTimeout(uint16_t secs, uint32_t msecs)
{
m_timeout = (secs * 24000U) + (msecs * 24U);
}
uint32_t CFMTimer::getTimeout() const
{
return m_timeout / 24U;
}
void CFMTimer::start()
{
if (m_timeout > 0U)
m_timer = 1U;
}
void CFMTimer::stop()
{
m_timer = 0U;
}
void CFMTimer::clock(uint8_t length)
{
if (m_timer > 0U && m_timeout > 0U)
m_timer += length;
}
bool CFMTimer::isRunning() const
{
return m_timer > 0U;
}
bool CFMTimer::hasExpired() const
{
if (m_timeout == 0U || m_timer == 0U)
return false;
if (m_timer > m_timeout)
return true;
return false;
}
FMTimer.h
-47
View File
@@ -1,47 +0,0 @@
/*
* Copyright (C) 2009,2010,2015,2020 by Jonathan Naylor G4KLX
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#if !defined(FMTimer_H)
#define FMTimer_H
#include "Config.h"
class CFMTimer {
public:
CFMTimer();
void setTimeout(uint16_t secs, uint32_t msecs);
uint32_t getTimeout() const;
void start();
void stop();
void clock(uint8_t length);
bool isRunning() const;
bool hasExpired() const;
private:
uint32_t m_timeout;
uint32_t m_timer;
};
#endif
Globals.h
+3 -25
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX * Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@@ -50,7 +50,6 @@ enum MMDVM_STATE {
STATE_P25 = 4, STATE_P25 = 4,
STATE_NXDN = 5, STATE_NXDN = 5,
STATE_POCSAG = 6, STATE_POCSAG = 6,
STATE_FM = 10,
// Dummy states start at 90 // Dummy states start at 90
STATE_NXDNCAL1K = 91, STATE_NXDNCAL1K = 91,
@@ -61,15 +60,7 @@ enum MMDVM_STATE {
STATE_RSSICAL = 96, STATE_RSSICAL = 96,
STATE_CWID = 97, STATE_CWID = 97,
STATE_DMRCAL = 98, STATE_DMRCAL = 98,
STATE_DSTARCAL = 99, STATE_DSTARCAL = 99
STATE_INTCAL = 100,
STATE_POCSAGCAL = 101,
STATE_FMCAL10K = 102,
STATE_FMCAL12K = 103,
STATE_FMCAL15K = 104,
STATE_FMCAL20K = 105,
STATE_FMCAL25K = 106,
STATE_FMCAL30K = 107
}; };
#include "SerialPort.h" #include "SerialPort.h"
@@ -89,16 +80,13 @@ enum MMDVM_STATE {
#include "POCSAGTX.h" #include "POCSAGTX.h"
#include "CalDStarRX.h" #include "CalDStarRX.h"
#include "CalDStarTX.h" #include "CalDStarTX.h"
#include "CalFM.h"
#include "CalDMR.h" #include "CalDMR.h"
#include "CalP25.h" #include "CalP25.h"
#include "CalNXDN.h" #include "CalNXDN.h"
#include "CalPOCSAG.h"
#include "CalRSSI.h" #include "CalRSSI.h"
#include "CWIdTX.h" #include "CWIdTX.h"
#include "Debug.h" #include "Debug.h"
#include "IO.h" #include "IO.h"
#include "FM.h"
const uint8_t MARK_SLOT1 = 0x08U; const uint8_t MARK_SLOT1 = 0x08U;
const uint8_t MARK_SLOT2 = 0x04U; const uint8_t MARK_SLOT2 = 0x04U;
@@ -109,12 +97,6 @@ const uint16_t RX_BLOCK_SIZE = 2U;
const uint16_t TX_RINGBUFFER_SIZE = 500U; const uint16_t TX_RINGBUFFER_SIZE = 500U;
const uint16_t RX_RINGBUFFER_SIZE = 600U; const uint16_t RX_RINGBUFFER_SIZE = 600U;
#if defined(STM32F105xC) || defined(__MK20DX256__)
const uint16_t TX_BUFFER_LEN = 2000U;
#else
const uint16_t TX_BUFFER_LEN = 4000U;
#endif
extern MMDVM_STATE m_modemState; extern MMDVM_STATE m_modemState;
extern bool m_dstarEnable; extern bool m_dstarEnable;
@@ -123,7 +105,6 @@ extern bool m_ysfEnable;
extern bool m_p25Enable; extern bool m_p25Enable;
extern bool m_nxdnEnable; extern bool m_nxdnEnable;
extern bool m_pocsagEnable; extern bool m_pocsagEnable;
extern bool m_fmEnable;
extern bool m_duplex; extern bool m_duplex;
@@ -154,17 +135,14 @@ extern CNXDNTX nxdnTX;
extern CPOCSAGTX pocsagTX; extern CPOCSAGTX pocsagTX;
extern CFM fm;
extern CCalDStarRX calDStarRX; extern CCalDStarRX calDStarRX;
extern CCalDStarTX calDStarTX; extern CCalDStarTX calDStarTX;
extern CCalDMR calDMR; extern CCalDMR calDMR;
extern CCalFM calFM;
extern CCalP25 calP25; extern CCalP25 calP25;
extern CCalNXDN calNXDN; extern CCalNXDN calNXDN;
extern CCalPOCSAG calPOCSAG;
extern CCalRSSI calRSSI; extern CCalRSSI calRSSI;
extern CCWIdTX cwIdTX; extern CCWIdTX cwIdTX;
#endif #endif
I2CTeensy.cpp
-235
View File
@@ -1,235 +0,0 @@
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*
* 28-4-2017 Created for MMDVM Pi shield for Teensy by Chris Huitema
*/
#include "Config.h"
#include "Globals.h"
#if defined(VK6MST_TEENSY_PI3_SHIELD_I2C)
#include <i2c_t3.h> //available here https://github.com/nox771/i2c_t3 or maybe the normal wire will work #include <wire.h> justs need to test i guess
#define I2C_ADDRESS 0x22
#define I2C_SPEED 100000
// Function prototypes
void receiveEvent(size_t count);
void requestEvent(void);
#define TX_FIFO_SIZE 512U
#define RX_FIFO_SIZE 512U
volatile uint8_t TXfifo[TX_FIFO_SIZE];
volatile uint8_t RXfifo[RX_FIFO_SIZE];
volatile uint16_t TXfifohead, TXfifotail;
volatile uint16_t RXfifohead, RXfifotail;
// Init queues
void TXfifoinit(void)
{
TXfifohead = 0U;
TXfifotail = 0U;
}
void RXfifoinit()
{
RXfifohead = 0U;
RXfifotail = 0U;
}
// How full is queue
uint16_t TXfifolevel(void)
{
uint32_t tail = TXfifotail;
uint32_t head = TXfifohead;
if (tail > head)
return TX_FIFO_SIZE + head - tail;
else
return head - tail;
}
uint16_t RXfifolevel(void)
{
uint32_t tail = RXfifotail;
uint32_t head = RXfifohead;
if (tail > head)
return RX_FIFO_SIZE + head - tail;
else
return head - tail;
}
uint8_t TXfifoput(uint8_t next)
{
if (TXfifolevel() < TX_FIFO_SIZE) {
TXfifo[TXfifohead] = next;
TXfifohead++;
if (TXfifohead >= TX_FIFO_SIZE)
TXfifohead = 0U;
return 1U;
} else {
return 0U; // signal an overflow occurred by returning a zero count
}
}
void I2Cbegin(void)
{
// Setup for Slave mode, address 0x22, pins 18/19, external pullups, speed in hz
Wire.begin(I2C_SLAVE, I2C_ADDRESS, I2C_PINS_18_19, I2C_PULLUP_EXT, I2C_SPEED);
// register events
Wire.onReceive(receiveEvent);
Wire.onRequest(requestEvent);
// initialize the fifos
TXfifoinit();
RXfifoinit();
}
int I2Cavailable(void)
{
if (RXfifolevel() > 0U)
return 1U;
else
return 0U;
}
uint8_t I2Cread(void)
{
uint8_t data_c = RXfifo[RXfifotail];
RXfifotail++;
if (RXfifotail >= RX_FIFO_SIZE)
RXfifotail = 0U;
return data_c;
}
void I2Cwrite(const uint8_t* data, uint16_t length)
{
for (uint16_t i = 0U; i < length; i++)
TXfifoput(data[i]); //puts it in the fifo
}
//
// handle Rx Event (incoming I2C data)
//
void receiveEvent(size_t count)
{
for (uint16_t i = 0U; i < count; i++)
{
if (RXfifolevel() < RX_FIFO_SIZE) {
RXfifo[RXfifohead] = Wire.readByte();
if (RXfifo[RXfifohead] != -1){
RXfifohead++;
if (RXfifohead >= RX_FIFO_SIZE) RXfifohead = 0U;
}
} else {
Wire.readByte(); // drop data if mem full.
}
}
}
//
// handle Tx Event (outgoing I2C data)
//
void requestEvent(void)
{
if (TXfifolevel() > 0) {
if (Wire.write(TXfifo[TXfifotail])){ //write to i2c
TXfifotail++;
if (TXfifotail >= TX_FIFO_SIZE) TXfifotail = 0U;
}
}
}
/************************************/
void CSerialPort::beginInt(uint8_t n, int speed)
{
switch (n) {
case 1U:
return I2Cbegin();
case 3U:
Serial3.begin(speed);
break;
default:
break;
}
}
int CSerialPort::availableInt(uint8_t n)
{
switch (n) {
case 1U:
return I2Cavailable();
case 3U:
return Serial3.available();
default:
return false;
}
}
int CSerialPort::availableForWriteInt(uint8_t n)
{
switch (n) {
case 3U:
return Serial3.availableForWrite();
default:
return false;
}
}
uint8_t CSerialPort::readInt(uint8_t n)
{
switch (n) {
case 1U:
return I2Cread();
case 3U:
return Serial3.read();
default:
return 0U;
}
}
void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
{
switch (n) {
case 1U:
I2Cwrite(data, length);
break;
case 3U:
Serial3.write(data, length);
if (flush)
Serial3.flush();
break;
default:
break;
}
}
#endif
IO.cpp
+219 -136
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX * Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
* Copyright (C) 2015 by Jim Mclaughlin KI6ZUM * Copyright (C) 2015 by Jim Mclaughlin KI6ZUM
* Copyright (C) 2016 by Colin Durbridge G4EML * Copyright (C) 2016 by Colin Durbridge G4EML
* *
@@ -26,12 +26,31 @@
static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2} static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2}
const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
// One symbol boxcar filters // Generated using rcosdesign(0.2, 8, 5, 'sqrt') in MATLAB
static q15_t BOXCAR5_FILTER[] = {12000, 12000, 12000, 12000, 12000, 0}; static q15_t RRC_0_2_FILTER[] = {401, 104, -340, -731, -847, -553, 112, 909, 1472, 1450, 683, -675, -2144, -3040, -2706, -770, 2667, 6995,
const uint16_t BOXCAR5_FILTER_LEN = 6U; 11237, 14331, 15464, 14331, 11237, 6995, 2667, -770, -2706, -3040, -2144, -675, 683, 1450, 1472, 909, 112,
-553, -847, -731, -340, 104, 401, 0};
const uint16_t RRC_0_2_FILTER_LEN = 42U;
static q15_t BOXCAR10_FILTER[] = {6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000, 6000}; // Generated using rcosdesign(0.2, 8, 10, 'sqrt') in MATLAB
const uint16_t BOXCAR10_FILTER_LEN = 10U; static q15_t NXDN_0_2_FILTER[] = {284, 198, 73, -78, -240, -393, -517, -590, -599, -533, -391, -181, 79, 364, 643, 880, 1041, 1097, 1026, 819,
483, 39, -477, -1016, -1516, -1915, -2150, -2164, -1914, -1375, -545, 557, 1886, 3376, 4946, 6502, 7946, 9184,
10134, 10731, 10935, 10731, 10134, 9184, 7946, 6502, 4946, 3376, 1886, 557, -545, -1375, -1914, -2164, -2150,
-1915, -1516, -1016, -477, 39, 483, 819, 1026, 1097, 1041, 880, 643, 364, 79, -181, -391, -533, -599, -590,
-517, -393, -240, -78, 73, 198, 284, 0};
const uint16_t NXDN_0_2_FILTER_LEN = 82U;
static q15_t NXDN_ISINC_FILTER[] = {790, -1085, -1073, -553, 747, 2341, 3156, 2152, -893, -4915, -7834, -7536, -3102, 4441, 12354, 17394, 17394,
12354, 4441, -3102, -7536, -7834, -4915, -893, 2152, 3156, 2341, 747, -553, -1073, -1085, 790};
const uint16_t NXDN_ISINC_FILTER_LEN = 32U;
// Generated using gaussfir(0.5, 4, 5) in MATLAB
static q15_t GAUSSIAN_0_5_FILTER[] = {8, 104, 760, 3158, 7421, 9866, 7421, 3158, 760, 104, 8, 0};
const uint16_t GAUSSIAN_0_5_FILTER_LEN = 12U;
// One symbol boxcar filter
static q15_t BOXCAR_FILTER[] = {12000, 12000, 12000, 12000, 12000, 0};
const uint16_t BOXCAR_FILTER_LEN = 6U;
const uint16_t DC_OFFSET = 2048U; const uint16_t DC_OFFSET = 2048U;
@@ -42,10 +61,16 @@ m_txBuffer(TX_RINGBUFFER_SIZE),
m_rssiBuffer(RX_RINGBUFFER_SIZE), m_rssiBuffer(RX_RINGBUFFER_SIZE),
m_dcFilter(), m_dcFilter(),
m_dcState(), m_dcState(),
m_boxcar5Filter(), m_rrcFilter(),
m_boxcar10Filter(), m_gaussianFilter(),
m_boxcar5State(), m_boxcarFilter(),
m_boxcar10State(), m_nxdnFilter(),
m_nxdnISincFilter(),
m_rrcState(),
m_gaussianState(),
m_boxcarState(),
m_nxdnState(),
m_nxdnISincState(),
m_pttInvert(false), m_pttInvert(false),
m_rxLevel(128 * 128), m_rxLevel(128 * 128),
m_cwIdTXLevel(128 * 128), m_cwIdTXLevel(128 * 128),
@@ -55,7 +80,6 @@ m_ysfTXLevel(128 * 128),
m_p25TXLevel(128 * 128), m_p25TXLevel(128 * 128),
m_nxdnTXLevel(128 * 128), m_nxdnTXLevel(128 * 128),
m_pocsagTXLevel(128 * 128), m_pocsagTXLevel(128 * 128),
m_fmTXLevel(128 * 128),
m_rxDCOffset(DC_OFFSET), m_rxDCOffset(DC_OFFSET),
m_txDCOffset(DC_OFFSET), m_txDCOffset(DC_OFFSET),
m_ledCount(0U), m_ledCount(0U),
@@ -66,22 +90,37 @@ m_dacOverflow(0U),
m_watchdog(0U), m_watchdog(0U),
m_lockout(false) m_lockout(false)
{ {
::memset(m_boxcar5State, 0x00U, 30U * sizeof(q15_t)); ::memset(m_rrcState, 0x00U, 70U * sizeof(q15_t));
::memset(m_boxcar10State, 0x00U, 40U * sizeof(q15_t)); ::memset(m_gaussianState, 0x00U, 40U * sizeof(q15_t));
::memset(m_dcState, 0x00U, 4U * sizeof(q31_t)); ::memset(m_boxcarState, 0x00U, 30U * sizeof(q15_t));
::memset(m_nxdnState, 0x00U, 110U * sizeof(q15_t));
::memset(m_nxdnISincState, 0x00U, 60U * sizeof(q15_t));
::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
m_dcFilter.numStages = DC_FILTER_STAGES; m_dcFilter.numStages = DC_FILTER_STAGES;
m_dcFilter.pState = m_dcState; m_dcFilter.pState = m_dcState;
m_dcFilter.pCoeffs = DC_FILTER; m_dcFilter.pCoeffs = DC_FILTER;
m_dcFilter.postShift = 0; m_dcFilter.postShift = 0;
m_boxcar5Filter.numTaps = BOXCAR5_FILTER_LEN; m_rrcFilter.numTaps = RRC_0_2_FILTER_LEN;
m_boxcar5Filter.pState = m_boxcar5State; m_rrcFilter.pState = m_rrcState;
m_boxcar5Filter.pCoeffs = BOXCAR5_FILTER; m_rrcFilter.pCoeffs = RRC_0_2_FILTER;
m_boxcar10Filter.numTaps = BOXCAR10_FILTER_LEN; m_gaussianFilter.numTaps = GAUSSIAN_0_5_FILTER_LEN;
m_boxcar10Filter.pState = m_boxcar10State; m_gaussianFilter.pState = m_gaussianState;
m_boxcar10Filter.pCoeffs = BOXCAR10_FILTER; m_gaussianFilter.pCoeffs = GAUSSIAN_0_5_FILTER;
m_boxcarFilter.numTaps = BOXCAR_FILTER_LEN;
m_boxcarFilter.pState = m_boxcarState;
m_boxcarFilter.pCoeffs = BOXCAR_FILTER;
m_nxdnFilter.numTaps = NXDN_0_2_FILTER_LEN;
m_nxdnFilter.pState = m_nxdnState;
m_nxdnFilter.pCoeffs = NXDN_0_2_FILTER;
m_nxdnISincFilter.numTaps = NXDN_ISINC_FILTER_LEN;
m_nxdnISincFilter.pState = m_nxdnISincState;
m_nxdnISincFilter.pCoeffs = NXDN_ISINC_FILTER;
initInt(); initInt();
@@ -98,75 +137,123 @@ void CIO::selfTest()
// We exclude PTT to avoid trigger the transmitter // We exclude PTT to avoid trigger the transmitter
setLEDInt(ledValue); setLEDInt(ledValue);
setCOSInt(ledValue); setCOSInt(ledValue);
#if defined(MODE_LEDS) #if defined(MODE_PINS)
setDStarInt(ledValue); setDStarInt(ledValue);
setDMRInt(ledValue); setDMRInt(ledValue);
setYSFInt(ledValue); setYSFInt(ledValue);
setP25Int(ledValue); setP25Int(ledValue);
setNXDNInt(ledValue); setNXDNInt(ledValue);
setPOCSAGInt(ledValue); setPOCSAGInt(ledValue);
setFMInt(ledValue);
#endif #endif
delayInt(250); delayInt(250);
} }
#if defined(MODE_LEDS) #if defined(MODE_PINS)
setDStarInt(true); setDStarInt(true);
setDMRInt(false); setDMRInt(false);
setYSFInt(false); setYSFInt(false);
setP25Int(false); setP25Int(false);
setNXDNInt(false); setNXDNInt(false);
setPOCSAGInt(false); setPOCSAGInt(false);
setFMInt(false);
delayInt(250); delayInt(250);
setDStarInt(true);
setDMRInt(true); setDMRInt(true);
delayInt(250);
setYSFInt(true);
delayInt(250);
setP25Int(true);
#if !defined(USE_ALTERNATE_NXDN_LEDS)
delayInt(250);
setNXDNInt(true);
#endif
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
delayInt(250);
setPOCSAGInt(true);
#endif
#if !defined(USE_ALTERNATE_FM_LEDS)
delayInt(250);
setFMInt(true);
delayInt(250);
setFMInt(false);
#endif
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
delayInt(250);
setPOCSAGInt(false);
#endif
#if !defined(USE_ALTERNATE_NXDN_LEDS)
delayInt(250);
setNXDNInt(false);
#endif
delayInt(250);
setP25Int(false);
delayInt(250);
setYSFInt(false); setYSFInt(false);
setP25Int(false);
setNXDNInt(false);
setPOCSAGInt(false);
delayInt(250); delayInt(250);
setDStarInt(true);
setDMRInt(true);
setYSFInt(true);
setP25Int(false);
setNXDNInt(false);
setPOCSAGInt(false);
delayInt(250);
setDStarInt(true);
setDMRInt(true);
setYSFInt(true);
setP25Int(true);
setNXDNInt(false);
setPOCSAGInt(false);
delayInt(250);
setDStarInt(true);
setDMRInt(true);
setYSFInt(true);
setP25Int(true);
setNXDNInt(true);
setPOCSAGInt(false);
delayInt(250);
setDStarInt(true);
setDMRInt(true);
setYSFInt(true);
setP25Int(true);
setNXDNInt(true);
setPOCSAGInt(true);
delayInt(250);
setDStarInt(true);
setDMRInt(true);
setYSFInt(true);
setP25Int(true);
setNXDNInt(true);
setPOCSAGInt(false);
delayInt(250);
setDStarInt(true);
setDMRInt(true);
setYSFInt(true);
setP25Int(true);
setNXDNInt(false);
setPOCSAGInt(false);
delayInt(250);
setDStarInt(true);
setDMRInt(true);
setYSFInt(true);
setP25Int(false);
setNXDNInt(false);
setPOCSAGInt(false);
delayInt(250);
setDStarInt(true);
setDMRInt(true);
setYSFInt(false);
setP25Int(false);
setNXDNInt(false);
setPOCSAGInt(false);
delayInt(250);
setDStarInt(true);
setDMRInt(false); setDMRInt(false);
setYSFInt(false);
setP25Int(false);
setNXDNInt(false);
setPOCSAGInt(false);
delayInt(250); delayInt(250);
setDStarInt(false); setDStarInt(false);
setDMRInt(false);
setYSFInt(false);
setP25Int(false);
setNXDNInt(false);
setPOCSAGInt(false);
#endif #endif
} }
@@ -268,116 +355,116 @@ void CIO::process()
#endif #endif
if (m_modemState == STATE_IDLE) { if (m_modemState == STATE_IDLE) {
if (m_dstarEnable || m_dmrEnable || m_ysfEnable || m_p25Enable) { if (m_dstarEnable) {
q15_t vals[RX_BLOCK_SIZE]; q15_t GMSKVals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE); #if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_gaussianFilter, dcSamples, GMSKVals, RX_BLOCK_SIZE);
#else
::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
#endif
dstarRX.samples(GMSKVals, rssi, RX_BLOCK_SIZE);
}
if (m_dstarEnable) if (m_p25Enable) {
dstarRX.samples(vals, rssi, RX_BLOCK_SIZE); q15_t P25Vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER)
if (m_p25Enable) ::arm_fir_fast_q15(&m_boxcarFilter, dcSamples, P25Vals, RX_BLOCK_SIZE);
p25RX.samples(vals, rssi, RX_BLOCK_SIZE); #else
::arm_fir_fast_q15(&m_boxcarFilter, samples, P25Vals, RX_BLOCK_SIZE);
if (m_ysfEnable) #endif
ysfRX.samples(vals, rssi, RX_BLOCK_SIZE); p25RX.samples(P25Vals, rssi, RX_BLOCK_SIZE);
if (m_dmrEnable) {
if (m_duplex)
dmrIdleRX.samples(vals, RX_BLOCK_SIZE);
else
dmrDMORX.samples(vals, rssi, RX_BLOCK_SIZE);
}
} }
if (m_nxdnEnable) { if (m_nxdnEnable) {
q15_t vals[RX_BLOCK_SIZE]; q15_t NXDNValsTmp[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER) #if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_boxcar10Filter, dcSamples, vals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_nxdnFilter, dcSamples, NXDNValsTmp, RX_BLOCK_SIZE);
#else #else
::arm_fir_fast_q15(&m_boxcar10Filter, samples, vals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_nxdnFilter, samples, NXDNValsTmp, RX_BLOCK_SIZE);
#endif #endif
nxdnRX.samples(vals, rssi, RX_BLOCK_SIZE); q15_t NXDNVals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_nxdnISincFilter, NXDNValsTmp, NXDNVals, RX_BLOCK_SIZE);
nxdnRX.samples(NXDNVals, rssi, RX_BLOCK_SIZE);
} }
if (m_fmEnable) { if (m_dmrEnable || m_ysfEnable) {
bool cos = getCOSInt(); q15_t RRCVals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER) ::arm_fir_fast_q15(&m_rrcFilter, samples, RRCVals, RX_BLOCK_SIZE);
fm.samples(cos, dcSamples, RX_BLOCK_SIZE);
#else if (m_ysfEnable)
fm.samples(cos, samples, RX_BLOCK_SIZE); ysfRX.samples(RRCVals, rssi, RX_BLOCK_SIZE);
#endif
if (m_dmrEnable) {
if (m_duplex)
dmrIdleRX.samples(RRCVals, RX_BLOCK_SIZE);
else
dmrDMORX.samples(RRCVals, rssi, RX_BLOCK_SIZE);
}
} }
} else if (m_modemState == STATE_DSTAR) { } else if (m_modemState == STATE_DSTAR) {
if (m_dstarEnable) { if (m_dstarEnable) {
q15_t vals[RX_BLOCK_SIZE]; q15_t GMSKVals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER) #if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_boxcar5Filter, dcSamples, vals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_gaussianFilter, dcSamples, GMSKVals, RX_BLOCK_SIZE);
#else #else
::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
#endif #endif
dstarRX.samples(GMSKVals, rssi, RX_BLOCK_SIZE);
dstarRX.samples(vals, rssi, RX_BLOCK_SIZE);
} }
} else if (m_modemState == STATE_DMR) { } else if (m_modemState == STATE_DMR) {
if (m_dmrEnable) { if (m_dmrEnable) {
q15_t vals[RX_BLOCK_SIZE]; q15_t DMRVals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_rrcFilter, samples, DMRVals, RX_BLOCK_SIZE);
if (m_duplex) { if (m_duplex) {
// If the transmitter isn't on, use the DMR idle RX to detect the wakeup CSBKs // If the transmitter isn't on, use the DMR idle RX to detect the wakeup CSBKs
if (m_tx) if (m_tx)
dmrRX.samples(vals, rssi, control, RX_BLOCK_SIZE); dmrRX.samples(DMRVals, rssi, control, RX_BLOCK_SIZE);
else else
dmrIdleRX.samples(vals, RX_BLOCK_SIZE); dmrIdleRX.samples(DMRVals, RX_BLOCK_SIZE);
} else { } else {
dmrDMORX.samples(vals, rssi, RX_BLOCK_SIZE); dmrDMORX.samples(DMRVals, rssi, RX_BLOCK_SIZE);
} }
} }
} else if (m_modemState == STATE_YSF) { } else if (m_modemState == STATE_YSF) {
if (m_ysfEnable) { if (m_ysfEnable) {
q15_t vals[RX_BLOCK_SIZE]; q15_t YSFVals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER) #if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_boxcar5Filter, dcSamples, vals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_rrcFilter, dcSamples, YSFVals, RX_BLOCK_SIZE);
#else #else
::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_rrcFilter, samples, YSFVals, RX_BLOCK_SIZE);
#endif #endif
ysfRX.samples(vals, rssi, RX_BLOCK_SIZE); ysfRX.samples(YSFVals, rssi, RX_BLOCK_SIZE);
} }
} else if (m_modemState == STATE_P25) { } else if (m_modemState == STATE_P25) {
if (m_p25Enable) { if (m_p25Enable) {
q15_t vals[RX_BLOCK_SIZE]; q15_t P25Vals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER) #if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_boxcar5Filter, dcSamples, vals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_boxcarFilter, dcSamples, P25Vals, RX_BLOCK_SIZE);
#else #else
::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_boxcarFilter, samples, P25Vals, RX_BLOCK_SIZE);
#endif #endif
p25RX.samples(vals, rssi, RX_BLOCK_SIZE); p25RX.samples(P25Vals, rssi, RX_BLOCK_SIZE);
} }
} else if (m_modemState == STATE_NXDN) { } else if (m_modemState == STATE_NXDN) {
if (m_nxdnEnable) { if (m_nxdnEnable) {
q15_t vals[RX_BLOCK_SIZE]; q15_t NXDNValsTmp[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER) #if defined(USE_DCBLOCKER)
::arm_fir_fast_q15(&m_boxcar10Filter, dcSamples, vals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_nxdnFilter, dcSamples, NXDNValsTmp, RX_BLOCK_SIZE);
#else #else
::arm_fir_fast_q15(&m_boxcar10Filter, samples, vals, RX_BLOCK_SIZE); ::arm_fir_fast_q15(&m_nxdnFilter, samples, NXDNValsTmp, RX_BLOCK_SIZE);
#endif #endif
nxdnRX.samples(vals, rssi, RX_BLOCK_SIZE); q15_t NXDNVals[RX_BLOCK_SIZE];
::arm_fir_fast_q15(&m_nxdnISincFilter, NXDNValsTmp, NXDNVals, RX_BLOCK_SIZE);
nxdnRX.samples(NXDNVals, rssi, RX_BLOCK_SIZE);
} }
} else if (m_modemState == STATE_FM) {
bool cos = getCOSInt();
#if defined(USE_DCBLOCKER)
fm.samples(cos, dcSamples, RX_BLOCK_SIZE);
#else
fm.samples(cos, samples, RX_BLOCK_SIZE);
#endif
} else if (m_modemState == STATE_DSTARCAL) { } else if (m_modemState == STATE_DSTARCAL) {
q15_t vals[RX_BLOCK_SIZE]; q15_t GMSKVals[RX_BLOCK_SIZE];
#if defined(USE_DCBLOCKER) ::arm_fir_fast_q15(&m_gaussianFilter, samples, GMSKVals, RX_BLOCK_SIZE);
::arm_fir_fast_q15(&m_boxcar5Filter, dcSamples, vals, RX_BLOCK_SIZE);
#else calDStarRX.samples(GMSKVals, RX_BLOCK_SIZE);
::arm_fir_fast_q15(&m_boxcar5Filter, samples, vals, RX_BLOCK_SIZE);
#endif
calDStarRX.samples(vals, RX_BLOCK_SIZE);
} else if (m_modemState == STATE_RSSICAL) { } else if (m_modemState == STATE_RSSICAL) {
calRSSI.samples(rssi, RX_BLOCK_SIZE); calRSSI.samples(rssi, RX_BLOCK_SIZE);
} }
@@ -418,9 +505,6 @@ void CIO::write(MMDVM_STATE mode, q15_t* samples, uint16_t length, const uint8_t
case STATE_POCSAG: case STATE_POCSAG:
txLevel = m_pocsagTXLevel; txLevel = m_pocsagTXLevel;
break; break;
case STATE_FM:
txLevel = m_fmTXLevel;
break;
default: default:
txLevel = m_cwIdTXLevel; txLevel = m_cwIdTXLevel;
break; break;
@@ -462,18 +546,17 @@ void CIO::setADCDetection(bool detect)
void CIO::setMode() void CIO::setMode()
{ {
#if defined(MODE_LEDS) #if defined(MODE_PINS)
setDStarInt(m_modemState == STATE_DSTAR); setDStarInt(m_modemState == STATE_DSTAR);
setDMRInt(m_modemState == STATE_DMR); setDMRInt(m_modemState == STATE_DMR);
setYSFInt(m_modemState == STATE_YSF); setYSFInt(m_modemState == STATE_YSF);
setP25Int(m_modemState == STATE_P25); setP25Int(m_modemState == STATE_P25);
setNXDNInt(m_modemState == STATE_NXDN); setNXDNInt(m_modemState == STATE_NXDN);
setPOCSAGInt(m_modemState == STATE_POCSAG); setPOCSAGInt(m_modemState == STATE_POCSAG);
setFMInt(m_modemState == STATE_FM);
#endif #endif
} }
void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset) void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, int16_t txDCOffset, int16_t rxDCOffset)
{ {
m_pttInvert = pttInvert; m_pttInvert = pttInvert;
@@ -485,7 +568,6 @@ void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rx
m_p25TXLevel = q15_t(p25TXLevel * 128); m_p25TXLevel = q15_t(p25TXLevel * 128);
m_nxdnTXLevel = q15_t(nxdnTXLevel * 128); m_nxdnTXLevel = q15_t(nxdnTXLevel * 128);
m_pocsagTXLevel = q15_t(pocsagTXLevel * 128); m_pocsagTXLevel = q15_t(pocsagTXLevel * 128);
m_fmTXLevel = q15_t(fmTXLevel * 128);
m_rxDCOffset = DC_OFFSET + rxDCOffset; m_rxDCOffset = DC_OFFSET + rxDCOffset;
m_txDCOffset = DC_OFFSET + txDCOffset; m_txDCOffset = DC_OFFSET + txDCOffset;
@@ -536,3 +618,4 @@ bool CIO::hasLockout() const
{ {
return m_lockout; return m_lockout;
} }
IO.h
+13 -8
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX * Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@@ -42,7 +42,7 @@ public:
void interrupt(); void interrupt();
void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, uint8_t fmTXLevel, int16_t txDCOffset, int16_t rxDCOffset); void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, int16_t txDCOffset, int16_t rxDCOffset);
void getOverflow(bool& adcOverflow, bool& dacOverflow); void getOverflow(bool& adcOverflow, bool& dacOverflow);
@@ -66,10 +66,16 @@ private:
arm_biquad_casd_df1_inst_q31 m_dcFilter; arm_biquad_casd_df1_inst_q31 m_dcFilter;
q31_t m_dcState[4]; q31_t m_dcState[4];
arm_fir_instance_q15 m_boxcar5Filter; arm_fir_instance_q15 m_rrcFilter;
arm_fir_instance_q15 m_boxcar10Filter; arm_fir_instance_q15 m_gaussianFilter;
q15_t m_boxcar5State[30U]; // NoTaps + BlockSize - 1, 6 + 20 - 1 plus some spare arm_fir_instance_q15 m_boxcarFilter;
q15_t m_boxcar10State[40U]; // NoTaps + BlockSize - 1, 10 + 20 - 1 plus some spare arm_fir_instance_q15 m_nxdnFilter;
arm_fir_instance_q15 m_nxdnISincFilter;
q15_t m_rrcState[70U]; // NoTaps + BlockSize - 1, 42 + 20 - 1 plus some spare
q15_t m_gaussianState[40U]; // NoTaps + BlockSize - 1, 12 + 20 - 1 plus some spare
q15_t m_boxcarState[30U]; // NoTaps + BlockSize - 1, 6 + 20 - 1 plus some spare
q15_t m_nxdnState[110U]; // NoTaps + BlockSize - 1, 82 + 20 - 1 plus some spare
q15_t m_nxdnISincState[60U]; // NoTaps + BlockSize - 1, 32 + 20 - 1 plus some spare
bool m_pttInvert; bool m_pttInvert;
q15_t m_rxLevel; q15_t m_rxLevel;
@@ -80,7 +86,6 @@ private:
q15_t m_p25TXLevel; q15_t m_p25TXLevel;
q15_t m_nxdnTXLevel; q15_t m_nxdnTXLevel;
q15_t m_pocsagTXLevel; q15_t m_pocsagTXLevel;
q15_t m_fmTXLevel;
uint16_t m_rxDCOffset; uint16_t m_rxDCOffset;
uint16_t m_txDCOffset; uint16_t m_txDCOffset;
@@ -113,9 +118,9 @@ private:
void setP25Int(bool on); void setP25Int(bool on);
void setNXDNInt(bool on); void setNXDNInt(bool on);
void setPOCSAGInt(bool on); void setPOCSAGInt(bool on);
void setFMInt(bool on);
void delayInt(unsigned int dly); void delayInt(unsigned int dly);
}; };
#endif #endif
IODue.cpp
+3 -22
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX * Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
* Copyright (C) 2015 by Jim Mclaughlin KI6ZUM * Copyright (C) 2015 by Jim Mclaughlin KI6ZUM
* Copyright (C) 2016 by Colin Durbridge G4EML * Copyright (C) 2016 by Colin Durbridge G4EML
* *
@@ -35,7 +35,6 @@
#define PIN_P25 19 #define PIN_P25 19
#define PIN_NXDN 20 #define PIN_NXDN 20
#define PIN_POCSAG 4 #define PIN_POCSAG 4
#define PIN_FM 5
#define ADC_CHER_Chan (1<<7) // ADC on Due pin A0 - Due AD7 - (1 << 7) #define ADC_CHER_Chan (1<<7) // ADC on Due pin A0 - Due AD7 - (1 << 7)
#define ADC_ISR_EOC_Chan ADC_ISR_EOC7 #define ADC_ISR_EOC_Chan ADC_ISR_EOC7
#define ADC_CDR_Chan 7 #define ADC_CDR_Chan 7
@@ -51,7 +50,6 @@
#define PIN_P25 6 #define PIN_P25 6
#define PIN_NXDN 5 #define PIN_NXDN 5
#define PIN_POCSAG 4 #define PIN_POCSAG 4
#define PIN_FM 3
#define ADC_CHER_Chan (1<<13) // ADC on Due pin A11 - Due AD13 - (1 << 13) #define ADC_CHER_Chan (1<<13) // ADC on Due pin A11 - Due AD13 - (1 << 13)
#define ADC_ISR_EOC_Chan ADC_ISR_EOC13 #define ADC_ISR_EOC_Chan ADC_ISR_EOC13
#define ADC_CDR_Chan 13 #define ADC_CDR_Chan 13
@@ -69,7 +67,6 @@
#define PIN_P25 6 #define PIN_P25 6
#define PIN_NXDN 5 #define PIN_NXDN 5
#define PIN_POCSAG 4 #define PIN_POCSAG 4
#define PIN_FM 3
#define ADC_CHER_Chan (1<<7) // ADC on Due pin A0 - Due AD7 - (1 << 7) #define ADC_CHER_Chan (1<<7) // ADC on Due pin A0 - Due AD7 - (1 << 7)
#define ADC_ISR_EOC_Chan ADC_ISR_EOC7 #define ADC_ISR_EOC_Chan ADC_ISR_EOC7
#define ADC_CDR_Chan 7 #define ADC_CDR_Chan 7
@@ -98,22 +95,15 @@ void CIO::initInt()
pinMode(PIN_LED, OUTPUT); pinMode(PIN_LED, OUTPUT);
pinMode(PIN_COS, INPUT); pinMode(PIN_COS, INPUT);
#if defined(MODE_LEDS) #if defined(MODE_PINS)
// Set up the mode output pins // Set up the mode output pins
pinMode(PIN_DSTAR, OUTPUT); pinMode(PIN_DSTAR, OUTPUT);
pinMode(PIN_DMR, OUTPUT); pinMode(PIN_DMR, OUTPUT);
pinMode(PIN_YSF, OUTPUT); pinMode(PIN_YSF, OUTPUT);
pinMode(PIN_P25, OUTPUT); pinMode(PIN_P25, OUTPUT);
#if !defined(USE_ALTERNATE_NXDN_LEDS)
pinMode(PIN_NXDN, OUTPUT); pinMode(PIN_NXDN, OUTPUT);
#endif
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
pinMode(PIN_POCSAG, OUTPUT); pinMode(PIN_POCSAG, OUTPUT);
#endif #endif
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
pinMode(PIN_FM, OUTPUT);
#endif
#endif
} }
void CIO::startInt() void CIO::startInt()
@@ -264,19 +254,10 @@ void CIO::setPOCSAGInt(bool on)
#endif #endif
} }
void CIO::setFMInt(bool on)
{
#if defined(USE_ALTERNATE_FM_LEDS)
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
digitalWrite(PIN_YSF, on ? HIGH : LOW);
#else
digitalWrite(PIN_FM, on ? HIGH : LOW);
#endif
}
void CIO::delayInt(unsigned int dly) void CIO::delayInt(unsigned int dly)
{ {
delay(dly); delay(dly);
} }
#endif #endif
IOPins.h
-70
View File
@@ -1,70 +0,0 @@
/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _IO_PINS_H
#define _IO_PINS_H
#if !defined(CONFIG_H)
#error "Requires Config.h to be included first!"
#endif
#if defined(STM32F4_RPT_HAT_TGO)
#include "pins/pins_f4_rpt_tgo.h"
#elif defined(STM32F4_DISCOVERY)
#include "pins/pins_f4_discovery.h"
#elif defined(STM32F4_PI)
#include "pins/pins_f4_pi.h"
#elif defined(STM32F722_PI)
#include "pins/pins_f7_pi.h"
#elif defined(STM32F4_F4M)
#include "pins/pins_f4_f4m.h"
#elif defined(STM32F722_F7M)
#include "pins/pins_f7_f7m.h"
#elif defined(STM32F722_RPT_HAT)
#include "pins/pins_f7_rpt_hat.h"
#elif defined(STM32F4_NUCLEO)
#if defined(STM32F4_NUCLEO_MORPHO_HEADER)
#include "pins/pins_f4_nucleo_morpho.h"
#elif defined(STM32F4_NUCLEO_ARDUINO_HEADER)
#include "pins/pins_f4_nucleo_arduino.h"
#else
#error "Either STM32F4_NUCLEO_MORPHO_HEADER or STM32F4_NUCLEO_ARDUINO_HEADER need to be defined"
#endif
#elif defined(STM32F7_NUCLEO)
#include "pins/pins_f7_nucleo.h"
#elif defined(STM32F4_DVM)
#include "pins/pins_f4_stm32dvm_v3.h"
#elif defined(DRCC_DVM_NQF)
#include "pins/pins_f4_drcc_nqf.h"
#else
#error "A valid board type macro need to be defined."
#endif
#endif //#ifndef _IO_PINS_H
IOSTM.cpp
+754 -95
View File
@@ -1,8 +1,7 @@
/* /*
* Copyright (C) 2016 by Jim McLaughlin KI6ZUM * Copyright (C) 2016 by Jim McLaughlin KI6ZUM
* Copyright (C) 2016,2017,2018 by Andy Uribe CA6JAU * Copyright (C) 2016,2017,2018 by Andy Uribe CA6JAU
* Copyright (C) 2017,2018,2020 by Jonathan Naylor G4KLX * Copyright (C) 2017,2018 by Jonathan Naylor G4KLX
* Copyright (C) 2019,2020 by BG5HHP
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@@ -24,8 +23,748 @@
#include "IO.h" #include "IO.h"
#if defined(STM32F4XX) || defined(STM32F7XX) #if defined(STM32F4XX) || defined(STM32F7XX)
#include "IOPins.h"
#if defined(STM32F4_DISCOVERY)
/*
Pin definitions for STM32F4 Discovery Board:
PTT PB13 output P1 Pin37
COSLED PA7 output P1 Pin17
LED PD15 output P1 Pin47
COS PA5 input P1 Pin15
DSTAR PD12 output P1 Pin44
DMR PD13 output P1 Pin45
YSF PD14 output P1 Pin46
P25 PD11 output P1 Pin43
NXDN PD10 output P1 Pin42
RX PA0 analog input P1 Pin12
RSSI PA1 analog input P1 Pin11
TX PA4 analog output P1 Pin16
EXT_CLK PA15 input P2 Pin40
*/
#define PIN_COS GPIO_Pin_5
#define PORT_COS GPIOA
#define RCC_Per_COS RCC_AHB1Periph_GPIOA
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_7
#define PORT_COSLED GPIOA
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOA
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOD
#define RCC_Per_LED RCC_AHB1Periph_GPIOD
#define PIN_P25 GPIO_Pin_11
#define PORT_P25 GPIOD
#define RCC_Per_P25 RCC_AHB1Periph_GPIOD
#define PIN_NXDN GPIO_Pin_10
#define PORT_NXDN GPIOD
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOD
#define PIN_DSTAR GPIO_Pin_12
#define PORT_DSTAR GPIOD
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOD
#define PIN_DMR GPIO_Pin_13
#define PORT_DMR GPIOD
#define RCC_Per_DMR RCC_AHB1Periph_GPIOD
#define PIN_YSF GPIO_Pin_14
#define PORT_YSF GPIOD
#define RCC_Per_YSF RCC_AHB1Periph_GPIOD
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#elif defined(STM32F4_PI)
/*
Pin definitions for STM32F4 Pi Board:
PTT PB13 output
COSLED PB14 output
LED PB15 output
COS PC0 input
DSTAR PC7 output
DMR PC8 output
YSF PA8 output
P25 PC9 output
NXDN PB1 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_9
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_1
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_7
#define PORT_DSTAR GPIOC
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
#define PIN_DMR GPIO_Pin_8
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_8
#define PORT_YSF GPIOA
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#elif defined(STM32F722_PI)
/*
Pin definitions for STM32F722 Pi Board:
PTT PB13 output
COSLED PB14 output
LED PB15 output
COS PC0 input
DSTAR PC7 output
DMR PC8 output
YSF PA8 output
P25 PC9 output
NXDN PB1 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_9
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_1
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_7
#define PORT_DSTAR GPIOC
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
#define PIN_DMR GPIO_Pin_8
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_8
#define PORT_YSF GPIOA
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#elif defined(STM32F4_F4M)
/*
Pin definitions for MMDVM-F4M Pi-Hat F0DEI board:
PTT PB13 output
COSLED PB14 output
LED PB15 output
COS PC0 input
DSTAR PC7 output
DMR PC8 output
YSF PA8 output
P25 PC9 output
NXDN PB1 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_9
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_1
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_7
#define PORT_DSTAR GPIOC
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
#define PIN_DMR GPIO_Pin_8
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_8
#define PORT_YSF GPIOA
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#elif defined(STM32F722_F7M)
/*
Pin definitions for MMDVM-F7M Pi-Hat F0DEI board:
PTT PB13 output
COSLED PB14 output
LED PB15 output
COS PC0 input
DSTAR PC7 output
DMR PC8 output
YSF PA8 output
P25 PC9 output
NXDN PB1 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_9
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_1
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_7
#define PORT_DSTAR GPIOC
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
#define PIN_DMR GPIO_Pin_8
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_8
#define PORT_YSF GPIOA
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#elif defined(STM32F4_NUCLEO)
#if defined(STM32F4_NUCLEO_MORPHO_HEADER)
/*
Pin definitions for STM32F4 Nucleo boards (ST Morpho header):
PTT PB13 output CN10 Pin30
COSLED PB14 output CN10 Pin28
LED PA5 output CN10 Pin11
COS PB15 input CN10 Pin26
DSTAR PB10 output CN10 Pin25
DMR PB4 output CN10 Pin27
YSF PB5 output CN10 Pin29
P25 PB3 output CN10 Pin31
NXDN PA10 output CN10 Pin33
MDSTAR PC4 output CN10 Pin34
MDMR PC5 output CN10 Pin6
MYSF PC2 output CN7 Pin35
MP25 PC3 output CN7 Pin37
MNXDN PC6 output CN10 Pin4
RX PA0 analog input CN7 Pin28
RSSI PA1 analog input CN7 Pin30
TX PA4 analog output CN7 Pin32
EXT_CLK PA15 input CN7 Pin17
*/
#define PIN_COS GPIO_Pin_15
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_5
#define PORT_LED GPIOA
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
#define PIN_P25 GPIO_Pin_3
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_10
#define PORT_NXDN GPIOA
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
#define PIN_DSTAR GPIO_Pin_10
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_4
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_5
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#if defined(STM32F4_NUCLEO_MODE_PINS)
#define PIN_MP25 GPIO_Pin_3
#define PORT_MP25 GPIOC
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
#define PIN_MNXDN GPIO_Pin_6
#define PORT_MNXDN GPIOC
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
#define PIN_MDSTAR GPIO_Pin_4
#define PORT_MDSTAR GPIOC
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
#define PIN_MDMR GPIO_Pin_5
#define PORT_MDMR GPIOC
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
#define PIN_MYSF GPIO_Pin_2
#define PORT_MYSF GPIOC
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#elif defined(STM32F4_NUCLEO_ARDUINO_HEADER)
/*
Pin definitions for STM32F4 Nucleo boards (Arduino header):
PTT PB10 output CN9 Pin7
COSLED PB3 output CN9 Pin4
LED PB5 output CN9 Pin5
COS PB4 input CN9 Pin6
DSTAR PA1 output CN8 Pin2
DMR PA4 output CN8 Pin3
YSF PB0 output CN8 Pin4
P25 PC1 output CN8 Pin5
NXDN PA3 output CN9 Pin1
RX PA0 analog input CN8 Pin1
RSSI PC0 analog input CN8 Pin6
TX PA5 analog output CN5 Pin6
EXT_CLK PB8 input CN5 Pin10
*/
#define PIN_COS GPIO_Pin_4
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_10
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_3
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_5
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_1
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_3
#define PORT_NXDN GPIOA
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
#define PIN_DSTAR GPIO_Pin_1
#define PORT_DSTAR GPIOA
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOA
#define PIN_DMR GPIO_Pin_4
#define PORT_DMR GPIOA
#define RCC_Per_DMR RCC_AHB1Periph_GPIOA
#define PIN_YSF GPIO_Pin_0
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#define PIN_EXT_CLK GPIO_Pin_8
#define SRC_EXT_CLK GPIO_PinSource8
#define PORT_EXT_CLK GPIOB
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_0
#define PIN_RSSI_CH ADC_Channel_10
#define PORT_RSSI GPIOC
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOC
#define PIN_TX GPIO_Pin_5
#define PIN_TX_CH DAC_Channel_2
#else
#error "Either STM32F4_NUCLEO_MORPHO_HEADER or STM32F4_NUCLEO_ARDUINO_HEADER need to be defined in Config.h"
#endif
#elif defined(STM32F7_NUCLEO)
/*
Pin definitions for STM32F7 Nucleo boards (ST Morpho header):
PTT PB13 output CN12 Pin30
COSLED PB14 output CN12 Pin28
LED PA5 output CN12 Pin11
COS PB15 input CN12 Pin26
DSTAR PB10 output CN12 Pin25
DMR PB4 output CN12 Pin27
YSF PB5 output CN12 Pin29
P25 PB3 output CN12 Pin31
NXDN PA10 output CN12 Pin33
MDSTAR PC4 output CN12 Pin34
MDMR PC5 output CN12 Pin6
MYSF PC2 output CN11 Pin35
MP25 PC3 output CN11 Pin37
MNXDN PC6 output CN12 Pin4
RX PA0 analog input CN11 Pin28
RSSI PA1 analog input CN11 Pin30
TX PA4 analog output CN11 Pin32
EXT_CLK PA15 input CN11 Pin17
*/
#define PIN_COS GPIO_Pin_15
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_5
#define PORT_LED GPIOA
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
#define PIN_P25 GPIO_Pin_3
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_10
#define PORT_NXDN GPIOA
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
#define PIN_DSTAR GPIO_Pin_10
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_4
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_5
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#if defined(STM32F4_NUCLEO_MODE_PINS)
#define PIN_MP25 GPIO_Pin_3
#define PORT_MP25 GPIOC
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
#define PIN_MNXDN GPIO_Pin_6
#define PORT_MNXDN GPIOC
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
#define PIN_MDSTAR GPIO_Pin_4
#define PORT_MDSTAR GPIOC
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
#define PIN_MDMR GPIO_Pin_5
#define PORT_MDMR GPIOC
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
#define PIN_MYSF GPIO_Pin_2
#define PORT_MYSF GPIOC
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#elif defined(STM32F4_DVM)
/*
Pin definitions for STM32F4 STM32-DVM rev 3 Board:
COS PB13 input
PTT PB12 output
COSLED PB4 output
LED PB3 output
P25 PB8 output
NXDN PB9 output
DSTAR PB6 output
DMR PB5 output
YSF PB7 output
RX PB0 analog input
RSSI PB1 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_13
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_12
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_4
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_3
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_8
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_9
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_6
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_5
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_7
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_8
#define PORT_RX GPIOB
#define RCC_Per_RX RCC_AHB1Periph_GPIOB
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_9
#define PORT_RSSI GPIOB
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOB
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#else
#error "Either STM32F4_DISCOVERY, STM32F4_PI, STM32F722_PI, STM32F4_F4M, STM32F722_F7M, STM32F4_DVM, STM32F4_NUCLEO or STM32F7_NUCLEO need to be defined"
#endif
const uint16_t DC_OFFSET = 2048U; const uint16_t DC_OFFSET = 2048U;
@@ -73,7 +812,7 @@ void CIO::initInt()
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN; GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
GPIO_Init(PORT_COS, &GPIO_InitStruct); GPIO_Init(PORT_COS, &GPIO_InitStruct);
#if defined(MODE_LEDS) #if defined(MODE_PINS)
// DSTAR pin // DSTAR pin
RCC_AHB1PeriphClockCmd(RCC_Per_DSTAR, ENABLE); RCC_AHB1PeriphClockCmd(RCC_Per_DSTAR, ENABLE);
GPIO_InitStruct.GPIO_Pin = PIN_DSTAR; GPIO_InitStruct.GPIO_Pin = PIN_DSTAR;
@@ -98,7 +837,6 @@ void CIO::initInt()
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_Init(PORT_P25, &GPIO_InitStruct); GPIO_Init(PORT_P25, &GPIO_InitStruct);
#if !defined(USE_ALTERNATE_NXDN_LEDS)
// NXDN pin // NXDN pin
RCC_AHB1PeriphClockCmd(RCC_Per_NXDN, ENABLE); RCC_AHB1PeriphClockCmd(RCC_Per_NXDN, ENABLE);
GPIO_InitStruct.GPIO_Pin = PIN_NXDN; GPIO_InitStruct.GPIO_Pin = PIN_NXDN;
@@ -106,25 +844,7 @@ void CIO::initInt()
GPIO_Init(PORT_NXDN, &GPIO_InitStruct); GPIO_Init(PORT_NXDN, &GPIO_InitStruct);
#endif #endif
#if !defined(USE_ALTERNATE_POCSAG_LEDS) #if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
// POCSAG pin
RCC_AHB1PeriphClockCmd(RCC_Per_POCSAG, ENABLE);
GPIO_InitStruct.GPIO_Pin = PIN_POCSAG;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_Init(PORT_POCSAG, &GPIO_InitStruct);
#endif
#if !defined(USE_ALTERNATE_FM_LEDS)
// FM pin
RCC_AHB1PeriphClockCmd(RCC_Per_FM, ENABLE);
GPIO_InitStruct.GPIO_Pin = PIN_FM;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_Init(PORT_FM, &GPIO_InitStruct);
#endif
#endif
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
// DSTAR mode pin // DSTAR mode pin
RCC_AHB1PeriphClockCmd(RCC_Per_MDSTAR, ENABLE); RCC_AHB1PeriphClockCmd(RCC_Per_MDSTAR, ENABLE);
GPIO_InitStruct.GPIO_Pin = PIN_MDSTAR; GPIO_InitStruct.GPIO_Pin = PIN_MDSTAR;
@@ -149,31 +869,12 @@ void CIO::initInt()
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_Init(PORT_MP25, &GPIO_InitStruct); GPIO_Init(PORT_MP25, &GPIO_InitStruct);
#if !defined(USE_ALTERNATE_NXDN_LEDS)
// NXDN mode pin // NXDN mode pin
RCC_AHB1PeriphClockCmd(RCC_Per_MNXDN, ENABLE); RCC_AHB1PeriphClockCmd(RCC_Per_MNXDN, ENABLE);
GPIO_InitStruct.GPIO_Pin = PIN_MNXDN; GPIO_InitStruct.GPIO_Pin = PIN_MNXDN;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT; GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_Init(PORT_MNXDN, &GPIO_InitStruct); GPIO_Init(PORT_MNXDN, &GPIO_InitStruct);
#endif #endif
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
// POCSAG mode pin
RCC_AHB1PeriphClockCmd(RCC_Per_MPOCSAG, ENABLE);
GPIO_InitStruct.GPIO_Pin = PIN_MPOCSAG;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_Init(PORT_MPOCSAG, &GPIO_InitStruct);
#endif
#if !defined(USE_ALTERNATE_FM_LEDS)
// FM mode pin
RCC_AHB1PeriphClockCmd(RCC_Per_MFM, ENABLE);
GPIO_InitStruct.GPIO_Pin = PIN_MFM;
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
GPIO_Init(PORT_MFM, &GPIO_InitStruct);
#endif
#endif
} }
void CIO::startInt() void CIO::startInt()
@@ -382,60 +1083,48 @@ void CIO::setCOSInt(bool on)
void CIO::setDStarInt(bool on) void CIO::setDStarInt(bool on)
{ {
#if defined(MODE_LEDS)
GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
#endif #if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
#endif #endif
} }
void CIO::setDMRInt(bool on) void CIO::setDMRInt(bool on)
{ {
#if defined(MODE_LEDS)
GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
#endif #if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET);
#endif #endif
} }
void CIO::setYSFInt(bool on) void CIO::setYSFInt(bool on)
{ {
#if defined(MODE_LEDS)
GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
#endif #if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
#endif #endif
} }
void CIO::setP25Int(bool on) void CIO::setP25Int(bool on)
{ {
#if defined(MODE_LEDS)
GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
#endif #if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
#endif #endif
} }
void CIO::setNXDNInt(bool on) void CIO::setNXDNInt(bool on)
{ {
#if defined(MODE_LEDS)
#if defined(USE_ALTERNATE_NXDN_LEDS) #if defined(USE_ALTERNATE_NXDN_LEDS)
GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
#else #if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
GPIO_WriteBit(PORT_NXDN, PIN_NXDN, on ? Bit_SET : Bit_RESET);
#endif
#endif
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
#if defined(USE_ALTERNATE_NXDN_LEDS)
GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
#endif
#else #else
GPIO_WriteBit(PORT_NXDN, PIN_NXDN, on ? Bit_SET : Bit_RESET);
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
GPIO_WriteBit(PORT_MNXDN, PIN_MNXDN, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_MNXDN, PIN_MNXDN, on ? Bit_SET : Bit_RESET);
#endif #endif
#endif #endif
@@ -443,42 +1132,12 @@ void CIO::setNXDNInt(bool on)
void CIO::setPOCSAGInt(bool on) void CIO::setPOCSAGInt(bool on)
{ {
#if defined(MODE_LEDS)
#if defined(USE_ALTERNATE_POCSAG_LEDS) #if defined(USE_ALTERNATE_POCSAG_LEDS)
GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
#else #if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
GPIO_WriteBit(PORT_POCSAG, PIN_POCSAG, on ? Bit_SET : Bit_RESET);
#endif
#endif
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
#if defined(USE_ALTERNATE_POCSAG_LEDS)
GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET);
#else
GPIO_WriteBit(PORT_MPOCSAG, PIN_MPOCSAG, on ? Bit_SET : Bit_RESET);
#endif
#endif
}
void CIO::setFMInt(bool on)
{
#if defined(MODE_LEDS)
#if defined(USE_ALTERNATE_FM_LEDS)
GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
#else
GPIO_WriteBit(PORT_FM, PIN_FM, on ? Bit_SET : Bit_RESET);
#endif
#endif
#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
#if defined(USE_ALTERNATE_FM_LEDS)
GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
#else
GPIO_WriteBit(PORT_MFM, PIN_MFM, on ? Bit_SET : Bit_RESET);
#endif #endif
#endif #endif
} }
IOSTM_CMSIS.cpp
+15 -61
View File
@@ -1,7 +1,7 @@
/* /*
* Copyright (C) 2016 by Jim McLaughlin KI6ZUM * Copyright (C) 2016 by Jim McLaughlin KI6ZUM
* Copyright (C) 2016, 2017 by Andy Uribe CA6JAU * Copyright (C) 2016, 2017 by Andy Uribe CA6JAU
* Copyright (C) 2017,2018,2020 by Jonathan Naylor G4KLX * Copyright (C) 2017,2018 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Wojciech Krutnik N0CALL * Copyright (C) 2017 by Wojciech Krutnik N0CALL
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
@@ -41,7 +41,6 @@ YSF PB8 output
P25 PB9 output P25 PB9 output
NXDN PB10 output NXDN PB10 output
POCSAG PB11 output POCSAG PB11 output
FM PB12 output
RX PB0 analog input (ADC1_8) RX PB0 analog input (ADC1_8)
RSSI PB1 analog input (ADC2_9) RSSI PB1 analog input (ADC2_9)
@@ -85,9 +84,6 @@ USART1_RXD PA10 input (AF)
#define PIN_POCSAG 11 #define PIN_POCSAG 11
#define PORT_POCSAG GPIOB #define PORT_POCSAG GPIOB
#define BB_POCSAG *((bitband_t)BITBAND_PERIPH(&PORT_POCSAG->ODR, PIN_POCSAG)) #define BB_POCSAG *((bitband_t)BITBAND_PERIPH(&PORT_POCSAG->ODR, PIN_POCSAG))
#define PIN_FM 14
#define PORT_FM GPIOB
#define BB_FM *((bitband_t)BITBAND_PERIPH(&PORT_FM->ODR, PIN_FM))
#define PIN_RX 0 #define PIN_RX 0
#define PIN_RX_ADC_CH 8 #define PIN_RX_ADC_CH 8
@@ -158,35 +154,16 @@ void GPIOConfigPin(GPIO_TypeDef *port_ptr, uint32_t pin, uint32_t mode_cnf_value
#if defined(STM32F1_POG) #if defined(STM32F1_POG)
void FancyLEDEffect() void FancyLEDEffect()
{ {
int ledCount = 10; bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25};
bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25, for(int i=0; i<7; i++){
#if defined(USE_ALTERNATE_NXDN_LEDS) *foo[i] = 0x01;
NULL,
#else
&BB_NXDN,
#endif
#if defined(USE_ALTERNATE_POCSAG_LEDS)
NULL,
#else
&BB_POCSAG,
#endif
#if defined(USE_ALTERNATE_FM_LEDS)
NULL};
#else
&BB_FM};
#endif
for(int i=0; i<ledCount; i++){
if(foo[i] != NULL)
*foo[i] = 0x01;
} }
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1); GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1);
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00; *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
delay(SystemCoreClock/1000*100); delay(SystemCoreClock/1000*100);
for(int i=0; i<ledCount; i++){ for(int i=0; i<7; i++){
if(foo[i] != NULL) *foo[i] = 0x00;
*foo[i] = 0x00;
} }
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01; *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
delay(SystemCoreClock/1000*20); delay(SystemCoreClock/1000*20);
@@ -195,22 +172,18 @@ void FancyLEDEffect()
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01; *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
*foo[0] = 0x01; *foo[0] = 0x01;
for(int i=1; i<ledCount; i++){ for(int i=1; i<7; i++){
delay(SystemCoreClock/1000*10); delay(SystemCoreClock/1000*10);
if (foo[i-1] != NULL) *foo[i-1] = 0x00;
*foo[i-1] = 0x00; *foo[i] = 0x01;
if (foo[i] != NULL)
*foo[i] = 0x01;
} }
for(int i=ledCount - 2; i>=0; i--) { for(int i=5; i>=0; i--){
delay(SystemCoreClock/1000*10); delay(SystemCoreClock/1000*10);
if (foo[i+1] != NULL) *foo[i+1] = 0x00;
*foo[i+1] = 0x00; *foo[i] = 0x01;
if (foo[i] != NULL)
*foo[i] = 0x01;
} }
delay(SystemCoreClock/1000*10); delay(SystemCoreClock/1000*10);
*foo[0] = 0x00; *foo[5+1-6] = 0x00;
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00; *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
delay(SystemCoreClock/1000*10); delay(SystemCoreClock/1000*10);
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01; *((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
@@ -249,16 +222,9 @@ static inline void GPIOInit()
GPIOConfigPin(PORT_DMR, PIN_DMR, GPIO_CRL_MODE0_1); GPIOConfigPin(PORT_DMR, PIN_DMR, GPIO_CRL_MODE0_1);
GPIOConfigPin(PORT_YSF, PIN_YSF, GPIO_CRL_MODE0_1); GPIOConfigPin(PORT_YSF, PIN_YSF, GPIO_CRL_MODE0_1);
GPIOConfigPin(PORT_P25, PIN_P25, GPIO_CRL_MODE0_1); GPIOConfigPin(PORT_P25, PIN_P25, GPIO_CRL_MODE0_1);
#if !defined(USE_ALTERNATE_NXDN_LEDS)
GPIOConfigPin(PORT_NXDN, PIN_NXDN, GPIO_CRL_MODE0_1); GPIOConfigPin(PORT_NXDN, PIN_NXDN, GPIO_CRL_MODE0_1);
#endif
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
GPIOConfigPin(PORT_POCSAG, PIN_POCSAG, GPIO_CRL_MODE0_1); GPIOConfigPin(PORT_POCSAG, PIN_POCSAG, GPIO_CRL_MODE0_1);
#endif
#if !defined(USE_ALTERNATE_FM_LEDS)
GPIOConfigPin(PORT_FM, PIN_FM, GPIO_CRL_MODE0_1);
#endif
GPIOConfigPin(PORT_RX, PIN_RX, 0); GPIOConfigPin(PORT_RX, PIN_RX, 0);
#if defined(SEND_RSSI_DATA) #if defined(SEND_RSSI_DATA)
GPIOConfigPin(PORT_RSSI, PIN_RSSI, 0); GPIOConfigPin(PORT_RSSI, PIN_RSSI, 0);
@@ -399,9 +365,7 @@ void CIO::interrupt()
{ {
uint8_t control = MARK_NONE; uint8_t control = MARK_NONE;
uint16_t sample = DC_OFFSET; uint16_t sample = DC_OFFSET;
#if defined(SEND_RSSI_DATA)
uint16_t rawRSSI = 0U; uint16_t rawRSSI = 0U;
#endif
bitband_t eoc = (bitband_t)BITBAND_PERIPH(&ADC1->SR, ADC_SR_EOS_Pos); bitband_t eoc = (bitband_t)BITBAND_PERIPH(&ADC1->SR, ADC_SR_EOS_Pos);
bitband_t adon = (bitband_t)BITBAND_PERIPH(&ADC1->CR2, ADC_CR2_ADON_Pos); bitband_t adon = (bitband_t)BITBAND_PERIPH(&ADC1->CR2, ADC_CR2_ADON_Pos);
#if defined(SEND_RSSI_DATA) #if defined(SEND_RSSI_DATA)
@@ -490,16 +454,6 @@ void CIO::setPOCSAGInt(bool on)
#endif #endif
} }
void CIO::setFMInt(bool on)
{
#if defined(USE_ALTERNATE_FM_LEDS)
BB_DSTAR = !!on;
BB_YSF = !!on;
#else
BB_FM = !!on;
#endif
}
void CIO::delayInt(unsigned int dly) void CIO::delayInt(unsigned int dly)
{ {
delay(dly); delay(dly);
IOTeensy.cpp
+2 -21
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2016,2017,2018,2020 by Jonathan Naylor G4KLX * Copyright (C) 2016,2017,2018 by Jonathan Naylor G4KLX
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@@ -37,11 +37,9 @@
#if defined(__MK20DX256__) #if defined(__MK20DX256__)
#define PIN_NXDN 2 #define PIN_NXDN 2
#define PIN_POCSAG 3 #define PIN_POCSAG 3
#define PIN_FM 4
#else #else
#define PIN_NXDN 24 #define PIN_NXDN 24
#define PIN_POCSAG 25 #define PIN_POCSAG 25
#define PIN_FM 26
#endif #endif
#define PIN_ADC 5 // A0, Pin 14 #define PIN_ADC 5 // A0, Pin 14
#define PIN_RSSI 4 // Teensy 3.5/3.6, A16, Pin 35. Teensy 3.1/3.2, A17, Pin 28 #define PIN_RSSI 4 // Teensy 3.5/3.6, A16, Pin 35. Teensy 3.1/3.2, A17, Pin 28
@@ -66,22 +64,15 @@ void CIO::initInt()
pinMode(PIN_LED, OUTPUT); pinMode(PIN_LED, OUTPUT);
pinMode(PIN_COS, INPUT); pinMode(PIN_COS, INPUT);
#if defined(MODE_LEDS) #if defined(MODE_PINS)
// Set up the mode output pins // Set up the mode output pins
pinMode(PIN_DSTAR, OUTPUT); pinMode(PIN_DSTAR, OUTPUT);
pinMode(PIN_DMR, OUTPUT); pinMode(PIN_DMR, OUTPUT);
pinMode(PIN_YSF, OUTPUT); pinMode(PIN_YSF, OUTPUT);
pinMode(PIN_P25, OUTPUT); pinMode(PIN_P25, OUTPUT);
#if !defined(USE_ALTERNATE_NXDN_LEDS)
pinMode(PIN_NXDN, OUTPUT); pinMode(PIN_NXDN, OUTPUT);
#endif
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
pinMode(PIN_POCSAG, OUTPUT); pinMode(PIN_POCSAG, OUTPUT);
#endif #endif
#if !defined(USE_ALTERNATE_FM_LEDS)
pinMode(PIN_FM, OUTPUT);
#endif
#endif
} }
void CIO::startInt() void CIO::startInt()
@@ -248,16 +239,6 @@ void CIO::setPOCSAGInt(bool on)
#endif #endif
} }
void CIO::setFMInt(bool on)
{
#if defined(USE_ALTERNATE_FM_LEDS)
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
digitalWrite(PIN_YSF, on ? HIGH : LOW);
#else
digitalWrite(PIN_FM, on ? HIGH : LOW);
#endif
}
void CIO::delayInt(unsigned int dly) void CIO::delayInt(unsigned int dly)
{ {
delay(dly); delay(dly);
MMDVM.cpp
+2 -16
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX * Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Mathis Schmieder DB9MAT * Copyright (C) 2016 by Mathis Schmieder DB9MAT
* Copyright (C) 2016 by Colin Durbridge G4EML * Copyright (C) 2016 by Colin Durbridge G4EML
* *
@@ -32,7 +32,6 @@ bool m_ysfEnable = true;
bool m_p25Enable = true; bool m_p25Enable = true;
bool m_nxdnEnable = true; bool m_nxdnEnable = true;
bool m_pocsagEnable = true; bool m_pocsagEnable = true;
bool m_fmEnable = true;
bool m_duplex = true; bool m_duplex = true;
@@ -60,15 +59,11 @@ CNXDNTX nxdnTX;
CPOCSAGTX pocsagTX; CPOCSAGTX pocsagTX;
CFM fm;
CCalDStarRX calDStarRX; CCalDStarRX calDStarRX;
CCalDStarTX calDStarTX; CCalDStarTX calDStarTX;
CCalDMR calDMR; CCalDMR calDMR;
CCalP25 calP25; CCalP25 calP25;
CCalNXDN calNXDN; CCalNXDN calNXDN;
CCalFM calFM;
CCalPOCSAG calPOCSAG;
CCalRSSI calRSSI; CCalRSSI calRSSI;
CCWIdTX cwIdTX; CCWIdTX cwIdTX;
@@ -107,12 +102,9 @@ void loop()
if (m_nxdnEnable && m_modemState == STATE_NXDN) if (m_nxdnEnable && m_modemState == STATE_NXDN)
nxdnTX.process(); nxdnTX.process();
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy())) if (m_pocsagEnable && m_modemState == STATE_POCSAG)
pocsagTX.process(); pocsagTX.process();
if (m_fmEnable && m_modemState == STATE_FM)
fm.process();
if (m_modemState == STATE_DSTARCAL) if (m_modemState == STATE_DSTARCAL)
calDStarTX.process(); calDStarTX.process();
@@ -125,12 +117,6 @@ void loop()
if (m_modemState == STATE_NXDNCAL1K) if (m_modemState == STATE_NXDNCAL1K)
calNXDN.process(); calNXDN.process();
if (m_modemState == STATE_POCSAGCAL)
calPOCSAG.process();
if (m_modemState == STATE_FMCAL10K || m_modemState == STATE_FMCAL12K || m_modemState == STATE_FMCAL15K || m_modemState == STATE_FMCAL20K || m_modemState == STATE_FMCAL25K ||m_modemState == STATE_FMCAL30K)
calFM.process();
if (m_modemState == STATE_IDLE) if (m_modemState == STATE_IDLE)
cwIdTX.process(); cwIdTX.process();
} }
MMDVM.ino
+3 -16
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX * Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML * Copyright (C) 2016 by Colin Durbridge G4EML
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
@@ -29,7 +29,6 @@ bool m_ysfEnable = true;
bool m_p25Enable = true; bool m_p25Enable = true;
bool m_nxdnEnable = true; bool m_nxdnEnable = true;
bool m_pocsagEnable = true; bool m_pocsagEnable = true;
bool m_fmEnable = true;
bool m_duplex = true; bool m_duplex = true;
@@ -57,15 +56,11 @@ CNXDNTX nxdnTX;
CPOCSAGTX pocsagTX; CPOCSAGTX pocsagTX;
CFM fm;
CCalDStarRX calDStarRX; CCalDStarRX calDStarRX;
CCalDStarTX calDStarTX; CCalDStarTX calDStarTX;
CCalDMR calDMR; CCalDMR calDMR;
CCalFM calFM;
CCalP25 calP25; CCalP25 calP25;
CCalNXDN calNXDN; CCalNXDN calNXDN;
CCalPOCSAG calPOCSAG;
CCalRSSI calRSSI; CCalRSSI calRSSI;
CCWIdTX cwIdTX; CCWIdTX cwIdTX;
@@ -104,30 +99,22 @@ void loop()
if (m_nxdnEnable && m_modemState == STATE_NXDN) if (m_nxdnEnable && m_modemState == STATE_NXDN)
nxdnTX.process(); nxdnTX.process();
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy())) if (m_pocsagEnable && m_modemState == STATE_POCSAG)
pocsagTX.process(); pocsagTX.process();
if (m_fmEnable && m_modemState == STATE_FM)
fm.process();
if (m_modemState == STATE_DSTARCAL) if (m_modemState == STATE_DSTARCAL)
calDStarTX.process(); calDStarTX.process();
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K || m_modemState == STATE_DMRDMO1K) if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K || m_modemState == STATE_DMRDMO1K)
calDMR.process(); calDMR.process();
if (m_modemState == STATE_FMCAL10K || m_modemState == STATE_FMCAL12K || m_modemState == STATE_FMCAL15K || m_modemState == STATE_FMCAL20K || m_modemState == STATE_FMCAL25K || m_modemState == STATE_FMCAL30K)
calFM.process();
if (m_modemState == STATE_P25CAL1K) if (m_modemState == STATE_P25CAL1K)
calP25.process(); calP25.process();
if (m_modemState == STATE_NXDNCAL1K) if (m_modemState == STATE_NXDNCAL1K)
calNXDN.process(); calNXDN.process();
if (m_modemState == STATE_POCSAGCAL)
calPOCSAG.process();
if (m_modemState == STATE_IDLE) if (m_modemState == STATE_IDLE)
cwIdTX.process(); cwIdTX.process();
} }
MMDVM_STM32F4xx.coproj
+338
View File
@@ -0,0 +1,338 @@
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<Project version="2G - 1.7.8" name="MMDVM_STM32F4xx">
<Target name="MMDVM_Discovery_407" isCurrent="1">
<Device manufacturerId="9" manufacturerName="ST" chipId="344" chipName="STM32F407VG" boardId="" boardName=""/>
<BuildOption>
<Compile>
<Option name="OptimizationLevel" value="4"/>
<Option name="UseFPU" value="0"/>
<Option name="UserEditCompiler" value=""/>
<Option name="SupportCPlusplus" value="1"/>
<Option name="FPU" value="2"/>
<Includepaths>
<Includepath path="."/>
</Includepaths>
<DefinedSymbols>
<Define name="STM32F4XX"/>
<Define name="USE_STDPERIPH_DRIVER"/>
<Define name="__ASSEMBLY__"/>
<Define name="SUPPORT_CPLUSPLUS"/>
<Define name="STM32F40_41xxx"/>
<Define name="HSE_VALUE=8000000"/>
<Define name="STM32F4_DISCOVERY"/>
<Define name="__FPU_USED"/>
</DefinedSymbols>
</Compile>
<Link useDefault="0">
<Option name="DiscardUnusedSection" value="0"/>
<Option name="UserEditLinkder" value=""/>
<Option name="UseMemoryLayout" value="0"/>
<Option name="nostartfiles" value="1"/>
<Option name="LTO" value="0"/>
<Option name="IsNewStartupCode" value="1"/>
<Option name="Library" value="Semihosting"/>
<Option name="UserEditLinker" value="-lstdc++; --specs=nano.specs;"/>
<LinkedLibraries>
<Libset dir="stm32f4xx_lib\cmsis\lib\gcc\" libs="arm_cortexm4lf_math"/>
</LinkedLibraries>
<MemoryAreas debugInFlashNotRAM="1">
<Memory name="IROM1" type="ReadOnly" size="0x00100000" startValue="0x08000000"/>
<Memory name="IRAM1" type="ReadWrite" size="0x00020000" startValue="0x20000000"/>
<Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
<Memory name="IRAM2" type="ReadWrite" size="0x00010000" startValue="0x10000000"/>
</MemoryAreas>
<LocateLinkFile path="./stm32f4xx_link.ld" type="0"/>
</Link>
<Output>
<Option name="OutputFileType" value="0"/>
<Option name="Path" value="./"/>
<Option name="Name" value="MMDVM_DIS"/>
<Option name="HEX" value="1"/>
<Option name="BIN" value="1"/>
</Output>
<User>
<UserRun name="Run#1" type="Before" checked="0" value=""/>
<UserRun name="Run#1" type="After" checked="0" value=""/>
</User>
</BuildOption>
<DebugOption>
<Option name="org.coocox.codebugger.gdbjtag.core.adapter" value="ST-Link"/>
<Option name="org.coocox.codebugger.gdbjtag.core.debugMode" value="SWD"/>
<Option name="org.coocox.codebugger.gdbjtag.core.clockDiv" value="1M"/>
<Option name="org.coocox.codebugger.gdbjtag.corerunToMain" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.jlinkgdbserver" value=""/>
<Option name="org.coocox.codebugger.gdbjtag.core.userDefineGDBScript" value=""/>
<Option name="org.coocox.codebugger.gdbjtag.core.targetEndianess" value="0"/>
<Option name="org.coocox.codebugger.gdbjtag.core.jlinkResetMode" value="Type 0: Normal"/>
<Option name="org.coocox.codebugger.gdbjtag.core.resetMode" value="SYSRESETREQ"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ifSemihost" value="0"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ifCacheRom" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ipAddress" value="127.0.0.1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.portNumber" value="2009"/>
<Option name="org.coocox.codebugger.gdbjtag.core.autoDownload" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.verify" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.downloadFuction" value="Erase Effected"/>
<Option name="org.coocox.codebugger.gdbjtag.core.defaultAlgorithm" value="STM32F4xx_1024.elf"/>
</DebugOption>
<ExcludeFile/>
</Target>
<Target name="MMDVM_Pi_446" isCurrent="0">
<Device manufacturerId="9" manufacturerName="ST" chipId="344" chipName="STM32F407VG" boardId="" boardName=""/>
<BuildOption>
<Compile>
<Option name="OptimizationLevel" value="4"/>
<Option name="UseFPU" value="0"/>
<Option name="UserEditCompiler" value=""/>
<Option name="SupportCPlusplus" value="1"/>
<Option name="FPU" value="2"/>
<Includepaths>
<Includepath path="."/>
</Includepaths>
<DefinedSymbols>
<Define name="STM32F4XX"/>
<Define name="USE_STDPERIPH_DRIVER"/>
<Define name="__ASSEMBLY__"/>
<Define name="SUPPORT_CPLUSPLUS"/>
<Define name="__FPU_USED"/>
<Define name="STM32F446xx"/>
<Define name="HSE_VALUE=12000000"/>
<Define name="STM32F4_PI"/>
<Define name="MODE_PINS"/>
</DefinedSymbols>
</Compile>
<Link useDefault="0">
<Option name="DiscardUnusedSection" value="0"/>
<Option name="UserEditLinkder" value=""/>
<Option name="UseMemoryLayout" value="0"/>
<Option name="nostartfiles" value="1"/>
<Option name="LTO" value="0"/>
<Option name="IsNewStartupCode" value="1"/>
<Option name="Library" value="Semihosting"/>
<Option name="UserEditLinker" value="-lstdc++; --specs=nano.specs;"/>
<LinkedLibraries>
<Libset dir="stm32f4xx_lib\cmsis\lib\gcc\" libs="arm_cortexm4lf_math"/>
</LinkedLibraries>
<MemoryAreas debugInFlashNotRAM="1">
<Memory name="IROM1" type="ReadOnly" size="0x00100000" startValue="0x08000000"/>
<Memory name="IRAM1" type="ReadWrite" size="0x00020000" startValue="0x20000000"/>
<Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
<Memory name="IRAM2" type="ReadWrite" size="0x00010000" startValue="0x10000000"/>
</MemoryAreas>
<LocateLinkFile path="./stm32f4xx_link.ld" type="0"/>
</Link>
<Output>
<Option name="OutputFileType" value="0"/>
<Option name="Path" value="./"/>
<Option name="Name" value="MMDVM_PI"/>
<Option name="HEX" value="1"/>
<Option name="BIN" value="1"/>
</Output>
<User>
<UserRun name="Run#1" type="Before" checked="0" value=""/>
<UserRun name="Run#1" type="After" checked="0" value=""/>
</User>
</BuildOption>
<DebugOption>
<Option name="org.coocox.codebugger.gdbjtag.core.adapter" value="ST-Link"/>
<Option name="org.coocox.codebugger.gdbjtag.core.debugMode" value="SWD"/>
<Option name="org.coocox.codebugger.gdbjtag.core.clockDiv" value="1M"/>
<Option name="org.coocox.codebugger.gdbjtag.corerunToMain" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.jlinkgdbserver" value=""/>
<Option name="org.coocox.codebugger.gdbjtag.core.userDefineGDBScript" value=""/>
<Option name="org.coocox.codebugger.gdbjtag.core.targetEndianess" value="0"/>
<Option name="org.coocox.codebugger.gdbjtag.core.jlinkResetMode" value="Type 0: Normal"/>
<Option name="org.coocox.codebugger.gdbjtag.core.resetMode" value="SYSRESETREQ"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ifSemihost" value="0"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ifCacheRom" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ipAddress" value="127.0.0.1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.portNumber" value="2009"/>
<Option name="org.coocox.codebugger.gdbjtag.core.autoDownload" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.verify" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.downloadFuction" value="Erase Effected"/>
<Option name="org.coocox.codebugger.gdbjtag.core.defaultAlgorithm" value="STM32F4xx_1024.elf"/>
</DebugOption>
<ExcludeFile/>
</Target>
<Target name="MMDVM_Nucleo_446" isCurrent="0">
<Device manufacturerId="9" manufacturerName="ST" chipId="344" chipName="STM32F407VG" boardId="" boardName=""/>
<BuildOption>
<Compile>
<Option name="OptimizationLevel" value="4"/>
<Option name="UseFPU" value="0"/>
<Option name="UserEditCompiler" value=""/>
<Option name="SupportCPlusplus" value="1"/>
<Option name="FPU" value="2"/>
<Includepaths>
<Includepath path="."/>
</Includepaths>
<DefinedSymbols>
<Define name="STM32F4XX"/>
<Define name="USE_STDPERIPH_DRIVER"/>
<Define name="__ASSEMBLY__"/>
<Define name="SUPPORT_CPLUSPLUS"/>
<Define name="HSE_VALUE=8000000"/>
<Define name="__FPU_USED"/>
<Define name="STM32F4_NUCLEO"/>
<Define name="STM32F446xx"/>
</DefinedSymbols>
</Compile>
<Link useDefault="0">
<Option name="DiscardUnusedSection" value="0"/>
<Option name="UserEditLinkder" value=""/>
<Option name="UseMemoryLayout" value="0"/>
<Option name="nostartfiles" value="1"/>
<Option name="LTO" value="0"/>
<Option name="IsNewStartupCode" value="1"/>
<Option name="Library" value="Semihosting"/>
<Option name="UserEditLinker" value="-lstdc++; --specs=nano.specs;"/>
<LinkedLibraries>
<Libset dir="stm32f4xx_lib\cmsis\lib\gcc\" libs="arm_cortexm4lf_math"/>
</LinkedLibraries>
<MemoryAreas debugInFlashNotRAM="1">
<Memory name="IROM1" type="ReadOnly" size="0x00100000" startValue="0x08000000"/>
<Memory name="IRAM1" type="ReadWrite" size="0x00020000" startValue="0x20000000"/>
<Memory name="IROM2" type="ReadOnly" size="" startValue=""/>
<Memory name="IRAM2" type="ReadWrite" size="0x00010000" startValue="0x10000000"/>
</MemoryAreas>
<LocateLinkFile path="./stm32f4xx_link.ld" type="0"/>
</Link>
<Output>
<Option name="OutputFileType" value="0"/>
<Option name="Path" value="./"/>
<Option name="Name" value="MMDVM_NUCLEO"/>
<Option name="HEX" value="1"/>
<Option name="BIN" value="1"/>
</Output>
<User>
<UserRun name="Run#1" type="Before" checked="0" value=""/>
<UserRun name="Run#1" type="After" checked="0" value=""/>
</User>
</BuildOption>
<DebugOption>
<Option name="org.coocox.codebugger.gdbjtag.core.adapter" value="ST-Link"/>
<Option name="org.coocox.codebugger.gdbjtag.core.debugMode" value="SWD"/>
<Option name="org.coocox.codebugger.gdbjtag.core.clockDiv" value="1M"/>
<Option name="org.coocox.codebugger.gdbjtag.corerunToMain" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.jlinkgdbserver" value=""/>
<Option name="org.coocox.codebugger.gdbjtag.core.userDefineGDBScript" value=""/>
<Option name="org.coocox.codebugger.gdbjtag.core.targetEndianess" value="0"/>
<Option name="org.coocox.codebugger.gdbjtag.core.jlinkResetMode" value="Type 0: Normal"/>
<Option name="org.coocox.codebugger.gdbjtag.core.resetMode" value="SYSRESETREQ"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ifSemihost" value="0"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ifCacheRom" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.ipAddress" value="127.0.0.1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.portNumber" value="2009"/>
<Option name="org.coocox.codebugger.gdbjtag.core.autoDownload" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.verify" value="1"/>
<Option name="org.coocox.codebugger.gdbjtag.core.downloadFuction" value="Erase Effected"/>
<Option name="org.coocox.codebugger.gdbjtag.core.defaultAlgorithm" value="STM32F4xx_1024.elf"/>
</DebugOption>
<ExcludeFile/>
</Target>
<Components path="./">
</Components>
<Files>
<File name="DMRIdleRX.h" path="DMRIdleRX.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_dac.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_dac.c" type="1"/>
<File name="DMRDMOTX.cpp" path="DMRDMOTX.cpp" type="1"/>
<File name="DMRRX.cpp" path="DMRRX.cpp" type="1"/>
<File name="YSFRX.cpp" path="YSFRX.cpp" type="1"/>
<File name="CalRSSI.cpp" path="CalRSSI.cpp" type="1"/>
<File name="STM32F4XX_Lib/Device/stm32f4xx.h" path="STM32F4XX_Lib/Device/stm32f4xx.h" type="1"/>
<File name="SampleRB.cpp" path="SampleRB.cpp" type="1"/>
<File name="CalDStarTX.h" path="CalDStarTX.h" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Include/core_cm4.h" path="STM32F4XX_Lib/CMSIS/Include/core_cm4.h" type="1"/>
<File name="DMRSlotRX.h" path="DMRSlotRX.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_tim.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_tim.c" type="1"/>
<File name="YSFRX.h" path="YSFRX.h" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Include" path="" type="2"/>
<File name="IO.cpp" path="IO.cpp" type="1"/>
<File name="DMRDMORX.cpp" path="DMRDMORX.cpp" type="1"/>
<File name="P25RX.h" path="P25RX.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/misc.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/misc.c" type="1"/>
<File name="STM32F4XX_Lib/CMSIS" path="" type="2"/>
<File name="SerialArduino.cpp" path="SerialArduino.cpp" type="1"/>
<File name="SerialPort.cpp" path="SerialPort.cpp" type="1"/>
<File name="STM32F4XX_Lib/Device/stm32f4xx_conf.h" path="STM32F4XX_Lib/Device/stm32f4xx_conf.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_adc.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_adc.c" type="1"/>
<File name="DStarTX.cpp" path="DStarTX.cpp" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_usart.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_usart.c" type="1"/>
<File name="SampleRB.h" path="SampleRB.h" type="1"/>
<File name="YSFTX.h" path="YSFTX.h" type="1"/>
<File name="DMRRX.h" path="DMRRX.h" type="1"/>
<File name="CalRSSI.h" path="CalRSSI.h" type="1"/>
<File name="IOTeensy.cpp" path="IOTeensy.cpp" type="1"/>
<File name="MMDVM.cpp" path="MMDVM.cpp" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Include/core_cmSimd.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmSimd.h" type="1"/>
<File name="DMRDMORX.h" path="DMRDMORX.h" type="1"/>
<File name="SerialPort.h" path="SerialPort.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_dac.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_dac.h" type="1"/>
<File name="CWIdTX.h" path="CWIdTX.h" type="1"/>
<File name="STM32F4XX_Lib/Device/system_stm32f4xx.h" path="STM32F4XX_Lib/Device/system_stm32f4xx.h" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Include/core_cmFunc.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmFunc.h" type="1"/>
<File name="CalDStarTX.cpp" path="CalDStarTX.cpp" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source" path="" type="2"/>
<File name="CalDMR.h" path="CalDMR.h" type="1"/>
<File name="DMRDMOTX.h" path="DMRDMOTX.h" type="1"/>
<File name="IODue.cpp" path="IODue.cpp" type="1"/>
<File name="DMRTX.cpp" path="DMRTX.cpp" type="1"/>
<File name="P25RX.cpp" path="P25RX.cpp" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Lib/GCC" path="" type="2"/>
<File name="STM32F4XX_Lib" path="" type="2"/>
<File name="STM32F4XX_Lib/CMSIS/Include/core_cmInstr.h" path="STM32F4XX_Lib/CMSIS/Include/core_cmInstr.h" type="1"/>
<File name="DMRTX.h" path="DMRTX.h" type="1"/>
<File name="STM32F4XX_Lib/Device/system_stm32f4xx.c" path="STM32F4XX_Lib/Device/system_stm32f4xx.c" type="1"/>
<File name="RSSIRB.h" path="RSSIRB.h" type="1"/>
<File name="STM32F4XX_Lib/Device/startup/startup_stm32f4xx.c" path="STM32F4XX_Lib/Device/startup/startup_stm32f4xx.c" type="1"/>
<File name="STM32F4XX_Lib/Device/startup" path="" type="2"/>
<File name="SerialRB.h" path="SerialRB.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_gpio.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_gpio.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver" path="" type="2"/>
<File name="DMRDefines.h" path="DMRDefines.h" type="1"/>
<File name="CalDMR.cpp" path="CalDMR.cpp" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_adc.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_adc.h" type="1"/>
<File name="SerialSTM.cpp" path="SerialSTM.cpp" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" path="STM32F4XX_Lib/CMSIS/Lib/GCC/libarm_cortexM4lf_math.a" type="1"/>
<File name="DStarDefines.h" path="DStarDefines.h" type="1"/>
<File name="DStarRX.h" path="DStarRX.h" type="1"/>
<File name="Config.h" path="Config.h" type="1"/>
<File name="DMRSlotType.cpp" path="DMRSlotType.cpp" type="1"/>
<File name="Globals.h" path="Globals.h" type="1"/>
<File name="STM32F4XX_Lib/Device" path="" type="2"/>
<File name="CalDStarRX.cpp" path="CalDStarRX.cpp" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_tim.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_tim.h" type="1"/>
<File name="CalDStarRX.h" path="CalDStarRX.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include" path="" type="2"/>
<File name="IO.h" path="IO.h" type="1"/>
<File name="Utils.cpp" path="Utils.cpp" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/.DS_Store" path="STM32F4XX_Lib/CMSIS/.DS_Store" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Lib/.DS_Store" path="STM32F4XX_Lib/CMSIS/Lib/.DS_Store" type="1"/>
<File name="Utils.h" path="Utils.h" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Lib" path="" type="2"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/.DS_Store" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/.DS_Store" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Include/.DS_Store" path="STM32F4XX_Lib/CMSIS/Include/.DS_Store" type="1"/>
<File name="STM32F4XX_Lib/CMSIS/Include/arm_math.h" path="STM32F4XX_Lib/CMSIS/Include/arm_math.h" type="1"/>
<File name="YSFDefines.h" path="YSFDefines.h" type="1"/>
<File name="DStarTX.h" path="DStarTX.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_rcc.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_rcc.c" type="1"/>
<File name="STM32F4XX_Lib/Device/.DS_Store" path="STM32F4XX_Lib/Device/.DS_Store" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_rcc.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_rcc.h" type="1"/>
<File name="P25Defines.h" path="P25Defines.h" type="1"/>
<File name="DMRSlotType.h" path="DMRSlotType.h" type="1"/>
<File name="Debug.h" path="Debug.h" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/misc.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/misc.h" type="1"/>
<File name="P25TX.h" path="P25TX.h" type="1"/>
<File name="RSSIRB.cpp" path="RSSIRB.cpp" type="1"/>
<File name="DStarRX.cpp" path="DStarRX.cpp" type="1"/>
<File name="DMRSlotRX.cpp" path="DMRSlotRX.cpp" type="1"/>
<File name="IOSTM.cpp" path="IOSTM.cpp" type="1"/>
<File name="P25TX.cpp" path="P25TX.cpp" type="1"/>
<File name="SerialRB.cpp" path="SerialRB.cpp" type="1"/>
<File name="CWIdTX.cpp" path="CWIdTX.cpp" type="1"/>
<File name="DMRIdleRX.cpp" path="DMRIdleRX.cpp" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_usart.h" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/include/stm32f4xx_usart.h" type="1"/>
<File name="STM32F4XX_Lib/.DS_Store" path="STM32F4XX_Lib/.DS_Store" type="1"/>
<File name="YSFTX.cpp" path="YSFTX.cpp" type="1"/>
<File name="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_gpio.c" path="STM32F4XX_Lib/STM32F4xx_StdPeriph_Driver/source/stm32f4xx_gpio.c" type="1"/>
</Files>
</Project>
Makefile
+9 -39
View File
@@ -25,7 +25,6 @@ F7_LIB_PATH=./STM32F7XX_Lib
# MCU external clock frequency (Hz) # MCU external clock frequency (Hz)
CLK_MMDVM_PI=12000000 CLK_MMDVM_PI=12000000
CLK_NUCLEO=8000000 CLK_NUCLEO=8000000
CLK_12MHZ=12000000
# Directory Structure # Directory Structure
BINDIR=bin BINDIR=bin
@@ -94,8 +93,6 @@ ifndef $(OSC)
OSC=$(CLK_MMDVM_PI) OSC=$(CLK_MMDVM_PI)
else ifeq ($(MAKECMDGOALS),pi-f722) else ifeq ($(MAKECMDGOALS),pi-f722)
OSC=$(CLK_MMDVM_PI) OSC=$(CLK_MMDVM_PI)
else ifeq ($(MAKECMDGOALS),drcc_nqf)
OSC=$(CLK_12MHZ)
else else
OSC=$(CLK_NUCLEO) OSC=$(CLK_NUCLEO)
endif endif
@@ -131,15 +128,8 @@ DEFS_NUCLEO_F767=-DUSE_HAL_DRIVER -DSTM32F767xx -DSTM32F7XX -DSTM32F7_NUCLEO -DH
DEFS_PI_F722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_PI -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE DEFS_PI_F722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_PI -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# MMDVM-F7M F0DEI board: # MMDVM-F7M F0DEI board:
DEFS_F7M=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_F7M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE DEFS_F7M=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_F7M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# MMDVM_RPT_Hat F0DEI, DB9MAT, DF2ET board:
DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# STM32F4 DVM board: # STM32F4 DVM board:
DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# MMDVM_RPT_Hat BG4TGO, BG5HHP board:
DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# DRCC_DVM BG7NQF board:
DEFS_DRCC_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DDRCC_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
# Build compiler flags # Build compiler flags
CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4) CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
@@ -155,10 +145,10 @@ LDFLAGS_F722 =-T stm32f722_link.ld $(MCFLAGS_F7) --specs=nosys.specs $(INCLUDES_
# Common flags # Common flags
CFLAGS=-Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS CFLAGS=-Os -ffunction-sections -fdata-sections -fno-builtin -Wno-implicit -DCUSTOM_NEW -DNO_EXCEPTIONS
CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -fno-rtti -DCUSTOM_NEW -DNO_EXCEPTIONS
LDFLAGS=-Os --specs=nano.specs -Wl,-Map=bin/mmdvm.map LDFLAGS=-Os --specs=nano.specs
# Build Rules # Build Rules
.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm drcc_nqf clean .PHONY: all release dis pi pi_f722 f4m nucleo f767 dvm clean
# Default target: Nucleo-64 F446RE board # Default target: Nucleo-64 F446RE board
all: nucleo all: nucleo
@@ -187,18 +177,6 @@ f7m: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_F7M)
f7m: LDFLAGS+=$(LDFLAGS_F722) f7m: LDFLAGS+=$(LDFLAGS_F722)
f7m: release_f7 f7m: release_f7
rpt_hat: GitVersion.h
rpt_hat: CFLAGS+=$(CFLAGS_F7) $(DEFS_RPT_HAT)
rpt_hat: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_RPT_HAT)
rpt_hat: LDFLAGS+=$(LDFLAGS_F722)
rpt_hat: release_f7
rpt_hat_tgo: GitVersion.h
rpt_hat_tgo: CFLAGS+=$(CFLAGS_F4) $(DEFS_RPT_HAT_TGO)
rpt_hat_tgo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_RPT_HAT_TGO)
rpt_hat_tgo: LDFLAGS+=$(LDFLAGS_F4)
rpt_hat_tgo: release_f4
nucleo: GitVersion.h nucleo: GitVersion.h
nucleo: CFLAGS+=$(CFLAGS_F4) $(DEFS_NUCLEO) nucleo: CFLAGS+=$(CFLAGS_F4) $(DEFS_NUCLEO)
nucleo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_NUCLEO) nucleo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_NUCLEO)
@@ -223,12 +201,6 @@ dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM)
dvm: LDFLAGS+=$(LDFLAGS_F4) dvm: LDFLAGS+=$(LDFLAGS_F4)
dvm: release_f4 dvm: release_f4
drcc_nqf: GitVersion.h
drcc_nqf: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
drcc_nqf: LDFLAGS+=$(LDFLAGS_F4)
drcc_nqf: release_f4
release_f4: $(BINDIR) release_f4: $(BINDIR)
release_f4: $(OBJDIR_F4) release_f4: $(OBJDIR_F4)
release_f4: $(BINDIR)/$(BINHEX_F4) release_f4: $(BINDIR)/$(BINHEX_F4)
@@ -251,7 +223,7 @@ $(OBJDIR_F7):
$(BINDIR)/$(BINHEX_F4): $(BINDIR)/$(BINELF_F4) $(BINDIR)/$(BINHEX_F4): $(BINDIR)/$(BINELF_F4)
$(CP) -O ihex $< $@ $(CP) -O ihex $< $@
@echo "Objcopy from ELF to IHEX complete!\n" @echo "Objcopy from ELF to IHEX complete!\n"
$(BINDIR)/$(BINBIN_F4): $(BINDIR)/$(BINELF_F4) $(BINDIR)/$(BINBIN_F4): $(BINDIR)/$(BINELF_F4)
$(CP) -O binary $< $@ $(CP) -O binary $< $@
@echo "Objcopy from ELF to BINARY complete!\n" @echo "Objcopy from ELF to BINARY complete!\n"
@@ -264,7 +236,7 @@ $(BINDIR)/$(BINELF_F4): $(OBJ_F4)
$(BINDIR)/$(BINHEX_F7): $(BINDIR)/$(BINELF_F7) $(BINDIR)/$(BINHEX_F7): $(BINDIR)/$(BINELF_F7)
$(CP) -O ihex $< $@ $(CP) -O ihex $< $@
@echo "Objcopy from ELF to IHEX complete!\n" @echo "Objcopy from ELF to IHEX complete!\n"
$(BINDIR)/$(BINBIN_F7): $(BINDIR)/$(BINELF_F7) $(BINDIR)/$(BINBIN_F7): $(BINDIR)/$(BINELF_F7)
$(CP) -O binary $< $@ $(CP) -O binary $< $@
@echo "Objcopy from ELF to BINARY complete!\n" @echo "Objcopy from ELF to BINARY complete!\n"
@@ -354,15 +326,17 @@ deploy-dvm: deploy-pi
deploy-pi-f7: deploy-pi-f7:
ifneq ($(wildcard /usr/local/bin/stm32flash),) ifneq ($(wildcard /usr/local/bin/stm32flash),)
-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0 -/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-/usr/local/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F7)
/usr/local/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0 /usr/local/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
endif
else ifneq ($(wildcard /usr/bin/stm32flash),) ifneq ($(wildcard /usr/bin/stm32flash),)
-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0 -/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
-/usr/bin/stm32ld /dev/ttyAMA0 57600 bin/$(BINBIN_F7)
/usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0 /usr/bin/stm32flash -v -w bin/$(BINBIN_F7) -g 0x0 -R -c /dev/ttyAMA0
endif endif
deploy-f7m: deploy-pi-f7 deploy-f7m: deploy-pi-f7
deploy-rpt_hat: deploy-pi-f7
# Export the current git version if the index file exists, else 000... # Export the current git version if the index file exists, else 000...
GitVersion.h: GitVersion.h:
@@ -377,7 +351,3 @@ else
echo "#define GITVERSION \"0000000\"" > $@ echo "#define GITVERSION \"0000000\"" > $@
endif endif
endif endif
flash_f4:
@echo "flashing firmware..."
st-flash write bin/$(BINBIN_F4) 0x8000000
Makefile.CMSIS
+4 -18
View File
@@ -25,7 +25,7 @@ STARTUP:=$(SYSDIR)/startup_stm32f105xc.S
STARTUP_DEFS= STARTUP_DEFS=
# Include directory for CMSIS # Include directory for CMSIS
CMSISDIR:=STM32F10X_Lib/CMSIS CMSISDIR:=/opt/STM32Cube_FW_F1_V1.4.0/Drivers/CMSIS
# Libraries # Libraries
LIBDIR:= LIBDIR:=
@@ -65,7 +65,7 @@ COMMON_FLAGS =-mthumb -mlittle-endian -mcpu=$(MCPU)
COMMON_FLAGS+= -Wall COMMON_FLAGS+= -Wall
COMMON_FLAGS+= -I. -I$(CMSISDIR)/Include -I$(CMSISDIR)/Device/ST/STM32F1xx/Include -I$(SYSDIR) COMMON_FLAGS+= -I. -I$(CMSISDIR)/Include -I$(CMSISDIR)/Device/ST/STM32F1xx/Include -I$(SYSDIR)
COMMON_FLAGS+= $(addprefix -I,$(INCDIR)) COMMON_FLAGS+= $(addprefix -I,$(INCDIR))
COMMON_FLAGS+= -D$(MCU) -DMADEBYMAKEFILE -DSTM32F1 COMMON_FLAGS+= -D$(MCU)
COMMON_FLAGS+= -Os -flto -ffunction-sections -fdata-sections COMMON_FLAGS+= -Os -flto -ffunction-sections -fdata-sections
COMMON_FLAGS+= -g COMMON_FLAGS+= -g
# Assembler flags # Assembler flags
@@ -91,7 +91,7 @@ DEPENDS:=$(CSRC:%.c=$(OBJDIR)/%.d) $(CXXSRC:%.cpp=$(OBJDIR)/%.d)
# Targets # Targets
.PHONY: all .PHONY: all
all: GitVersion.h $(DIS) $(HEX) all: $(DIS) $(HEX)
$(SIZE) $(ELF) $(SIZE) $(ELF)
.PHONY: program .PHONY: program
@@ -116,7 +116,7 @@ debug: $(ELF)
.PHONY: clean .PHONY: clean
clean: clean:
$(RM) $(OBJ) $(HEX) $(ELF) $(DIS) $(MAP) $(DEPENDS) GitVersion.h $(RM) $(OBJ) $(HEX) $(ELF) $(DIS) $(MAP) $(DEPENDS)
# implicit rules # implicit rules
.elf.hex: .elf.hex:
@@ -149,17 +149,3 @@ $(DIS): $(ELF)
# include dependecies # include dependecies
-include $(DEPENDS) -include $(DEPENDS)
# Export the current git version if the index file exists, else 000...
GitVersion.h:
ifdef SYSTEMROOT
echo #define GITVERSION "0000000" > $@
else ifdef SystemRoot
echo #define GITVERSION "0000000" > $@
else
ifneq ("$(wildcard .git/index)","")
echo "#define GITVERSION \"$(shell git rev-parse --short HEAD)\"" > $@
else
echo "#define GITVERSION \"0000000\"" > $@
endif
endif
NXDNTX.cpp
+7 -38
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2009-2018,2020 by Jonathan Naylor G4KLX * Copyright (C) 2009-2018 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU * Copyright (C) 2017 by Andy Uribe CA6JAU
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
@@ -45,7 +45,7 @@ const uint8_t NXDN_PREAMBLE[] = {0x57U, 0x75U, 0xFDU};
const uint8_t NXDN_SYNC = 0x5FU; const uint8_t NXDN_SYNC = 0x5FU;
CNXDNTX::CNXDNTX() : CNXDNTX::CNXDNTX() :
m_buffer(TX_BUFFER_LEN), m_buffer(4000U),
m_modFilter(), m_modFilter(),
m_sincFilter(), m_sincFilter(),
m_modState(), m_modState(),
@@ -53,9 +53,7 @@ m_sincState(),
m_poBuffer(), m_poBuffer(),
m_poLen(0U), m_poLen(0U),
m_poPtr(0U), m_poPtr(0U),
m_txDelay(240U), // 200ms m_txDelay(240U) // 200ms
m_txHang(3000U), // 5s
m_txCount(0U)
{ {
::memset(m_modState, 0x00U, 16U * sizeof(q15_t)); ::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
::memset(m_sincState, 0x00U, 70U * sizeof(q15_t)); ::memset(m_sincState, 0x00U, 70U * sizeof(q15_t));
@@ -72,7 +70,10 @@ m_txCount(0U)
void CNXDNTX::process() void CNXDNTX::process()
{ {
if (m_poLen == 0U && m_buffer.getData() > 0U) { if (m_buffer.getData() == 0U && m_poLen == 0U)
return;
if (m_poLen == 0U) {
if (!m_tx) { if (!m_tx) {
for (uint16_t i = 0U; i < m_txDelay; i++) for (uint16_t i = 0U; i < m_txDelay; i++)
m_poBuffer[m_poLen++] = NXDN_SYNC; m_poBuffer[m_poLen++] = NXDN_SYNC;
@@ -97,8 +98,6 @@ void CNXDNTX::process()
writeByte(c); writeByte(c);
space -= 4U * NXDN_RADIO_SYMBOL_LENGTH; space -= 4U * NXDN_RADIO_SYMBOL_LENGTH;
if (m_duplex)
m_txCount = m_txHang;
if (m_poPtr >= m_poLen) { if (m_poPtr >= m_poLen) {
m_poPtr = 0U; m_poPtr = 0U;
@@ -106,19 +105,6 @@ void CNXDNTX::process()
return; return;
} }
} }
} else if (m_txCount > 0U) {
// Transmit silence until the hang timer has expired.
uint16_t space = io.getSpace();
while (space > (4U * NXDN_RADIO_SYMBOL_LENGTH)) {
writeSilence();
space -= 4U * NXDN_RADIO_SYMBOL_LENGTH;
m_txCount--;
if (m_txCount == 0U)
return;
}
} }
} }
@@ -169,19 +155,6 @@ void CNXDNTX::writeByte(uint8_t c)
io.write(STATE_NXDN, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U); io.write(STATE_NXDN, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
} }
void CNXDNTX::writeSilence()
{
q15_t inBuffer[4U] = {0x00U, 0x00U, 0x00U, 0x00U};
q15_t intBuffer[NXDN_RADIO_SYMBOL_LENGTH * 4U];
q15_t outBuffer[NXDN_RADIO_SYMBOL_LENGTH * 4U];
::arm_fir_interpolate_q15(&m_modFilter, inBuffer, intBuffer, 4U);
::arm_fir_fast_q15(&m_sincFilter, intBuffer, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
io.write(STATE_NXDN, outBuffer, NXDN_RADIO_SYMBOL_LENGTH * 4U);
}
void CNXDNTX::setTXDelay(uint8_t delay) void CNXDNTX::setTXDelay(uint8_t delay)
{ {
m_txDelay = 300U + uint16_t(delay) * 6U; // 500ms + tx delay m_txDelay = 300U + uint16_t(delay) * 6U; // 500ms + tx delay
@@ -195,7 +168,3 @@ uint8_t CNXDNTX::getSpace() const
return m_buffer.getSpace() / NXDN_FRAME_LENGTH_BYTES; return m_buffer.getSpace() / NXDN_FRAME_LENGTH_BYTES;
} }
void CNXDNTX::setParams(uint8_t txHang)
{
m_txHang = txHang * 600U;
}
NXDNTX.h
+2 -6
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX * Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@@ -35,8 +35,6 @@ public:
uint8_t getSpace() const; uint8_t getSpace() const;
void setParams(uint8_t txHang);
private: private:
CSerialRB m_buffer; CSerialRB m_buffer;
arm_fir_interpolate_instance_q15 m_modFilter; arm_fir_interpolate_instance_q15 m_modFilter;
@@ -47,11 +45,9 @@ private:
uint16_t m_poLen; uint16_t m_poLen;
uint16_t m_poPtr; uint16_t m_poPtr;
uint16_t m_txDelay; uint16_t m_txDelay;
uint32_t m_txHang;
uint32_t m_txCount;
void writeByte(uint8_t c); void writeByte(uint8_t c);
void writeSilence();
}; };
#endif #endif
P25Defines.h
-5
View File
@@ -47,11 +47,6 @@ const unsigned int P25_TSDU_FRAME_LENGTH_BITS = P25_TSDU_FRAME_LENGTH_BYTES
const unsigned int P25_TSDU_FRAME_LENGTH_SYMBOLS = P25_TSDU_FRAME_LENGTH_BYTES * 4U; const unsigned int P25_TSDU_FRAME_LENGTH_SYMBOLS = P25_TSDU_FRAME_LENGTH_BYTES * 4U;
const unsigned int P25_TSDU_FRAME_LENGTH_SAMPLES = P25_TSDU_FRAME_LENGTH_SYMBOLS * P25_RADIO_SYMBOL_LENGTH; const unsigned int P25_TSDU_FRAME_LENGTH_SAMPLES = P25_TSDU_FRAME_LENGTH_SYMBOLS * P25_RADIO_SYMBOL_LENGTH;
const unsigned int P25_PDU_HDR_FRAME_LENGTH_BYTES = 45U;
const unsigned int P25_PDU_HDR_FRAME_LENGTH_BITS = P25_PDU_HDR_FRAME_LENGTH_BYTES * 8U;
const unsigned int P25_PDU_HDR_FRAME_LENGTH_SYMBOLS = P25_PDU_HDR_FRAME_LENGTH_BYTES * 4U;
const unsigned int P25_PDU_HDR_FRAME_LENGTH_SAMPLES = P25_PDU_HDR_FRAME_LENGTH_SYMBOLS * P25_RADIO_SYMBOL_LENGTH;
const unsigned int P25_SYNC_LENGTH_BYTES = 6U; const unsigned int P25_SYNC_LENGTH_BYTES = 6U;
const unsigned int P25_SYNC_LENGTH_BITS = P25_SYNC_LENGTH_BYTES * 8U; const unsigned int P25_SYNC_LENGTH_BITS = P25_SYNC_LENGTH_BYTES * 8U;
const unsigned int P25_SYNC_LENGTH_SYMBOLS = P25_SYNC_LENGTH_BYTES * 4U; const unsigned int P25_SYNC_LENGTH_SYMBOLS = P25_SYNC_LENGTH_BYTES * 4U;
P25RX.cpp
+1 -13
View File
@@ -199,19 +199,7 @@ void CP25RX::processHdr(q15_t sample)
serial.writeP25Hdr(frame, P25_HDR_FRAME_LENGTH_BYTES + 1U); serial.writeP25Hdr(frame, P25_HDR_FRAME_LENGTH_BYTES + 1U);
} }
break; break;
case P25_DUID_PDU: { case P25_DUID_TSDU: {
calculateLevels(m_hdrSyncPtr, P25_PDU_HDR_FRAME_LENGTH_SYMBOLS);
DEBUG4("P25RX: sync found in PDU pos/centre/threshold", m_hdrSyncPtr, m_centreVal, m_thresholdVal);
uint8_t frame[P25_PDU_HDR_FRAME_LENGTH_BYTES + 1U];
samplesToBits(m_hdrSyncPtr, P25_PDU_HDR_FRAME_LENGTH_SYMBOLS, frame, 8U, m_centreVal, m_thresholdVal);
frame[0U] = 0x01U;
serial.writeP25Hdr(frame, P25_PDU_HDR_FRAME_LENGTH_BYTES + 1U);
}
break;
case P25_DUID_TSDU: {
calculateLevels(m_hdrStartPtr, P25_TSDU_FRAME_LENGTH_SYMBOLS); calculateLevels(m_hdrStartPtr, P25_TSDU_FRAME_LENGTH_SYMBOLS);
DEBUG4("P25RX: sync found in TSDU pos/centre/threshold", m_hdrSyncPtr, m_centreVal, m_thresholdVal); DEBUG4("P25RX: sync found in TSDU pos/centre/threshold", m_hdrSyncPtr, m_centreVal, m_thresholdVal);
P25TX.cpp
+8 -40
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2016,2017,2020 by Jonathan Naylor G4KLX * Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
* Copyright (C) 2017 by Andy Uribe CA6JAU * Copyright (C) 2017 by Andy Uribe CA6JAU
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
@@ -43,7 +43,7 @@ const q15_t P25_LEVELD = -1260;
const uint8_t P25_START_SYNC = 0x77U; const uint8_t P25_START_SYNC = 0x77U;
CP25TX::CP25TX() : CP25TX::CP25TX() :
m_buffer(TX_BUFFER_LEN), m_buffer(4000U),
m_modFilter(), m_modFilter(),
m_lpFilter(), m_lpFilter(),
m_modState(), m_modState(),
@@ -51,9 +51,7 @@ m_lpState(),
m_poBuffer(), m_poBuffer(),
m_poLen(0U), m_poLen(0U),
m_poPtr(0U), m_poPtr(0U),
m_txDelay(240U), // 200ms m_txDelay(240U) // 200ms
m_txHang(6000U), // 5s
m_txCount(0U)
{ {
::memset(m_modState, 0x00U, 16U * sizeof(q15_t)); ::memset(m_modState, 0x00U, 16U * sizeof(q15_t));
::memset(m_lpState, 0x00U, 60U * sizeof(q15_t)); ::memset(m_lpState, 0x00U, 60U * sizeof(q15_t));
@@ -70,7 +68,10 @@ m_txCount(0U)
void CP25TX::process() void CP25TX::process()
{ {
if (m_poLen == 0U && m_buffer.getData() > 0U) { if (m_buffer.getData() == 0U && m_poLen == 0U)
return;
if (m_poLen == 0U) {
if (!m_tx) { if (!m_tx) {
for (uint16_t i = 0U; i < m_txDelay; i++) for (uint16_t i = 0U; i < m_txDelay; i++)
m_poBuffer[m_poLen++] = P25_START_SYNC; m_poBuffer[m_poLen++] = P25_START_SYNC;
@@ -93,28 +94,13 @@ void CP25TX::process()
writeByte(c); writeByte(c);
space -= 4U * P25_RADIO_SYMBOL_LENGTH; space -= 4U * P25_RADIO_SYMBOL_LENGTH;
if (m_duplex)
m_txCount = m_txHang;
if (m_poPtr >= m_poLen) { if (m_poPtr >= m_poLen) {
m_poPtr = 0U; m_poPtr = 0U;
m_poLen = 0U; m_poLen = 0U;
return; return;
} }
} }
} else if (m_txCount > 0U) {
// Transmit silence until the hang timer has expired.
uint16_t space = io.getSpace();
while (space > (4U * P25_RADIO_SYMBOL_LENGTH)) {
writeSilence();
space -= 4U * P25_RADIO_SYMBOL_LENGTH;
m_txCount--;
if (m_txCount == 0U)
return;
}
} }
} }
@@ -166,19 +152,6 @@ void CP25TX::writeByte(uint8_t c)
io.write(STATE_P25, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U); io.write(STATE_P25, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
} }
void CP25TX::writeSilence()
{
q15_t inBuffer[4U] = {0x00U, 0x00U, 0x00U, 0x00U};
q15_t intBuffer[P25_RADIO_SYMBOL_LENGTH * 4U];
q15_t outBuffer[P25_RADIO_SYMBOL_LENGTH * 4U];
::arm_fir_interpolate_q15(&m_modFilter, inBuffer, intBuffer, 4U);
::arm_fir_fast_q15(&m_lpFilter, intBuffer, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
io.write(STATE_P25, outBuffer, P25_RADIO_SYMBOL_LENGTH * 4U);
}
void CP25TX::setTXDelay(uint8_t delay) void CP25TX::setTXDelay(uint8_t delay)
{ {
m_txDelay = 600U + uint16_t(delay) * 12U; // 500ms + tx delay m_txDelay = 600U + uint16_t(delay) * 12U; // 500ms + tx delay
@@ -191,8 +164,3 @@ uint8_t CP25TX::getSpace() const
{ {
return m_buffer.getSpace() / P25_LDU_FRAME_LENGTH_BYTES; return m_buffer.getSpace() / P25_LDU_FRAME_LENGTH_BYTES;
} }
void CP25TX::setParams(uint8_t txHang)
{
m_txHang = txHang * 1200U;
}
P25TX.h
+2 -6
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2016,2017,2020 by Jonathan Naylor G4KLX * Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@@ -35,8 +35,6 @@ public:
uint8_t getSpace() const; uint8_t getSpace() const;
void setParams(uint8_t txHang);
private: private:
CSerialRB m_buffer; CSerialRB m_buffer;
arm_fir_interpolate_instance_q15 m_modFilter; arm_fir_interpolate_instance_q15 m_modFilter;
@@ -47,11 +45,9 @@ private:
uint16_t m_poLen; uint16_t m_poLen;
uint16_t m_poPtr; uint16_t m_poPtr;
uint16_t m_txDelay; uint16_t m_txDelay;
uint32_t m_txHang;
uint32_t m_txCount;
void writeByte(uint8_t c); void writeByte(uint8_t c);
void writeSilence();
}; };
#endif #endif
POCSAGTX.cpp
+7 -11
View File
@@ -57,9 +57,11 @@ void CPOCSAGTX::process()
if (m_poLen == 0U) { if (m_poLen == 0U) {
if (!m_tx) { if (!m_tx) {
DEBUG1("MMDVM, sending preamble");
for (uint16_t i = 0U; i < m_txDelay; i++) for (uint16_t i = 0U; i < m_txDelay; i++)
m_poBuffer[m_poLen++] = POCSAG_SYNC; m_poBuffer[m_poLen++] = POCSAG_SYNC;
} else { } else {
DEBUG2("MMDVM, sending", m_buffer.get());
for (uint8_t i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++) { for (uint8_t i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++) {
uint8_t c = m_buffer.get(); uint8_t c = m_buffer.get();
m_poBuffer[m_poLen++] = c; m_poBuffer[m_poLen++] = c;
@@ -87,24 +89,18 @@ void CPOCSAGTX::process()
} }
} }
bool CPOCSAGTX::busy()
{
if (m_poLen > 0U || m_buffer.getData() > 0U)
return true;
else
return false;
}
uint8_t CPOCSAGTX::writeData(const uint8_t* data, uint8_t length) uint8_t CPOCSAGTX::writeData(const uint8_t* data, uint8_t length)
{ {
if (length != POCSAG_FRAME_LENGTH_BYTES) if (length != (POCSAG_FRAME_LENGTH_BYTES + 1U))
return 4U; return 4U;
uint16_t space = m_buffer.getSpace(); uint16_t space = m_buffer.getSpace();
if (space < POCSAG_FRAME_LENGTH_BYTES) if (space < (POCSAG_FRAME_LENGTH_BYTES + 1U))
return 5U; return 5U;
for (uint8_t i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++) DEBUG2("MMDVM, queueing", data[0U]);
for (uint8_t i = 0U; i < (POCSAG_FRAME_LENGTH_BYTES + 1U); i++)
m_buffer.put(data[i]); m_buffer.put(data[i]);
return 0U; return 0U;
POCSAGTX.h
+3 -5
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2015-2019 by Jonathan Naylor G4KLX * Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
@@ -29,16 +29,12 @@ public:
uint8_t writeData(const uint8_t* data, uint8_t length); uint8_t writeData(const uint8_t* data, uint8_t length);
void writeByte(uint8_t c);
void process(); void process();
void setTXDelay(uint8_t delay); void setTXDelay(uint8_t delay);
uint8_t getSpace() const; uint8_t getSpace() const;
bool busy();
private: private:
CSerialRB m_buffer; CSerialRB m_buffer;
arm_fir_instance_q15 m_modFilter; arm_fir_instance_q15 m_modFilter;
@@ -47,6 +43,8 @@ private:
uint16_t m_poLen; uint16_t m_poLen;
uint16_t m_poPtr; uint16_t m_poPtr;
uint16_t m_txDelay; uint16_t m_txDelay;
void writeByte(uint8_t c);
}; };
#endif #endif
STM32F10X_Lib
-1
Submodule STM32F10X_Lib deleted from 417e0c2f4a
SerialArduino.cpp
+1 -4
View File
@@ -21,10 +21,7 @@
#include "SerialPort.h" #include "SerialPort.h"
#if defined(VK6MST_TEENSY_PI3_SHIELD_I2C) #if defined(__SAM3X8E__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
//it will load I2CTeensy.cpp
#elif defined(__SAM3X8E__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
void CSerialPort::beginInt(uint8_t n, int speed) void CSerialPort::beginInt(uint8_t n, int speed)
{ {
SerialPort.cpp
+122 -194
View File
@@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2013,2015-2020 by Jonathan Naylor G4KLX * Copyright (C) 2013,2015,2016,2017,2018 by Jonathan Naylor G4KLX
* Copyright (C) 2016 by Colin Durbridge G4EML * Copyright (C) 2016 by Colin Durbridge G4EML
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
@@ -65,17 +65,12 @@ const uint8_t MMDVM_NXDN_LOST = 0x41U;
const uint8_t MMDVM_POCSAG_DATA = 0x50U; const uint8_t MMDVM_POCSAG_DATA = 0x50U;
const uint8_t MMDVM_FM_PARAMS1 = 0x60U;
const uint8_t MMDVM_FM_PARAMS2 = 0x61U;
const uint8_t MMDVM_FM_PARAMS3 = 0x62U;
const uint8_t MMDVM_ACK = 0x70U; const uint8_t MMDVM_ACK = 0x70U;
const uint8_t MMDVM_NAK = 0x7FU; const uint8_t MMDVM_NAK = 0x7FU;
const uint8_t MMDVM_SERIAL = 0x80U; const uint8_t MMDVM_SERIAL = 0x80U;
const uint8_t MMDVM_TRANSPARENT = 0x90U; const uint8_t MMDVM_TRANSPARENT = 0x90U;
const uint8_t MMDVM_QSO_INFO = 0x91U;
const uint8_t MMDVM_DEBUG1 = 0xF1U; const uint8_t MMDVM_DEBUG1 = 0xF1U;
const uint8_t MMDVM_DEBUG2 = 0xF2U; const uint8_t MMDVM_DEBUG2 = 0xF2U;
@@ -95,22 +90,14 @@ const uint8_t MMDVM_DEBUG5 = 0xF5U;
#define TCXO "NO TCXO" #define TCXO "NO TCXO"
#endif #endif
#if defined(DRCC_DVM_NQF) #define DESCRIPTION "MMDVM 20180327 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG)"
#define HW_TYPE "MMDVM DRCC_DVM_NQF"
#elif defined(STM32F4_RPT_HAT_TGO)
#define HW_TYPE "MMDVM RPT_HAT_TGO"
#else
#define HW_TYPE "MMDVM"
#endif
#define DESCRIPTION "20200520 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG/FM)"
#if defined(GITVERSION) #if defined(GITVERSION)
#define concat(h, a, b, c) h " " a " " b " GitID #" c "" #define concat(a, b, c) a " " b " GitID #" c ""
const char HARDWARE[] = concat(HW_TYPE, DESCRIPTION, TCXO, GITVERSION); const char HARDWARE[] = concat(DESCRIPTION, TCXO, GITVERSION);
#else #else
#define concat(h, a, b, c, d) h " " a " " b " (Build: " c " " d ")" #define concat(a, b, c, d) a " " b " (Build: " c " " d ")"
const char HARDWARE[] = concat(HW_TYPE, DESCRIPTION, TCXO, __TIME__, __DATE__); const char HARDWARE[] = concat(DESCRIPTION, TCXO, __TIME__, __DATE__);
#endif #endif
const uint8_t PROTOCOL_VERSION = 1U; const uint8_t PROTOCOL_VERSION = 1U;
@@ -174,8 +161,6 @@ void CSerialPort::getStatus()
reply[3U] |= 0x10U; reply[3U] |= 0x10U;
if (m_pocsagEnable) if (m_pocsagEnable)
reply[3U] |= 0x20U; reply[3U] |= 0x20U;
if (m_fmEnable)
reply[3U] |= 0x40U;
reply[4U] = uint8_t(m_modemState); reply[4U] = uint8_t(m_modemState);
@@ -264,7 +249,7 @@ void CSerialPort::getVersion()
uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length) uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
{ {
if (length < 21U) if (length < 18U)
return 4U; return 4U;
bool rxInvert = (data[0U] & 0x01U) == 0x01U; bool rxInvert = (data[0U] & 0x01U) == 0x01U;
@@ -281,7 +266,6 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
bool p25Enable = (data[1U] & 0x08U) == 0x08U; bool p25Enable = (data[1U] & 0x08U) == 0x08U;
bool nxdnEnable = (data[1U] & 0x10U) == 0x10U; bool nxdnEnable = (data[1U] & 0x10U) == 0x10U;
bool pocsagEnable = (data[1U] & 0x20U) == 0x20U; bool pocsagEnable = (data[1U] & 0x20U) == 0x20U;
bool fmEnable = (data[1U] & 0x40U) == 0x40U;
uint8_t txDelay = data[2U]; uint8_t txDelay = data[2U];
if (txDelay > 50U) if (txDelay > 50U)
@@ -289,7 +273,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
MMDVM_STATE modemState = MMDVM_STATE(data[3U]); MMDVM_STATE modemState = MMDVM_STATE(data[3U]);
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_FM && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K && modemState != STATE_POCSAGCAL && modemState != STATE_FMCAL10K && modemState != STATE_FMCAL12K && modemState != STATE_FMCAL15K && modemState != STATE_FMCAL20K && modemState != STATE_FMCAL25K && modemState != STATE_FMCAL30K) if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K)
return 4U; return 4U;
if (modemState == STATE_DSTAR && !dstarEnable) if (modemState == STATE_DSTAR && !dstarEnable)
return 4U; return 4U;
@@ -303,8 +287,6 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
return 4U; return 4U;
if (modemState == STATE_POCSAG && !pocsagEnable) if (modemState == STATE_POCSAG && !pocsagEnable)
return 4U; return 4U;
if (modemState == STATE_FM && !fmEnable)
return 4U;
uint8_t rxLevel = data[4U]; uint8_t rxLevel = data[4U];
@@ -329,13 +311,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
uint8_t pocsagTXLevel = data[17U]; uint8_t pocsagTXLevel = data[17U];
uint8_t fmTXLevel = data[18U]; m_modemState = modemState;
uint8_t p25TXHang = data[19U];
uint8_t nxdnTXHang = data[20U];
setMode(modemState);
m_dstarEnable = dstarEnable; m_dstarEnable = dstarEnable;
m_dmrEnable = dmrEnable; m_dmrEnable = dmrEnable;
@@ -343,7 +319,6 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
m_p25Enable = p25Enable; m_p25Enable = p25Enable;
m_nxdnEnable = nxdnEnable; m_nxdnEnable = nxdnEnable;
m_pocsagEnable = pocsagEnable; m_pocsagEnable = pocsagEnable;
m_fmEnable = fmEnable;
m_duplex = !simplex; m_duplex = !simplex;
dstarTX.setTXDelay(txDelay); dstarTX.setTXDelay(txDelay);
@@ -360,87 +335,14 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
dmrIdleRX.setColorCode(colorCode); dmrIdleRX.setColorCode(colorCode);
ysfTX.setParams(ysfLoDev, ysfTXHang); ysfTX.setParams(ysfLoDev, ysfTXHang);
p25TX.setParams(p25TXHang);
nxdnTX.setParams(nxdnTXHang);
io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, nxdnTXLevel, pocsagTXLevel, fmTXLevel, txDCOffset, rxDCOffset); io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, nxdnTXLevel, pocsagTXLevel, txDCOffset, rxDCOffset);
io.start(); io.start();
return 0U; return 0U;
} }
uint8_t CSerialPort::setFMParams1(const uint8_t* data, uint8_t length)
{
if (length < 8U)
return 4U;
uint8_t speed = data[0U];;
uint16_t frequency = data[1U] * 10U;
uint8_t time = data[2U];
uint8_t holdoff = data[3U];
uint8_t highLevel = data[4U];
uint8_t lowLevel = data[5U];
bool callAtStart = (data[6U] & 0x01U) == 0x01U;
bool callAtEnd = (data[6U] & 0x02U) == 0x02U;
bool callAtLatch = (data[6U] & 0x04U) == 0x04U;
char callsign[50U];
uint8_t n = 0U;
for (uint8_t i = 7U; i < length; i++, n++)
callsign[n] = data[i];
callsign[n] = '\0';
return fm.setCallsign(callsign, speed, frequency, time, holdoff, highLevel, lowLevel, callAtStart, callAtEnd, callAtLatch);
}
uint8_t CSerialPort::setFMParams2(const uint8_t* data, uint8_t length)
{
if (length < 6U)
return 4U;
uint8_t speed = data[0U];
uint16_t frequency = data[1U] * 10U;
uint8_t minTime = data[2U];
uint16_t delay = data[3U] * 10U;
uint8_t level = data[4U];
char ack[50U];
uint8_t n = 0U;
for (uint8_t i = 5U; i < length; i++, n++)
ack[n] = data[i];
ack[n] = '\0';
return fm.setAck(ack, speed, frequency, minTime, delay, level);
}
uint8_t CSerialPort::setFMParams3(const uint8_t* data, uint8_t length)
{
if (length < 12U)
return 4U;
uint16_t timeout = data[0U] * 5U;
uint8_t timeoutLevel = data[1U];
uint8_t ctcssFrequency = data[2U];
uint8_t ctcssHighThreshold = data[3U];
uint8_t ctcssLowThreshold = data[4U];
uint8_t ctcssLevel = data[5U];
uint8_t kerchunkTime = data[6U];
uint8_t hangTime = data[7U];
bool useCOS = (data[8U] & 0x01U) == 0x01U;
bool cosInvert = (data[8U] & 0x02U) == 0x02U;
uint8_t rfAudioBoost = data[9U];
uint8_t maxDev = data[10U];
uint8_t rxLevel = data[11U];
return fm.setMisc(timeout, timeoutLevel, ctcssFrequency, ctcssHighThreshold, ctcssLowThreshold, ctcssLevel, kerchunkTime, hangTime, useCOS, cosInvert, rfAudioBoost, maxDev, rxLevel);
}
uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length) uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
{ {
if (length < 1U) if (length < 1U)
@@ -451,7 +353,7 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
if (modemState == m_modemState) if (modemState == m_modemState)
return 0U; return 0U;
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_FM && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K && modemState != STATE_POCSAGCAL && modemState != STATE_FMCAL10K && modemState != STATE_FMCAL12K && modemState != STATE_FMCAL15K && modemState != STATE_FMCAL20K && modemState != STATE_FMCAL25K && modemState != STATE_FMCAL30K) if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K)
return 4U; return 4U;
if (modemState == STATE_DSTAR && !m_dstarEnable) if (modemState == STATE_DSTAR && !m_dstarEnable)
return 4U; return 4U;
@@ -465,8 +367,6 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
return 4U; return 4U;
if (modemState == STATE_POCSAG && !m_pocsagEnable) if (modemState == STATE_POCSAG && !m_pocsagEnable)
return 4U; return 4U;
if (modemState == STATE_FM && !m_fmEnable)
return 4U;
setMode(modemState); setMode(modemState);
@@ -478,95 +378,157 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
switch (modemState) { switch (modemState) {
case STATE_DMR: case STATE_DMR:
DEBUG1("Mode set to DMR"); DEBUG1("Mode set to DMR");
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
cwIdTX.reset();
break; break;
case STATE_DSTAR: case STATE_DSTAR:
DEBUG1("Mode set to D-Star"); DEBUG1("Mode set to D-Star");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
cwIdTX.reset();
break; break;
case STATE_YSF: case STATE_YSF:
DEBUG1("Mode set to System Fusion"); DEBUG1("Mode set to System Fusion");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
p25RX.reset();
nxdnRX.reset();
cwIdTX.reset();
break; break;
case STATE_P25: case STATE_P25:
DEBUG1("Mode set to P25"); DEBUG1("Mode set to P25");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
nxdnRX.reset();
cwIdTX.reset();
break; break;
case STATE_NXDN: case STATE_NXDN:
DEBUG1("Mode set to NXDN"); DEBUG1("Mode set to NXDN");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
cwIdTX.reset();
break; break;
case STATE_POCSAG: case STATE_POCSAG:
DEBUG1("Mode set to POCSAG"); DEBUG1("Mode set to POCSAG");
break; dmrIdleRX.reset();
case STATE_FM: dmrDMORX.reset();
DEBUG1("Mode set to FM"); dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
cwIdTX.reset();
break; break;
case STATE_DSTARCAL: case STATE_DSTARCAL:
DEBUG1("Mode set to D-Star Calibrate"); DEBUG1("Mode set to D-Star Calibrate");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
cwIdTX.reset();
break; break;
case STATE_DMRCAL: case STATE_DMRCAL:
DEBUG1("Mode set to DMR Calibrate"); DEBUG1("Mode set to DMR Calibrate");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
cwIdTX.reset();
break; break;
case STATE_RSSICAL: case STATE_RSSICAL:
DEBUG1("Mode set to RSSI Calibrate"); DEBUG1("Mode set to RSSI Calibrate");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
cwIdTX.reset();
break; break;
case STATE_LFCAL: case STATE_LFCAL:
DEBUG1("Mode set to 80 Hz Calibrate"); DEBUG1("Mode set to 80 Hz Calibrate");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
cwIdTX.reset();
break; break;
case STATE_FMCAL10K: case STATE_DMRCAL1K:
DEBUG1("Mode set to FM 10Khz Calibrate"); DEBUG1("Mode set to DMR BS 1031 Hz Calibrate");
break; dmrIdleRX.reset();
case STATE_FMCAL12K: dmrDMORX.reset();
DEBUG1("Mode set to FM 12.5Khz Calibrate"); dmrRX.reset();
break; dstarRX.reset();
case STATE_FMCAL15K: ysfRX.reset();
DEBUG1("Mode set to FM 15Khz Calibrate"); p25RX.reset();
break; nxdnRX.reset();
case STATE_FMCAL20K: cwIdTX.reset();
DEBUG1("Mode set to FM 20Khz Calibrate");
break;
case STATE_FMCAL25K:
DEBUG1("Mode set to FM 10Khz Calibrate");
break;
case STATE_FMCAL30K:
DEBUG1("Mode set to FM 30Khz Calibrate");
break; break;
case STATE_P25CAL1K: case STATE_P25CAL1K:
DEBUG1("Mode set to P25 1011 Hz Calibrate"); DEBUG1("Mode set to P25 1011 Hz Calibrate");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
cwIdTX.reset();
break; break;
case STATE_DMRDMO1K: case STATE_DMRDMO1K:
DEBUG1("Mode set to DMR MS 1031 Hz Calibrate"); DEBUG1("Mode set to DMR MS 1031 Hz Calibrate");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
cwIdTX.reset();
break; break;
case STATE_NXDNCAL1K: case STATE_NXDNCAL1K:
DEBUG1("Mode set to NXDN 1031 Hz Calibrate"); DEBUG1("Mode set to NXDN 1031 Hz Calibrate");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
nxdnRX.reset();
cwIdTX.reset();
break; break;
case STATE_POCSAGCAL: default:
DEBUG1("Mode set to POCSAG Calibrate");
break;
default: // STATE_IDLE
DEBUG1("Mode set to Idle"); DEBUG1("Mode set to Idle");
// STATE_IDLE
break; break;
} }
if (modemState != STATE_DSTAR)
dstarRX.reset();
if (modemState != STATE_DMR) {
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
}
if (modemState != STATE_YSF)
ysfRX.reset();
if (modemState != STATE_P25)
p25RX.reset();
if (modemState != STATE_NXDN)
nxdnRX.reset();
if (modemState != STATE_FM)
fm.reset();
cwIdTX.reset();
m_modemState = modemState; m_modemState = modemState;
io.setMode(); io.setMode();
@@ -592,7 +554,8 @@ void CSerialPort::process()
m_buffer[0U] = c; m_buffer[0U] = c;
m_ptr = 1U; m_ptr = 1U;
m_len = 0U; m_len = 0U;
} else { }
else {
m_ptr = 0U; m_ptr = 0U;
m_len = 0U; m_len = 0U;
} }
@@ -638,49 +601,15 @@ void CSerialPort::process()
sendACK(); sendACK();
break; break;
case MMDVM_FM_PARAMS1:
err = setFMParams1(m_buffer + 3U, m_len - 3U);
if (err == 0U) {
sendACK();
} else {
DEBUG2("Received invalid FM params 1", err);
sendNAK(err);
}
break;
case MMDVM_FM_PARAMS2:
err = setFMParams2(m_buffer + 3U, m_len - 3U);
if (err == 0U) {
sendACK();
} else {
DEBUG2("Received invalid FM params 2", err);
sendNAK(err);
}
break;
case MMDVM_FM_PARAMS3:
err = setFMParams3(m_buffer + 3U, m_len - 3U);
if (err == 0U) {
sendACK();
} else {
DEBUG2("Received invalid FM params 3", err);
sendNAK(err);
}
break;
case MMDVM_CAL_DATA: case MMDVM_CAL_DATA:
if (m_modemState == STATE_DSTARCAL) if (m_modemState == STATE_DSTARCAL)
err = calDStarTX.write(m_buffer + 3U, m_len - 3U); err = calDStarTX.write(m_buffer + 3U, m_len - 3U);
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K || m_modemState == STATE_DMRDMO1K) if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K || m_modemState == STATE_DMRDMO1K)
err = calDMR.write(m_buffer + 3U, m_len - 3U); err = calDMR.write(m_buffer + 3U, m_len - 3U);
if (m_modemState == STATE_FMCAL10K || m_modemState == STATE_FMCAL12K || m_modemState == STATE_FMCAL15K || m_modemState == STATE_FMCAL20K || m_modemState == STATE_FMCAL25K || m_modemState == STATE_FMCAL30K)
err = calFM.write(m_buffer + 3U, m_len - 3U);
if (m_modemState == STATE_P25CAL1K) if (m_modemState == STATE_P25CAL1K)
err = calP25.write(m_buffer + 3U, m_len - 3U); err = calP25.write(m_buffer + 3U, m_len - 3U);
if (m_modemState == STATE_NXDNCAL1K) if (m_modemState == STATE_NXDNCAL1K)
err = calNXDN.write(m_buffer + 3U, m_len - 3U); err = calNXDN.write(m_buffer + 3U, m_len - 3U);
if (m_modemState == STATE_POCSAGCAL)
err = calPOCSAG.write(m_buffer + 3U, m_len - 3U);
if (err == 0U) { if (err == 0U) {
sendACK(); sendACK();
} else { } else {
@@ -885,7 +814,6 @@ void CSerialPort::process()
break; break;
case MMDVM_TRANSPARENT: case MMDVM_TRANSPARENT:
case MMDVM_QSO_INFO:
// Do nothing on the MMDVM. // Do nothing on the MMDVM.
break; break;
SerialPort.h
+1 -3
View File
@@ -73,9 +73,6 @@ private:
uint8_t setConfig(const uint8_t* data, uint8_t length); uint8_t setConfig(const uint8_t* data, uint8_t length);
uint8_t setMode(const uint8_t* data, uint8_t length); uint8_t setMode(const uint8_t* data, uint8_t length);
void setMode(MMDVM_STATE modemState); void setMode(MMDVM_STATE modemState);
uint8_t setFMParams1(const uint8_t* data, uint8_t length);
uint8_t setFMParams2(const uint8_t* data, uint8_t length);
uint8_t setFMParams3(const uint8_t* data, uint8_t length);
// Hardware versions // Hardware versions
void beginInt(uint8_t n, int speed); void beginInt(uint8_t n, int speed);
@@ -86,3 +83,4 @@ private:
}; };
#endif #endif
SerialRB.h
+1 -1
View File
@@ -32,7 +32,7 @@ Boston, MA 02110-1301, USA.
#include <Arduino.h> #include <Arduino.h>
#endif #endif
const uint16_t SERIAL_RINGBUFFER_SIZE = 370U; const uint16_t SERIAL_RINGBUFFER_SIZE = 2000U;
class CSerialRB { class CSerialRB {
public: public:
SerialSTM.cpp
+14 -38
View File
@@ -28,13 +28,13 @@ Pin definitions:
- Host communication: - Host communication:
USART1 - TXD PA9 - RXD PA10 (MMDVM-Pi board, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board) USART1 - TXD PA9 - RXD PA10 (MMDVM-Pi board, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board)
USART2 - TXD PA2 - RXD PA3 (Nucleo64 F446RE board, Morpho or Arduino header, MMDVM_RPT_Hat BG4TGO/BG5HHP board) USART2 - TXD PA2 - RXD PA3 (Nucleo64 F446RE board, Morpho or Arduino header)
USART3 - TXD PC10 - RXD PC11 (Discovery board) USART3 - TXD PC10 - RXD PC11 (Discovery board)
USART3 - TXD PD8 - RXD PD9 (Nucleo144 F767ZI board) USART3 - TXD PD8 - RXD PD9 (Nucleo144 F767ZI board)
- Serial repeater: - Serial repeater:
USART1 - TXD PA9 - RXD PA10 (Nucleo with Arduino header) USART1 - TXD PA9 - RXD PA10 (Nucleo with Arduino header)
UART5 - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI, MMDVM_RPT_Hat BG4TGO/BG5HHP board) UART5 - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI)
*/ */
#if defined(STM32F4XX) || defined(STM32F7XX) #if defined(STM32F4XX) || defined(STM32F7XX)
@@ -50,7 +50,7 @@ extern "C" {
} }
/* ************* USART1 ***************** */ /* ************* USART1 ***************** */
#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM) #if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE]; volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE]; volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
@@ -241,7 +241,7 @@ void WriteUSART1(const uint8_t* data, uint16_t length)
#endif #endif
/* ************* USART2 ***************** */ /* ************* USART2 ***************** */
#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) || defined(DRCC_DVM) #if defined(STM32F4_NUCLEO)
volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE]; volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE]; volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
@@ -841,19 +841,15 @@ void CSerialPort::beginInt(uint8_t n, int speed)
case 1U: case 1U:
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO) #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
InitUSART3(speed); InitUSART3(speed);
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
InitUSART1(speed); InitUSART1(speed);
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) #elif defined(STM32F4_NUCLEO)
InitUSART2(speed); InitUSART2(speed);
#elif defined(DRCC_DVM)
InitUSART1(speed);
#endif #endif
break; break;
case 3U: case 3U:
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
InitUSART1(speed); InitUSART1(speed);
#elif defined(DRCC_DVM)
InitUSART2(speed);
#else #else
InitUART5(speed); InitUART5(speed);
#endif #endif
@@ -869,18 +865,14 @@ int CSerialPort::availableInt(uint8_t n)
case 1U: case 1U:
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO) #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
return AvailUSART3(); return AvailUSART3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
return AvailUSART1(); return AvailUSART1();
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) #elif defined(STM32F4_NUCLEO)
return AvailUSART2(); return AvailUSART2();
#elif defined(DRCC_DVM)
return AvailUSART1();
#endif #endif
case 3U: case 3U:
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
return AvailUSART1(); return AvailUSART1();
#elif defined(DRCC_DVM)
return AvailUSART2();
#else #else
return AvailUART5(); return AvailUART5();
#endif #endif
@@ -895,18 +887,14 @@ int CSerialPort::availableForWriteInt(uint8_t n)
case 1U: case 1U:
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO) #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
return AvailForWriteUSART3(); return AvailForWriteUSART3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
return AvailForWriteUSART1(); return AvailForWriteUSART1();
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) #elif defined(STM32F4_NUCLEO)
return AvailForWriteUSART2(); return AvailForWriteUSART2();
#elif defined(DRCC_DVM)
return AvailForWriteUSART1();
#endif #endif
case 3U: case 3U:
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
return AvailForWriteUSART1(); return AvailForWriteUSART1();
#elif defined(DRCC_DVM)
return AvailForWriteUSART2();
#else #else
return AvailForWriteUART5(); return AvailForWriteUART5();
#endif #endif
@@ -921,18 +909,14 @@ uint8_t CSerialPort::readInt(uint8_t n)
case 1U: case 1U:
#if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO) #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO)
return ReadUSART3(); return ReadUSART3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
return ReadUSART1(); return ReadUSART1();
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) #elif defined(STM32F4_NUCLEO)
return ReadUSART2(); return ReadUSART2();
#elif defined(DRCC_DVM)
return ReadUSART1();
#endif #endif
case 3U: case 3U:
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
return ReadUSART1(); return ReadUSART1();
#elif defined(DRCC_DVM)
return ReadUSART2();
#else #else
return ReadUART5(); return ReadUART5();
#endif #endif
@@ -949,18 +933,14 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
WriteUSART3(data, length); WriteUSART3(data, length);
if (flush) if (flush)
TXSerialFlush3(); TXSerialFlush3();
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F4_DVM)
WriteUSART1(data, length); WriteUSART1(data, length);
if (flush) if (flush)
TXSerialFlush1(); TXSerialFlush1();
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) #elif defined(STM32F4_NUCLEO)
WriteUSART2(data, length); WriteUSART2(data, length);
if (flush) if (flush)
TXSerialFlush2(); TXSerialFlush2();
#elif defined(DRCC_DVM)
WriteUSART1(data, length);
if (flush)
TXSerialFlush1();
#endif #endif
break; break;
case 3U: case 3U:
@@ -968,10 +948,6 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
WriteUSART1(data, length); WriteUSART1(data, length);
if (flush) if (flush)
TXSerialFlush1(); TXSerialFlush1();
#elif defined(DRCC_DVM)
WriteUSART2(data, length);
if (flush)
TXSerialFlush2();
#else #else
WriteUART5(data, length); WriteUART5(data, length);
if (flush) if (flush)
Tools/FMGenerateFilterCoefficients.py
-46
View File
@@ -1,46 +0,0 @@
# based on https://github.com/berndporr/iir_fixed_point/blob/master/gen_coeff.py
import numpy as np
import scipy.signal as signal
import pylab as pl
# Calculate the coefficients for a pure fixed point
# integer filter
# sampling rate
fs = 24000
# cutoffs
f1 = 300
f2 = 2700
# ripple
rp = 0.2
# scaling factor in bits, do not change !
q = 0
# scaling factor as facor...
scaling_factor = 2**q
# let's generate a sequence of 2nd order IIR filters
sos = signal.cheby1(3,rp,[f1, f2],'bandpass', output='sos', fs=fs)
#sos = signal.cheby1(1, rp, 2122, 'lowpass', output='sos', fs=fs) #deemphasis filter
#sos = signal.cheby1(1, rp, 2122, 'highpass', output='sos', fs=fs) #deemphasis filter
#sos = np.round((sos) * scaling_factor)
# print coefficients
for biquad in sos:
for coeff in biquad:
#print(int(coeff),",",sep="",end="")
print((coeff),",",sep="",end="")
print("")
# plot the frequency response
b,a = signal.sos2tf(sos)
w,h = signal.freqz(b,a)
pl.plot(w/np.pi/2*fs,20*np.log(np.abs(h)))
pl.xlabel('frequency/Hz');
pl.ylabel('gain/dB');
pl.ylim(top=1,bottom=-20);
pl.xlim(left=250, right=12000);
pl.show()
Tools/emphasis.txt
-58
View File
@@ -1,58 +0,0 @@
% GNU Octave script to generate pre and deemphasis filters
% https://dsp.stackexchange.com/questions/34605/biquad-cookbook-formula-for-broadcast-fm-de-emphasis
% PACKAGES
pkg load control
pkg load signal
clear all;
clc;
fs = 24000;
samplingtime = 1/fs;
% analog prototype
A2 = [1];
B2 = [0.000075 1];
% Pre
Ds = tf(B2, A2);
% De
% Ds = tf(A2, B2);
Ds = Ds/dcgain(Ds);
% MZT
T1 = 0.000075; % 75us
z1 = -exp(-1.0/(fs*T1));
p1 = 1+z1;
a0 = 1.0;
a1 = p1;
a2 = 0;
b0 = 1.0;
b1 = z1;
b2 = 0;
% swap between a1, b1 to select pre- or de-emphasis
# Pre
Bmzt = [b0 a1 b2]
Amzt = [a0 b1 a2]
% De
% Bmzt = [b0 b1 b2]
% Amzt = [a0 a1 a2]
DzMZT = tf(Amzt, Bmzt, samplingtime);
DzMZT = DzMZT/dcgain(DzMZT);
%% Plot
wmin = 2 * pi * 20.0; % 20Hz
wmax = 2 * pi * ((fs/2.0) - (fs/2 - 20000)); %20kHz
figure(1);
bode(Ds, 'b', DzMZT, 'c', {wmin, wmax});
legend('Analog prototype', 'MZT 2nd order','location', 'northwest');
grid on;
pause();
YSFTX.cpp
+5 -1
View File
@@ -44,7 +44,7 @@ const uint8_t YSF_END_SYNC = 0xFFU;
const uint8_t YSF_HANG = 0x00U; const uint8_t YSF_HANG = 0x00U;
CYSFTX::CYSFTX() : CYSFTX::CYSFTX() :
m_buffer(TX_BUFFER_LEN), m_buffer(4000U),
m_modFilter(), m_modFilter(),
m_modState(), m_modState(),
m_poBuffer(), m_poBuffer(),
@@ -66,6 +66,9 @@ m_txCount(0U)
void CYSFTX::process() void CYSFTX::process()
{ {
if (m_buffer.getData() == 0U && m_poLen == 0U && m_txCount == 0U)
return;
// If we have YSF data to transmit, do so. // If we have YSF data to transmit, do so.
if (m_poLen == 0U && m_buffer.getData() > 0U) { if (m_poLen == 0U && m_buffer.getData() > 0U) {
if (!m_tx) { if (!m_tx) {
@@ -188,3 +191,4 @@ void CYSFTX::setParams(bool on, uint8_t txHang)
m_loDev = on; m_loDev = on;
m_txHang = txHang * 1200U; m_txHang = txHang * 1200U;
} }
mmdvmmenu.sh
+1 -1
View File
@@ -83,7 +83,7 @@ EOF
"3") sed -e 's/\/\/ #define EXTERNAL_OSC 14400000/#define EXTERNAL_OSC 14400000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "14.400 MHz clock enabled";; "3") sed -e 's/\/\/ #define EXTERNAL_OSC 14400000/#define EXTERNAL_OSC 14400000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "14.400 MHz clock enabled";;
"4") sed -e 's/\/\/ #define EXTERNAL_OSC 19200000/#define EXTERNAL_OSC 19200000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "19.200 MHz clock enabled";; "4") sed -e 's/\/\/ #define EXTERNAL_OSC 19200000/#define EXTERNAL_OSC 19200000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "19.200 MHz clock enabled";;
"5") sed -e 's/\/\/ #define USE_COS_AS_LOCKOUT /#define USE_COS_AS_LOCKOUT/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "COS as Lockout enabled";; "5") sed -e 's/\/\/ #define USE_COS_AS_LOCKOUT /#define USE_COS_AS_LOCKOUT/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "COS as Lockout enabled";;
"6") sed -e 's/\/\/ #define MODE_LEDS/#define MODE_LEDS/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Mode pins enabled";; "6") sed -e 's/\/\/ #define MODE_PINS/#define MODE_PINS/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Mode pins enabled";;
"7") sed -e 's/\/\/ #define ARDUINO_DUE_PAPA/#define ARDUINO_DUE_PAPA/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for the PAPA board enabled";; "7") sed -e 's/\/\/ #define ARDUINO_DUE_PAPA/#define ARDUINO_DUE_PAPA/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for the PAPA board enabled";;
"8") sed -e 's/\/\/ #define ARDUINO_DUE_ZUM_V10/#define ARDUINO_DUE_ZUM_V10/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for ZUM V1.0 and V1.0.1 boards enabled";; "8") sed -e 's/\/\/ #define ARDUINO_DUE_ZUM_V10/#define ARDUINO_DUE_ZUM_V10/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for ZUM V1.0 and V1.0.1 boards enabled";;
"9") sed -e 's/\/\/ #define ARDUINO_DUE_NTH/#define ARDUINO_DUE_NTH/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for SP8NTH board enabled";; "9") sed -e 's/\/\/ #define ARDUINO_DUE_NTH/#define ARDUINO_DUE_NTH/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for SP8NTH board enabled";;
pins/pins_f4_discovery.h
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_DISCOVERY_H
#define _PINS_F4_DISCOVERY_H
/*
Pin definitions for STM32F4 Discovery Board:
PTT PB13 output P1 Pin37
COSLED PA7 output P1 Pin17
LED PD15 output P1 Pin47
COS PA5 input P1 Pin15
DSTAR PD12 output P1 Pin44
DMR PD13 output P1 Pin45
YSF PD14 output P1 Pin46
P25 PD11 output P1 Pin43
NXDN PD10 output P1 Pin42
RX PA0 analog input P1 Pin12
RSSI PA1 analog input P1 Pin11
TX PA4 analog output P1 Pin16
EXT_CLK PA15 input P2 Pin40
*/
#define PIN_COS GPIO_Pin_5
#define PORT_COS GPIOA
#define RCC_Per_COS RCC_AHB1Periph_GPIOA
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_7
#define PORT_COSLED GPIOA
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOA
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOD
#define RCC_Per_LED RCC_AHB1Periph_GPIOD
#define PIN_P25 GPIO_Pin_11
#define PORT_P25 GPIOD
#define RCC_Per_P25 RCC_AHB1Periph_GPIOD
#define PIN_NXDN GPIO_Pin_10
#define PORT_NXDN GPIOD
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOD
#define PIN_DSTAR GPIO_Pin_12
#define PORT_DSTAR GPIOD
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOD
#define PIN_DMR GPIO_Pin_13
#define PORT_DMR GPIOD
#define RCC_Per_DMR RCC_AHB1Periph_GPIOD
#define PIN_YSF GPIO_Pin_14
#define PORT_YSF GPIOD
#define RCC_Per_YSF RCC_AHB1Periph_GPIOD
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
pins/pins_f4_drcc_nqf.h
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_DRCC_NQF_H
#define _PINS_F4_DRCC_NQF_H
/*
Pin definitions for DRCC_DVM BG7NQF board rev1
TX/PTT_LED PB12 output
RX/COS_LED PB5 output
STATUS_LED PB10 output
COS_IN PB13 input
DSTAR N/A
DMR N/A
YSF N/A
P25 N/A
NXDN N/A
POCSAG N/A
MDMR/BIT0 PB8 output
MYSF/BIT1 PB9 output
MDSTAR/BIT2 PB14 output
MP25/BIT3 PB15 output Generic Mode Pins
MNXDN N/A
MPOCSAG N/A
RX PA0 analog input
RSSI PA1 analog input
TX PA4 analog output
EXT_CLK PA15 input
UART1_TX PA9 output
UART1_RX PA10 output Host Data Communication
UART2_TX PA2 output
UART2_RX PA3 output Nextion Data Communication
I2C1_SCL PB6 output
I2C1_SDA PB7 output OLED Data Communication as master
*/
#define PIN_COS GPIO_Pin_13
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_12
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_5
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_10
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_TXLED GPIO_Pin_4
#define PORT_TXLED GPIOB
#define RCC_Per_TXLED RCC_AHB1Periph_GPIOB
// #define PIN_P25 GPIO_Pin_3
// #define PORT_P25 GPIOB
// #define RCC_Per_P25 RCC_AHB1Periph_GPIOB
// #define PIN_NXDN GPIO_Pin_10
// #define PORT_NXDN GPIOA
// #define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
// #define PIN_POCSAG GPIO_Pin_12
// #define PORT_POCSAG GPIOB
// #define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
// #define PIN_DSTAR GPIO_Pin_10
// #define PORT_DSTAR GPIOB
// #define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
// #define PIN_DMR GPIO_Pin_4
// #define PORT_DMR GPIOB
// #define RCC_Per_DMR RCC_AHB1Periph_GPIOB
// #define PIN_YSF GPIO_Pin_5
// #define PORT_YSF GPIOB
// #define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#if defined(MODE_PINS)
#define PIN_MP25 GPIO_Pin_15
#define PORT_MP25 GPIOB
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOB
#define PIN_MDSTAR GPIO_Pin_9
#define PORT_MDSTAR GPIOB
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOB
#define PIN_MDMR GPIO_Pin_8
#define PORT_MDMR GPIOB
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOB
#define PIN_MYSF GPIO_Pin_14
#define PORT_MYSF GPIOB
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOB
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#define PORT_TX GPIOA
#define RCC_Per_TX RCC_AHB1Periph_GPIOA
#endif
pins/pins_f4_f4m.h
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_F4M_H
#define _PINS_F4_F4M_H
/*
Pin definitions for MMDVM-F4M Pi-Hat F0DEI board:
PTT PB13 output
COSLED PB14 output
LED PB15 output
COS PC0 input
DSTAR PC7 output
DMR PC8 output
YSF PA8 output
P25 PC9 output
NXDN PB1 output
POCSAG PB12 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_9
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_1
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_7
#define PORT_DSTAR GPIOC
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
#define PIN_DMR GPIO_Pin_8
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_8
#define PORT_YSF GPIOA
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
pins/pins_f4_nucleo_arduino.h
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_NUCLEO_ARDUINO_H
#define _PINS_F4_NUCLEO_ARDUINO_H
/*
Pin definitions for STM32F4 Nucleo boards (Arduino header):
PTT PB10 output CN9 Pin7
COSLED PB3 output CN9 Pin4
LED PB5 output CN9 Pin5
COS PB4 input CN9 Pin6
DSTAR PA1 output CN8 Pin2
DMR PA4 output CN8 Pin3
YSF PB0 output CN8 Pin4
P25 PC1 output CN8 Pin5
NXDN PA3 output CN9 Pin1
POCSAG PB12 output
RX PA0 analog input CN8 Pin1
RSSI PC0 analog input CN8 Pin6
TX PA5 analog output CN5 Pin6
EXT_CLK PB8 input CN5 Pin10
*/
#define PIN_COS GPIO_Pin_4
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_10
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_3
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_5
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_1
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_3
#define PORT_NXDN GPIOA
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_1
#define PORT_DSTAR GPIOA
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOA
#define PIN_DMR GPIO_Pin_4
#define PORT_DMR GPIOA
#define RCC_Per_DMR RCC_AHB1Periph_GPIOA
#define PIN_YSF GPIO_Pin_0
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#define PIN_EXT_CLK GPIO_Pin_8
#define SRC_EXT_CLK GPIO_PinSource8
#define PORT_EXT_CLK GPIOB
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_0
#define PIN_RSSI_CH ADC_Channel_10
#define PORT_RSSI GPIOC
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOC
#define PIN_TX GPIO_Pin_5
#define PIN_TX_CH DAC_Channel_2
#endif
pins/pins_f4_nucleo_morpho.h
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_NUCLEO_MORPHO_H
#define _PINS_F4_NUCLEO_MORPHO_H
/*
Pin definitions for STM32F4 Nucleo boards (ST Morpho header):
PTT PB13 output CN10 Pin30
COSLED PB14 output CN10 Pin28
LED PA5 output CN10 Pin11
COS PB15 input CN10 Pin26
DSTAR PB10 output CN10 Pin25
DMR PB4 output CN10 Pin27
YSF PB5 output CN10 Pin29
P25 PB3 output CN10 Pin31
NXDN PA10 output CN10 Pin33
POCSAG PB12 output CN10 Pin16
MDSTAR PC4 output CN10 Pin34
MDMR PC5 output CN10 Pin6
MYSF PC2 output CN7 Pin35
MP25 PC3 output CN7 Pin37
MNXDN PC6 output CN10 Pin4
MPOCSAG PC8 output CN10 Pin2
RX PA0 analog input CN7 Pin28
RSSI PA1 analog input CN7 Pin30
TX PA4 analog output CN7 Pin32
EXT_CLK PA15 input CN7 Pin17
*/
#define PIN_COS GPIO_Pin_15
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_5
#define PORT_LED GPIOA
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
#define PIN_P25 GPIO_Pin_3
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_10
#define PORT_NXDN GPIOA
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_10
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_4
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_5
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#if defined(MODE_PINS)
#define PIN_MP25 GPIO_Pin_3
#define PORT_MP25 GPIOC
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
#define PIN_MNXDN GPIO_Pin_6
#define PORT_MNXDN GPIOC
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
#define PIN_MDSTAR GPIO_Pin_4
#define PORT_MDSTAR GPIOC
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
#define PIN_MDMR GPIO_Pin_5
#define PORT_MDMR GPIOC
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
#define PIN_MYSF GPIO_Pin_2
#define PORT_MYSF GPIOC
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
#define PIN_MPOCSAG GPIO_Pin_8
#define PORT_MPOCSAG GPIOC
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
pins/pins_f4_pi.h
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_PI_H
#define _PINS_F4_PI_H
/*
Pin definitions for STM32F4 Pi Board:
PTT PB13 output
COSLED PB14 output
LED PB15 output
COS PC0 input
DSTAR PC7 output
DMR PC8 output
YSF PA8 output
P25 PC9 output
NXDN PB1 output
POCSAG PB12 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_9
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_1
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_7
#define PORT_DSTAR GPIOC
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
#define PIN_DMR GPIO_Pin_8
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_8
#define PORT_YSF GPIOA
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
pins/pins_f4_rpt_tgo.h
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_RPT_TGO_H
#define _PINS_F4_RPT_TGO_H
/*
Pin definitions for MMDVM_RPT_Hat Pi-Hat BG4TGO board::
PTT PB13 output CN10 Pin30
COSLED PB14 output CN10 Pin28
LED PA5 output CN10 Pin11
COS PB15 input CN10 Pin26
DSTAR PB10 output CN10 Pin25
DMR PB4 output CN10 Pin27
YSF PB5 output CN10 Pin29
P25 PB3 output CN10 Pin31
NXDN PA10 output CN10 Pin33
POCSAG PB12 output CN10 Pin16
MDSTAR PC4 output CN10 Pin34
MDMR PC5 output CN10 Pin6
MYSF PC2 output CN7 Pin35
MP25 PC3 output CN7 Pin37
MNXDN PC6 output CN10 Pin4
MPOCSAG PC8 output CN10 Pin2
RX PA0 analog input CN7 Pin28
RSSI PA1 analog input CN7 Pin30
TX PA4 analog output CN7 Pin32
EXT_CLK PA15 input CN7 Pin17
*/
#define PIN_COS GPIO_Pin_15
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_5
#define PORT_LED GPIOA
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
#define PIN_P25 GPIO_Pin_3
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_10
#define PORT_NXDN GPIOA
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_10
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_4
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_5
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#if defined(MODE_PINS)
#define PIN_MP25 GPIO_Pin_3
#define PORT_MP25 GPIOC
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
#define PIN_MNXDN GPIO_Pin_6
#define PORT_MNXDN GPIOC
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
#define PIN_MDSTAR GPIO_Pin_4
#define PORT_MDSTAR GPIOC
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
#define PIN_MDMR GPIO_Pin_5
#define PORT_MDMR GPIOC
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
#define PIN_MYSF GPIO_Pin_2
#define PORT_MYSF GPIOC
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
#define PIN_MPOCSAG GPIO_Pin_8
#define PORT_MPOCSAG GPIOC
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
pins/pins_f4_stm32dvm_v3.h
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F4_STM32DVM_V3_H
#define _PINS_F4_STM32DVM_V3_H
/*
Pin definitions for STM32F4 STM32-DVM rev 3 Board:
COS PB13 input
PTT PB12 output
COSLED PB4 output
LED PB3 output
P25 PB8 output
NXDN PB9 output
DSTAR PB6 output
DMR PB5 output
YSF PB7 output
POCSAG PC10 output
RX PB0 analog input
RSSI PB1 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_13
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_12
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_4
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_3
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_8
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_9
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_6
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_5
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_7
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#define PIN_POCSAG GPIO_Pin_10
#define PORT_POCSAG GPIOC
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOC
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_8
#define PORT_RX GPIOB
#define RCC_Per_RX RCC_AHB1Periph_GPIOB
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_9
#define PORT_RSSI GPIOB
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOB
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
pins/pins_f7_f7m.h
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F7_F7M_H
#define _PINS_F7_F7M_H
/*
Pin definitions for MMDVM-F7M Pi-Hat F0DEI board:
PTT PB13 output
COSLED PB14 output
LED PB15 output
COS PC0 input
DSTAR PC7 output
DMR PC8 output
YSF PA8 output
P25 PC9 output
NXDN PB1 output
POCSAG PB12 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_9
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_1
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_7
#define PORT_DSTAR GPIOC
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
#define PIN_DMR GPIO_Pin_8
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_8
#define PORT_YSF GPIOA
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
pins/pins_f7_nucleo.h
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F7_NUCLEO_H
#define _PINS_F7_NUCLEO_H
/*
Pin definitions for STM32F7 Nucleo boards (ST Morpho header):
PTT PB13 output CN12 Pin30
COSLED PB14 output CN12 Pin28
LED PA5 output CN12 Pin11
COS PB15 input CN12 Pin26
DSTAR PB10 output CN12 Pin25
DMR PB4 output CN12 Pin27
YSF PB5 output CN12 Pin29
P25 PB3 output CN12 Pin31
NXDN PA10 output CN12 Pin33
POCSAG PB12 output CN12 Pin16
MDSTAR PC4 output CN12 Pin34
MDMR PC5 output CN12 Pin6
MYSF PC2 output CN11 Pin35
MP25 PC3 output CN11 Pin37
MNXDN PC6 output CN12 Pin4
RX PA0 analog input CN11 Pin28
RSSI PA1 analog input CN11 Pin30
TX PA4 analog output CN11 Pin32
EXT_CLK PA15 input CN11 Pin17
*/
#define PIN_COS GPIO_Pin_15
#define PORT_COS GPIOB
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_5
#define PORT_LED GPIOA
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
#define PIN_P25 GPIO_Pin_3
#define PORT_P25 GPIOB
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
#define PIN_NXDN GPIO_Pin_10
#define PORT_NXDN GPIOA
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_10
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_4
#define PORT_DMR GPIOB
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
#define PIN_YSF GPIO_Pin_5
#define PORT_YSF GPIOB
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
#if defined(MODE_PINS)
#define PIN_MP25 GPIO_Pin_3
#define PORT_MP25 GPIOC
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
#define PIN_MNXDN GPIO_Pin_6
#define PORT_MNXDN GPIOC
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
#define PIN_MDSTAR GPIO_Pin_4
#define PORT_MDSTAR GPIOC
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
#define PIN_MDMR GPIO_Pin_5
#define PORT_MDMR GPIOC
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
#define PIN_MYSF GPIO_Pin_2
#define PORT_MYSF GPIOC
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_1
#define PIN_RSSI_CH ADC_Channel_1
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
pins/pins_f7_pi.h
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F7_PI_H
#define _PINS_F7_PI_H
/*
Pin definitions for STM32F722 Pi Board:
PTT PB13 output
COSLED PB14 output
LED PB15 output
COS PC0 input
DSTAR PC7 output
DMR PC8 output
YSF PA8 output
P25 PC9 output
NXDN PB1 output
POCSAG PB12 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_13
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_14
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_15
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_9
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_1
#define PORT_NXDN GPIOB
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
#define PIN_POCSAG GPIO_Pin_12
#define PORT_POCSAG GPIOB
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
#define PIN_DSTAR GPIO_Pin_7
#define PORT_DSTAR GPIOC
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
#define PIN_DMR GPIO_Pin_8
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_8
#define PORT_YSF GPIOA
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif
pins/pins_f7_rpt_hat.h
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/*
* Copyright (C) 2019,2020 by BG5HHP
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _PINS_F7_RPT_HAT_H
#define _PINS_F7_RPT_HAT_H
/*
Pin definitions for MMDVM_RPT_Hat Pi-Hat F0DEI DB9MAT DF2ET board:
PTT PB14 output
COSLED PB13 output
LED PB12 output
COS PC0 input
DSTAR PB15 output
DMR PC6 output
YSF PC7 output
P25 PC8 output
NXDN PC9 output
POCSAG PA8 output
FM PA11 output
MDSTAR PC1 output
MDMR PC2 output
MYSF PC3 output
MP25 PC4 output
MNXDN PC10 output
MPOCSAG PC11 output
MFM PC13 output
RX PA0 analog input
RSSI PA7 analog input
TX PA4 analog output
EXT_CLK PA15 input
*/
#define PIN_COS GPIO_Pin_0
#define PORT_COS GPIOC
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
#define PIN_PTT GPIO_Pin_14
#define PORT_PTT GPIOB
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
#define PIN_COSLED GPIO_Pin_13
#define PORT_COSLED GPIOB
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
#define PIN_LED GPIO_Pin_12
#define PORT_LED GPIOB
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
#define PIN_P25 GPIO_Pin_8
#define PORT_P25 GPIOC
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
#define PIN_NXDN GPIO_Pin_9
#define PORT_NXDN GPIOC
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOC
#define PIN_POCSAG GPIO_Pin_8
#define PORT_POCSAG GPIOA
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOA
#define PIN_FM GPIO_Pin_11
#define PORT_FM GPIOA
#define RCC_Per_FM RCC_AHB1Periph_GPIOA
#define PIN_DSTAR GPIO_Pin_15
#define PORT_DSTAR GPIOB
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
#define PIN_DMR GPIO_Pin_6
#define PORT_DMR GPIOC
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
#define PIN_YSF GPIO_Pin_7
#define PORT_YSF GPIOC
#define RCC_Per_YSF RCC_AHB1Periph_GPIOC
#if defined(MODE_PINS)
#define PIN_MP25 GPIO_Pin_4
#define PORT_MP25 GPIOC
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
#define PIN_MNXDN GPIO_Pin_10
#define PORT_MNXDN GPIOC
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
#define PIN_MDSTAR GPIO_Pin_1
#define PORT_MDSTAR GPIOC
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
#define PIN_MDMR GPIO_Pin_2
#define PORT_MDMR GPIOC
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
#define PIN_MYSF GPIO_Pin_3
#define PORT_MYSF GPIOC
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
#define PIN_MPOCSAG GPIO_Pin_11
#define PORT_MPOCSAG GPIOC
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
#define PIN_MFM GPIO_Pin_13
#define PORT_MFM GPIOC
#define RCC_Per_MFM RCC_AHB1Periph_GPIOC
#endif
#define PIN_EXT_CLK GPIO_Pin_15
#define SRC_EXT_CLK GPIO_PinSource15
#define PORT_EXT_CLK GPIOA
#define PIN_RX GPIO_Pin_0
#define PIN_RX_CH ADC_Channel_0
#define PORT_RX GPIOA
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
#define PIN_RSSI GPIO_Pin_7
#define PIN_RSSI_CH ADC_Channel_7
#define PORT_RSSI GPIOA
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
#define PIN_TX GPIO_Pin_4
#define PIN_TX_CH DAC_Channel_1
#endif