mirror of https://github.com/g4klx/MMDVM.git
Merge branch 'master' into F7hat
This commit is contained in:
phl0
commit
fd8bc07b61
11
Config.h
11
Config.h
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|
@ -1,5 +1,5 @@
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|||
/*
|
||||
* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
|
||||
* Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
@ -39,7 +39,7 @@
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|||
// #define USE_COS_AS_LOCKOUT
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||||
|
||||
// Use pins to output the current mode
|
||||
// #define ARDUINO_MODE_PINS
|
||||
// #define MODE_PINS
|
||||
|
||||
// For the original Arduino Due pin layout
|
||||
// #define ARDUINO_DUE_PAPA
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@ -73,4 +73,11 @@
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|||
// Do not use if employing an external hardware watchdog
|
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// #define CONSTANT_SRV_LED
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|
||||
// Use the YSF and P25 LEDs for NXDN
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||||
// #define USE_ALTERNATE_NXDN_LEDS
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|
||||
// Use the D-Star and DMR LEDs for POCSAG
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// #define USE_ALTERNATE_POCSAG_LEDS
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|
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#endif
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|
||||
|
|
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|||
|
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@ -49,6 +49,7 @@ enum MMDVM_STATE {
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STATE_YSF = 3,
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STATE_P25 = 4,
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STATE_NXDN = 5,
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STATE_POCSAG = 6,
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|
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// Dummy states start at 90
|
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STATE_NXDNCAL1K = 91,
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|
|
@ -76,6 +77,7 @@ enum MMDVM_STATE {
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|||
#include "P25TX.h"
|
||||
#include "NXDNRX.h"
|
||||
#include "NXDNTX.h"
|
||||
#include "POCSAGTX.h"
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#include "CalDStarRX.h"
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#include "CalDStarTX.h"
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#include "CalDMR.h"
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@ -102,6 +104,7 @@ extern bool m_dmrEnable;
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|||
extern bool m_ysfEnable;
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||||
extern bool m_p25Enable;
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||||
extern bool m_nxdnEnable;
|
||||
extern bool m_pocsagEnable;
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||||
|
||||
extern bool m_duplex;
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||||
|
||||
|
|
@ -130,6 +133,8 @@ extern CP25TX p25TX;
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|||
extern CNXDNRX nxdnRX;
|
||||
extern CNXDNTX nxdnTX;
|
||||
|
||||
extern CPOCSAGTX pocsagTX;
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||||
|
||||
extern CCalDStarRX calDStarRX;
|
||||
extern CCalDStarTX calDStarTX;
|
||||
extern CCalDMR calDMR;
|
||||
|
|
|
|||
70
IO.cpp
70
IO.cpp
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|
@ -79,6 +79,7 @@ m_dmrTXLevel(128 * 128),
|
|||
m_ysfTXLevel(128 * 128),
|
||||
m_p25TXLevel(128 * 128),
|
||||
m_nxdnTXLevel(128 * 128),
|
||||
m_pocsagTXLevel(128 * 128),
|
||||
m_rxDCOffset(DC_OFFSET),
|
||||
m_txDCOffset(DC_OFFSET),
|
||||
m_ledCount(0U),
|
||||
|
|
@ -136,22 +137,24 @@ void CIO::selfTest()
|
|||
// We exclude PTT to avoid trigger the transmitter
|
||||
setLEDInt(ledValue);
|
||||
setCOSInt(ledValue);
|
||||
#if defined(ARDUINO_MODE_PINS)
|
||||
#if defined(MODE_PINS)
|
||||
setDStarInt(ledValue);
|
||||
setDMRInt(ledValue);
|
||||
setYSFInt(ledValue);
|
||||
setP25Int(ledValue);
|
||||
setNXDNInt(ledValue);
|
||||
setPOCSAGInt(ledValue);
|
||||
#endif
|
||||
delayInt(250);
|
||||
}
|
||||
|
||||
#if defined(ARDUINO_MODE_PINS)
|
||||
#if defined(MODE_PINS)
|
||||
setDStarInt(true);
|
||||
setDMRInt(false);
|
||||
setYSFInt(false);
|
||||
setP25Int(false);
|
||||
setNXDNInt(false);
|
||||
setPOCSAGInt(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
|
|
@ -160,6 +163,7 @@ void CIO::selfTest()
|
|||
setYSFInt(false);
|
||||
setP25Int(false);
|
||||
setNXDNInt(false);
|
||||
setPOCSAGInt(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
|
|
@ -168,6 +172,7 @@ void CIO::selfTest()
|
|||
setYSFInt(true);
|
||||
setP25Int(false);
|
||||
setNXDNInt(false);
|
||||
setPOCSAGInt(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
|
|
@ -176,6 +181,7 @@ void CIO::selfTest()
|
|||
setYSFInt(true);
|
||||
setP25Int(true);
|
||||
setNXDNInt(false);
|
||||
setPOCSAGInt(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
|
|
@ -184,6 +190,25 @@ void CIO::selfTest()
|
|||
setYSFInt(true);
|
||||
setP25Int(true);
|
||||
setNXDNInt(true);
|
||||
setPOCSAGInt(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
setDStarInt(true);
|
||||
setDMRInt(true);
|
||||
setYSFInt(true);
|
||||
setP25Int(true);
|
||||
setNXDNInt(true);
|
||||
setPOCSAGInt(true);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
setDStarInt(true);
|
||||
setDMRInt(true);
|
||||
setYSFInt(true);
|
||||
setP25Int(true);
|
||||
setNXDNInt(true);
|
||||
setPOCSAGInt(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
|
|
@ -192,6 +217,7 @@ void CIO::selfTest()
|
|||
setYSFInt(true);
|
||||
setP25Int(true);
|
||||
setNXDNInt(false);
|
||||
setPOCSAGInt(false);
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||||
|
||||
delayInt(250);
|
||||
|
||||
|
|
@ -200,6 +226,7 @@ void CIO::selfTest()
|
|||
setYSFInt(true);
|
||||
setP25Int(false);
|
||||
setNXDNInt(false);
|
||||
setPOCSAGInt(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
|
|
@ -208,6 +235,7 @@ void CIO::selfTest()
|
|||
setYSFInt(false);
|
||||
setP25Int(false);
|
||||
setNXDNInt(false);
|
||||
setPOCSAGInt(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
|
|
@ -216,6 +244,7 @@ void CIO::selfTest()
|
|||
setYSFInt(false);
|
||||
setP25Int(false);
|
||||
setNXDNInt(false);
|
||||
setPOCSAGInt(false);
|
||||
|
||||
delayInt(250);
|
||||
|
||||
|
|
@ -224,6 +253,7 @@ void CIO::selfTest()
|
|||
setYSFInt(false);
|
||||
setP25Int(false);
|
||||
setNXDNInt(false);
|
||||
setPOCSAGInt(false);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
@ -245,7 +275,7 @@ void CIO::process()
|
|||
if (m_started) {
|
||||
// Two seconds timeout
|
||||
if (m_watchdog >= 48000U) {
|
||||
if (m_modemState == STATE_DSTAR || m_modemState == STATE_DMR || m_modemState == STATE_YSF || m_modemState == STATE_P25 || m_modemState == STATE_NXDN) {
|
||||
if (m_modemState == STATE_DSTAR || m_modemState == STATE_DMR || m_modemState == STATE_YSF || m_modemState == STATE_P25 || m_modemState == STATE_NXDN || m_modemState == STATE_POCSAG) {
|
||||
if (m_modemState == STATE_DMR && m_tx)
|
||||
dmrTX.setStart(false);
|
||||
m_modemState = STATE_IDLE;
|
||||
|
|
@ -472,6 +502,9 @@ void CIO::write(MMDVM_STATE mode, q15_t* samples, uint16_t length, const uint8_t
|
|||
case STATE_NXDN:
|
||||
txLevel = m_nxdnTXLevel;
|
||||
break;
|
||||
case STATE_POCSAG:
|
||||
txLevel = m_pocsagTXLevel;
|
||||
break;
|
||||
default:
|
||||
txLevel = m_cwIdTXLevel;
|
||||
break;
|
||||
|
|
@ -513,26 +546,28 @@ void CIO::setADCDetection(bool detect)
|
|||
|
||||
void CIO::setMode()
|
||||
{
|
||||
#if defined(ARDUINO_MODE_PINS)
|
||||
#if defined(MODE_PINS)
|
||||
setDStarInt(m_modemState == STATE_DSTAR);
|
||||
setDMRInt(m_modemState == STATE_DMR);
|
||||
setYSFInt(m_modemState == STATE_YSF);
|
||||
setP25Int(m_modemState == STATE_P25);
|
||||
setNXDNInt(m_modemState == STATE_NXDN);
|
||||
setPOCSAGInt(m_modemState == STATE_POCSAG);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, int16_t txDCOffset, int16_t rxDCOffset)
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void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, int16_t txDCOffset, int16_t rxDCOffset)
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{
|
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m_pttInvert = pttInvert;
|
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|
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m_rxLevel = q15_t(rxLevel * 128);
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m_cwIdTXLevel = q15_t(cwIdTXLevel * 128);
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m_dstarTXLevel = q15_t(dstarTXLevel * 128);
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m_dmrTXLevel = q15_t(dmrTXLevel * 128);
|
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m_ysfTXLevel = q15_t(ysfTXLevel * 128);
|
||||
m_p25TXLevel = q15_t(p25TXLevel * 128);
|
||||
m_nxdnTXLevel = q15_t(nxdnTXLevel * 128);
|
||||
m_rxLevel = q15_t(rxLevel * 128);
|
||||
m_cwIdTXLevel = q15_t(cwIdTXLevel * 128);
|
||||
m_dstarTXLevel = q15_t(dstarTXLevel * 128);
|
||||
m_dmrTXLevel = q15_t(dmrTXLevel * 128);
|
||||
m_ysfTXLevel = q15_t(ysfTXLevel * 128);
|
||||
m_p25TXLevel = q15_t(p25TXLevel * 128);
|
||||
m_nxdnTXLevel = q15_t(nxdnTXLevel * 128);
|
||||
m_pocsagTXLevel = q15_t(pocsagTXLevel * 128);
|
||||
|
||||
m_rxDCOffset = DC_OFFSET + rxDCOffset;
|
||||
m_txDCOffset = DC_OFFSET + txDCOffset;
|
||||
|
|
@ -541,11 +576,12 @@ void CIO::setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rx
|
|||
m_rxLevel = -m_rxLevel;
|
||||
|
||||
if (txInvert) {
|
||||
m_dstarTXLevel = -m_dstarTXLevel;
|
||||
m_dmrTXLevel = -m_dmrTXLevel;
|
||||
m_ysfTXLevel = -m_ysfTXLevel;
|
||||
m_p25TXLevel = -m_p25TXLevel;
|
||||
m_nxdnTXLevel = -m_nxdnTXLevel;
|
||||
m_dstarTXLevel = -m_dstarTXLevel;
|
||||
m_dmrTXLevel = -m_dmrTXLevel;
|
||||
m_ysfTXLevel = -m_ysfTXLevel;
|
||||
m_p25TXLevel = -m_p25TXLevel;
|
||||
m_nxdnTXLevel = -m_nxdnTXLevel;
|
||||
m_pocsagTXLevel = -m_pocsagTXLevel;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
4
IO.h
4
IO.h
|
|
@ -42,7 +42,7 @@ public:
|
|||
|
||||
void interrupt();
|
||||
|
||||
void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnLevel, int16_t txDCOffset, int16_t rxDCOffset);
|
||||
void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel, uint8_t nxdnTXLevel, uint8_t pocsagTXLevel, int16_t txDCOffset, int16_t rxDCOffset);
|
||||
|
||||
void getOverflow(bool& adcOverflow, bool& dacOverflow);
|
||||
|
||||
|
|
@ -85,6 +85,7 @@ private:
|
|||
q15_t m_ysfTXLevel;
|
||||
q15_t m_p25TXLevel;
|
||||
q15_t m_nxdnTXLevel;
|
||||
q15_t m_pocsagTXLevel;
|
||||
|
||||
uint16_t m_rxDCOffset;
|
||||
uint16_t m_txDCOffset;
|
||||
|
|
@ -116,6 +117,7 @@ private:
|
|||
void setYSFInt(bool on);
|
||||
void setP25Int(bool on);
|
||||
void setNXDNInt(bool on);
|
||||
void setPOCSAGInt(bool on);
|
||||
|
||||
void delayInt(unsigned int dly);
|
||||
};
|
||||
|
|
|
|||
25
IODue.cpp
25
IODue.cpp
|
|
@ -34,6 +34,7 @@
|
|||
#define PIN_YSF 18
|
||||
#define PIN_P25 19
|
||||
#define PIN_NXDN 20
|
||||
#define PIN_POCSAG 4
|
||||
#define ADC_CHER_Chan (1<<7) // ADC on Due pin A0 - Due AD7 - (1 << 7)
|
||||
#define ADC_ISR_EOC_Chan ADC_ISR_EOC7
|
||||
#define ADC_CDR_Chan 7
|
||||
|
|
@ -48,6 +49,7 @@
|
|||
#define PIN_YSF 7
|
||||
#define PIN_P25 6
|
||||
#define PIN_NXDN 5
|
||||
#define PIN_POCSAG 4
|
||||
#define ADC_CHER_Chan (1<<13) // ADC on Due pin A11 - Due AD13 - (1 << 13)
|
||||
#define ADC_ISR_EOC_Chan ADC_ISR_EOC13
|
||||
#define ADC_CDR_Chan 13
|
||||
|
|
@ -64,6 +66,7 @@
|
|||
#define PIN_YSF 7
|
||||
#define PIN_P25 6
|
||||
#define PIN_NXDN 5
|
||||
#define PIN_POCSAG 4
|
||||
#define ADC_CHER_Chan (1<<7) // ADC on Due pin A0 - Due AD7 - (1 << 7)
|
||||
#define ADC_ISR_EOC_Chan ADC_ISR_EOC7
|
||||
#define ADC_CDR_Chan 7
|
||||
|
|
@ -92,14 +95,19 @@ void CIO::initInt()
|
|||
pinMode(PIN_LED, OUTPUT);
|
||||
pinMode(PIN_COS, INPUT);
|
||||
|
||||
#if defined(ARDUINO_MODE_PINS)
|
||||
#if defined(MODE_PINS)
|
||||
// Set up the mode output pins
|
||||
pinMode(PIN_DSTAR, OUTPUT);
|
||||
pinMode(PIN_DMR, OUTPUT);
|
||||
pinMode(PIN_YSF, OUTPUT);
|
||||
pinMode(PIN_P25, OUTPUT);
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
pinMode(PIN_NXDN, OUTPUT);
|
||||
#endif
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
pinMode(PIN_POCSAG, OUTPUT);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::startInt()
|
||||
|
|
@ -232,7 +240,22 @@ void CIO::setP25Int(bool on)
|
|||
|
||||
void CIO::setNXDNInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
||||
#else
|
||||
digitalWrite(PIN_NXDN, on ? HIGH : LOW);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setPOCSAGInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
||||
digitalWrite(PIN_DMR, on ? HIGH : LOW);
|
||||
#else
|
||||
digitalWrite(PIN_POCSAG, on ? HIGH : LOW);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::delayInt(unsigned int dly)
|
||||
|
|
|
|||
83
IOSTM.cpp
83
IOSTM.cpp
|
|
@ -113,6 +113,7 @@ DMR PC8 output
|
|||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
NXDN PB1 output
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
|
|
@ -145,6 +146,10 @@ EXT_CLK PA15 input
|
|||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
|
|
@ -188,6 +193,7 @@ DMR PC8 output
|
|||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
NXDN PB1 output
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
|
|
@ -220,6 +226,10 @@ EXT_CLK PA15 input
|
|||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
|
|
@ -263,6 +273,7 @@ DMR PC8 output
|
|||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
NXDN PB1 output
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
|
|
@ -295,6 +306,10 @@ EXT_CLK PA15 input
|
|||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
|
|
@ -338,6 +353,7 @@ DMR PC8 output
|
|||
YSF PA8 output
|
||||
P25 PC9 output
|
||||
NXDN PB1 output
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input
|
||||
RSSI PA7 analog input
|
||||
|
|
@ -370,6 +386,10 @@ EXT_CLK PA15 input
|
|||
#define PORT_NXDN GPIOB
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_7
|
||||
#define PORT_DSTAR GPIOC
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||
|
|
@ -490,6 +510,7 @@ DMR PB4 output CN10 Pin27
|
|||
YSF PB5 output CN10 Pin29
|
||||
P25 PB3 output CN10 Pin31
|
||||
NXDN PA10 output CN10 Pin33
|
||||
POCSAG PB12 output
|
||||
|
||||
MDSTAR PC4 output CN10 Pin34
|
||||
MDMR PC5 output CN10 Pin6
|
||||
|
|
@ -528,6 +549,10 @@ EXT_CLK PA15 input CN7 Pin17
|
|||
#define PORT_NXDN GPIOA
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_10
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
|
|
@ -593,6 +618,7 @@ DMR PA4 output CN8 Pin3
|
|||
YSF PB0 output CN8 Pin4
|
||||
P25 PC1 output CN8 Pin5
|
||||
NXDN PA3 output CN9 Pin1
|
||||
POCSAG PB12 output
|
||||
|
||||
RX PA0 analog input CN8 Pin1
|
||||
RSSI PC0 analog input CN8 Pin6
|
||||
|
|
@ -625,6 +651,10 @@ EXT_CLK PB8 input CN5 Pin10
|
|||
#define PORT_NXDN GPIOA
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_1
|
||||
#define PORT_DSTAR GPIOA
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOA
|
||||
|
|
@ -672,6 +702,7 @@ DMR PB4 output CN12 Pin27
|
|||
YSF PB5 output CN12 Pin29
|
||||
P25 PB3 output CN12 Pin31
|
||||
NXDN PA10 output CN12 Pin33
|
||||
POCSAG PB12 output CN12 Pin16
|
||||
|
||||
MDSTAR PC4 output CN12 Pin34
|
||||
MDMR PC5 output CN12 Pin6
|
||||
|
|
@ -710,6 +741,10 @@ EXT_CLK PA15 input CN11 Pin17
|
|||
#define PORT_NXDN GPIOA
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_10
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
|
|
@ -887,7 +922,7 @@ void CIO::initInt()
|
|||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
|
||||
GPIO_Init(PORT_COS, &GPIO_InitStruct);
|
||||
|
||||
#if defined(ARDUINO_MODE_PINS)
|
||||
#if defined(MODE_PINS)
|
||||
// DSTAR pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_DSTAR, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_DSTAR;
|
||||
|
|
@ -912,6 +947,7 @@ void CIO::initInt()
|
|||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_P25, &GPIO_InitStruct);
|
||||
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
// NXDN pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_NXDN, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_NXDN;
|
||||
|
|
@ -919,6 +955,15 @@ void CIO::initInt()
|
|||
GPIO_Init(PORT_NXDN, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
// POCSAG pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_POCSAG, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_POCSAG;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_POCSAG, &GPIO_InitStruct);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
|
||||
// DSTAR mode pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_MDSTAR, ENABLE);
|
||||
|
|
@ -944,12 +989,22 @@ void CIO::initInt()
|
|||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_MP25, &GPIO_InitStruct);
|
||||
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
// NXDN mode pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_MNXDN, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_MNXDN;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_MNXDN, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
// POCSAG mode pin
|
||||
RCC_AHB1PeriphClockCmd(RCC_Per_MPOCSAG, ENABLE);
|
||||
GPIO_InitStruct.GPIO_Pin = PIN_MPOCSAG;
|
||||
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
|
||||
GPIO_Init(PORT_MPOCSAG, &GPIO_InitStruct);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::startInt()
|
||||
|
|
@ -1190,10 +1245,36 @@ void CIO::setP25Int(bool on)
|
|||
|
||||
void CIO::setNXDNInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
|
||||
GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#else
|
||||
GPIO_WriteBit(PORT_NXDN, PIN_NXDN, on ? Bit_SET : Bit_RESET);
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
|
||||
GPIO_WriteBit(PORT_MNXDN, PIN_MNXDN, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setPOCSAGInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
|
||||
GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
|
||||
GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#else
|
||||
GPIO_WriteBit(PORT_POCSAG, PIN_POCSAG, on ? Bit_SET : Bit_RESET);
|
||||
#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
|
||||
GPIO_WriteBit(PORT_MPOCSAG, PIN_MPOCSAG, on ? Bit_SET : Bit_RESET);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
// Simple delay function for STM32
|
||||
|
|
|
|||
|
|
@ -40,6 +40,7 @@ DMR PB6 output
|
|||
YSF PB8 output
|
||||
P25 PB9 output
|
||||
NXDN PB10 output
|
||||
POCSAG PB11 output
|
||||
|
||||
RX PB0 analog input (ADC1_8)
|
||||
RSSI PB1 analog input (ADC2_9)
|
||||
|
|
@ -80,6 +81,9 @@ USART1_RXD PA10 input (AF)
|
|||
#define PIN_NXDN 10
|
||||
#define PORT_NXDN GPIOB
|
||||
#define BB_NXDN *((bitband_t)BITBAND_PERIPH(&PORT_NXDN->ODR, PIN_NXDN))
|
||||
#define PIN_POCSAG 11
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define BB_POCSAG *((bitband_t)BITBAND_PERIPH(&PORT_POCSAG->ODR, PIN_POCSAG))
|
||||
|
||||
#define PIN_RX 0
|
||||
#define PIN_RX_ADC_CH 8
|
||||
|
|
@ -209,16 +213,21 @@ static inline void GPIOInit()
|
|||
GPIOD->ODR = 0;
|
||||
|
||||
// configure ports
|
||||
GPIOConfigPin(PORT_PTT, PIN_PTT, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_PTT, PIN_PTT, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_COSLED, PIN_COSLED, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_LED, PIN_LED, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_COS, PIN_COS, GPIO_CRL_CNF0_1);
|
||||
GPIOConfigPin(PORT_LED, PIN_LED, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_COS, PIN_COS, GPIO_CRL_CNF0_1);
|
||||
|
||||
GPIOConfigPin(PORT_DSTAR, PIN_DSTAR, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_DMR, PIN_DMR, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_YSF, PIN_YSF, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_P25, PIN_P25, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_NXDN, PIN_NXDN, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_DSTAR, PIN_DSTAR, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_DMR, PIN_DMR, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_YSF, PIN_YSF, GPIO_CRL_MODE0_1);
|
||||
GPIOConfigPin(PORT_P25, PIN_P25, GPIO_CRL_MODE0_1);
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
GPIOConfigPin(PORT_NXDN, PIN_NXDN, GPIO_CRL_MODE0_1);
|
||||
#endif
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
GPIOConfigPin(PORT_POCSAG, PIN_POCSAG, GPIO_CRL_MODE0_1);
|
||||
#endif
|
||||
|
||||
GPIOConfigPin(PORT_RX, PIN_RX, 0);
|
||||
#if defined(SEND_RSSI_DATA)
|
||||
|
|
@ -431,7 +440,22 @@ void CIO::setP25Int(bool on)
|
|||
|
||||
void CIO::setNXDNInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
BB_YSF = !!on;
|
||||
BB_P25 = !!on;
|
||||
#else
|
||||
BB_NXDN = !!on;
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setPOCSAGInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
BB_DSTAR = !!on;
|
||||
BB_DMR = !!on;
|
||||
#else
|
||||
BB_POCSAG = !!on;
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::delayInt(unsigned int dly)
|
||||
|
|
|
|||
24
IOTeensy.cpp
24
IOTeensy.cpp
|
|
@ -36,8 +36,10 @@
|
|||
#define PIN_P25 12
|
||||
#if defined(__MK20DX256__)
|
||||
#define PIN_NXDN 2
|
||||
#define PIN_POCSAG 3
|
||||
#else
|
||||
#define PIN_NXDN 24
|
||||
#define PIN_POCSAG 25
|
||||
#endif
|
||||
#define PIN_ADC 5 // A0, Pin 14
|
||||
#define PIN_RSSI 4 // Teensy 3.5/3.6, A16, Pin 35. Teensy 3.1/3.2, A17, Pin 28
|
||||
|
|
@ -62,14 +64,19 @@ void CIO::initInt()
|
|||
pinMode(PIN_LED, OUTPUT);
|
||||
pinMode(PIN_COS, INPUT);
|
||||
|
||||
#if defined(ARDUINO_MODE_PINS)
|
||||
#if defined(MODE_PINS)
|
||||
// Set up the mode output pins
|
||||
pinMode(PIN_DSTAR, OUTPUT);
|
||||
pinMode(PIN_DMR, OUTPUT);
|
||||
pinMode(PIN_YSF, OUTPUT);
|
||||
pinMode(PIN_P25, OUTPUT);
|
||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
pinMode(PIN_NXDN, OUTPUT);
|
||||
#endif
|
||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
pinMode(PIN_POCSAG, OUTPUT);
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::startInt()
|
||||
|
|
@ -218,7 +225,22 @@ void CIO::setP25Int(bool on)
|
|||
|
||||
void CIO::setNXDNInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_NXDN_LEDS)
|
||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
||||
#else
|
||||
digitalWrite(PIN_NXDN, on ? HIGH : LOW);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::setPOCSAGInt(bool on)
|
||||
{
|
||||
#if defined(USE_ALTERNATE_POCSAG_LEDS)
|
||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
||||
digitalWrite(PIN_DMR, on ? HIGH : LOW);
|
||||
#else
|
||||
digitalWrite(PIN_POCSAG, on ? HIGH : LOW);
|
||||
#endif
|
||||
}
|
||||
|
||||
void CIO::delayInt(unsigned int dly)
|
||||
|
|
|
|||
16
MMDVM.cpp
16
MMDVM.cpp
|
|
@ -26,11 +26,12 @@
|
|||
// Global variables
|
||||
MMDVM_STATE m_modemState = STATE_IDLE;
|
||||
|
||||
bool m_dstarEnable = true;
|
||||
bool m_dmrEnable = true;
|
||||
bool m_ysfEnable = true;
|
||||
bool m_p25Enable = true;
|
||||
bool m_nxdnEnable = true;
|
||||
bool m_dstarEnable = true;
|
||||
bool m_dmrEnable = true;
|
||||
bool m_ysfEnable = true;
|
||||
bool m_p25Enable = true;
|
||||
bool m_nxdnEnable = true;
|
||||
bool m_pocsagEnable = true;
|
||||
|
||||
bool m_duplex = true;
|
||||
|
||||
|
|
@ -56,6 +57,8 @@ CP25TX p25TX;
|
|||
CNXDNRX nxdnRX;
|
||||
CNXDNTX nxdnTX;
|
||||
|
||||
CPOCSAGTX pocsagTX;
|
||||
|
||||
CCalDStarRX calDStarRX;
|
||||
CCalDStarTX calDStarTX;
|
||||
CCalDMR calDMR;
|
||||
|
|
@ -99,6 +102,9 @@ void loop()
|
|||
if (m_nxdnEnable && m_modemState == STATE_NXDN)
|
||||
nxdnTX.process();
|
||||
|
||||
if (m_pocsagEnable && m_modemState == STATE_POCSAG)
|
||||
pocsagTX.process();
|
||||
|
||||
if (m_modemState == STATE_DSTARCAL)
|
||||
calDStarTX.process();
|
||||
|
||||
|
|
|
|||
16
MMDVM.ino
16
MMDVM.ino
|
|
@ -23,11 +23,12 @@
|
|||
// Global variables
|
||||
MMDVM_STATE m_modemState = STATE_IDLE;
|
||||
|
||||
bool m_dstarEnable = true;
|
||||
bool m_dmrEnable = true;
|
||||
bool m_ysfEnable = true;
|
||||
bool m_p25Enable = true;
|
||||
bool m_nxdnEnable = true;
|
||||
bool m_dstarEnable = true;
|
||||
bool m_dmrEnable = true;
|
||||
bool m_ysfEnable = true;
|
||||
bool m_p25Enable = true;
|
||||
bool m_nxdnEnable = true;
|
||||
bool m_pocsagEnable = true;
|
||||
|
||||
bool m_duplex = true;
|
||||
|
||||
|
|
@ -53,6 +54,8 @@ CP25TX p25TX;
|
|||
CNXDNRX nxdnRX;
|
||||
CNXDNTX nxdnTX;
|
||||
|
||||
CPOCSAGTX pocsagTX;
|
||||
|
||||
CCalDStarRX calDStarRX;
|
||||
CCalDStarTX calDStarTX;
|
||||
CCalDMR calDMR;
|
||||
|
|
@ -96,6 +99,9 @@ void loop()
|
|||
if (m_nxdnEnable && m_modemState == STATE_NXDN)
|
||||
nxdnTX.process();
|
||||
|
||||
if (m_pocsagEnable && m_modemState == STATE_POCSAG)
|
||||
pocsagTX.process();
|
||||
|
||||
if (m_modemState == STATE_DSTARCAL)
|
||||
calDStarTX.process();
|
||||
|
||||
|
|
|
|||
|
|
@ -97,7 +97,7 @@
|
|||
<Define name="STM32F446xx"/>
|
||||
<Define name="HSE_VALUE=12000000"/>
|
||||
<Define name="STM32F4_PI"/>
|
||||
<Define name="ARDUINO_MODE_PINS"/>
|
||||
<Define name="MODE_PINS"/>
|
||||
</DefinedSymbols>
|
||||
</Compile>
|
||||
<Link useDefault="0">
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -150,7 +150,7 @@ CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -f
|
|||
LDFLAGS=-Os --specs=nano.specs
|
||||
|
||||
# Build Rules
|
||||
.PHONY: all release dis pi pi_f722 f4m nucleo f767 dvm clean
|
||||
.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm clean
|
||||
|
||||
# Default target: Nucleo-64 F446RE board
|
||||
all: nucleo
|
||||
|
|
|
|||
|
|
@ -0,0 +1,141 @@
|
|||
/*
|
||||
* Copyright (C) 2009-2018 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include "Config.h"
|
||||
#include "Globals.h"
|
||||
#include "POCSAGTX.h"
|
||||
|
||||
const uint16_t POCSAG_FRAME_LENGTH_BYTES = 17U * sizeof(uint32_t);
|
||||
|
||||
const uint16_t POCSAG_PREAMBLE_LENGTH_BYTES = 18U * sizeof(uint32_t);
|
||||
|
||||
const uint16_t POCSAG_RADIO_SYMBOL_LENGTH = 20U;
|
||||
|
||||
const q15_t POCSAG_LEVEL1[] = { 1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700, 1700};
|
||||
const q15_t POCSAG_LEVEL0[] = {-1700, -1700, -1700, -1700, -1700, -1700, -1700, -1700, -1700, -1700, -1700, -1700, -1700, -1700, -1700, -1700, -1700, -1700, -1700, -1700};
|
||||
|
||||
static q15_t SHAPING_FILTER[] = {5461, 5461, 5461, 5461, 5461, 5461};
|
||||
const uint16_t SHAPING_FILTER_LEN = 6U;
|
||||
|
||||
const uint8_t POCSAG_SYNC = 0xAAU;
|
||||
|
||||
CPOCSAGTX::CPOCSAGTX() :
|
||||
m_buffer(4000U),
|
||||
m_modFilter(),
|
||||
m_modState(),
|
||||
m_poBuffer(),
|
||||
m_poLen(0U),
|
||||
m_poPtr(0U),
|
||||
m_txDelay(POCSAG_PREAMBLE_LENGTH_BYTES)
|
||||
{
|
||||
::memset(m_modState, 0x00U, 170U * sizeof(q15_t));
|
||||
|
||||
m_modFilter.numTaps = SHAPING_FILTER_LEN;
|
||||
m_modFilter.pState = m_modState;
|
||||
m_modFilter.pCoeffs = SHAPING_FILTER;
|
||||
}
|
||||
|
||||
void CPOCSAGTX::process()
|
||||
{
|
||||
if (m_buffer.getData() == 0U && m_poLen == 0U)
|
||||
return;
|
||||
|
||||
if (m_poLen == 0U) {
|
||||
if (!m_tx) {
|
||||
for (uint16_t i = 0U; i < m_txDelay; i++)
|
||||
m_poBuffer[m_poLen++] = POCSAG_SYNC;
|
||||
} else {
|
||||
for (uint8_t i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++) {
|
||||
uint8_t c = m_buffer.get();
|
||||
m_poBuffer[m_poLen++] = c;
|
||||
}
|
||||
}
|
||||
|
||||
m_poPtr = 0U;
|
||||
}
|
||||
|
||||
if (m_poLen > 0U) {
|
||||
uint16_t space = io.getSpace();
|
||||
|
||||
while (space > (8U * POCSAG_RADIO_SYMBOL_LENGTH)) {
|
||||
uint8_t c = m_poBuffer[m_poPtr++];
|
||||
writeByte(c);
|
||||
|
||||
space -= 8U * POCSAG_RADIO_SYMBOL_LENGTH;
|
||||
|
||||
if (m_poPtr >= m_poLen) {
|
||||
m_poPtr = 0U;
|
||||
m_poLen = 0U;
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
uint8_t CPOCSAGTX::writeData(const uint8_t* data, uint8_t length)
|
||||
{
|
||||
if (length != POCSAG_FRAME_LENGTH_BYTES)
|
||||
return 4U;
|
||||
|
||||
uint16_t space = m_buffer.getSpace();
|
||||
if (space < POCSAG_FRAME_LENGTH_BYTES)
|
||||
return 5U;
|
||||
|
||||
for (uint8_t i = 0U; i < POCSAG_FRAME_LENGTH_BYTES; i++)
|
||||
m_buffer.put(data[i]);
|
||||
|
||||
return 0U;
|
||||
}
|
||||
|
||||
void CPOCSAGTX::writeByte(uint8_t c)
|
||||
{
|
||||
q15_t inBuffer[POCSAG_RADIO_SYMBOL_LENGTH * 8U];
|
||||
q15_t outBuffer[POCSAG_RADIO_SYMBOL_LENGTH * 8U];
|
||||
|
||||
const uint8_t MASK = 0x80U;
|
||||
|
||||
uint8_t n = 0U;
|
||||
for (uint8_t i = 0U; i < 8U; i++, c <<= 1, n += POCSAG_RADIO_SYMBOL_LENGTH) {
|
||||
switch (c & MASK) {
|
||||
case 0x80U:
|
||||
::memcpy(inBuffer + n, POCSAG_LEVEL1, POCSAG_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
|
||||
break;
|
||||
default:
|
||||
::memcpy(inBuffer + n, POCSAG_LEVEL0, POCSAG_RADIO_SYMBOL_LENGTH * sizeof(q15_t));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
::arm_fir_fast_q15(&m_modFilter, inBuffer, outBuffer, POCSAG_RADIO_SYMBOL_LENGTH * 8U);
|
||||
|
||||
io.write(STATE_POCSAG, outBuffer, POCSAG_RADIO_SYMBOL_LENGTH * 8U);
|
||||
}
|
||||
|
||||
void CPOCSAGTX::setTXDelay(uint8_t delay)
|
||||
{
|
||||
m_txDelay = POCSAG_PREAMBLE_LENGTH_BYTES + (delay * 3U) / 2U;
|
||||
|
||||
if (m_txDelay > 150U)
|
||||
m_txDelay = 150U;
|
||||
}
|
||||
|
||||
uint8_t CPOCSAGTX::getSpace() const
|
||||
{
|
||||
return m_buffer.getSpace() / POCSAG_FRAME_LENGTH_BYTES;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
* Copyright (C) 2015,2016,2017,2018 by Jonathan Naylor G4KLX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#if !defined(POCSAGTX_H)
|
||||
#define POCSAGTX_H
|
||||
|
||||
#include "Config.h"
|
||||
|
||||
#include "SerialRB.h"
|
||||
|
||||
class CPOCSAGTX {
|
||||
public:
|
||||
CPOCSAGTX();
|
||||
|
||||
uint8_t writeData(const uint8_t* data, uint8_t length);
|
||||
|
||||
void process();
|
||||
|
||||
void setTXDelay(uint8_t delay);
|
||||
|
||||
uint8_t getSpace() const;
|
||||
|
||||
private:
|
||||
CSerialRB m_buffer;
|
||||
arm_fir_instance_q15 m_modFilter;
|
||||
q15_t m_modState[170U]; // NoTaps + BlockSize - 1, 6 + 160 - 1 plus some spare
|
||||
uint8_t m_poBuffer[200U];
|
||||
uint16_t m_poLen;
|
||||
uint16_t m_poPtr;
|
||||
uint16_t m_txDelay;
|
||||
|
||||
void writeByte(uint8_t c);
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
This is the source code of the MMDVM firmware that supports D-Star, DMR, System Fusion, P25, and NXDN modes.
|
||||
This is the source code of the MMDVM firmware that supports D-Star, DMR, System Fusion, P25, NXDN, and POCSAG modes.
|
||||
|
||||
It runs on the Arduino Due, the ST-Micro STM32F407-DISCO and STM32F446-NUCLEO, as well as the Teensy 3.1/3.2/3.5/3.6. What these platforms have in common is the use of an ARM Cortex-M3 or M4 processor with a clock speed greater than 70 MHz, and access to at least one analogue to digital converter and one digital to analogue converter. A Cortex-M7 processor is also probably adequate.
|
||||
It runs on the Arduino Due, the ST-Micro STM32F1xxx, STM32F4xxx and STM32F7xxx processors, as well as the Teensy 3.1/3.2/3.5/3.6. What these platforms have in common is the use of an ARM Cortex-M3 or M4 processor with a clock speed greater than 70 MHz, and access to at least one analogue to digital converter and one digital to analogue converter.
|
||||
|
||||
In order to build this software for the Arduino Due, you will need to edit a file within the Arduino GUI and that is detailed in the BUILD.txt file. The STM32 support is being supplied via the Coocox IDE with ARM GCC. The Teensy support is via the latest beta of Teensyduino.
|
||||
In order to build this software for the Arduino Due, you will need to edit a file within the Arduino GUI and that is detailed in the BUILD.txt file. The STM32 support is being supplied via the Coocox IDE with ARM GCC. The Teensy support uses Teensyduino.
|
||||
|
||||
This software is licenced under the GPL v2 and is intended for amateur and educational use only. Use of this software for commercial purposes is strictly forbidden.
|
||||
|
|
|
|||
|
|
@ -63,6 +63,8 @@ const uint8_t MMDVM_P25_LOST = 0x32U;
|
|||
const uint8_t MMDVM_NXDN_DATA = 0x40U;
|
||||
const uint8_t MMDVM_NXDN_LOST = 0x41U;
|
||||
|
||||
const uint8_t MMDVM_POCSAG_DATA = 0x50U;
|
||||
|
||||
const uint8_t MMDVM_ACK = 0x70U;
|
||||
const uint8_t MMDVM_NAK = 0x7FU;
|
||||
|
||||
|
|
@ -88,7 +90,7 @@ const uint8_t MMDVM_DEBUG5 = 0xF5U;
|
|||
#define TCXO "NO TCXO"
|
||||
#endif
|
||||
|
||||
#define DESCRIPTION "MMDVM 20180327 (D-Star/DMR/System Fusion/P25/NXDN)"
|
||||
#define DESCRIPTION "MMDVM 20180705 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG)"
|
||||
|
||||
#if defined(GITVERSION)
|
||||
#define concat(a, b, c) a " " b " GitID #" c ""
|
||||
|
|
@ -139,11 +141,11 @@ void CSerialPort::getStatus()
|
|||
{
|
||||
io.resetWatchdog();
|
||||
|
||||
uint8_t reply[15U];
|
||||
uint8_t reply[20U];
|
||||
|
||||
// Send all sorts of interesting internal values
|
||||
reply[0U] = MMDVM_FRAME_START;
|
||||
reply[1U] = 12U;
|
||||
reply[1U] = 13U;
|
||||
reply[2U] = MMDVM_GET_STATUS;
|
||||
|
||||
reply[3U] = 0x00U;
|
||||
|
|
@ -157,6 +159,8 @@ void CSerialPort::getStatus()
|
|||
reply[3U] |= 0x08U;
|
||||
if (m_nxdnEnable)
|
||||
reply[3U] |= 0x10U;
|
||||
if (m_pocsagEnable)
|
||||
reply[3U] |= 0x20U;
|
||||
|
||||
reply[4U] = uint8_t(m_modemState);
|
||||
|
||||
|
|
@ -216,12 +220,17 @@ void CSerialPort::getStatus()
|
|||
else
|
||||
reply[11U] = 0U;
|
||||
|
||||
writeInt(1U, reply, 12);
|
||||
if (m_pocsagEnable)
|
||||
reply[12U] = pocsagTX.getSpace();
|
||||
else
|
||||
reply[12U] = 0U;
|
||||
|
||||
writeInt(1U, reply, 13);
|
||||
}
|
||||
|
||||
void CSerialPort::getVersion()
|
||||
{
|
||||
uint8_t reply[100U];
|
||||
uint8_t reply[150U];
|
||||
|
||||
reply[0U] = MMDVM_FRAME_START;
|
||||
reply[1U] = 0U;
|
||||
|
|
@ -240,7 +249,7 @@ void CSerialPort::getVersion()
|
|||
|
||||
uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
|
||||
{
|
||||
if (length < 17U)
|
||||
if (length < 18U)
|
||||
return 4U;
|
||||
|
||||
bool rxInvert = (data[0U] & 0x01U) == 0x01U;
|
||||
|
|
@ -251,11 +260,12 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
|
|||
|
||||
m_debug = (data[0U] & 0x10U) == 0x10U;
|
||||
|
||||
bool dstarEnable = (data[1U] & 0x01U) == 0x01U;
|
||||
bool dmrEnable = (data[1U] & 0x02U) == 0x02U;
|
||||
bool ysfEnable = (data[1U] & 0x04U) == 0x04U;
|
||||
bool p25Enable = (data[1U] & 0x08U) == 0x08U;
|
||||
bool nxdnEnable = (data[1U] & 0x10U) == 0x10U;
|
||||
bool dstarEnable = (data[1U] & 0x01U) == 0x01U;
|
||||
bool dmrEnable = (data[1U] & 0x02U) == 0x02U;
|
||||
bool ysfEnable = (data[1U] & 0x04U) == 0x04U;
|
||||
bool p25Enable = (data[1U] & 0x08U) == 0x08U;
|
||||
bool nxdnEnable = (data[1U] & 0x10U) == 0x10U;
|
||||
bool pocsagEnable = (data[1U] & 0x20U) == 0x20U;
|
||||
|
||||
uint8_t txDelay = data[2U];
|
||||
if (txDelay > 50U)
|
||||
|
|
@ -263,7 +273,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
|
|||
|
||||
MMDVM_STATE modemState = MMDVM_STATE(data[3U]);
|
||||
|
||||
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K)
|
||||
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K)
|
||||
return 4U;
|
||||
if (modemState == STATE_DSTAR && !dstarEnable)
|
||||
return 4U;
|
||||
|
|
@ -275,6 +285,8 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
|
|||
return 4U;
|
||||
if (modemState == STATE_NXDN && !nxdnEnable)
|
||||
return 4U;
|
||||
if (modemState == STATE_POCSAG && !pocsagEnable)
|
||||
return 4U;
|
||||
|
||||
uint8_t rxLevel = data[4U];
|
||||
|
||||
|
|
@ -293,24 +305,28 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
|
|||
int16_t txDCOffset = int16_t(data[13U]) - 128;
|
||||
int16_t rxDCOffset = int16_t(data[14U]) - 128;
|
||||
|
||||
uint8_t nxdnTXLevel = data[15U];
|
||||
uint8_t nxdnTXLevel = data[15U];
|
||||
|
||||
uint8_t ysfTXHang = data[16U];
|
||||
uint8_t ysfTXHang = data[16U];
|
||||
|
||||
uint8_t pocsagTXLevel = data[17U];
|
||||
|
||||
m_modemState = modemState;
|
||||
|
||||
m_dstarEnable = dstarEnable;
|
||||
m_dmrEnable = dmrEnable;
|
||||
m_ysfEnable = ysfEnable;
|
||||
m_p25Enable = p25Enable;
|
||||
m_nxdnEnable = nxdnEnable;
|
||||
m_duplex = !simplex;
|
||||
m_dstarEnable = dstarEnable;
|
||||
m_dmrEnable = dmrEnable;
|
||||
m_ysfEnable = ysfEnable;
|
||||
m_p25Enable = p25Enable;
|
||||
m_nxdnEnable = nxdnEnable;
|
||||
m_pocsagEnable = pocsagEnable;
|
||||
m_duplex = !simplex;
|
||||
|
||||
dstarTX.setTXDelay(txDelay);
|
||||
ysfTX.setTXDelay(txDelay);
|
||||
p25TX.setTXDelay(txDelay);
|
||||
dmrDMOTX.setTXDelay(txDelay);
|
||||
nxdnTX.setTXDelay(txDelay);
|
||||
pocsagTX.setTXDelay(txDelay);
|
||||
|
||||
dmrTX.setColorCode(colorCode);
|
||||
dmrRX.setColorCode(colorCode);
|
||||
|
|
@ -320,7 +336,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
|
|||
|
||||
ysfTX.setParams(ysfLoDev, ysfTXHang);
|
||||
|
||||
io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, nxdnTXLevel, txDCOffset, rxDCOffset);
|
||||
io.setParameters(rxInvert, txInvert, pttInvert, rxLevel, cwIdTXLevel, dstarTXLevel, dmrTXLevel, ysfTXLevel, p25TXLevel, nxdnTXLevel, pocsagTXLevel, txDCOffset, rxDCOffset);
|
||||
|
||||
io.start();
|
||||
|
||||
|
|
@ -337,7 +353,7 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
|
|||
if (modemState == m_modemState)
|
||||
return 0U;
|
||||
|
||||
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K)
|
||||
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_NXDN && modemState != STATE_POCSAG && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMRCAL1K && modemState != STATE_P25CAL1K && modemState != STATE_DMRDMO1K && modemState != STATE_NXDNCAL1K)
|
||||
return 4U;
|
||||
if (modemState == STATE_DSTAR && !m_dstarEnable)
|
||||
return 4U;
|
||||
|
|
@ -349,6 +365,8 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
|
|||
return 4U;
|
||||
if (modemState == STATE_NXDN && !m_nxdnEnable)
|
||||
return 4U;
|
||||
if (modemState == STATE_POCSAG && !m_pocsagEnable)
|
||||
return 4U;
|
||||
|
||||
setMode(modemState);
|
||||
|
||||
|
|
@ -406,6 +424,17 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
|
|||
p25RX.reset();
|
||||
cwIdTX.reset();
|
||||
break;
|
||||
case STATE_POCSAG:
|
||||
DEBUG1("Mode set to POCSAG");
|
||||
dmrIdleRX.reset();
|
||||
dmrDMORX.reset();
|
||||
dmrRX.reset();
|
||||
dstarRX.reset();
|
||||
ysfRX.reset();
|
||||
p25RX.reset();
|
||||
nxdnRX.reset();
|
||||
cwIdTX.reset();
|
||||
break;
|
||||
case STATE_DSTARCAL:
|
||||
DEBUG1("Mode set to D-Star Calibrate");
|
||||
dmrIdleRX.reset();
|
||||
|
|
@ -770,6 +799,20 @@ void CSerialPort::process()
|
|||
}
|
||||
break;
|
||||
|
||||
case MMDVM_POCSAG_DATA:
|
||||
if (m_pocsagEnable) {
|
||||
if (m_modemState == STATE_IDLE || m_modemState == STATE_POCSAG)
|
||||
err = pocsagTX.writeData(m_buffer + 3U, m_len - 3U);
|
||||
}
|
||||
if (err == 0U) {
|
||||
if (m_modemState == STATE_IDLE)
|
||||
setMode(STATE_POCSAG);
|
||||
} else {
|
||||
DEBUG2("Received invalid POCSAG data", err);
|
||||
sendNAK(err);
|
||||
}
|
||||
break;
|
||||
|
||||
case MMDVM_TRANSPARENT:
|
||||
// Do nothing on the MMDVM.
|
||||
break;
|
||||
|
|
|
|||
|
|
@ -83,7 +83,7 @@ EOF
|
|||
"3") sed -e 's/\/\/ #define EXTERNAL_OSC 14400000/#define EXTERNAL_OSC 14400000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "14.400 MHz clock enabled";;
|
||||
"4") sed -e 's/\/\/ #define EXTERNAL_OSC 19200000/#define EXTERNAL_OSC 19200000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "19.200 MHz clock enabled";;
|
||||
"5") sed -e 's/\/\/ #define USE_COS_AS_LOCKOUT /#define USE_COS_AS_LOCKOUT/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "COS as Lockout enabled";;
|
||||
"6") sed -e 's/\/\/ #define ARDUINO_MODE_PINS/#define ARDUINO_MODE_PINS/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Mode pins enabled";;
|
||||
"6") sed -e 's/\/\/ #define MODE_PINS/#define MODE_PINS/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Mode pins enabled";;
|
||||
"7") sed -e 's/\/\/ #define ARDUINO_DUE_PAPA/#define ARDUINO_DUE_PAPA/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for the PAPA board enabled";;
|
||||
"8") sed -e 's/\/\/ #define ARDUINO_DUE_ZUM_V10/#define ARDUINO_DUE_ZUM_V10/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for ZUM V1.0 and V1.0.1 boards enabled";;
|
||||
"9") sed -e 's/\/\/ #define ARDUINO_DUE_NTH/#define ARDUINO_DUE_NTH/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for SP8NTH board enabled";;
|
||||
|
|
|
|||
Loading…
Reference in New Issue