mirror of https://github.com/g4klx/MMDVM.git
Supports drcc_dvm_nqf board
This commit is contained in:
Shawn Chain
parent
43e00bbe1d
commit
f8879e1f25
5
IOPins.h
5
IOPins.h
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@ -48,7 +48,7 @@
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#if defined(STM32F4_NUCLEO_MORPHO_HEADER)
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#include "pins/pins_f4_nucleo_morpho.h"
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#elif defined(STM32F4_NUCLEO_ARDUINO_HEADER)
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#include "pins/pins_f4_nucleo_morpho.h"
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#include "pins/pins_f4_nucleo_arduino.h"
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#else
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#error "Either STM32F4_NUCLEO_MORPHO_HEADER or STM32F4_NUCLEO_ARDUINO_HEADER need to be defined"
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#endif
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@ -59,6 +59,9 @@
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#elif defined(STM32F4_DVM)
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#include "pins/pins_f4_stm32dvm_v3.h"
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#elif defined(DRCC_DVM_NQF)
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#include "pins/pins_f4_drcc_nqf.h"
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#else
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#error "A valid board type macro need to be defined."
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34
IOSTM.cpp
34
IOSTM.cpp
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@ -364,7 +364,9 @@ void CIO::setCOSInt(bool on)
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void CIO::setDStarInt(bool on)
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{
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#if defined(MODE_LEDS)
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GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
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#endif
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#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
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GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
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#endif
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@ -372,7 +374,9 @@ void CIO::setDStarInt(bool on)
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void CIO::setDMRInt(bool on)
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{
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#if defined(MODE_LEDS)
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GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
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#endif
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#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
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GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET);
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#endif
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@ -380,7 +384,9 @@ void CIO::setDMRInt(bool on)
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void CIO::setYSFInt(bool on)
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{
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#if defined(MODE_LEDS)
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GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
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#endif
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#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
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GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
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#endif
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@ -388,7 +394,9 @@ void CIO::setYSFInt(bool on)
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void CIO::setP25Int(bool on)
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{
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#if defined(MODE_LEDS)
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GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
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#endif
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#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
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GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
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#endif
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@ -396,16 +404,20 @@ void CIO::setP25Int(bool on)
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void CIO::setNXDNInt(bool on)
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{
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#if defined(MODE_LEDS)
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#if defined(USE_ALTERNATE_NXDN_LEDS)
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GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET);
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GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET);
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#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
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GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
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GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
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#endif
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#else
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GPIO_WriteBit(PORT_NXDN, PIN_NXDN, on ? Bit_SET : Bit_RESET);
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#endif
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#endif
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#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
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#if defined(USE_ALTERNATE_NXDN_LEDS)
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GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET);
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GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET);
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#else
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GPIO_WriteBit(PORT_MNXDN, PIN_MNXDN, on ? Bit_SET : Bit_RESET);
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#endif
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#endif
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@ -413,16 +425,20 @@ void CIO::setNXDNInt(bool on)
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void CIO::setPOCSAGInt(bool on)
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{
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#if defined(USE_ALTERNATE_POCSAG_LEDS)
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#if defined(MODE_LEDS)
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#if defined(USE_ALTERNATE_FM_LEDS)
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GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
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GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET);
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#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
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GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
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GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET);
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#endif
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#else
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GPIO_WriteBit(PORT_POCSAG, PIN_POCSAG, on ? Bit_SET : Bit_RESET);
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#endif
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#endif
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#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && (defined(STM32F4_NUCLEO) || defined(STM32F722_RPT_HAT))
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#if defined(USE_ALTERNATE_FM_LEDS)
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GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
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GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET);
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#else
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GPIO_WriteBit(PORT_MPOCSAG, PIN_MPOCSAG, on ? Bit_SET : Bit_RESET);
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#endif
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#endif
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18
Makefile
18
Makefile
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@ -25,6 +25,7 @@ F7_LIB_PATH=./STM32F7XX_Lib
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# MCU external clock frequency (Hz)
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CLK_MMDVM_PI=12000000
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CLK_NUCLEO=8000000
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CLK_12MHZ=12000000
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# Directory Structure
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BINDIR=bin
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@ -93,6 +94,8 @@ ifndef $(OSC)
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OSC=$(CLK_MMDVM_PI)
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else ifeq ($(MAKECMDGOALS),pi-f722)
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OSC=$(CLK_MMDVM_PI)
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else ifeq ($(MAKECMDGOALS),drcc_nqf)
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OSC=$(CLK_12MHZ)
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else
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OSC=$(CLK_NUCLEO)
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endif
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@ -134,6 +137,9 @@ DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHS
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DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
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# MMDVM_RPT_Hat BG4TGO, BG5HHP board:
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DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
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# DRCC_DVM BG7NQF board:
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DEFS_DRCC_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DDRCC_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
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# Build compiler flags
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CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
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@ -152,7 +158,7 @@ CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -f
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LDFLAGS=-Os --specs=nano.specs
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# Build Rules
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.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm clean
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.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm drcc_nqf clean
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# Default target: Nucleo-64 F446RE board
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all: nucleo
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@ -217,6 +223,12 @@ dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM)
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dvm: LDFLAGS+=$(LDFLAGS_F4)
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dvm: release_f4
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drcc_nqf: GitVersion.h
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drcc_nqf: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
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drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
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drcc_nqf: LDFLAGS+=$(LDFLAGS_F4)
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drcc_nqf: release_f4
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release_f4: $(BINDIR)
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release_f4: $(OBJDIR_F4)
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release_f4: $(BINDIR)/$(BINHEX_F4)
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@ -365,3 +377,7 @@ else
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echo "#define GITVERSION \"0000000\"" > $@
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endif
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endif
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flash_f4:
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@echo "flashing firmware..."
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st-flash write bin/$(BINBIN_F4) 0x8000000
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@ -95,7 +95,9 @@ const uint8_t MMDVM_DEBUG5 = 0xF5U;
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#define TCXO "NO TCXO"
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#endif
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#if defined(STM32F4_RPT_HAT_TGO)
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#if defined(DRCC_DVM_NQF)
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#define HW_TYPE "MMDVM DRCC_DVM_NQF"
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#elif defined(STM32F4_RPT_HAT_TGO)
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#define HW_TYPE "MMDVM RPT_HAT_TGO"
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#else
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#define HW_TYPE "MMDVM"
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@ -50,7 +50,7 @@ extern "C" {
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}
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/* ************* USART1 ***************** */
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#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
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#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM)
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volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
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volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
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@ -241,7 +241,7 @@ void WriteUSART1(const uint8_t* data, uint16_t length)
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#endif
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/* ************* USART2 ***************** */
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#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
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#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) || defined(DRCC_DVM)
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volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
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volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
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@ -845,11 +845,15 @@ void CSerialPort::beginInt(uint8_t n, int speed)
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InitUSART1(speed);
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#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
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InitUSART2(speed);
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#elif defined(DRCC_DVM)
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InitUSART1(speed);
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#endif
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break;
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case 3U:
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#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
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InitUSART1(speed);
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#elif defined(DRCC_DVM)
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InitUSART2(speed);
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#else
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InitUART5(speed);
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#endif
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@ -869,10 +873,14 @@ int CSerialPort::availableInt(uint8_t n)
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return AvailUSART1();
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#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
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return AvailUSART2();
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#elif defined(DRCC_DVM)
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return AvailUSART1();
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#endif
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case 3U:
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#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
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return AvailUSART1();
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#elif defined(DRCC_DVM)
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return AvailUSART2();
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#else
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return AvailUART5();
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#endif
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@ -891,10 +899,14 @@ int CSerialPort::availableForWriteInt(uint8_t n)
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return AvailForWriteUSART1();
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#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
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return AvailForWriteUSART2();
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#elif defined(DRCC_DVM)
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return AvailForWriteUSART1();
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#endif
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case 3U:
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#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
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return AvailForWriteUSART1();
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#elif defined(DRCC_DVM)
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AvailForWriteUSART2();
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#else
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return AvailForWriteUART5();
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#endif
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@ -913,10 +925,14 @@ uint8_t CSerialPort::readInt(uint8_t n)
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return ReadUSART1();
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#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
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return ReadUSART2();
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#elif defined(DRCC_DVM)
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return ReadUSART1();
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#endif
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case 3U:
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#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
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return ReadUSART1();
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#elif defined(DRCC_DVM)
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return ReadUSART2();
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#else
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return ReadUART5();
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#endif
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@ -941,6 +957,10 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
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WriteUSART2(data, length);
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if (flush)
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TXSerialFlush2();
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#elif defined(DRCC_DVM)
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WriteUSART1(data, length);
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if (flush)
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TXSerialFlush1();
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#endif
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break;
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case 3U:
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@ -948,6 +968,10 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
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WriteUSART1(data, length);
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if (flush)
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TXSerialFlush1();
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#elif defined(DRCC_DVM)
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WriteUSART2(data, length);
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if (flush)
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TXSerialFlush2();
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#else
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WriteUART5(data, length);
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if (flush)
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