mirror of https://github.com/g4klx/MMDVM.git
Merge pull request #194 from shawnchain/rpt_hat_tgo_board
Add support for RPT_HAT_TGO board by BG4TGO and BG5HHP
This commit is contained in:
commit
ed36d13c8f
115
IOSTM.cpp
115
IOSTM.cpp
|
@ -24,7 +24,120 @@
|
|||
|
||||
#if defined(STM32F4XX) || defined(STM32F7XX)
|
||||
|
||||
#if defined(STM32F4_DISCOVERY)
|
||||
#if defined(STM32F4_RPT_HAT_TGO)
|
||||
/*
|
||||
Pin definitions for MMDVM_RPT_Hat Pi-Hat BG4TGO board::
|
||||
|
||||
PTT PB13 output CN10 Pin30
|
||||
COSLED PB14 output CN10 Pin28
|
||||
LED PA5 output CN10 Pin11
|
||||
COS PB15 input CN10 Pin26
|
||||
|
||||
DSTAR PB10 output CN10 Pin25
|
||||
DMR PB4 output CN10 Pin27
|
||||
YSF PB5 output CN10 Pin29
|
||||
P25 PB3 output CN10 Pin31
|
||||
NXDN PA10 output CN10 Pin33
|
||||
POCSAG PB12 output CN10 Pin16
|
||||
|
||||
MDSTAR PC4 output CN10 Pin34
|
||||
MDMR PC5 output CN10 Pin6
|
||||
MYSF PC2 output CN7 Pin35
|
||||
MP25 PC3 output CN7 Pin37
|
||||
MNXDN PC6 output CN10 Pin4
|
||||
MPOCSAG PC8 output CN10 Pin2
|
||||
|
||||
RX PA0 analog input CN7 Pin28
|
||||
RSSI PA1 analog input CN7 Pin30
|
||||
TX PA4 analog output CN7 Pin32
|
||||
|
||||
EXT_CLK PA15 input CN7 Pin17
|
||||
*/
|
||||
|
||||
#define PIN_COS GPIO_Pin_15
|
||||
#define PORT_COS GPIOB
|
||||
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_PTT GPIO_Pin_13
|
||||
#define PORT_PTT GPIOB
|
||||
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_COSLED GPIO_Pin_14
|
||||
#define PORT_COSLED GPIOB
|
||||
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_LED GPIO_Pin_5
|
||||
#define PORT_LED GPIOA
|
||||
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_P25 GPIO_Pin_3
|
||||
#define PORT_P25 GPIOB
|
||||
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_NXDN GPIO_Pin_10
|
||||
#define PORT_NXDN GPIOA
|
||||
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_POCSAG GPIO_Pin_12
|
||||
#define PORT_POCSAG GPIOB
|
||||
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DSTAR GPIO_Pin_10
|
||||
#define PORT_DSTAR GPIOB
|
||||
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_DMR GPIO_Pin_4
|
||||
#define PORT_DMR GPIOB
|
||||
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||
|
||||
#define PIN_YSF GPIO_Pin_5
|
||||
#define PORT_YSF GPIOB
|
||||
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||
|
||||
#if defined(MODE_PINS)
|
||||
#define PIN_MP25 GPIO_Pin_3
|
||||
#define PORT_MP25 GPIOC
|
||||
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MNXDN GPIO_Pin_6
|
||||
#define PORT_MNXDN GPIOC
|
||||
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDSTAR GPIO_Pin_4
|
||||
#define PORT_MDSTAR GPIOC
|
||||
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MDMR GPIO_Pin_5
|
||||
#define PORT_MDMR GPIOC
|
||||
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MYSF GPIO_Pin_2
|
||||
#define PORT_MYSF GPIOC
|
||||
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
|
||||
|
||||
#define PIN_MPOCSAG GPIO_Pin_8
|
||||
#define PORT_MPOCSAG GPIOC
|
||||
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
|
||||
#endif
|
||||
|
||||
#define PIN_EXT_CLK GPIO_Pin_15
|
||||
#define SRC_EXT_CLK GPIO_PinSource15
|
||||
#define PORT_EXT_CLK GPIOA
|
||||
|
||||
#define PIN_RX GPIO_Pin_0
|
||||
#define PIN_RX_CH ADC_Channel_0
|
||||
#define PORT_RX GPIOA
|
||||
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_RSSI GPIO_Pin_1
|
||||
#define PIN_RSSI_CH ADC_Channel_1
|
||||
#define PORT_RSSI GPIOA
|
||||
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||
|
||||
#define PIN_TX GPIO_Pin_4
|
||||
#define PIN_TX_CH DAC_Channel_1
|
||||
|
||||
#elif defined(STM32F4_DISCOVERY)
|
||||
/*
|
||||
Pin definitions for STM32F4 Discovery Board:
|
||||
|
||||
|
|
8
Makefile
8
Makefile
|
@ -132,6 +132,8 @@ DEFS_F7M=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_F7M -DHSE_VALUE=
|
|||
DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# STM32F4 DVM board:
|
||||
DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
# MMDVM_RPT_Hat BG4TGO, BG5HHP board:
|
||||
DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||
|
||||
# Build compiler flags
|
||||
CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
|
||||
|
@ -185,6 +187,12 @@ rpt_hat: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_RPT_HAT)
|
|||
rpt_hat: LDFLAGS+=$(LDFLAGS_F722)
|
||||
rpt_hat: release_f7
|
||||
|
||||
rpt_hat_tgo: GitVersion.h
|
||||
rpt_hat_tgo: CFLAGS+=$(CFLAGS_F4) $(DEFS_RPT_HAT_TGO)
|
||||
rpt_hat_tgo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_RPT_HAT_TGO)
|
||||
rpt_hat_tgo: LDFLAGS+=$(LDFLAGS_F4)
|
||||
rpt_hat_tgo: release_f4
|
||||
|
||||
nucleo: GitVersion.h
|
||||
nucleo: CFLAGS+=$(CFLAGS_F4) $(DEFS_NUCLEO)
|
||||
nucleo: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_NUCLEO)
|
||||
|
|
|
@ -90,13 +90,19 @@ const uint8_t MMDVM_DEBUG5 = 0xF5U;
|
|||
#define TCXO "NO TCXO"
|
||||
#endif
|
||||
|
||||
#define DESCRIPTION "MMDVM 20180723 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG)"
|
||||
#if defined(STM32F4_RPT_HAT_TGO)
|
||||
#define HW_TYPE "MMDVM_RPT_HAT_TGO"
|
||||
#else
|
||||
#define HW_TYPE "MMDVM"
|
||||
#endif
|
||||
|
||||
#define DESCRIPTION "20180723 (D-Star/DMR/System Fusion/P25/NXDN/POCSAG)"
|
||||
|
||||
#if defined(GITVERSION)
|
||||
#define concat(a, b, c) a " " b " GitID #" c ""
|
||||
const char HARDWARE[] = concat(DESCRIPTION, TCXO, GITVERSION);
|
||||
#define concat(h, a, b, c) h " " a " " b " GitID #" c ""
|
||||
const char HARDWARE[] = concat(HW_TYPE, DESCRIPTION, TCXO, GITVERSION);
|
||||
#else
|
||||
#define concat(a, b, c, d) a " " b " (Build: " c " " d ")"
|
||||
#define concat(h, a, b, c, d) h " " a " " b " (Build: " c " " d ")"
|
||||
const char HARDWARE[] = concat(DESCRIPTION, TCXO, __TIME__, __DATE__);
|
||||
#endif
|
||||
|
||||
|
|
|
@ -28,13 +28,13 @@ Pin definitions:
|
|||
|
||||
- Host communication:
|
||||
USART1 - TXD PA9 - RXD PA10 (MMDVM-Pi board, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board)
|
||||
USART2 - TXD PA2 - RXD PA3 (Nucleo64 F446RE board, Morpho or Arduino header)
|
||||
USART2 - TXD PA2 - RXD PA3 (Nucleo64 F446RE board, Morpho or Arduino header, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
|
||||
USART3 - TXD PC10 - RXD PC11 (Discovery board)
|
||||
USART3 - TXD PD8 - RXD PD9 (Nucleo144 F767ZI board)
|
||||
|
||||
- Serial repeater:
|
||||
USART1 - TXD PA9 - RXD PA10 (Nucleo with Arduino header)
|
||||
UART5 - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI)
|
||||
UART5 - TXD PC12 - RXD PD2 (Discovery, MMDVM-Pi, MMDVM-Pi F722 board, MMDVM-F4M board, STM32F722-F7M board, STM32F4-DVM board, Nucleo64 with Morpho header and Nucleo144 F767ZI, MMDVM_RPT_Hat BG4TGO/BG5HHP board)
|
||||
*/
|
||||
|
||||
#if defined(STM32F4XX) || defined(STM32F7XX)
|
||||
|
@ -241,7 +241,7 @@ void WriteUSART1(const uint8_t* data, uint16_t length)
|
|||
#endif
|
||||
|
||||
/* ************* USART2 ***************** */
|
||||
#if defined(STM32F4_NUCLEO)
|
||||
#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
|
||||
volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
|
||||
volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
|
||||
|
@ -843,7 +843,7 @@ void CSerialPort::beginInt(uint8_t n, int speed)
|
|||
InitUSART3(speed);
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
|
||||
InitUSART1(speed);
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
InitUSART2(speed);
|
||||
#endif
|
||||
break;
|
||||
|
@ -867,7 +867,7 @@ int CSerialPort::availableInt(uint8_t n)
|
|||
return AvailUSART3();
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
|
||||
return AvailUSART1();
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
return AvailUSART2();
|
||||
#endif
|
||||
case 3U:
|
||||
|
@ -889,7 +889,7 @@ int CSerialPort::availableForWriteInt(uint8_t n)
|
|||
return AvailForWriteUSART3();
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
|
||||
return AvailForWriteUSART1();
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
return AvailForWriteUSART2();
|
||||
#endif
|
||||
case 3U:
|
||||
|
@ -911,7 +911,7 @@ uint8_t CSerialPort::readInt(uint8_t n)
|
|||
return ReadUSART3();
|
||||
#elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM)
|
||||
return ReadUSART1();
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
return ReadUSART2();
|
||||
#endif
|
||||
case 3U:
|
||||
|
@ -937,7 +937,7 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
|
|||
WriteUSART1(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush1();
|
||||
#elif defined(STM32F4_NUCLEO)
|
||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||
WriteUSART2(data, length);
|
||||
if (flush)
|
||||
TXSerialFlush2();
|
||||
|
|
Loading…
Reference in New Issue