More work on Teensy interrupts.

This commit is contained in:
Jonathan Naylor 2016-11-11 06:56:02 +00:00
parent 823b68d5ed
commit e97c1dc746
4 changed files with 50 additions and 35 deletions

2
IO.h
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@ -40,7 +40,7 @@ public:
void setADCDetection(bool detect); void setADCDetection(bool detect);
void setMode(); void setMode();
void interrupt(); void interrupt(uint8_t source);
void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel); void setParameters(bool rxInvert, bool txInvert, bool pttInvert, uint8_t rxLevel, uint8_t cwIdTXLevel, uint8_t dstarTXLevel, uint8_t dmrTXLevel, uint8_t ysfTXLevel, uint8_t p25TXLevel);

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@ -73,7 +73,7 @@ const uint16_t DC_OFFSET = 2048U;
extern "C" { extern "C" {
void ADC_Handler() void ADC_Handler()
{ {
io.interrupt(); io.interrupt(0U);
} }
} }
@ -97,7 +97,7 @@ void CIO::initInt()
void CIO::startInt() void CIO::startInt()
{ {
if (ADC->ADC_ISR & ADC_ISR_EOC_Chan) // Ensure there was an End-of-Conversion and we read the ISR reg if (ADC->ADC_ISR & ADC_ISR_EOC_Chan) // Ensure there was an End-of-Conversion and we read the ISR reg
io.interrupt(); io.interrupt(0U);
// Set up the ADC // Set up the ADC
NVIC_EnableIRQ(ADC_IRQn); // Enable ADC interrupt vector NVIC_EnableIRQ(ADC_IRQn); // Enable ADC interrupt vector
@ -157,7 +157,7 @@ void CIO::startInt()
digitalWrite(PIN_LED, HIGH); digitalWrite(PIN_LED, HIGH);
} }
void CIO::interrupt() void CIO::interrupt(uint8_t source)
{ {
if ((ADC->ADC_ISR & ADC_ISR_EOC_Chan) == ADC_ISR_EOC_Chan) { // Ensure there was an End-of-Conversion and we read the ISR reg if ((ADC->ADC_ISR & ADC_ISR_EOC_Chan) == ADC_ISR_EOC_Chan) { // Ensure there was an End-of-Conversion and we read the ISR reg
uint8_t control = MARK_NONE; uint8_t control = MARK_NONE;

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@ -68,7 +68,7 @@ extern "C" {
void TIM2_IRQHandler() { void TIM2_IRQHandler() {
if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET) { if (TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET) {
TIM_ClearITPendingBit(TIM2, TIM_IT_Update); TIM_ClearITPendingBit(TIM2, TIM_IT_Update);
io.interrupt(); io.interrupt(0U);
} }
} }
} }
@ -163,7 +163,7 @@ void CIO::initInt()
void CIO::startInt() void CIO::startInt()
{ {
if ((ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC) != RESET)) if ((ADC_GetFlagStatus(ADC1, ADC_FLAG_EOC) != RESET))
io.interrupt(); io.interrupt(0U);
// ADC1 PA0 analog input // ADC1 PA0 analog input
// ADC2 PA1 analog input // ADC2 PA1 analog input
@ -283,7 +283,7 @@ void CIO::startInt()
GPIO_SetBits(PORT_LED, PIN_LED); GPIO_SetBits(PORT_LED, PIN_LED);
} }
void CIO::interrupt() void CIO::interrupt(uint8_t source)
{ {
uint8_t control = MARK_NONE; uint8_t control = MARK_NONE;
uint16_t sample = DC_OFFSET; uint16_t sample = DC_OFFSET;

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@ -55,10 +55,17 @@
const uint16_t DC_OFFSET = 2048U; const uint16_t DC_OFFSET = 2048U;
extern "C" { extern "C" {
void pdb_isr() void adc0_isr()
{ {
io.interrupt(); io.interrupt(0U);
} }
#if defined(SEND_RSSI_DATA)
void adc1_isr()
{
io.interrupt(1U);
}
#endif
} }
void CIO::initInt() void CIO::initInt()
@ -80,6 +87,14 @@ void CIO::initInt()
void CIO::startInt() void CIO::startInt()
{ {
if ((ADC0_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO)
io.interrupt(0U);
#if defined(SEND_RSSI_DATA)
if ((ADC1_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO)
io.interrupt(1U);
#endif
// Initialise ADC0 // Initialise ADC0
ADC0_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | ADC_CFG1_MODE(1) | ADC0_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | ADC_CFG1_MODE(1) |
ADC_CFG1_ADLSMP; // Single-ended 12 bits, long sample time ADC_CFG1_ADLSMP; // Single-ended 12 bits, long sample time
@ -95,6 +110,9 @@ void CIO::startInt()
sum0 = (sum0 / 2U) | 0x8000U; sum0 = (sum0 / 2U) | 0x8000U;
ADC0_PG = sum0; ADC0_PG = sum0;
ADC0_SC1A = ADC_SC1_AIEN | PIN_ADC; // Enable ADC interrupt, use A0
NVIC_ENABLE_IRQ(IRQ_ADC0);
#if defined(SEND_RSSI_DATA) #if defined(SEND_RSSI_DATA)
// Initialise ADC1 // Initialise ADC1
ADC1_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | ADC_CFG1_MODE(1) | ADC1_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | ADC_CFG1_MODE(1) |
@ -110,6 +128,9 @@ void CIO::startInt()
uint16_t sum1 = ADC1_CLPS + ADC1_CLP4 + ADC1_CLP3 + ADC1_CLP2 + ADC1_CLP1 + ADC1_CLP0; // Plus side gain uint16_t sum1 = ADC1_CLPS + ADC1_CLP4 + ADC1_CLP3 + ADC1_CLP2 + ADC1_CLP1 + ADC1_CLP0; // Plus side gain
sum1 = (sum1 / 2U) | 0x8000U; sum1 = (sum1 / 2U) | 0x8000U;
ADC1_PG = sum1; ADC1_PG = sum1;
ADC1_SC1A = ADC_SC1_AIEN | PIN_RSSI; // Enable ADC interrupt, use A2
NVIC_ENABLE_IRQ(IRQ_ADC1);
#endif #endif
// Setup PDB for ADC0 at 24 kHz // Setup PDB for ADC0 at 24 kHz
@ -138,41 +159,35 @@ void CIO::startInt()
digitalWrite(PIN_LED, HIGH); digitalWrite(PIN_LED, HIGH);
} }
void CIO::interrupt() void CIO::interrupt(uint8_t source)
{ {
uint8_t control = MARK_NONE; if (source == 0U) { // ADC0
uint16_t sample = DC_OFFSET; uint8_t control = MARK_NONE;
uint16_t sample = DC_OFFSET;
m_txBuffer.get(sample, control); m_txBuffer.get(sample, control);
*(int16_t *)&(DAC0_DAT0L) = sample; *(int16_t *)&(DAC0_DAT0L) = sample;
ADC0_SC1A = PIN_ADC; // Start read on A0 if ((ADC0_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
sample = ADC0_RA;
// Wait for the read to complete m_rxBuffer.put(sample, control);
while ((ADC0_SC1A & ADC_SC1_COCO) != ADC_SC1_COCO)
;
sample = ADC0_RA;
m_rxBuffer.put(sample, control);
#if !defined(SEND_RSSI_DATA) #if !defined(SEND_RSSI_DATA)
m_rssiBuffer.put(0U); m_rssiBuffer.put(0U);
#endif #endif
}
m_watchdog++;
}
#if defined(SEND_RSSI_DATA) #if defined(SEND_RSSI_DATA)
ADC1_SC1A = PIN_RSSI; // Start read on A2 if (source == 1U) { // ADC1
if ((ADC1_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
// Wait for the read to complete uint16_t rssi = ADC1_RA;
while ((ADC1_SC1A & ADC_SC1_COCO) != ADC_SC1_COCO) m_rssiBuffer.put(rssi);
; }
}
uint16_t rssi = ADC1_RA;
m_rssiBuffer.put(rssi);
#endif #endif
PDB0_SC &= ~PDB_SC_PDBIF; // Clear interrupt flag
m_watchdog++;
} }
bool CIO::getCOSInt() bool CIO::getCOSInt()