Merge branch 'boxcar' of https://github.com/g4klx/MMDVM into boxcar

This commit is contained in:
Andy CA6JAU 2017-08-13 17:19:50 -03:00
commit cff5a58bc7
10 changed files with 94 additions and 61 deletions

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@ -27,7 +27,7 @@
// Frequencies such as 10.0 Mhz (48000 * 208.333) or 20 Mhz (48000 * 416.666) are not suitable. // Frequencies such as 10.0 Mhz (48000 * 208.333) or 20 Mhz (48000 * 416.666) are not suitable.
// //
// For 12 MHz // For 12 MHz
// #define EXTERNAL_OSC 12000000 #define EXTERNAL_OSC 12000000
// For 12.288 MHz // For 12.288 MHz
// #define EXTERNAL_OSC 12288000 // #define EXTERNAL_OSC 12288000
// For 14.4 MHz // For 14.4 MHz

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@ -28,15 +28,7 @@ const uint32_t PLLMAX = 0x10000U;
const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH; const uint32_t PLLINC = PLLMAX / DSTAR_RADIO_BIT_LENGTH;
const uint32_t INC = PLLINC / 32U; const uint32_t INC = PLLINC / 32U;
const unsigned int MAX_SYNC_BITS = 50U * DSTAR_DATA_LENGTH_BITS; const unsigned int MAX_SYNC_BITS = 100U * DSTAR_DATA_LENGTH_BITS;
const unsigned int SYNC_POS = 21U * DSTAR_DATA_LENGTH_BITS;
const unsigned int SYNC_SCAN_START = SYNC_POS - 3U;
const unsigned int SYNC_SCAN_END = SYNC_POS + 3U;
// Generated using [b, a] = butter(1, 0.001) in MATLAB
static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2}
const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
// D-Star bit order version of 0x55 0x55 0x6E 0x0A // D-Star bit order version of 0x55 0x55 0x6E 0x0A
const uint32_t FRAME_SYNC_DATA = 0x00557650U; const uint32_t FRAME_SYNC_DATA = 0x00557650U;
@ -245,6 +237,10 @@ const uint16_t CCITT_TABLE[] = {
0xf78fU, 0xe606U, 0xd49dU, 0xc514U, 0xb1abU, 0xa022U, 0x92b9U, 0x8330U, 0xf78fU, 0xe606U, 0xd49dU, 0xc514U, 0xb1abU, 0xa022U, 0x92b9U, 0x8330U,
0x7bc7U, 0x6a4eU, 0x58d5U, 0x495cU, 0x3de3U, 0x2c6aU, 0x1ef1U, 0x0f78U}; 0x7bc7U, 0x6a4eU, 0x58d5U, 0x495cU, 0x3de3U, 0x2c6aU, 0x1ef1U, 0x0f78U};
// Generated using [b, a] = butter(1, 0.001) in MATLAB
static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2}
const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
CDStarRX::CDStarRX() : CDStarRX::CDStarRX() :
m_pll(0U), m_pll(0U),
m_prev(false), m_prev(false),
@ -285,25 +281,24 @@ void CDStarRX::reset()
m_rssiCount = 0U; m_rssiCount = 0U;
} }
void CDStarRX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t length) void CDStarRX::samples(q15_t* samples, const uint16_t* rssi, uint8_t length)
{ {
q31_t dc_level = 0; q31_t dcLevel = 0;
q31_t dcVals[20]; q31_t dcVals[20U];
q31_t intSamp[20]; q31_t q31Samples[20U];
::arm_q15_to_q31((q15_t*)samples, intSamp, length); ::arm_q15_to_q31(samples, q31Samples, length);
::arm_biquad_cascade_df1_q31(&m_dcFilter, intSamp, dcVals, length); ::arm_biquad_cascade_df1_q31(&m_dcFilter, q31Samples, dcVals, length);
for (uint8_t i = 0U; i < length; i++) for (uint8_t i = 0U; i < length; i++)
dc_level += dcVals[i]; dcLevel += dcVals[i];
dcLevel /= length;
dc_level /= length;
for (uint16_t i = 0U; i < length; i++) { for (uint16_t i = 0U; i < length; i++) {
m_rssiAccum += rssi[i]; m_rssiAccum += rssi[i];
m_rssiCount++; m_rssiCount++;
bool bit = samples[i] < (q15_t) (dc_level >> 16); bool bit = (q31Samples[i] - dcLevel) < 0;
if (bit != m_prev) { if (bit != m_prev) {
if (m_pll < (PLLMAX / 2U)) if (m_pll < (PLLMAX / 2U))
@ -373,7 +368,7 @@ void CDStarRX::processNone(bool bit)
::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U); ::memset(m_rxBuffer, 0x00U, DSTAR_DATA_LENGTH_BYTES + 2U);
m_rxBufferBits = 0U; m_rxBufferBits = 0U;
m_dataBits = 0U; m_dataBits = MAX_SYNC_BITS;
m_rxState = DSRXS_DATA; m_rxState = DSRXS_DATA;
return; return;
} }
@ -403,7 +398,7 @@ void CDStarRX::processHeader(bool bit)
m_rxBufferBits = 0U; m_rxBufferBits = 0U;
m_rxState = DSRXS_DATA; m_rxState = DSRXS_DATA;
m_dataBits = SYNC_POS - DSTAR_DATA_LENGTH_BITS + 1U; m_dataBits = MAX_SYNC_BITS;
} else { } else {
// The checksum failed, return to looking for syncs // The checksum failed, return to looking for syncs
m_rxState = DSRXS_NONE; m_rxState = DSRXS_NONE;
@ -435,37 +430,29 @@ void CDStarRX::processData(bool bit)
// Fuzzy matching of the data sync bit sequence // Fuzzy matching of the data sync bit sequence
bool syncSeen = false; bool syncSeen = false;
if (m_dataBits >= SYNC_SCAN_START && m_dataBits <= (SYNC_POS + 1U)) { if (m_rxBufferBits >= (DSTAR_DATA_LENGTH_BITS - 3U)) {
if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) <= DATA_SYNC_ERRS) { if (countBits32((m_patternBuffer & DATA_SYNC_MASK) ^ DATA_SYNC_DATA) <= DATA_SYNC_ERRS) {
if (m_dataBits < SYNC_POS)
DEBUG2("DStarRX: found data sync in Data, early", SYNC_POS - m_dataBits);
else
DEBUG1("DStarRX: found data sync in Data");
m_rxBufferBits = DSTAR_DATA_LENGTH_BITS; m_rxBufferBits = DSTAR_DATA_LENGTH_BITS;
m_dataBits = 0U; m_dataBits = MAX_SYNC_BITS;
syncSeen = true; syncSeen = true;
} }
} }
// Check to see if the sync is arriving late // Check to see if the sync is arriving late
if (m_dataBits == SYNC_POS) { if (m_rxBufferBits == DSTAR_DATA_LENGTH_BITS && !syncSeen) {
for (uint8_t i = 1U; i <= 3U; i++) { for (uint8_t i = 1U; i <= 3U; i++) {
uint32_t syncMask = DATA_SYNC_MASK >> i; uint32_t syncMask = DATA_SYNC_MASK >> i;
uint32_t syncData = DATA_SYNC_DATA >> i; uint32_t syncData = DATA_SYNC_DATA >> i;
if (countBits32((m_patternBuffer & syncMask) ^ syncData) <= DATA_SYNC_ERRS) { if (countBits32((m_patternBuffer & syncMask) ^ syncData) <= DATA_SYNC_ERRS) {
DEBUG2("DStarRX: found data sync in Data, late", i);
m_rxBufferBits -= i; m_rxBufferBits -= i;
m_dataBits -= i;
break; break;
} }
} }
} }
m_dataBits++; m_dataBits--;
// We've not seen a data sync for too long, signal RXLOST and change to RX_NONE if (m_dataBits == 0U) {
if (m_dataBits >= MAX_SYNC_BITS) {
DEBUG1("DStarRX: data sync timed out, lost lock"); DEBUG1("DStarRX: data sync timed out, lost lock");
io.setDecode(false); io.setDecode(false);

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@ -32,7 +32,7 @@ class CDStarRX {
public: public:
CDStarRX(); CDStarRX();
void samples(const q15_t* samples, const uint16_t* rssi, uint8_t length); void samples(q15_t* samples, const uint16_t* rssi, uint8_t length);
void reset(); void reset();

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@ -1,5 +1,5 @@
/* /*
* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX * Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

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@ -38,6 +38,10 @@ const uint16_t NOENDPTR = 9999U;
const unsigned int MAX_SYNC_FRAMES = 4U + 1U; const unsigned int MAX_SYNC_FRAMES = 4U + 1U;
// Generated using [b, a] = butter(1, 0.001) in MATLAB
static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2}
const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
CP25RX::CP25RX() : CP25RX::CP25RX() :
m_state(P25RXS_NONE), m_state(P25RXS_NONE),
m_bitBuffer(), m_bitBuffer(),
@ -60,8 +64,16 @@ m_threshold(),
m_thresholdVal(0), m_thresholdVal(0),
m_averagePtr(NOAVEPTR), m_averagePtr(NOAVEPTR),
m_rssiAccum(0U), m_rssiAccum(0U),
m_rssiCount(0U) m_rssiCount(0U),
m_dcFilter(),
m_dcState()
{ {
::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
m_dcFilter.numStages = DC_FILTER_STAGES;
m_dcFilter.pState = m_dcState;
m_dcFilter.pCoeffs = DC_FILTER;
m_dcFilter.postShift = 0;
} }
void CP25RX::reset() void CP25RX::reset()
@ -86,10 +98,23 @@ void CP25RX::reset()
m_rssiCount = 0U; m_rssiCount = 0U;
} }
void CP25RX::samples(const q15_t* samples, uint16_t* rssi, uint8_t length) void CP25RX::samples(q15_t* samples, uint16_t* rssi, uint8_t length)
{ {
q31_t dcLevel = 0;
q31_t dcVals[20U];
q31_t q31Samples[20U];
::arm_q15_to_q31(samples, q31Samples, length);
::arm_biquad_cascade_df1_q31(&m_dcFilter, q31Samples, dcVals, length);
for (uint8_t i = 0U; i < length; i++)
dcLevel += dcVals[i];
dcLevel /= length;
q15_t offset = q15_t(__SSAT((dcLevel >> 16), 16));;
for (uint8_t i = 0U; i < length; i++) { for (uint8_t i = 0U; i < length; i++) {
q15_t sample = samples[i]; q15_t sample = samples[i] - offset;
m_rssiAccum += rssi[i]; m_rssiAccum += rssi[i];
m_rssiCount++; m_rssiCount++;

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@ -32,7 +32,7 @@ class CP25RX {
public: public:
CP25RX(); CP25RX();
void samples(const q15_t* samples, uint16_t* rssi, uint8_t length); void samples(q15_t* samples, uint16_t* rssi, uint8_t length);
void reset(); void reset();
@ -59,6 +59,8 @@ private:
uint8_t m_averagePtr; uint8_t m_averagePtr;
uint32_t m_rssiAccum; uint32_t m_rssiAccum;
uint16_t m_rssiCount; uint16_t m_rssiCount;
arm_biquad_casd_df1_inst_q31 m_dcFilter;
q31_t m_dcState[4];
void processNone(q15_t sample); void processNone(q15_t sample);
void processHdr(q15_t sample); void processHdr(q15_t sample);

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@ -52,7 +52,6 @@ extern "C" {
/* ************* USART1 ***************** */ /* ************* USART1 ***************** */
#if defined(STM32F4_PI) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) #if defined(STM32F4_PI) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
volatile uint32_t intcount1;
volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE]; volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE]; volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
volatile uint16_t TXSerialfifohead1, TXSerialfifotail1; volatile uint16_t TXSerialfifohead1, TXSerialfifotail1;
@ -139,7 +138,6 @@ void USART1_IRQHandler()
} }
USART_ClearITPendingBit(USART1, USART_IT_RXNE); USART_ClearITPendingBit(USART1, USART_IT_RXNE);
intcount1++;
} }
if (USART_GetITStatus(USART1, USART_IT_TXE)) { if (USART_GetITStatus(USART1, USART_IT_TXE)) {
@ -245,7 +243,6 @@ void WriteUSART1(const uint8_t* data, uint16_t length)
/* ************* USART2 ***************** */ /* ************* USART2 ***************** */
#if defined(STM32F4_NUCLEO) #if defined(STM32F4_NUCLEO)
volatile uint32_t intcount2;
volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE]; volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE]; volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
volatile uint16_t TXSerialfifohead2, TXSerialfifotail2; volatile uint16_t TXSerialfifohead2, TXSerialfifotail2;
@ -332,7 +329,6 @@ void USART2_IRQHandler()
} }
USART_ClearITPendingBit(USART2, USART_IT_RXNE); USART_ClearITPendingBit(USART2, USART_IT_RXNE);
intcount2++;
} }
if (USART_GetITStatus(USART2, USART_IT_TXE)) { if (USART_GetITStatus(USART2, USART_IT_TXE)) {
@ -438,7 +434,6 @@ void WriteUSART2(const uint8_t* data, uint16_t length)
/* ************* USART3 ***************** */ /* ************* USART3 ***************** */
#if defined(STM32F4_DISCOVERY) || defined(STM32F4_PI) #if defined(STM32F4_DISCOVERY) || defined(STM32F4_PI)
volatile uint32_t intcount3;
volatile uint8_t TXSerialfifo3[TX_SERIAL_FIFO_SIZE]; volatile uint8_t TXSerialfifo3[TX_SERIAL_FIFO_SIZE];
volatile uint8_t RXSerialfifo3[RX_SERIAL_FIFO_SIZE]; volatile uint8_t RXSerialfifo3[RX_SERIAL_FIFO_SIZE];
volatile uint16_t TXSerialfifohead3, TXSerialfifotail3; volatile uint16_t TXSerialfifohead3, TXSerialfifotail3;
@ -525,7 +520,6 @@ void USART3_IRQHandler()
} }
USART_ClearITPendingBit(USART3, USART_IT_RXNE); USART_ClearITPendingBit(USART3, USART_IT_RXNE);
intcount3++;
} }
if (USART_GetITStatus(USART3, USART_IT_TXE)) { if (USART_GetITStatus(USART3, USART_IT_TXE)) {
@ -631,7 +625,6 @@ void WriteUSART3(const uint8_t* data, uint16_t length)
/* ************* UART5 ***************** */ /* ************* UART5 ***************** */
#if !(defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) #if !(defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
volatile uint32_t intcount5;
volatile uint8_t TXSerialfifo5[TX_SERIAL_FIFO_SIZE]; volatile uint8_t TXSerialfifo5[TX_SERIAL_FIFO_SIZE];
volatile uint8_t RXSerialfifo5[RX_SERIAL_FIFO_SIZE]; volatile uint8_t RXSerialfifo5[RX_SERIAL_FIFO_SIZE];
volatile uint16_t TXSerialfifohead5, TXSerialfifotail5; volatile uint16_t TXSerialfifohead5, TXSerialfifotail5;
@ -718,7 +711,6 @@ void UART5_IRQHandler()
} }
USART_ClearITPendingBit(UART5, USART_IT_RXNE); USART_ClearITPendingBit(UART5, USART_IT_RXNE);
intcount5++;
} }
if (USART_GetITStatus(UART5, USART_IT_TXE)) { if (USART_GetITStatus(UART5, USART_IT_TXE)) {

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@ -38,6 +38,10 @@ const uint16_t NOENDPTR = 9999U;
const unsigned int MAX_SYNC_FRAMES = 4U + 1U; const unsigned int MAX_SYNC_FRAMES = 4U + 1U;
// Generated using [b, a] = butter(1, 0.001) in MATLAB
static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2}
const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
CYSFRX::CYSFRX() : CYSFRX::CYSFRX() :
m_state(YSFRXS_NONE), m_state(YSFRXS_NONE),
m_bitBuffer(), m_bitBuffer(),
@ -58,8 +62,16 @@ m_threshold(),
m_thresholdVal(0), m_thresholdVal(0),
m_averagePtr(NOAVEPTR), m_averagePtr(NOAVEPTR),
m_rssiAccum(0U), m_rssiAccum(0U),
m_rssiCount(0U) m_rssiCount(0U),
m_dcFilter(),
m_dcState()
{ {
::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
m_dcFilter.numStages = DC_FILTER_STAGES;
m_dcFilter.pState = m_dcState;
m_dcFilter.pCoeffs = DC_FILTER;
m_dcFilter.postShift = 0;
} }
void CYSFRX::reset() void CYSFRX::reset()
@ -82,10 +94,23 @@ void CYSFRX::reset()
m_rssiCount = 0U; m_rssiCount = 0U;
} }
void CYSFRX::samples(const q15_t* samples, uint16_t* rssi, uint8_t length) void CYSFRX::samples(q15_t* samples, uint16_t* rssi, uint8_t length)
{ {
q31_t dcLevel = 0;
q31_t dcVals[20U];
q31_t q31Samples[20U];
::arm_q15_to_q31(samples, q31Samples, length);
::arm_biquad_cascade_df1_q31(&m_dcFilter, q31Samples, dcVals, length);
for (uint8_t i = 0U; i < length; i++)
dcLevel += dcVals[i];
dcLevel /= length;
q15_t offset = q15_t(__SSAT((dcLevel >> 16), 16));;
for (uint8_t i = 0U; i < length; i++) { for (uint8_t i = 0U; i < length; i++) {
q15_t sample = samples[i]; q15_t sample = samples[i] - offset;
m_rssiAccum += rssi[i]; m_rssiAccum += rssi[i];
m_rssiCount++; m_rssiCount++;

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@ -31,7 +31,7 @@ class CYSFRX {
public: public:
CYSFRX(); CYSFRX();
void samples(const q15_t* samples, uint16_t* rssi, uint8_t length); void samples(q15_t* samples, uint16_t* rssi, uint8_t length);
void reset(); void reset();
@ -56,6 +56,8 @@ private:
uint8_t m_averagePtr; uint8_t m_averagePtr;
uint32_t m_rssiAccum; uint32_t m_rssiAccum;
uint16_t m_rssiCount; uint16_t m_rssiCount;
arm_biquad_casd_df1_inst_q31 m_dcFilter;
q31_t m_dcState[4];
void processNone(q15_t sample); void processNone(q15_t sample);
void processData(q15_t sample); void processData(q15_t sample);