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MMDVM
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Merge remote-tracking branch 'g4klx/master'

This commit is contained in:
Andy CA6JAU 2016-12-01 00:57:58 -03:00
parent fd3e757219 e39624bb9d
commit b49747b282
1 changed files with 17 additions and 15 deletions
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32
IOTeensy.cpp
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@ -34,8 +34,8 @@
#define PIN_DMR 10 #define PIN_DMR 10
#define PIN_YSF 11 #define PIN_YSF 11
#define PIN_P25 12 #define PIN_P25 12
#define PIN_ADC 5 // A0 #define PIN_ADC 5 // A0, Pin 14
#define PIN_RSSI 8 // A2 #define PIN_RSSI 8 // A2, Pin 16
#define PDB_CHnC1_TOS 0x0100 #define PDB_CHnC1_TOS 0x0100
#define PDB_CHnC1_EN 0x0001 #define PDB_CHnC1_EN 0x0001
@ -75,6 +75,10 @@ void CIO::initInt()
void CIO::startInt() void CIO::startInt()
{ {
// Initialise the DAC
SIM_SCGC2 |= SIM_SCGC2_DAC0;
DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 1.2V VDDA is DACREF_2
// Initialise ADC0 // Initialise ADC0
SIM_SCGC6 |= SIM_SCGC6_ADC0; SIM_SCGC6 |= SIM_SCGC6_ADC0;
ADC0_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time ADC0_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
@ -118,18 +122,20 @@ void CIO::startInt()
#endif #endif
#if defined(EXTERNAL_OSC) #if defined(EXTERNAL_OSC)
SIM_SCGC5 |= SIM_SCGC5_LPTIMER; // Set ADC0 to trigger from the LPTMR at 24 kHz
LPTMR0_PSR = LPTMR_PSR_PBYP; // Bypass prescaler/filter SIM_SOPT7 = SIM_SOPT7_ADC0ALTTRGEN | // Enable ADC0 alternate trigger
LPTMR0_CMR = EXTERNAL_OSC / 24000; SIM_SOPT7_ADC0TRGSEL(14); // Trigger ADC0 by LPTMR0
LPTMR0_CSR = LPTMR_CSR_TIE | LPTMR_CSR_TPS(2) | // Interrupt, counter, input=Alt2, free running mode, enable
LPTMR_CSR_TFC | LPTMR_CSR_TMS |
LPTMR_CSR_TEN;
CORE_PIN13_CONFIG = PORT_PCR_MUX(3); CORE_PIN13_CONFIG = PORT_PCR_MUX(3);
// Set ADC0 to trigger from the LPTMR SIM_SCGC5 |= SIM_SCGC5_LPTIMER; // Enable Low Power Timer Access
SIM_SOPT7 = SIM_SOPT7_ADC0ALTTRGEN | LPTMR0_PSR = LPTMR_PSR_PBYP; // Bypass prescaler/filter
SIM_SOPT7_ADC0TRGSEL(14); LPTMR0_CMR = EXTERNAL_OSC / 24000;
LPTMR0_CSR = LPTMR_CSR_TIE | // Interrupt Enable
LPTMR_CSR_TPS(2) | // Pin: 0=CMP0, 1=xtal, 2=pin13
LPTMR_CSR_TFC | // Free-Running Counter
LPTMR_CSR_TMS; // Mode Select, 0=timer, 1=counter
LPTMR0_CSR |= LPTMR_CSR_TEN; // Enable
#else #else
// Setup PDB for ADC0 at 24 kHz // Setup PDB for ADC0 at 24 kHz
SIM_SCGC6 |= SIM_SCGC6_PDB; // Enable PDB clock SIM_SCGC6 |= SIM_SCGC6_PDB; // Enable PDB clock
@ -141,10 +147,6 @@ void CIO::startInt()
PDB0_SC |= PDB_SC_SWTRIG; // Software trigger (reset and restart counter) PDB0_SC |= PDB_SC_SWTRIG; // Software trigger (reset and restart counter)
#endif #endif
// Initialise the DAC
SIM_SCGC2 |= SIM_SCGC2_DAC0;
DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 1.2V VDDA is DACREF_2
digitalWrite(PIN_PTT, m_pttInvert ? HIGH : LOW); digitalWrite(PIN_PTT, m_pttInvert ? HIGH : LOW);
digitalWrite(PIN_COSLED, LOW); digitalWrite(PIN_COSLED, LOW);
digitalWrite(PIN_LED, HIGH); digitalWrite(PIN_LED, HIGH);