mirror of https://github.com/g4klx/MMDVM.git
Add temporary POCSAG pin definitions for F446 and F722
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f705656178
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27
IOSTM.cpp
27
IOSTM.cpp
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@ -113,6 +113,7 @@ DMR PC8 output
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YSF PA8 output
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YSF PA8 output
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P25 PC9 output
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P25 PC9 output
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NXDN PB1 output
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NXDN PB1 output
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POCSAG PB12 output
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RX PA0 analog input
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RX PA0 analog input
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RSSI PA7 analog input
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RSSI PA7 analog input
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@ -145,6 +146,10 @@ EXT_CLK PA15 input
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#define PORT_NXDN GPIOB
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#define PORT_NXDN GPIOB
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#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
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#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
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#define PIN_POCSAG GPIO_Pin_12
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#define PORT_POCSAG GPIOB
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#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
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#define PIN_DSTAR GPIO_Pin_7
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#define PIN_DSTAR GPIO_Pin_7
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#define PORT_DSTAR GPIOC
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#define PORT_DSTAR GPIOC
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#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
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#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
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@ -188,6 +193,7 @@ DMR PC8 output
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YSF PA8 output
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YSF PA8 output
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P25 PC9 output
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P25 PC9 output
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NXDN PB1 output
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NXDN PB1 output
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POCSAG PB12 output
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RX PA0 analog input
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RX PA0 analog input
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RSSI PA7 analog input
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RSSI PA7 analog input
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@ -220,6 +226,10 @@ EXT_CLK PA15 input
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#define PORT_NXDN GPIOB
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#define PORT_NXDN GPIOB
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#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
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#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
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#define PIN_POCSAG GPIO_Pin_12
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#define PORT_POCSAG GPIOB
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#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
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#define PIN_DSTAR GPIO_Pin_7
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#define PIN_DSTAR GPIO_Pin_7
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#define PORT_DSTAR GPIOC
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#define PORT_DSTAR GPIOC
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#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
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#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
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@ -263,6 +273,7 @@ DMR PC8 output
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YSF PA8 output
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YSF PA8 output
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P25 PC9 output
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P25 PC9 output
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NXDN PB1 output
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NXDN PB1 output
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POCSAG PB12 output
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RX PA0 analog input
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RX PA0 analog input
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RSSI PA7 analog input
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RSSI PA7 analog input
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@ -295,6 +306,10 @@ EXT_CLK PA15 input
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#define PORT_NXDN GPIOB
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#define PORT_NXDN GPIOB
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#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
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#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
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#define PIN_POCSAG GPIO_Pin_12
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#define PORT_POCSAG GPIOB
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#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
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#define PIN_DSTAR GPIO_Pin_7
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#define PIN_DSTAR GPIO_Pin_7
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#define PORT_DSTAR GPIOC
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#define PORT_DSTAR GPIOC
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#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
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#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
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@ -372,7 +387,7 @@ EXT_CLK PA15 input
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#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
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#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
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#define PIN_POCSAG GPIO_Pin_12
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#define PIN_POCSAG GPIO_Pin_12
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#define PORT_NXDN GPIOB
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#define PORT_POCSAG GPIOB
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#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
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#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
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#define PIN_DSTAR GPIO_Pin_7
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#define PIN_DSTAR GPIO_Pin_7
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@ -420,6 +435,7 @@ DMR PB4 output CN10 Pin27
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YSF PB5 output CN10 Pin29
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YSF PB5 output CN10 Pin29
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P25 PB3 output CN10 Pin31
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P25 PB3 output CN10 Pin31
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NXDN PA10 output CN10 Pin33
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NXDN PA10 output CN10 Pin33
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POCSAG PB12 output
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MDSTAR PC4 output CN10 Pin34
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MDSTAR PC4 output CN10 Pin34
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MDMR PC5 output CN10 Pin6
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MDMR PC5 output CN10 Pin6
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@ -458,6 +474,10 @@ EXT_CLK PA15 input CN7 Pin17
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#define PORT_NXDN GPIOA
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#define PORT_NXDN GPIOA
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#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
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#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
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#define PIN_POCSAG GPIO_Pin_12
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#define PORT_POCSAG GPIOB
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#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
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#define PIN_DSTAR GPIO_Pin_10
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#define PIN_DSTAR GPIO_Pin_10
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#define PORT_DSTAR GPIOB
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#define PORT_DSTAR GPIOB
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#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
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#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
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@ -523,6 +543,7 @@ DMR PA4 output CN8 Pin3
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YSF PB0 output CN8 Pin4
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YSF PB0 output CN8 Pin4
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P25 PC1 output CN8 Pin5
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P25 PC1 output CN8 Pin5
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NXDN PA3 output CN9 Pin1
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NXDN PA3 output CN9 Pin1
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POCSAG PB12 output
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RX PA0 analog input CN8 Pin1
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RX PA0 analog input CN8 Pin1
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RSSI PC0 analog input CN8 Pin6
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RSSI PC0 analog input CN8 Pin6
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@ -555,6 +576,10 @@ EXT_CLK PB8 input CN5 Pin10
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#define PORT_NXDN GPIOA
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#define PORT_NXDN GPIOA
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#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
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#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
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#define PIN_POCSAG GPIO_Pin_12
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#define PORT_POCSAG GPIOB
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#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
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#define PIN_DSTAR GPIO_Pin_1
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#define PIN_DSTAR GPIO_Pin_1
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#define PORT_DSTAR GPIOA
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#define PORT_DSTAR GPIOA
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#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOA
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#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOA
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