mirror of https://github.com/g4klx/MMDVM.git
Small tweak to the LPTMR.
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@ -129,12 +129,9 @@ void CIO::startInt()
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// Set ADC0 to trigger from the LPTMR
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// Set ADC0 to trigger from the LPTMR
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SIM_SOPT7 |= SIM_SOPT7_ADC0ALTTRGEN |
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SIM_SOPT7 |= SIM_SOPT7_ADC0ALTTRGEN |
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!SIM_SOPT7_ADC0PRETRGSEL |
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SIM_SOPT7_ADC0TRGSEL(14);
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SIM_SOPT7_ADC0TRGSEL(14);
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// NVIC_ENABLE_IRQ(IRQ_LPTMR);
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#else
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#else
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// Setup PDB for ADC0 (and ADC1) at 24 kHz
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// Setup PDB for ADC0 at 24 kHz
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SIM_SCGC6 |= SIM_SCGC6_PDB; // Enable PDB clock
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SIM_SCGC6 |= SIM_SCGC6_PDB; // Enable PDB clock
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PDB0_MOD = F_BUS / 24000; // Timer period
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PDB0_MOD = F_BUS / 24000; // Timer period
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PDB0_IDLY = 0; // Interrupt delay
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PDB0_IDLY = 0; // Interrupt delay
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@ -142,7 +139,6 @@ void CIO::startInt()
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PDB0_SC = PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | // SW trigger, enable interrupts, continuous mode
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PDB0_SC = PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | // SW trigger, enable interrupts, continuous mode
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PDB_SC_PDBIE | PDB_SC_CONT | PDB_SC_LDOK; // No prescaling
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PDB_SC_PDBIE | PDB_SC_CONT | PDB_SC_LDOK; // No prescaling
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PDB0_SC |= PDB_SC_SWTRIG; // Software trigger (reset and restart counter)
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PDB0_SC |= PDB_SC_SWTRIG; // Software trigger (reset and restart counter)
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// NVIC_ENABLE_IRQ(IRQ_PDB);
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#endif
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#endif
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// Initialise the DAC
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// Initialise the DAC
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