mirror of https://github.com/g4klx/MMDVM.git
Merge branch 'master' into boxcar
This commit is contained in:
commit
68f0fa8132
2
Config.h
2
Config.h
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@ -27,7 +27,7 @@
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// Frequencies such as 10.0 Mhz (48000 * 208.333) or 20 Mhz (48000 * 416.666) are not suitable.
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//
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// For 12 MHz
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// #define EXTERNAL_OSC 12000000
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#define EXTERNAL_OSC 12000000
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// For 12.288 MHz
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// #define EXTERNAL_OSC 12288000
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// For 14.4 MHz
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@ -88,7 +88,7 @@ bool CDMRDMORX::processSample(q15_t sample, uint16_t rssi)
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m_rssi[m_dataPtr] = rssi;
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m_bitBuffer[m_bitPtr] <<= 1;
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if (sample < 0)
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if (sample < m_dcLevel)
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m_bitBuffer[m_bitPtr] |= 0x01U;
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if (m_state == DMORXS_NONE) {
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@ -104,7 +104,7 @@ bool CDMRSlotRX::processSample(q15_t sample, uint16_t rssi)
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m_rssi[m_dataPtr] = rssi;
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m_bitBuffer[m_bitPtr] <<= 1;
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if (sample < 0)
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if (sample < m_dcLevel)
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m_bitBuffer[m_bitPtr] |= 0x01U;
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if (m_state == DMRRXS_NONE) {
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30
DStarRX.cpp
30
DStarRX.cpp
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@ -34,10 +34,6 @@ const unsigned int SYNC_POS = 21U * DSTAR_DATA_LENGTH_BITS;
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const unsigned int SYNC_SCAN_START = SYNC_POS - 3U;
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const unsigned int SYNC_SCAN_END = SYNC_POS + 3U;
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// Generated using [b, a] = butter(1, 0.001) in MATLAB
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static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2}
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const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
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// D-Star bit order version of 0x55 0x55 0x6E 0x0A
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const uint32_t FRAME_SYNC_DATA = 0x00557650U;
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const uint32_t FRAME_SYNC_MASK = 0x00FFFFFFU;
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@ -261,16 +257,8 @@ m_pathMemory2(),
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m_pathMemory3(),
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m_fecOutput(),
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m_rssiAccum(0U),
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m_rssiCount(0U),
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m_dcFilter(),
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m_dcState()
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m_rssiCount(0U)
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{
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::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
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m_dcFilter.numStages = DC_FILTER_STAGES;
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m_dcFilter.pState = m_dcState;
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m_dcFilter.pCoeffs = DC_FILTER;
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m_dcFilter.postShift = 0;
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}
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void CDStarRX::reset()
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@ -286,24 +274,12 @@ void CDStarRX::reset()
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}
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void CDStarRX::samples(const q15_t* samples, const uint16_t* rssi, uint8_t length)
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{
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q31_t dc_level = 0;
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q31_t dcVals[20];
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q31_t intSamp[20];
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::arm_q15_to_q31((q15_t*)samples, intSamp, length);
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::arm_biquad_cascade_df1_q31(&m_dcFilter, intSamp, dcVals, length);
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for (uint8_t i = 0U; i < length; i++)
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dc_level += dcVals[i];
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dc_level /= length;
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{
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for (uint16_t i = 0U; i < length; i++) {
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m_rssiAccum += rssi[i];
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m_rssiCount++;
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bool bit = samples[i] < (q15_t) (dc_level >> 16);
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bool bit = samples[i] < m_dcLevel;
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if (bit != m_prev) {
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if (m_pll < (PLLMAX / 2U))
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@ -53,8 +53,6 @@ private:
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uint8_t m_fecOutput[42U];
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uint32_t m_rssiAccum;
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uint16_t m_rssiCount;
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arm_biquad_casd_df1_inst_q31 m_dcFilter;
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q31_t m_dcState[4];
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void processNone(bool bit);
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void processHeader(bool bit);
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2015,2016 by Jonathan Naylor G4KLX
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* Copyright (C) 2015,2016,2017 by Jonathan Naylor G4KLX
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -93,6 +93,8 @@ extern bool m_duplex;
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extern bool m_tx;
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extern bool m_dcd;
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extern q15_t m_dcLevel;
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extern CSerialPort serial;
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extern CIO io;
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28
IO.cpp
28
IO.cpp
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@ -26,6 +26,10 @@
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static q15_t BOXCAR_FILTER[] = {12000, 12000, 12000, 12000, 12000, 0};
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const uint16_t BOXCAR_FILTER_LEN = 6U;
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// Generated using [b, a] = butter(1, 0.001) in MATLAB
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static q31_t DC_FILTER[] = {3367972, 0, 3367972, 0, 2140747704, 0}; // {b0, 0, b1, b2, -a1, -a2}
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const uint32_t DC_FILTER_STAGES = 1U; // One Biquad stage
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const uint16_t DC_OFFSET = 2048U;
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CIO::CIO() :
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@ -48,13 +52,21 @@ m_detect(false),
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m_adcOverflow(0U),
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m_dacOverflow(0U),
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m_watchdog(0U),
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m_lockout(false)
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m_lockout(false),
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m_dcFilter(),
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m_dcState()
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{
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::memset(m_boxcarState, 0x00U, 30U * sizeof(q15_t));
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::memset(m_dcState, 0x00U, 4U * sizeof(q31_t));
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m_boxcarFilter.numTaps = BOXCAR_FILTER_LEN;
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m_boxcarFilter.pState = m_boxcarState;
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m_boxcarFilter.pCoeffs = BOXCAR_FILTER;
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m_dcFilter.numStages = DC_FILTER_STAGES;
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m_dcFilter.pState = m_dcState;
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m_dcFilter.pCoeffs = DC_FILTER;
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m_dcFilter.postShift = 0;
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initInt();
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}
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@ -132,6 +144,20 @@ void CIO::process()
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if (m_lockout)
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return;
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q31_t dcLevel = 0;
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q31_t dcVals[20];
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q31_t intSamp[20];
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::arm_q15_to_q31((q15_t*)samples, intSamp, RX_BLOCK_SIZE);
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::arm_biquad_cascade_df1_q31(&m_dcFilter, intSamp, dcVals, RX_BLOCK_SIZE);
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for (uint8_t i = 0U; i < RX_BLOCK_SIZE; i++)
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dcLevel += dcVals[i];
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dcLevel /= RX_BLOCK_SIZE;
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m_dcLevel = q15_t(dcLevel >> 16);
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q15_t vals[RX_BLOCK_SIZE];
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::arm_fir_fast_q15(&m_boxcarFilter, samples, vals, RX_BLOCK_SIZE);
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2
IO.h
2
IO.h
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@ -62,6 +62,8 @@ private:
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arm_fir_instance_q15 m_boxcarFilter;
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q15_t m_boxcarState[30U]; // NoTaps + BlockSize - 1, 6 + 20 - 1 plus some spare
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arm_biquad_casd_df1_inst_q31 m_dcFilter;
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q31_t m_dcState[4];
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bool m_pttInvert;
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q15_t m_rxLevel;
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@ -36,6 +36,8 @@ bool m_duplex = true;
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bool m_tx = false;
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bool m_dcd = false;
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q15_t m_dcLevel = 0;
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CDStarRX dstarRX;
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CDStarTX dstarTX;
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@ -33,6 +33,8 @@ bool m_duplex = true;
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bool m_tx = false;
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bool m_dcd = false;
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q15_t m_dcLevel = 0;
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CDStarRX dstarRX;
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CDStarTX dstarTX;
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@ -98,8 +98,6 @@
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<Define name="HSE_VALUE=12000000"/>
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<Define name="STM32F4_PI"/>
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<Define name="ARDUINO_MODE_PINS"/>
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<Define name="SEND_RSSI_DATA"/>
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<Define name="SERIAL_REPEATER"/>
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</DefinedSymbols>
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</Compile>
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<Link useDefault="0">
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4
Makefile
4
Makefile
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@ -87,7 +87,7 @@ MCFLAGS=-mcpu=cortex-m4 -mthumb -mlittle-endian \
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# STM32F4 Discovery board:
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DEFS_DIS=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_DISCOVERY -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
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# Pi board:
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DEFS_PI=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_PI -DARDUINO_MODE_PINS -DSEND_RSSI_DATA -DSERIAL_REPEATER -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
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DEFS_PI=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_PI -DARDUINO_MODE_PINS -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
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# STM32F4 Nucleo 446 board:
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DEFS_NUCLEO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_NUCLEO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
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@ -178,11 +178,13 @@ endif
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deploy-pi:
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ifneq ($(wildcard /usr/local/bin/stm32flash),)
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-/usr/local/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
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-/usr/local/bin/stm32ld /dev/ttyAMA0 57600 bin/outp.bin
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/usr/local/bin/stm32flash -v -w bin/outp.bin -g 0x0 -R -c /dev/ttyAMA0
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endif
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ifneq ($(wildcard /usr/bin/stm32flash),)
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-/usr/bin/stm32flash -i 20,-21,21:-20,21 /dev/ttyAMA0
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-/usr/bin/stm32ld /dev/ttyAMA0 57600 bin/outp.bin
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/usr/bin/stm32flash -v -w bin/outp.bin -g 0x0 -R -c /dev/ttyAMA0
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endif
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@ -95,7 +95,7 @@ void CP25RX::samples(const q15_t* samples, uint16_t* rssi, uint8_t length)
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m_rssiCount++;
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m_bitBuffer[m_bitPtr] <<= 1;
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if (sample < 0)
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if (sample < m_dcLevel)
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m_bitBuffer[m_bitPtr] |= 0x01U;
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m_buffer[m_dataPtr] = sample;
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@ -52,7 +52,6 @@ extern "C" {
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/* ************* USART1 ***************** */
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#if defined(STM32F4_PI) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
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volatile uint32_t intcount1;
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volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
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volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
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volatile uint16_t TXSerialfifohead1, TXSerialfifotail1;
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@ -139,7 +138,6 @@ void USART1_IRQHandler()
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}
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USART_ClearITPendingBit(USART1, USART_IT_RXNE);
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intcount1++;
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}
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if (USART_GetITStatus(USART1, USART_IT_TXE)) {
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@ -245,7 +243,6 @@ void WriteUSART1(const uint8_t* data, uint16_t length)
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/* ************* USART2 ***************** */
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#if defined(STM32F4_NUCLEO)
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volatile uint32_t intcount2;
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volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
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volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
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volatile uint16_t TXSerialfifohead2, TXSerialfifotail2;
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@ -332,7 +329,6 @@ void USART2_IRQHandler()
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}
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USART_ClearITPendingBit(USART2, USART_IT_RXNE);
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intcount2++;
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}
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if (USART_GetITStatus(USART2, USART_IT_TXE)) {
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@ -438,7 +434,6 @@ void WriteUSART2(const uint8_t* data, uint16_t length)
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/* ************* USART3 ***************** */
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#if defined(STM32F4_DISCOVERY) || defined(STM32F4_PI)
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volatile uint32_t intcount3;
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volatile uint8_t TXSerialfifo3[TX_SERIAL_FIFO_SIZE];
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volatile uint8_t RXSerialfifo3[RX_SERIAL_FIFO_SIZE];
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volatile uint16_t TXSerialfifohead3, TXSerialfifotail3;
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@ -525,7 +520,6 @@ void USART3_IRQHandler()
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}
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USART_ClearITPendingBit(USART3, USART_IT_RXNE);
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intcount3++;
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}
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if (USART_GetITStatus(USART3, USART_IT_TXE)) {
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@ -631,7 +625,6 @@ void WriteUSART3(const uint8_t* data, uint16_t length)
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/* ************* UART5 ***************** */
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#if !(defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
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volatile uint32_t intcount5;
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volatile uint8_t TXSerialfifo5[TX_SERIAL_FIFO_SIZE];
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volatile uint8_t RXSerialfifo5[RX_SERIAL_FIFO_SIZE];
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volatile uint16_t TXSerialfifohead5, TXSerialfifotail5;
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@ -718,7 +711,6 @@ void UART5_IRQHandler()
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}
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USART_ClearITPendingBit(UART5, USART_IT_RXNE);
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intcount5++;
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}
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if (USART_GetITStatus(UART5, USART_IT_TXE)) {
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