mirror of https://github.com/g4klx/MMDVM.git
Remove Due, Teensy, and STM32F1xx support.
This commit is contained in:
Jonathan Naylor
parent
85d3086d4c
commit
5ede02212a
|
|
@ -4,6 +4,3 @@
|
||||||
[submodule "STM32F7XX_Lib"]
|
[submodule "STM32F7XX_Lib"]
|
||||||
path = STM32F7XX_Lib
|
path = STM32F7XX_Lib
|
||||||
url = https://github.com/juribeparada/STM32F7XX_Lib.git
|
url = https://github.com/juribeparada/STM32F7XX_Lib.git
|
||||||
[submodule "STM32F10X_Lib"]
|
|
||||||
path = STM32F10X_Lib
|
|
||||||
url = https://github.com/shawnchain/STM32F10X_Lib.git
|
|
||||||
|
|
|
||||||
125
BUILD.txt
125
BUILD.txt
|
|
@ -1,125 +0,0 @@
|
||||||
In order to build MMDVM, you need to tell the Arduino GUI to link with the
|
|
||||||
CMSIS DSP library, which is doesn't do by default.
|
|
||||||
|
|
||||||
My development is on Windows and so I can vouch for the following instructions.
|
|
||||||
|
|
||||||
For Arduino 1.6.3 with SAM 1.6.4
|
|
||||||
--------------------------------
|
|
||||||
|
|
||||||
1. Go to the where the platform.txt file is located. On my Windows machine it's
|
|
||||||
in:
|
|
||||||
|
|
||||||
C:\Users\Jonathan\AppData\Roaming\Arduino15\packages\arduino\hardware\sam\1.6.4
|
|
||||||
|
|
||||||
On Mac OS X it's located in:
|
|
||||||
|
|
||||||
/Applications/Arduino.app/Contents/Resources/Java/hardware/arduino/sam
|
|
||||||
Or
|
|
||||||
~/Library/Arduino15/packages/arduino/hardware/sam/1.6.6
|
|
||||||
|
|
||||||
2. You'll need to open the file in a text editor and find the line:
|
|
||||||
|
|
||||||
## Combine gc-sections, archives, and objects
|
|
||||||
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} -mcpu={build.mcu} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols -Wl,--start-group "{build.path}/syscalls_sam3.c.o" {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
|
|
||||||
|
|
||||||
In my version it's line 73.
|
|
||||||
|
|
||||||
3. Modify it to read as follows:
|
|
||||||
|
|
||||||
## Combine gc-sections, archives, and objects
|
|
||||||
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" {compiler.c.elf.flags} -mcpu={build.mcu} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -mthumb -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--warn-unresolved-symbols -Wl,--start-group "{build.path}/syscalls_sam3.c.o" {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.system.path}/CMSIS/CMSIS/Lib/ARM/arm_cortexM3l_math.lib" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
|
|
||||||
|
|
||||||
The change is near the end, and is the addition of:
|
|
||||||
|
|
||||||
"{build.system.path}/CMSIS/CMSIS/Lib/ARM/arm_cortexM3l_math.lib"
|
|
||||||
|
|
||||||
Which is the CMSIS AMR3 DSP library for little-endian operation.
|
|
||||||
|
|
||||||
4. Save the file and start up the Arduino GUI and build MMDVM.
|
|
||||||
|
|
||||||
I would like to get instructions for doing the same on a Linux platform. As a
|
|
||||||
starter find the relevent platform.txt and try adding:
|
|
||||||
|
|
||||||
"{build.system.path}/CMSIS/CMSIS/Lib/ARM/libarm_cortexM3l_math.a"
|
|
||||||
|
|
||||||
or maybe:
|
|
||||||
|
|
||||||
"{build.variant.path}/libarm_cortexM3l_math.a"
|
|
||||||
|
|
||||||
Likely on Linux
|
|
||||||
|
|
||||||
"{build.system.path}/CMSIS/CMSIS/Lib/GCC/libarm_cortexM3l_math.a"
|
|
||||||
|
|
||||||
As with Arduino 1.6.7 with SAM 1.6.6, see below.
|
|
||||||
|
|
||||||
|
|
||||||
For Arduino 1.6.7 with SAM 1.6.6
|
|
||||||
--------------------------------
|
|
||||||
(checked OK on Arduino 1.6.11 and SAM 1.6.9)
|
|
||||||
|
|
||||||
1. Go to the where the platform.txt file is located. On my Windows machine it's
|
|
||||||
in:
|
|
||||||
|
|
||||||
C:\Users\Jonathan\AppData\Local\Arduino15\packages\arduino\hardware\sam\1.6.6
|
|
||||||
|
|
||||||
On Mac OS X it's located in:
|
|
||||||
|
|
||||||
/Applications/Arduino.app/Contents/Resources/Java/hardware/arduino/sam
|
|
||||||
|
|
||||||
On Linux, it's located in my home directory, downloaded and extracted from Arduino website, but must be installed.
|
|
||||||
|
|
||||||
/home/m1geo/arduino-1.6.7/hardware/arduino/sam
|
|
||||||
|
|
||||||
or
|
|
||||||
|
|
||||||
/home/m1geo/.arduino15/packages/arduino/hardware/sam/1.6.9 (if you let the board/library manager install SAM)
|
|
||||||
|
|
||||||
|
|
||||||
I (M1GEO) found it was necessary to download SAM-1.6.6 outside of the Arduino IDE, and manually extract the files.
|
|
||||||
The Board Manager didn't seem to install the SAM files correctly. Here's how I did it:
|
|
||||||
|
|
||||||
a) wget http://downloads.arduino.cc/cores/sam-1.6.6.tar.bz2 -O /tmp/sam-1.6.6.tar.bz2 (download and save in /tmp)
|
|
||||||
b) cd arduino-1.6.7/hardware/arduino/ (Arduino root, here, in my home directory)
|
|
||||||
c) tar xvfj /tmp/sam-1.6.6.tar.bz2
|
|
||||||
|
|
||||||
2. You'll need to open the file (platform.txt) in a text editor and find the line:
|
|
||||||
|
|
||||||
## Combine gc-sections, archives, and objects
|
|
||||||
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mcpu={build.mcu} -mthumb {compiler.c.elf.flags} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group "{build.path}/core/syscalls_sam3.c.o" {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
|
|
||||||
|
|
||||||
In my version it's line 73.
|
|
||||||
|
|
||||||
3. Modify it to read as follows:
|
|
||||||
|
|
||||||
## Combine gc-sections, archives, and objects
|
|
||||||
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mcpu={build.mcu} -mthumb {compiler.c.elf.flags} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group "{build.path}/core/syscalls_sam3.c.o" {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.system.path}/CMSIS/CMSIS/Lib/ARM/arm_cortexM3l_math.lib" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
|
|
||||||
|
|
||||||
The change is near the end, and is the addition of:
|
|
||||||
|
|
||||||
"{build.system.path}/CMSIS/CMSIS/Lib/ARM/arm_cortexM3l_math.lib"
|
|
||||||
|
|
||||||
On Linux, the path was found to differ slightly (GCC instead of ARM):
|
|
||||||
|
|
||||||
"{build.system.path}/CMSIS/CMSIS/Lib/GCC/libarm_cortexM3l_math.a"
|
|
||||||
|
|
||||||
Which is the CMSIS AMR3 DSP library for little-endian operation.
|
|
||||||
|
|
||||||
4. Save the file and start up the Arduino GUI and build MMDVM.
|
|
||||||
|
|
||||||
For Arduino 1.6.9 with SAM 1.6.8
|
|
||||||
--------------------------------
|
|
||||||
|
|
||||||
1. Locate platform.txt. On Ubuntu 14.04 LTS x86_64 OS it is in:
|
|
||||||
|
|
||||||
/home/$user/.arduino15/packages/arduino/hardware/sam/1.6.8/
|
|
||||||
|
|
||||||
2. Open the file in a text editor and change the line:
|
|
||||||
|
|
||||||
## Combine gc-sections, archives, and objects
|
|
||||||
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mcpu={build.mcu} -mthumb {compiler.c.elf.flags} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group {compiler.combine.flags} {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
|
|
||||||
|
|
||||||
to
|
|
||||||
|
|
||||||
recipe.c.combine.pattern="{compiler.path}{compiler.c.elf.cmd}" -mcpu={build.mcu} -mthumb {compiler.c.elf.flags} "-T{build.variant.path}/{build.ldscript}" "-Wl,-Map,{build.path}/{build.project_name}.map" {compiler.c.elf.extra_flags} -o "{build.path}/{build.project_name}.elf" "-L{build.path}" -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group {compiler.combine.flags} {object_files} "{build.variant.path}/{build.variant_system_lib}" "{build.system.path}/CMSIS/CMSIS/Lib/GCC/libarm_cortexM3l_math.a" "{build.path}/{archive_file}" -Wl,--end-group -lm -gcc
|
|
||||||
|
|
||||||
3. Save the file, open the Arduino IDE and build MMDVM
|
|
||||||
323
IODue.cpp
323
IODue.cpp
|
|
@ -1,323 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (C) 2015,2016,2017,2018,2020 by Jonathan Naylor G4KLX
|
|
||||||
* Copyright (C) 2015 by Jim Mclaughlin KI6ZUM
|
|
||||||
* Copyright (C) 2016 by Colin Durbridge G4EML
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "Config.h"
|
|
||||||
#include "Globals.h"
|
|
||||||
#include "IO.h"
|
|
||||||
|
|
||||||
#if defined(__SAM3X8E__)
|
|
||||||
|
|
||||||
// An Arduino Due
|
|
||||||
#if defined(ARDUINO_DUE_PAPA)
|
|
||||||
#define PIN_COS 7
|
|
||||||
#define PIN_PTT 8
|
|
||||||
#define PIN_COSLED 11
|
|
||||||
#define PIN_DSTAR 16
|
|
||||||
#define PIN_DMR 17
|
|
||||||
#define PIN_YSF 18
|
|
||||||
#define PIN_P25 19
|
|
||||||
#define PIN_NXDN 20
|
|
||||||
#define PIN_POCSAG 4
|
|
||||||
#define PIN_FM 5
|
|
||||||
#define ADC_CHER_Chan (1<<7) // ADC on Due pin A0 - Due AD7 - (1 << 7)
|
|
||||||
#define ADC_ISR_EOC_Chan ADC_ISR_EOC7
|
|
||||||
#define ADC_CDR_Chan 7
|
|
||||||
#define DACC_MR_USER_SEL_Chan DACC_MR_USER_SEL_CHANNEL0 // DAC on Due DAC0
|
|
||||||
#define DACC_CHER_Chan DACC_CHER_CH0
|
|
||||||
#elif defined(ARDUINO_DUE_ZUM_V10)
|
|
||||||
#define PIN_COS 52
|
|
||||||
#define PIN_PTT 23
|
|
||||||
#define PIN_COSLED 22
|
|
||||||
#define PIN_DSTAR 9
|
|
||||||
#define PIN_DMR 8
|
|
||||||
#define PIN_YSF 7
|
|
||||||
#define PIN_P25 6
|
|
||||||
#define PIN_NXDN 5
|
|
||||||
#define PIN_POCSAG 4
|
|
||||||
#define PIN_FM 3
|
|
||||||
#define ADC_CHER_Chan (1<<13) // ADC on Due pin A11 - Due AD13 - (1 << 13)
|
|
||||||
#define ADC_ISR_EOC_Chan ADC_ISR_EOC13
|
|
||||||
#define ADC_CDR_Chan 13
|
|
||||||
#define DACC_MR_USER_SEL_Chan DACC_MR_USER_SEL_CHANNEL1 // DAC on Due DAC1
|
|
||||||
#define DACC_CHER_Chan DACC_CHER_CH1
|
|
||||||
#define RSSI_CHER_Chan (1<<1) // ADC on Due pin A6 - Due AD1 - (1 << 1)
|
|
||||||
#define RSSI_CDR_Chan 1
|
|
||||||
#elif defined(ARDUINO_DUE_NTH)
|
|
||||||
#define PIN_COS A7
|
|
||||||
#define PIN_PTT A8
|
|
||||||
#define PIN_COSLED A11
|
|
||||||
#define PIN_DSTAR 9
|
|
||||||
#define PIN_DMR 8
|
|
||||||
#define PIN_YSF 7
|
|
||||||
#define PIN_P25 6
|
|
||||||
#define PIN_NXDN 5
|
|
||||||
#define PIN_POCSAG 4
|
|
||||||
#define PIN_FM 3
|
|
||||||
#define ADC_CHER_Chan (1<<7) // ADC on Due pin A0 - Due AD7 - (1 << 7)
|
|
||||||
#define ADC_ISR_EOC_Chan ADC_ISR_EOC7
|
|
||||||
#define ADC_CDR_Chan 7
|
|
||||||
#define DACC_MR_USER_SEL_Chan DACC_MR_USER_SEL_CHANNEL0 // DAC on Due DAC0
|
|
||||||
#define DACC_CHER_Chan DACC_CHER_CH0
|
|
||||||
#define RSSI_CHER_Chan (1<<1) // ADC on Due pin A6 - Due AD1 - (1 << 1)
|
|
||||||
#define RSSI_CDR_Chan 1
|
|
||||||
#else
|
|
||||||
#error "Either ARDUINO_DUE_PAPA, ARDUINO_DUE_ZUM_V10, or ARDUINO_DUE_NTH need to be defined"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
const uint16_t DC_OFFSET = 2048U;
|
|
||||||
|
|
||||||
extern "C" {
|
|
||||||
void ADC_Handler()
|
|
||||||
{
|
|
||||||
io.interrupt();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::initInt()
|
|
||||||
{
|
|
||||||
// Set up the TX, COS and LED pins
|
|
||||||
pinMode(PIN_PTT, OUTPUT);
|
|
||||||
pinMode(PIN_COSLED, OUTPUT);
|
|
||||||
pinMode(PIN_LED, OUTPUT);
|
|
||||||
pinMode(PIN_COS, INPUT);
|
|
||||||
|
|
||||||
#if defined(MODE_LEDS)
|
|
||||||
// Set up the mode output pins
|
|
||||||
pinMode(PIN_DSTAR, OUTPUT);
|
|
||||||
pinMode(PIN_DMR, OUTPUT);
|
|
||||||
pinMode(PIN_YSF, OUTPUT);
|
|
||||||
pinMode(PIN_P25, OUTPUT);
|
|
||||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
|
||||||
pinMode(PIN_NXDN, OUTPUT);
|
|
||||||
#endif
|
|
||||||
#if !defined(USE_ALTERNATE_M17_LEDS)
|
|
||||||
pinMode(PIN_M17, OUTPUT);
|
|
||||||
#endif
|
|
||||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
|
||||||
pinMode(PIN_POCSAG, OUTPUT);
|
|
||||||
#endif
|
|
||||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
|
||||||
pinMode(PIN_FM, OUTPUT);
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::startInt()
|
|
||||||
{
|
|
||||||
if (ADC->ADC_ISR & ADC_ISR_EOC_Chan) // Ensure there was an End-of-Conversion and we read the ISR reg
|
|
||||||
io.interrupt();
|
|
||||||
|
|
||||||
// Set up the ADC
|
|
||||||
NVIC_EnableIRQ(ADC_IRQn); // Enable ADC interrupt vector
|
|
||||||
ADC->ADC_IDR = 0xFFFFFFFF; // Disable interrupts
|
|
||||||
ADC->ADC_IER = ADC_CHER_Chan; // Enable End-Of-Conv interrupt
|
|
||||||
ADC->ADC_CHDR = 0xFFFF; // Disable all channels
|
|
||||||
ADC->ADC_CHER = ADC_CHER_Chan; // Enable rx input channel
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
ADC->ADC_CHER |= RSSI_CHER_Chan; // and RSSI input
|
|
||||||
#endif
|
|
||||||
ADC->ADC_CGR = 0x15555555; // All gains set to x1
|
|
||||||
ADC->ADC_COR = 0x00000000; // All offsets off
|
|
||||||
ADC->ADC_MR = (ADC->ADC_MR & 0xFFFFFFF0) | (1 << 1) | ADC_MR_TRGEN; // 1 = trig source TIO from TC0
|
|
||||||
|
|
||||||
#if defined(EXTERNAL_OSC)
|
|
||||||
// Set up the external clock input on PA4 = AI5
|
|
||||||
REG_PIOA_ODR = 0x10; // Set pin as input
|
|
||||||
REG_PIOA_PDR = 0x10; // Disable PIO A bit 4
|
|
||||||
REG_PIOA_ABSR &= ~0x10; // Select A peripheral = TCLK1 Input
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Set up the timer
|
|
||||||
pmc_enable_periph_clk(TC_INTERFACE_ID + 0*3+0) ; // Clock the TC0 channel 0
|
|
||||||
TcChannel* t = &(TC0->TC_CHANNEL)[0]; // Pointer to TC0 registers for its channel 0
|
|
||||||
t->TC_CCR = TC_CCR_CLKDIS; // Disable internal clocking while setup regs
|
|
||||||
t->TC_IDR = 0xFFFFFFFF; // Disable interrupts
|
|
||||||
t->TC_SR; // Read int status reg to clear pending
|
|
||||||
#if defined(EXTERNAL_OSC)
|
|
||||||
t->TC_CMR = TC_CMR_TCCLKS_XC1 | // Use XC1 = TCLK1 external clock
|
|
||||||
#else
|
|
||||||
t->TC_CMR = TC_CMR_TCCLKS_TIMER_CLOCK1 | // Use TCLK1 (prescale by 2, = 42MHz)
|
|
||||||
#endif
|
|
||||||
TC_CMR_WAVE | // Waveform mode
|
|
||||||
TC_CMR_WAVSEL_UP_RC | // Count-up PWM using RC as threshold
|
|
||||||
TC_CMR_EEVT_XC0 | // Set external events from XC0 (this setup TIOB as output)
|
|
||||||
TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_CLEAR |
|
|
||||||
TC_CMR_BCPB_CLEAR | TC_CMR_BCPC_CLEAR;
|
|
||||||
#if defined(EXTERNAL_OSC)
|
|
||||||
t->TC_RC = EXTERNAL_OSC / 24000; // Counter resets on RC, so sets period in terms of the external clock
|
|
||||||
t->TC_RA = EXTERNAL_OSC / 48000; // Roughly square wave
|
|
||||||
#else
|
|
||||||
t->TC_RC = 1750; // Counter resets on RC, so sets period in terms of 42MHz internal clock
|
|
||||||
t->TC_RA = 880; // Roughly square wave
|
|
||||||
#endif
|
|
||||||
t->TC_CMR = (t->TC_CMR & 0xFFF0FFFF) | TC_CMR_ACPA_CLEAR | TC_CMR_ACPC_SET; // Set clear and set from RA and RC compares
|
|
||||||
t->TC_CCR = TC_CCR_CLKEN | TC_CCR_SWTRG; // re-enable local clocking and switch to hardware trigger source.
|
|
||||||
|
|
||||||
// Set up the DAC
|
|
||||||
pmc_enable_periph_clk(DACC_INTERFACE_ID); // Start clocking DAC
|
|
||||||
DACC->DACC_CR = DACC_CR_SWRST; // Reset DAC
|
|
||||||
DACC->DACC_MR =
|
|
||||||
DACC_MR_TRGEN_EN | DACC_MR_TRGSEL(1) | // Trigger 1 = TIO output of TC0
|
|
||||||
DACC_MR_USER_SEL_Chan | // Select channel
|
|
||||||
(24 << DACC_MR_STARTUP_Pos); // 24 = 1536 cycles which I think is in range 23..45us since DAC clock = 42MHz
|
|
||||||
DACC->DACC_IDR = 0xFFFFFFFF; // No interrupts
|
|
||||||
DACC->DACC_CHER = DACC_CHER_Chan; // Enable channel
|
|
||||||
|
|
||||||
digitalWrite(PIN_PTT, m_pttInvert ? HIGH : LOW);
|
|
||||||
digitalWrite(PIN_COSLED, LOW);
|
|
||||||
digitalWrite(PIN_LED, HIGH);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::interrupt()
|
|
||||||
{
|
|
||||||
if ((ADC->ADC_ISR & ADC_ISR_EOC_Chan) == ADC_ISR_EOC_Chan) { // Ensure there was an End-of-Conversion and we read the ISR reg
|
|
||||||
TSample sample = {DC_OFFSET, MARK_NONE};
|
|
||||||
|
|
||||||
m_txBuffer.get(sample);
|
|
||||||
DACC->DACC_CDR = sample.sample;
|
|
||||||
|
|
||||||
sample.sample = ADC->ADC_CDR[ADC_CDR_Chan];
|
|
||||||
m_rxBuffer.put(sample);
|
|
||||||
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
m_rssiBuffer.put(ADC->ADC_CDR[RSSI_CDR_Chan]);
|
|
||||||
#else
|
|
||||||
m_rssiBuffer.put(0U);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
m_watchdog++;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
bool CIO::getCOSInt()
|
|
||||||
{
|
|
||||||
return digitalRead(PIN_COS) == HIGH;
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setLEDInt(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_LED, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setPTTInt(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_PTT, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setCOSInt(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_COSLED, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setDStarInt(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setDMRInt(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_DMR, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setYSFInt(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setP25Int(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setNXDNInt(bool on)
|
|
||||||
{
|
|
||||||
#if defined(USE_ALTERNATE_NXDN_LEDS)
|
|
||||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
|
||||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
|
||||||
#else
|
|
||||||
digitalWrite(PIN_NXDN, on ? HIGH : LOW);
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setM17Int(bool on)
|
|
||||||
{
|
|
||||||
#if defined(USE_ALTERNATE_M17_LEDS)
|
|
||||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
|
||||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
|
||||||
#else
|
|
||||||
digitalWrite(PIN_M17, on ? HIGH : LOW);
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setPOCSAGInt(bool on)
|
|
||||||
{
|
|
||||||
#if defined(USE_ALTERNATE_POCSAG_LEDS)
|
|
||||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
|
||||||
digitalWrite(PIN_DMR, on ? HIGH : LOW);
|
|
||||||
#else
|
|
||||||
digitalWrite(PIN_POCSAG, on ? HIGH : LOW);
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setFMInt(bool on)
|
|
||||||
{
|
|
||||||
#if defined(USE_ALTERNATE_FM_LEDS)
|
|
||||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
|
||||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
|
||||||
#else
|
|
||||||
digitalWrite(PIN_FM, on ? HIGH : LOW);
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::delayInt(unsigned int dly)
|
|
||||||
{
|
|
||||||
delay(dly);
|
|
||||||
}
|
|
||||||
|
|
||||||
uint8_t CIO::getCPU() const
|
|
||||||
{
|
|
||||||
return 0U;
|
|
||||||
}
|
|
||||||
|
|
||||||
// Code taken from https://github.com/emagii/at91sam3s/blob/master/examples/eefc_uniqueid/main.c
|
|
||||||
void CIO::getUDID(uint8_t* buffer)
|
|
||||||
{
|
|
||||||
uint32_t status;
|
|
||||||
|
|
||||||
EFC1->EEFC_FCR = (0x5A << 24) | EFC_FCMD_STUI;
|
|
||||||
do {
|
|
||||||
status = EFC1->EEFC_FSR;
|
|
||||||
} while ( (status & EEFC_FSR_FRDY) == EEFC_FSR_FRDY );
|
|
||||||
|
|
||||||
for (uint8_t i = 0; i < 16; i+=4) {
|
|
||||||
buffer[i + 0] = *(uint32_t *)(IFLASH1_ADDR + i) >> 24;
|
|
||||||
buffer[i + 1] = *(uint32_t *)(IFLASH1_ADDR + i) >> 16;
|
|
||||||
buffer[i + 2] = *(uint32_t *)(IFLASH1_ADDR + i) >> 8;
|
|
||||||
buffer[i + 3] = *(uint32_t *)(IFLASH1_ADDR + i) >> 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
EFC1->EEFC_FCR = (0x5A << 24) | EFC_FCMD_SPUI;
|
|
||||||
do {
|
|
||||||
status = EFC1->EEFC_FSR;
|
|
||||||
} while ( (status & EEFC_FSR_FRDY) != EEFC_FSR_FRDY );
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
500
IOSTM_CMSIS.cpp
500
IOSTM_CMSIS.cpp
|
|
@ -1,500 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (C) 2016 by Jim McLaughlin KI6ZUM
|
|
||||||
* Copyright (C) 2016, 2017 by Andy Uribe CA6JAU
|
|
||||||
* Copyright (C) 2017,2018,2020 by Jonathan Naylor G4KLX
|
|
||||||
* Copyright (C) 2017 by Wojciech Krutnik N0CALL
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "Config.h"
|
|
||||||
#include "Globals.h"
|
|
||||||
#include "IO.h"
|
|
||||||
|
|
||||||
#if defined(STM32F1)
|
|
||||||
|
|
||||||
#if defined(STM32F1_POG)
|
|
||||||
/*
|
|
||||||
Pin definitions for STM32F1 POG Board:
|
|
||||||
|
|
||||||
PTT PB12 output
|
|
||||||
COSLED PB5 output
|
|
||||||
LED PB4 output
|
|
||||||
COS PB13 input/PD
|
|
||||||
|
|
||||||
DSTAR PB7 output
|
|
||||||
DMR PB6 output
|
|
||||||
YSF PB8 output
|
|
||||||
P25 PB9 output
|
|
||||||
NXDN PB10 output
|
|
||||||
POCSAG PB11 output
|
|
||||||
|
|
||||||
RX PB0 analog input (ADC1_8)
|
|
||||||
RSSI PB1 analog input (ADC2_9)
|
|
||||||
TX PA4 analog output (DAC_OUT1)
|
|
||||||
|
|
||||||
EXT_CLK PA15 input (AF: TIM2_CH1_ETR)
|
|
||||||
|
|
||||||
USART1_TXD PA9 output (AF)
|
|
||||||
USART1_RXD PA10 input (AF)
|
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define PIN_PTT 12
|
|
||||||
#define PORT_PTT GPIOB
|
|
||||||
#define BB_PTT *((bitband_t)BITBAND_PERIPH(&PORT_PTT->ODR, PIN_PTT))
|
|
||||||
#define PIN_COSLED 5
|
|
||||||
#define PORT_COSLED GPIOB
|
|
||||||
#define BB_COSLED *((bitband_t)BITBAND_PERIPH(&PORT_COSLED->ODR, PIN_COSLED))
|
|
||||||
#define PIN_LED 4
|
|
||||||
#define PORT_LED GPIOB
|
|
||||||
#define BB_LED *((bitband_t)BITBAND_PERIPH(&PORT_LED->ODR, PIN_LED))
|
|
||||||
#define PIN_COS 13
|
|
||||||
#define PORT_COS GPIOB
|
|
||||||
#define BB_COS *((bitband_t)BITBAND_PERIPH(&PORT_COS->IDR, PIN_COS))
|
|
||||||
|
|
||||||
#define PIN_DSTAR 7
|
|
||||||
#define PORT_DSTAR GPIOB
|
|
||||||
#define BB_DSTAR *((bitband_t)BITBAND_PERIPH(&PORT_DSTAR->ODR, PIN_DSTAR))
|
|
||||||
#define PIN_DMR 6
|
|
||||||
#define PORT_DMR GPIOB
|
|
||||||
#define BB_DMR *((bitband_t)BITBAND_PERIPH(&PORT_DMR->ODR, PIN_DMR))
|
|
||||||
#define PIN_YSF 8
|
|
||||||
#define PORT_YSF GPIOB
|
|
||||||
#define BB_YSF *((bitband_t)BITBAND_PERIPH(&PORT_YSF->ODR, PIN_YSF))
|
|
||||||
#define PIN_P25 9
|
|
||||||
#define PORT_P25 GPIOB
|
|
||||||
#define BB_P25 *((bitband_t)BITBAND_PERIPH(&PORT_P25->ODR, PIN_P25))
|
|
||||||
#define PIN_NXDN 10
|
|
||||||
#define PORT_NXDN GPIOB
|
|
||||||
#define BB_NXDN *((bitband_t)BITBAND_PERIPH(&PORT_NXDN->ODR, PIN_NXDN))
|
|
||||||
#define PIN_POCSAG 11
|
|
||||||
#define PORT_POCSAG GPIOB
|
|
||||||
#define BB_POCSAG *((bitband_t)BITBAND_PERIPH(&PORT_POCSAG->ODR, PIN_POCSAG))
|
|
||||||
|
|
||||||
#define PIN_RX 0
|
|
||||||
#define PIN_RX_ADC_CH 8
|
|
||||||
#define PORT_RX GPIOB
|
|
||||||
#define PIN_RSSI 1
|
|
||||||
#define PIN_RSSI_ADC_CH 9
|
|
||||||
#define PORT_RSSI GPIOB
|
|
||||||
#define PIN_TX 4
|
|
||||||
#define PIN_TX_DAC_CH 1
|
|
||||||
#define PORT_TX GPIOA
|
|
||||||
|
|
||||||
#define PIN_EXT_CLK 15
|
|
||||||
#define SRC_EXT_CLK 15
|
|
||||||
#define PORT_EXT_CLK GPIOA
|
|
||||||
|
|
||||||
#define PIN_USART1_TXD 9
|
|
||||||
#define PORT_USART1_TXD GPIOA
|
|
||||||
#define PIN_USART1_RXD 10
|
|
||||||
#define PORT_USART1_RXD GPIOA
|
|
||||||
|
|
||||||
#else // defined(STM32F1_POG)
|
|
||||||
#error "Either STM32F1_POG, or sth need to be defined"
|
|
||||||
#endif // defined(STM32F1_POG)
|
|
||||||
|
|
||||||
const uint16_t DC_OFFSET = 2048U;
|
|
||||||
|
|
||||||
// Sampling frequency
|
|
||||||
#define SAMP_FREQ 24000
|
|
||||||
|
|
||||||
extern "C" {
|
|
||||||
void TIM2_IRQHandler() {
|
|
||||||
if ((TIM2->SR & TIM_SR_UIF) == TIM_SR_UIF) {
|
|
||||||
TIM2->SR = ~TIM_SR_UIF; // clear UI flag
|
|
||||||
io.interrupt();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void delay(uint32_t cnt)
|
|
||||||
{
|
|
||||||
while(cnt--)
|
|
||||||
asm("nop");
|
|
||||||
}
|
|
||||||
|
|
||||||
// source: http://www.freddiechopin.info/
|
|
||||||
void GPIOConfigPin(GPIO_TypeDef *port_ptr, uint32_t pin, uint32_t mode_cnf_value)
|
|
||||||
{
|
|
||||||
volatile uint32_t *cr_ptr;
|
|
||||||
uint32_t cr_value;
|
|
||||||
|
|
||||||
cr_ptr = &port_ptr->CRL; // configuration of pins [0,7] is in CRL
|
|
||||||
|
|
||||||
if (pin >= 8) // is pin in [8; 15]?
|
|
||||||
{ // configuration of pins [8,15] is in CRH
|
|
||||||
cr_ptr++; // advance to next struct element CRL -> CRH
|
|
||||||
pin -= 8; // crop the pin number
|
|
||||||
}
|
|
||||||
|
|
||||||
cr_value = *cr_ptr; // localize the CRL / CRH value
|
|
||||||
|
|
||||||
cr_value &= ~(0xF << (pin * 4)); // clear the MODE and CNF fields (now that pin is an analog input)
|
|
||||||
cr_value |= (mode_cnf_value << (pin * 4)); // save new MODE and CNF value for desired pin
|
|
||||||
|
|
||||||
*cr_ptr = cr_value; // save localized value to CRL / CRL
|
|
||||||
}
|
|
||||||
|
|
||||||
#if defined(STM32F1_POG)
|
|
||||||
void FancyLEDEffect()
|
|
||||||
{
|
|
||||||
bitband_t foo[] = {&BB_LED, &BB_COSLED, &BB_PTT, &BB_DMR, &BB_DSTAR, &BB_YSF, &BB_P25};
|
|
||||||
|
|
||||||
for(int i=0; i<7; i++){
|
|
||||||
*foo[i] = 0x01;
|
|
||||||
}
|
|
||||||
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1);
|
|
||||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
|
|
||||||
delay(SystemCoreClock/1000*100);
|
|
||||||
for(int i=0; i<7; i++){
|
|
||||||
*foo[i] = 0x00;
|
|
||||||
}
|
|
||||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
|
|
||||||
delay(SystemCoreClock/1000*20);
|
|
||||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
|
|
||||||
delay(SystemCoreClock/1000*10);
|
|
||||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
|
|
||||||
|
|
||||||
*foo[0] = 0x01;
|
|
||||||
for(int i=1; i<7; i++){
|
|
||||||
delay(SystemCoreClock/1000*10);
|
|
||||||
*foo[i-1] = 0x00;
|
|
||||||
*foo[i] = 0x01;
|
|
||||||
}
|
|
||||||
for(int i=5; i>=0; i--){
|
|
||||||
delay(SystemCoreClock/1000*10);
|
|
||||||
*foo[i+1] = 0x00;
|
|
||||||
*foo[i] = 0x01;
|
|
||||||
}
|
|
||||||
delay(SystemCoreClock/1000*10);
|
|
||||||
*foo[5+1-6] = 0x00;
|
|
||||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x00;
|
|
||||||
delay(SystemCoreClock/1000*10);
|
|
||||||
*((bitband_t)BITBAND_PERIPH(&PORT_USART1_TXD->ODR, PIN_USART1_TXD)) = 0x01;
|
|
||||||
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1|GPIO_CRL_CNF0_1);
|
|
||||||
delay(SystemCoreClock/1000*50);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
static inline void GPIOInit()
|
|
||||||
{
|
|
||||||
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN
|
|
||||||
| RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPDEN
|
|
||||||
| RCC_APB2ENR_AFIOEN; // enable all GPIOs
|
|
||||||
|
|
||||||
// set all ports to input with pull-down
|
|
||||||
GPIOA->CRL = 0x88888888;
|
|
||||||
GPIOA->CRH = 0x88888888;
|
|
||||||
GPIOA->ODR = 0;
|
|
||||||
GPIOB->CRL = 0x88888888;
|
|
||||||
GPIOB->CRH = 0x88888888;
|
|
||||||
GPIOB->ODR = 0;
|
|
||||||
GPIOC->CRL = 0x88888888;
|
|
||||||
GPIOC->CRH = 0x88888888;
|
|
||||||
GPIOC->ODR = 0;
|
|
||||||
GPIOD->CRL = 0x88888888;
|
|
||||||
GPIOD->CRH = 0x88888888;
|
|
||||||
GPIOD->ODR = 0;
|
|
||||||
|
|
||||||
// configure ports
|
|
||||||
GPIOConfigPin(PORT_PTT, PIN_PTT, GPIO_CRL_MODE0_1);
|
|
||||||
GPIOConfigPin(PORT_COSLED, PIN_COSLED, GPIO_CRL_MODE0_1);
|
|
||||||
GPIOConfigPin(PORT_LED, PIN_LED, GPIO_CRL_MODE0_1);
|
|
||||||
GPIOConfigPin(PORT_COS, PIN_COS, GPIO_CRL_CNF0_1);
|
|
||||||
|
|
||||||
GPIOConfigPin(PORT_DSTAR, PIN_DSTAR, GPIO_CRL_MODE0_1);
|
|
||||||
GPIOConfigPin(PORT_DMR, PIN_DMR, GPIO_CRL_MODE0_1);
|
|
||||||
GPIOConfigPin(PORT_YSF, PIN_YSF, GPIO_CRL_MODE0_1);
|
|
||||||
GPIOConfigPin(PORT_P25, PIN_P25, GPIO_CRL_MODE0_1);
|
|
||||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
|
||||||
GPIOConfigPin(PORT_NXDN, PIN_NXDN, GPIO_CRL_MODE0_1);
|
|
||||||
#endif
|
|
||||||
#if !defined(USE_ALTERNATE_M17_LEDS)
|
|
||||||
GPIOConfigPin(PORT_M17, PIN_M17, GPIO_CRL_MODE0_1);
|
|
||||||
#endif
|
|
||||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
|
||||||
GPIOConfigPin(PORT_POCSAG, PIN_POCSAG, GPIO_CRL_MODE0_1);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
GPIOConfigPin(PORT_RX, PIN_RX, 0);
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
GPIOConfigPin(PORT_RSSI, PIN_RSSI, 0);
|
|
||||||
#endif
|
|
||||||
GPIOConfigPin(PORT_TX, PIN_TX, 0);
|
|
||||||
|
|
||||||
#if defined(EXTERNAL_OSC)
|
|
||||||
#if defined(STM32F1_POG)
|
|
||||||
GPIOConfigPin(PORT_EXT_CLK, PIN_EXT_CLK, GPIO_CRL_CNF0_0);
|
|
||||||
AFIO->MAPR = (AFIO->MAPR & ~AFIO_MAPR_TIM2_REMAP) | AFIO_MAPR_TIM2_REMAP_0;
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
|
|
||||||
GPIOConfigPin(PORT_USART1_TXD, PIN_USART1_TXD, GPIO_CRL_MODE0_1|GPIO_CRL_CNF0_1);
|
|
||||||
GPIOConfigPin(PORT_USART1_RXD, PIN_USART1_RXD, GPIO_CRL_CNF0_0);
|
|
||||||
|
|
||||||
AFIO->MAPR = (AFIO->MAPR & ~AFIO_MAPR_SWJ_CFG) | AFIO_MAPR_SWJ_CFG_1;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static inline void ADCInit()
|
|
||||||
{
|
|
||||||
RCC->CFGR = (RCC->CFGR & ~RCC_CFGR_ADCPRE_Msk)
|
|
||||||
| RCC_CFGR_ADCPRE_DIV6; // ADC clock divided by 6 (72MHz/6 = 12MHz)
|
|
||||||
RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
RCC->APB2ENR |= RCC_APB2ENR_ADC2EN;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Init ADCs in dual mode (RSSI)
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
ADC1->CR1 = ADC_CR1_DUALMOD_1|ADC_CR1_DUALMOD_2; // Regular simultaneous mode
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Set sampling time to 7.5 cycles
|
|
||||||
if (PIN_RX_ADC_CH < 10) {
|
|
||||||
ADC1->SMPR2 = ADC_SMPR2_SMP0_0 << (3*PIN_RX_ADC_CH);
|
|
||||||
} else {
|
|
||||||
ADC1->SMPR1 = ADC_SMPR1_SMP10_0 << (3*PIN_RX_ADC_CH);
|
|
||||||
}
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
if (PIN_RSSI_ADC_CH < 10) {
|
|
||||||
ADC2->SMPR2 = ADC_SMPR2_SMP0_0 << (3*PIN_RSSI_ADC_CH);
|
|
||||||
} else {
|
|
||||||
ADC2->SMPR1 = ADC_SMPR1_SMP10_0 << (3*PIN_RSSI_ADC_CH);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Set conversion channel (single conversion)
|
|
||||||
ADC1->SQR3 = PIN_RX_ADC_CH;
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
ADC2->SQR3 = PIN_RSSI_ADC_CH;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Enable ADC
|
|
||||||
ADC1->CR2 |= ADC_CR2_ADON;
|
|
||||||
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
// Enable ADC2
|
|
||||||
ADC2->CR2 |= ADC_CR2_ADON;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Start calibration
|
|
||||||
delay(6*2);
|
|
||||||
ADC1->CR2 |= ADC_CR2_CAL;
|
|
||||||
while((ADC1->CR2 & ADC_CR2_CAL) == ADC_CR2_CAL)
|
|
||||||
;
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
ADC2->CR2 |= ADC_CR2_CAL;
|
|
||||||
while((ADC2->CR2 & ADC_CR2_CAL) == ADC_CR2_CAL)
|
|
||||||
;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Trigger first conversion
|
|
||||||
ADC1->CR2 |= ADC_CR2_ADON;
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
ADC2->CR2 |= ADC_CR2_ADON;
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static inline void DACInit()
|
|
||||||
{
|
|
||||||
RCC->APB1ENR |= RCC_APB1ENR_DACEN;
|
|
||||||
|
|
||||||
DAC->CR = DAC_CR_EN1;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static inline void TimerInit()
|
|
||||||
{
|
|
||||||
RCC->APB1ENR |= RCC_APB1ENR_TIM2EN;
|
|
||||||
|
|
||||||
#if defined(EXTERNAL_OSC)
|
|
||||||
// Enable external clock, prescaler /4
|
|
||||||
TIM2->SMCR = TIM_SMCR_ECE | TIM_SMCR_ETPS_1;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// TIM2 output frequency
|
|
||||||
TIM2->PSC = 0;
|
|
||||||
#if defined(EXTERNAL_OSC)
|
|
||||||
// TimerCount = ExternalOsc
|
|
||||||
// /4 (external clock prescaler)
|
|
||||||
// /SAMP_FREQ
|
|
||||||
TIM2->ARR = (uint16_t) ((EXTERNAL_OSC/(4*SAMP_FREQ)) - 1);
|
|
||||||
#else
|
|
||||||
TIM2->ARR = (uint16_t) ((SystemCoreClock/(SAMP_FREQ)) - 1);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Enable TIse 1%-tolerance comM2 interrupt
|
|
||||||
TIM2->DIER = TIM_DIER_UIE;
|
|
||||||
NVIC_EnableIRQ(TIM2_IRQn);
|
|
||||||
|
|
||||||
// Enable TIM2
|
|
||||||
TIM2->CR1 |= TIM_CR1_CEN;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void CIO::initInt()
|
|
||||||
{
|
|
||||||
GPIOInit();
|
|
||||||
ADCInit();
|
|
||||||
DACInit();
|
|
||||||
#if defined(STM32F1_POG)
|
|
||||||
FancyLEDEffect();
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::startInt()
|
|
||||||
{
|
|
||||||
TimerInit();
|
|
||||||
|
|
||||||
BB_COSLED = 0;
|
|
||||||
BB_LED = 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::interrupt()
|
|
||||||
{
|
|
||||||
TSample sample = {DC_OFFSET, MARK_NONE};
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
uint16_t rawRSSI = 0U;
|
|
||||||
#endif
|
|
||||||
bitband_t eoc = (bitband_t)BITBAND_PERIPH(&ADC1->SR, ADC_SR_EOS_Pos);
|
|
||||||
bitband_t adon = (bitband_t)BITBAND_PERIPH(&ADC1->CR2, ADC_CR2_ADON_Pos);
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
bitband_t rssi_adon = (bitband_t)BITBAND_PERIPH(&ADC2->CR2, ADC_CR2_ADON_Pos);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
if (*eoc) {
|
|
||||||
// trigger next conversion
|
|
||||||
*adon = 1;
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
*rssi_adon = 1;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
m_txBuffer.get(sample);
|
|
||||||
DAC->DHR12R1 = sample.sample; // Send the value to the DAC
|
|
||||||
|
|
||||||
// Read value from ADC1 and ADC2
|
|
||||||
sample.sample = ADC1->DR; // read conversion result; EOC is cleared by this read
|
|
||||||
m_rxBuffer.put(sample);
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
rawRSSI = ADC2->DR;
|
|
||||||
m_rssiBuffer.put(rawRSSI);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
m_watchdog++;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
bool CIO::getCOSInt()
|
|
||||||
{
|
|
||||||
return BB_COS;
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setLEDInt(bool on)
|
|
||||||
{
|
|
||||||
BB_LED = !!on;
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setPTTInt(bool on)
|
|
||||||
{
|
|
||||||
BB_PTT = !!on;
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setCOSInt(bool on)
|
|
||||||
{
|
|
||||||
BB_COSLED = !!on;
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setDStarInt(bool on)
|
|
||||||
{
|
|
||||||
BB_DSTAR = !!on;
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setDMRInt(bool on)
|
|
||||||
{
|
|
||||||
BB_DMR = !!on;
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setYSFInt(bool on)
|
|
||||||
{
|
|
||||||
BB_YSF = !!on;
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setP25Int(bool on)
|
|
||||||
{
|
|
||||||
BB_P25 = !!on;
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setNXDNInt(bool on)
|
|
||||||
{
|
|
||||||
#if defined(USE_ALTERNATE_NXDN_LEDS)
|
|
||||||
BB_YSF = !!on;
|
|
||||||
BB_P25 = !!on;
|
|
||||||
#else
|
|
||||||
BB_NXDN = !!on;
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setM17Int(bool on)
|
|
||||||
{
|
|
||||||
#if defined(USE_ALTERNATE_M17_LEDS)
|
|
||||||
BB_DSTAR = !!on;
|
|
||||||
BB_P25 = !!on;
|
|
||||||
#else
|
|
||||||
BB_M17 = !!on;
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setPOCSAGInt(bool on)
|
|
||||||
{
|
|
||||||
#if defined(USE_ALTERNATE_POCSAG_LEDS)
|
|
||||||
BB_DSTAR = !!on;
|
|
||||||
BB_DMR = !!on;
|
|
||||||
#else
|
|
||||||
BB_POCSAG = !!on;
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setFMInt(bool on)
|
|
||||||
{
|
|
||||||
#if defined(USE_ALTERNATE_FM_LEDS)
|
|
||||||
BB_DSTAR = !!on;
|
|
||||||
BB_YSF = !!on;
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::delayInt(unsigned int dly)
|
|
||||||
{
|
|
||||||
delay(dly);
|
|
||||||
}
|
|
||||||
|
|
||||||
uint8_t CIO::getCPU() const
|
|
||||||
{
|
|
||||||
return 2U;
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::getUDID(uint8_t* buffer)
|
|
||||||
{
|
|
||||||
#if defined(STM32F105xC)
|
|
||||||
::memcpy(buffer, (void *)0x1FFFF7E8, 12U);
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
289
IOTeensy.cpp
289
IOTeensy.cpp
|
|
@ -1,289 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (C) 2016,2017,2018,2020 by Jonathan Naylor G4KLX
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "Config.h"
|
|
||||||
#include "Globals.h"
|
|
||||||
#include "IO.h"
|
|
||||||
|
|
||||||
#if defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
|
|
||||||
|
|
||||||
#if defined(EXTERNAL_OSC)
|
|
||||||
#define PIN_LED 3
|
|
||||||
#else
|
|
||||||
#define PIN_LED 13
|
|
||||||
#endif
|
|
||||||
#define PIN_COS 4
|
|
||||||
#define PIN_PTT 5
|
|
||||||
#define PIN_COSLED 6
|
|
||||||
#define PIN_DSTAR 9
|
|
||||||
#define PIN_DMR 10
|
|
||||||
#define PIN_YSF 11
|
|
||||||
#define PIN_P25 12
|
|
||||||
#if defined(__MK20DX256__)
|
|
||||||
#define PIN_NXDN 2
|
|
||||||
#define PIN_POCSAG 3
|
|
||||||
#define PIN_FM 4
|
|
||||||
#else
|
|
||||||
#define PIN_NXDN 24
|
|
||||||
#define PIN_POCSAG 25
|
|
||||||
#define PIN_FM 26
|
|
||||||
#endif
|
|
||||||
#define PIN_ADC 5 // A0, Pin 14
|
|
||||||
#define PIN_RSSI 4 // Teensy 3.5/3.6, A16, Pin 35. Teensy 3.1/3.2, A17, Pin 28
|
|
||||||
|
|
||||||
#define PDB_CHnC1_TOS 0x0100
|
|
||||||
#define PDB_CHnC1_EN 0x0001
|
|
||||||
|
|
||||||
const uint16_t DC_OFFSET = 2048U;
|
|
||||||
|
|
||||||
extern "C" {
|
|
||||||
void adc0_isr()
|
|
||||||
{
|
|
||||||
io.interrupt();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::initInt()
|
|
||||||
{
|
|
||||||
// Set up the TX, COS and LED pins
|
|
||||||
pinMode(PIN_PTT, OUTPUT);
|
|
||||||
pinMode(PIN_COSLED, OUTPUT);
|
|
||||||
pinMode(PIN_LED, OUTPUT);
|
|
||||||
pinMode(PIN_COS, INPUT);
|
|
||||||
|
|
||||||
#if defined(MODE_LEDS)
|
|
||||||
// Set up the mode output pins
|
|
||||||
pinMode(PIN_DSTAR, OUTPUT);
|
|
||||||
pinMode(PIN_DMR, OUTPUT);
|
|
||||||
pinMode(PIN_YSF, OUTPUT);
|
|
||||||
pinMode(PIN_P25, OUTPUT);
|
|
||||||
#if !defined(USE_ALTERNATE_NXDN_LEDS)
|
|
||||||
pinMode(PIN_NXDN, OUTPUT);
|
|
||||||
#endif
|
|
||||||
#if !defined(USE_ALTERNATE_M17_LEDS)
|
|
||||||
pinMode(PIN_M17, OUTPUT);
|
|
||||||
#endif
|
|
||||||
#if !defined(USE_ALTERNATE_POCSAG_LEDS)
|
|
||||||
pinMode(PIN_POCSAG, OUTPUT);
|
|
||||||
#endif
|
|
||||||
#if !defined(USE_ALTERNATE_FM_LEDS)
|
|
||||||
pinMode(PIN_FM, OUTPUT);
|
|
||||||
#endif
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::startInt()
|
|
||||||
{
|
|
||||||
// Initialise the DAC
|
|
||||||
SIM_SCGC2 |= SIM_SCGC2_DAC0;
|
|
||||||
DAC0_C0 = DAC_C0_DACEN | DAC_C0_DACRFS; // 3.3V VDDA is DACREF_2
|
|
||||||
|
|
||||||
// Initialise ADC0
|
|
||||||
SIM_SCGC6 |= SIM_SCGC6_ADC0;
|
|
||||||
ADC0_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
|
|
||||||
ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
|
|
||||||
ADC0_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
|
|
||||||
ADC0_SC2 = ADC_SC2_REFSEL(0) | ADC_SC2_ADTRG; // Voltage ref external, hardware trigger
|
|
||||||
ADC0_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
|
|
||||||
|
|
||||||
ADC0_SC3 |= ADC_SC3_CAL;
|
|
||||||
while (ADC0_SC3 & ADC_SC3_CAL) // Wait for calibration
|
|
||||||
;
|
|
||||||
|
|
||||||
uint16_t sum0 = ADC0_CLPS + ADC0_CLP4 + ADC0_CLP3 + // Plus side gain
|
|
||||||
ADC0_CLP2 + ADC0_CLP1 + ADC0_CLP0;
|
|
||||||
sum0 = (sum0 / 2U) | 0x8000U;
|
|
||||||
ADC0_PG = sum0;
|
|
||||||
|
|
||||||
ADC0_SC1A = ADC_SC1_AIEN | PIN_ADC; // Enable ADC interrupt, use A0
|
|
||||||
NVIC_ENABLE_IRQ(IRQ_ADC0);
|
|
||||||
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
// Initialise ADC1
|
|
||||||
SIM_SCGC3 |= SIM_SCGC3_ADC1;
|
|
||||||
ADC1_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
|
|
||||||
ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
|
|
||||||
ADC1_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
|
|
||||||
ADC1_SC2 = ADC_SC2_REFSEL(0); // Voltage ref external, software trigger
|
|
||||||
ADC1_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
|
|
||||||
|
|
||||||
ADC1_SC3 |= ADC_SC3_CAL;
|
|
||||||
while (ADC1_SC3 & ADC_SC3_CAL) // Wait for calibration
|
|
||||||
;
|
|
||||||
|
|
||||||
uint16_t sum1 = ADC1_CLPS + ADC1_CLP4 + ADC1_CLP3 + // Plus side gain
|
|
||||||
ADC1_CLP2 + ADC1_CLP1 + ADC1_CLP0;
|
|
||||||
sum1 = (sum1 / 2U) | 0x8000U;
|
|
||||||
ADC1_PG = sum1;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(EXTERNAL_OSC)
|
|
||||||
// Set ADC0 to trigger from the LPTMR at 24 kHz
|
|
||||||
SIM_SOPT7 = SIM_SOPT7_ADC0ALTTRGEN | // Enable ADC0 alternate trigger
|
|
||||||
SIM_SOPT7_ADC0TRGSEL(14); // Trigger ADC0 by LPTMR0
|
|
||||||
|
|
||||||
CORE_PIN13_CONFIG = PORT_PCR_MUX(3);
|
|
||||||
|
|
||||||
SIM_SCGC5 |= SIM_SCGC5_LPTIMER; // Enable Low Power Timer Access
|
|
||||||
LPTMR0_CSR = 0; // Disable
|
|
||||||
LPTMR0_PSR = LPTMR_PSR_PBYP; // Bypass prescaler/filter
|
|
||||||
LPTMR0_CMR = (EXTERNAL_OSC / 24000) - 1; // Frequency divided by CMR + 1
|
|
||||||
LPTMR0_CSR = LPTMR_CSR_TPS(2) | // Pin: 0=CMP0, 1=xtal, 2=pin13
|
|
||||||
LPTMR_CSR_TMS; // Mode Select, 0=timer, 1=counter
|
|
||||||
LPTMR0_CSR |= LPTMR_CSR_TEN; // Enable
|
|
||||||
#else
|
|
||||||
// Setup PDB for ADC0 at 24 kHz
|
|
||||||
SIM_SCGC6 |= SIM_SCGC6_PDB; // Enable PDB clock
|
|
||||||
PDB0_MOD = (F_BUS / 24000) - 1; // Timer period - 1
|
|
||||||
PDB0_IDLY = 0; // Interrupt delay
|
|
||||||
PDB0_CH0C1 = PDB_CHnC1_TOS | PDB_CHnC1_EN; // Enable pre-trigger for ADC0
|
|
||||||
PDB0_SC = PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | // SW trigger, enable interrupts, continuous mode
|
|
||||||
PDB_SC_PDBIE | PDB_SC_CONT | PDB_SC_LDOK; // No prescaling
|
|
||||||
PDB0_SC |= PDB_SC_SWTRIG; // Software trigger (reset and restart counter)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
digitalWrite(PIN_PTT, m_pttInvert ? HIGH : LOW);
|
|
||||||
digitalWrite(PIN_COSLED, LOW);
|
|
||||||
digitalWrite(PIN_LED, HIGH);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::interrupt()
|
|
||||||
{
|
|
||||||
TSample sample = {DC_OFFSET, MARK_NONE};
|
|
||||||
|
|
||||||
m_txBuffer.get(sample);
|
|
||||||
*(int16_t *)&(DAC0_DAT0L) = sample.sample;
|
|
||||||
|
|
||||||
if ((ADC0_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
|
|
||||||
sample.sample = ADC0_RA;
|
|
||||||
m_rxBuffer.put(sample);
|
|
||||||
}
|
|
||||||
|
|
||||||
#if defined(SEND_RSSI_DATA)
|
|
||||||
if ((ADC1_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO) {
|
|
||||||
uint16_t rssi = ADC1_RA;
|
|
||||||
m_rssiBuffer.put(rssi);
|
|
||||||
} else {
|
|
||||||
m_rssiBuffer.put(0U);
|
|
||||||
}
|
|
||||||
|
|
||||||
ADC1_SC1A = PIN_RSSI; // Start the next RSSI conversion
|
|
||||||
#else
|
|
||||||
m_rssiBuffer.put(0U);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
m_watchdog++;
|
|
||||||
}
|
|
||||||
|
|
||||||
bool CIO::getCOSInt()
|
|
||||||
{
|
|
||||||
return digitalRead(PIN_COS) == HIGH;
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setLEDInt(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_LED, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setPTTInt(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_PTT, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setCOSInt(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_COSLED, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setDStarInt(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setDMRInt(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_DMR, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setYSFInt(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setP25Int(bool on)
|
|
||||||
{
|
|
||||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setNXDNInt(bool on)
|
|
||||||
{
|
|
||||||
#if defined(USE_ALTERNATE_NXDN_LEDS)
|
|
||||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
|
||||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
|
||||||
#else
|
|
||||||
digitalWrite(PIN_NXDN, on ? HIGH : LOW);
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setM17Int(bool on)
|
|
||||||
{
|
|
||||||
#if defined(USE_ALTERNATE_M17_LEDS)
|
|
||||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
|
||||||
digitalWrite(PIN_P25, on ? HIGH : LOW);
|
|
||||||
#else
|
|
||||||
digitalWrite(PIN_M17, on ? HIGH : LOW);
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setPOCSAGInt(bool on)
|
|
||||||
{
|
|
||||||
#if defined(USE_ALTERNATE_POCSAG_LEDS)
|
|
||||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
|
||||||
digitalWrite(PIN_DMR, on ? HIGH : LOW);
|
|
||||||
#else
|
|
||||||
digitalWrite(PIN_POCSAG, on ? HIGH : LOW);
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::setFMInt(bool on)
|
|
||||||
{
|
|
||||||
#if defined(USE_ALTERNATE_FM_LEDS)
|
|
||||||
digitalWrite(PIN_DSTAR, on ? HIGH : LOW);
|
|
||||||
digitalWrite(PIN_YSF, on ? HIGH : LOW);
|
|
||||||
#else
|
|
||||||
digitalWrite(PIN_FM, on ? HIGH : LOW);
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::delayInt(unsigned int dly)
|
|
||||||
{
|
|
||||||
delay(dly);
|
|
||||||
}
|
|
||||||
|
|
||||||
uint8_t CIO::getCPU() const
|
|
||||||
{
|
|
||||||
return 1U;
|
|
||||||
}
|
|
||||||
|
|
||||||
void CIO::getUDID(uint8_t* buffer)
|
|
||||||
{
|
|
||||||
::memcpy(buffer, (void *)0x4058, 16U);
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
207
MMDVM.ino
207
MMDVM.ino
|
|
@ -1,207 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (C) 2015,2016,2017,2018,2020,2021 by Jonathan Naylor G4KLX
|
|
||||||
* Copyright (C) 2016 by Colin Durbridge G4EML
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "Config.h"
|
|
||||||
#include "Globals.h"
|
|
||||||
|
|
||||||
// Global variables
|
|
||||||
MMDVM_STATE m_modemState = STATE_IDLE;
|
|
||||||
|
|
||||||
bool m_dstarEnable = true;
|
|
||||||
bool m_dmrEnable = true;
|
|
||||||
bool m_ysfEnable = true;
|
|
||||||
bool m_p25Enable = true;
|
|
||||||
bool m_nxdnEnable = true;
|
|
||||||
bool m_m17Enable = true;
|
|
||||||
bool m_pocsagEnable = true;
|
|
||||||
bool m_fmEnable = true;
|
|
||||||
bool m_ax25Enable = true;
|
|
||||||
|
|
||||||
bool m_duplex = true;
|
|
||||||
|
|
||||||
bool m_tx = false;
|
|
||||||
bool m_dcd = false;
|
|
||||||
|
|
||||||
#if defined(MODE_DSTAR)
|
|
||||||
CDStarRX dstarRX;
|
|
||||||
CDStarTX dstarTX;
|
|
||||||
|
|
||||||
CCalDStarRX calDStarRX;
|
|
||||||
CCalDStarTX calDStarTX;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_DMR)
|
|
||||||
CDMRIdleRX dmrIdleRX;
|
|
||||||
CDMRRX dmrRX;
|
|
||||||
CDMRTX dmrTX;
|
|
||||||
|
|
||||||
CDMRDMORX dmrDMORX;
|
|
||||||
CDMRDMOTX dmrDMOTX;
|
|
||||||
|
|
||||||
CCalDMR calDMR;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_YSF)
|
|
||||||
CYSFRX ysfRX;
|
|
||||||
CYSFTX ysfTX;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_P25)
|
|
||||||
CP25RX p25RX;
|
|
||||||
CP25TX p25TX;
|
|
||||||
|
|
||||||
CCalP25 calP25;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_NXDN)
|
|
||||||
CNXDNRX nxdnRX;
|
|
||||||
CNXDNTX nxdnTX;
|
|
||||||
|
|
||||||
CCalNXDN calNXDN;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_M17)
|
|
||||||
CM17RX m17RX;
|
|
||||||
CM17TX m17TX;
|
|
||||||
|
|
||||||
CCalM17 calM17;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_POCSAG)
|
|
||||||
CPOCSAGTX pocsagTX;
|
|
||||||
CCalPOCSAG calPOCSAG;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_FM)
|
|
||||||
CFM fm;
|
|
||||||
CCalFM calFM;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_AX25)
|
|
||||||
CAX25RX ax25RX;
|
|
||||||
CAX25TX ax25TX;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
CCalRSSI calRSSI;
|
|
||||||
|
|
||||||
CCWIdTX cwIdTX;
|
|
||||||
|
|
||||||
CSerialPort serial;
|
|
||||||
CIO io;
|
|
||||||
|
|
||||||
void setup()
|
|
||||||
{
|
|
||||||
serial.start();
|
|
||||||
}
|
|
||||||
|
|
||||||
void loop()
|
|
||||||
{
|
|
||||||
serial.process();
|
|
||||||
|
|
||||||
io.process();
|
|
||||||
|
|
||||||
// The following is for transmitting
|
|
||||||
#if defined(MODE_DSTAR)
|
|
||||||
if (m_dstarEnable && m_modemState == STATE_DSTAR)
|
|
||||||
dstarTX.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_DMR)
|
|
||||||
if (m_dmrEnable && m_modemState == STATE_DMR) {
|
|
||||||
if (m_duplex)
|
|
||||||
dmrTX.process();
|
|
||||||
else
|
|
||||||
dmrDMOTX.process();
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_YSF)
|
|
||||||
if (m_ysfEnable && m_modemState == STATE_YSF)
|
|
||||||
ysfTX.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_P25)
|
|
||||||
if (m_p25Enable && m_modemState == STATE_P25)
|
|
||||||
p25TX.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_NXDN)
|
|
||||||
if (m_nxdnEnable && m_modemState == STATE_NXDN)
|
|
||||||
nxdnTX.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_M17)
|
|
||||||
if (m_m17Enable && m_modemState == STATE_M17)
|
|
||||||
m17TX.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_POCSAG)
|
|
||||||
if (m_pocsagEnable && (m_modemState == STATE_POCSAG || pocsagTX.busy()))
|
|
||||||
pocsagTX.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_AX25)
|
|
||||||
if (m_ax25Enable && (m_modemState == STATE_IDLE || m_modemState == STATE_FM))
|
|
||||||
ax25TX.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_FM)
|
|
||||||
if (m_fmEnable && m_modemState == STATE_FM)
|
|
||||||
fm.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_DSTAR)
|
|
||||||
if (m_modemState == STATE_DSTARCAL)
|
|
||||||
calDStarTX.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_DMR)
|
|
||||||
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMRCAL1K || m_modemState == STATE_DMRDMO1K)
|
|
||||||
calDMR.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_FM)
|
|
||||||
if (m_modemState == STATE_FMCAL10K || m_modemState == STATE_FMCAL12K || m_modemState == STATE_FMCAL15K || m_modemState == STATE_FMCAL20K || m_modemState == STATE_FMCAL25K || m_modemState == STATE_FMCAL30K)
|
|
||||||
calFM.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_P25)
|
|
||||||
if (m_modemState == STATE_P25CAL1K)
|
|
||||||
calP25.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_NXDN)
|
|
||||||
if (m_modemState == STATE_NXDNCAL1K)
|
|
||||||
calNXDN.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_M17)
|
|
||||||
if (m_modemState == STATE_M17CAL)
|
|
||||||
calM17.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(MODE_POCSAG)
|
|
||||||
if (m_modemState == STATE_POCSAGCAL)
|
|
||||||
calPOCSAG.process();
|
|
||||||
#endif
|
|
||||||
|
|
||||||
if (m_modemState == STATE_IDLE)
|
|
||||||
cwIdTX.process();
|
|
||||||
}
|
|
||||||
|
|
||||||
189
Makefile.Arduino
189
Makefile.Arduino
|
|
@ -1,189 +0,0 @@
|
||||||
#!/usr/bin/make
|
|
||||||
# makefile for the arduino due (works with arduino IDE 1.6.12)
|
|
||||||
#
|
|
||||||
# The original file can be found at https://github.com/pauldreik/arduino-due-makefile
|
|
||||||
#
|
|
||||||
# USAGE: put this file in the same dir as your .ino file is.
|
|
||||||
# configure the PORT variable and ADIR at the top of the file
|
|
||||||
# to match your local configuration.
|
|
||||||
# Type make upload to compile and upload.
|
|
||||||
#
|
|
||||||
|
|
||||||
#user specific settings:
|
|
||||||
#where to find the IDE
|
|
||||||
ADIR:=$(HOME)/.arduino15
|
|
||||||
#which serial port to use (add a file with SUBSYSTEMS=="usb",
|
|
||||||
#ATTRS{product}=="Arduino Due Prog. Port", ATTRS{idProduct}=="003d",
|
|
||||||
#ATTRS{idVendor}=="2341", SYMLINK+="arduino_due" in /etc/udev/rules.d/
|
|
||||||
#to get this working). Do not prefix the port with /dev/, just take
|
|
||||||
#the basename.
|
|
||||||
PORT:=ttyACM0
|
|
||||||
#if you want to verify the bossac upload, define this to -v
|
|
||||||
VERIFY:=-v
|
|
||||||
|
|
||||||
|
|
||||||
#end of user configuration.
|
|
||||||
|
|
||||||
|
|
||||||
#then some general settings. They should not be necessary to modify.
|
|
||||||
#CXX:=$(ADIR)/tools/g++_arm_none_eabi/bin/arm-none-eabi-g++
|
|
||||||
CXX:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-g++
|
|
||||||
#CC:=$(ADIR)/tools/g++_arm_none_eabi/bin/arm-none-eabi-gcc
|
|
||||||
CC:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-gcc
|
|
||||||
OBJCOPY:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-objcopy
|
|
||||||
|
|
||||||
C:=$(CC)
|
|
||||||
#SAM:=arduino/sam/
|
|
||||||
SAM:=$(ADIR)/packages/arduino/hardware/sam/1.6.12
|
|
||||||
#CMSIS:=arduino/sam/system/CMSIS/
|
|
||||||
#LIBSAM:=arduino/sam/system/libsam
|
|
||||||
TMPDIR:=$(PWD)/build
|
|
||||||
AR:=$(ADIR)/tools/g++_arm_none_eabi/bin/arm-none-eabi-ar
|
|
||||||
AR:=$(ADIR)/packages/arduino/tools/arm-none-eabi-gcc/4.8.3-2014q1/bin/arm-none-eabi-ar
|
|
||||||
|
|
||||||
|
|
||||||
#all these values are hard coded and should maybe be configured somehow else,
|
|
||||||
#like olikraus does in his makefile.
|
|
||||||
DEFINES:=-Dprintf=iprintf -DF_CPU=84000000 -DARDUINO=10611 -D__SAM3X8E__ -DUSB_PID=0x003e -DUSB_VID=0x2341 -DUSBCON \
|
|
||||||
-DARDUINO_SAM_DUE -DARDUINO_ARCH_SAM '-DUSB_MANUFACTURER="Arduino LLC"' '-DUSB_PRODUCT="Arduino Due"' \
|
|
||||||
-DMADEBYMAKEFILE
|
|
||||||
|
|
||||||
INCLUDES:=-I$(SAM)/system/libsam -I$(SAM)/system/CMSIS/CMSIS/Include/ \
|
|
||||||
-I$(SAM)/system/CMSIS/Device/ATMEL/ -I$(SAM)/cores/arduino \
|
|
||||||
-I$(SAM)/variants/arduino_due_x
|
|
||||||
|
|
||||||
#also include the current dir for convenience
|
|
||||||
INCLUDES += -I.
|
|
||||||
|
|
||||||
#compilation flags common to both c and c++
|
|
||||||
COMMON_FLAGS:=-g -Os -w -ffunction-sections -fdata-sections -nostdlib \
|
|
||||||
--param max-inline-insns-single=500 -mcpu=cortex-m3 -mthumb \
|
|
||||||
-fno-threadsafe-statics
|
|
||||||
#for compiling c (do not warn, this is not our code)
|
|
||||||
CFLAGS:=$(COMMON_FLAGS) -std=gnu11
|
|
||||||
#for compiling c++
|
|
||||||
CXXFLAGS:=$(COMMON_FLAGS) -fno-rtti -fno-exceptions -std=gnu++11 -Wall -Wextra
|
|
||||||
|
|
||||||
#let the results be named after the project
|
|
||||||
PROJNAME:=$(shell basename *.ino .ino)
|
|
||||||
|
|
||||||
#we will make a new mainfile from the ino file.
|
|
||||||
NEWMAINFILE:=$(TMPDIR)/$(PROJNAME).ino.cpp
|
|
||||||
|
|
||||||
#our own sourcefiles is the (converted) ino file and any local cpp files
|
|
||||||
MYSRCFILES:=$(NEWMAINFILE) $(shell ls *.cpp 2>/dev/null)
|
|
||||||
MYOBJFILES:=$(addsuffix .o,$(addprefix $(TMPDIR)/,$(notdir $(MYSRCFILES))))
|
|
||||||
|
|
||||||
#These source files are the ones forming core.a
|
|
||||||
CORESRCXX:=$(shell ls ${SAM}/cores/arduino/*.cpp ${SAM}/cores/arduino/USB/*.cpp ${SAM}/variants/arduino_due_x/variant.cpp)
|
|
||||||
CORESRC:=$(shell ls ${SAM}/cores/arduino/*.c)
|
|
||||||
|
|
||||||
#hey this one is needed too: $(SAM)/cores/arduino/wiring_pulse_asm.S" add -x assembler-with-cpp
|
|
||||||
#and this one: /1.6.11/cores/arduino/avr/dtostrf.c but it seems to work
|
|
||||||
#anyway, probably because I do not use that functionality.
|
|
||||||
|
|
||||||
#convert the core source files to object files. assume no clashes.
|
|
||||||
COREOBJSXX:=$(addprefix $(TMPDIR)/core/,$(notdir $(CORESRCXX)) )
|
|
||||||
COREOBJSXX:=$(addsuffix .o,$(COREOBJSXX))
|
|
||||||
COREOBJS:=$(addprefix $(TMPDIR)/core/,$(notdir $(CORESRC)) )
|
|
||||||
COREOBJS:=$(addsuffix .o,$(COREOBJS))
|
|
||||||
|
|
||||||
default:
|
|
||||||
@echo default rule, does nothing. Try make compile or make upload.
|
|
||||||
|
|
||||||
#This rule is good to just make sure stuff compiles, without having to wait
|
|
||||||
#for bossac.
|
|
||||||
compile: GitVersion.h $(TMPDIR)/$(PROJNAME).elf $(TMPDIR)/$(PROJNAME).bin
|
|
||||||
|
|
||||||
#This is a make rule template to create object files from the source files.
|
|
||||||
# arg 1=src file
|
|
||||||
# arg 2=object file
|
|
||||||
# arg 3= XX if c++, empty if c
|
|
||||||
define OBJ_template
|
|
||||||
$(2): $(1)
|
|
||||||
$(C$(3)) -MD -c $(C$(3)FLAGS) $(DEFINES) $(INCLUDES) $(1) -o $(2)
|
|
||||||
endef
|
|
||||||
#now invoke the template both for c++ sources
|
|
||||||
$(foreach src,$(CORESRCXX), $(eval $(call OBJ_template,$(src),$(addsuffix .o,$(addprefix $(TMPDIR)/core/,$(notdir $(src)))),XX) ) )
|
|
||||||
#...and for c sources:
|
|
||||||
$(foreach src,$(CORESRC), $(eval $(call OBJ_template,$(src),$(addsuffix .o,$(addprefix $(TMPDIR)/core/,$(notdir $(src)))),) ) )
|
|
||||||
|
|
||||||
#and our own c++ sources
|
|
||||||
$(foreach src,$(MYSRCFILES), $(eval $(call OBJ_template,$(src),$(addsuffix .o,$(addprefix $(TMPDIR)/,$(notdir $(src)))),XX) ) )
|
|
||||||
|
|
||||||
|
|
||||||
clean:
|
|
||||||
test ! -d $(TMPDIR) || rm -rf $(TMPDIR)
|
|
||||||
$(RM) GitVersion.h
|
|
||||||
|
|
||||||
.PHONY: .FORCE upload default
|
|
||||||
|
|
||||||
$(TMPDIR):
|
|
||||||
mkdir -p $(TMPDIR)
|
|
||||||
|
|
||||||
$(TMPDIR)/core:
|
|
||||||
mkdir -p $(TMPDIR)/core
|
|
||||||
|
|
||||||
#creates the cpp file from the .ino file
|
|
||||||
$(NEWMAINFILE): $(PROJNAME).ino
|
|
||||||
cat $(SAM)/cores/arduino/main.cpp > $(NEWMAINFILE)
|
|
||||||
cat $(PROJNAME).ino >> $(NEWMAINFILE)
|
|
||||||
echo 'extern "C" void __cxa_pure_virtual() {while (true);}' >> $(NEWMAINFILE)
|
|
||||||
|
|
||||||
#include the dependencies for our own files
|
|
||||||
-include $(MYOBJFILES:.o=.d)
|
|
||||||
|
|
||||||
#create the core library from the core objects. Do this EXACTLY as the
|
|
||||||
#arduino IDE does it, seems *really* picky about this.
|
|
||||||
#Sorry for the hard coding.
|
|
||||||
$(TMPDIR)/core.a: $(TMPDIR)/core $(COREOBJS) $(COREOBJSXX)
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_shift.c.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_analog.c.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/itoa.c.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/cortex_handlers.c.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/hooks.c.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring.c.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/WInterrupts.c.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/syscalls_sam3.c.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/iar_calls_sam3.c.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_digital.c.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/Print.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/USARTClass.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/WString.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/PluggableUSB.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/USBCore.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/CDC.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/wiring_pulse.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/UARTClass.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/main.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/new.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/watchdog.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/Stream.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/RingBuffer.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/IPAddress.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/Reset.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/WMath.cpp.o
|
|
||||||
$(AR) rcs $(TMPDIR)/core.a $(TMPDIR)/core/variant.cpp.o
|
|
||||||
|
|
||||||
#link our own object files with core to form the elf file
|
|
||||||
$(TMPDIR)/$(PROJNAME).elf: $(TMPDIR)/core.a $(TMPDIR)/core/syscalls_sam3.c.o $(MYOBJFILES)
|
|
||||||
$(CC) -mcpu=cortex-m3 -mthumb -Os -Wl,--gc-sections -T$(SAM)/variants/arduino_due_x/linker_scripts/gcc/flash.ld -Wl,-Map,$(NEWMAINFILE).map -o $@ -L$(TMPDIR) -Wl,--cref -Wl,--check-sections -Wl,--gc-sections -Wl,--entry=Reset_Handler -Wl,--unresolved-symbols=report-all -Wl,--warn-common -Wl,--warn-section-align -Wl,--start-group -u _sbrk -u link -u _close -u _fstat -u _isatty -u _lseek -u _read -u _write -u _exit -u kill -u _getpid $(MYOBJFILES) $(TMPDIR)/core/variant.cpp.o $(SAM)/variants/arduino_due_x/libsam_sam3x8e_gcc_rel.a $(SAM)/system/CMSIS/CMSIS/Lib/GCC/libarm_cortexM3l_math.a $(TMPDIR)/core.a -Wl,--end-group -lm -gcc
|
|
||||||
|
|
||||||
#copy from the hex to our bin file (why?)
|
|
||||||
$(TMPDIR)/$(PROJNAME).bin: $(TMPDIR)/$(PROJNAME).elf
|
|
||||||
$(OBJCOPY) -O binary $< $@
|
|
||||||
|
|
||||||
#upload to the arduino by first resetting it (stty) and the running bossac
|
|
||||||
upload: compile
|
|
||||||
stty -F /dev/$(PORT) cs8 1200 hupcl
|
|
||||||
$(ADIR)/packages/arduino/tools/bossac/1.6.1-arduino/bossac -i --port=$(PORT) -U false -e -w $(VERIFY) -b $(TMPDIR)/$(PROJNAME).bin -R
|
|
||||||
|
|
||||||
# Export the current git version if the index file exists, else 000...
|
|
||||||
GitVersion.h: .FORCE
|
|
||||||
ifneq ("$(wildcard .git/index)","")
|
|
||||||
echo "#define GITVERSION \"$(shell git rev-parse --short HEAD)\"" > $@
|
|
||||||
else
|
|
||||||
echo "#define GITVERSION \"0000000\"" > $@
|
|
||||||
endif
|
|
||||||
|
|
||||||
.FORCE:
|
|
||||||
165
Makefile.CMSIS
165
Makefile.CMSIS
|
|
@ -1,165 +0,0 @@
|
||||||
# The name for the project
|
|
||||||
TARGET:=mmdvm
|
|
||||||
|
|
||||||
# The CPU architecture (will be used for -mcpu)
|
|
||||||
MCPU:=cortex-m3
|
|
||||||
MCU:=STM32F105xC
|
|
||||||
|
|
||||||
# The source files of the project
|
|
||||||
CSRC:=
|
|
||||||
CXXSRC:=$(wildcard *.cpp)
|
|
||||||
|
|
||||||
# Include directory for the system include files and system source file
|
|
||||||
SYSDIR:=system_stm32f1xx
|
|
||||||
SYSSRC:=$(SYSDIR)/system_stm32f1xx.c
|
|
||||||
|
|
||||||
# Other include directories
|
|
||||||
INCDIR:=
|
|
||||||
|
|
||||||
# Definitions
|
|
||||||
CDEFS:=
|
|
||||||
CXXDEFS:=
|
|
||||||
|
|
||||||
# The name of the startup file which matches to the architecture (MCPU)
|
|
||||||
STARTUP:=$(SYSDIR)/startup_stm32f105xc.S
|
|
||||||
STARTUP_DEFS=
|
|
||||||
|
|
||||||
# Include directory for CMSIS
|
|
||||||
CMSISDIR:=STM32F10X_Lib/CMSIS
|
|
||||||
|
|
||||||
# Libraries
|
|
||||||
LIBDIR:=
|
|
||||||
LIBS:=-larm_cortexM3l_math
|
|
||||||
|
|
||||||
# Name of the linker script
|
|
||||||
LDSCRIPT:=$(SYSDIR)/gcc.ld
|
|
||||||
|
|
||||||
# Target objects and binaries directory
|
|
||||||
OBJDIR:=obj
|
|
||||||
BINDIR:=bin
|
|
||||||
|
|
||||||
# Port definition for programming via bootloader (using stm32flash)
|
|
||||||
BL_PORT:=ttyUSB0
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
# Internal Variables
|
|
||||||
ELF:=$(BINDIR)/$(TARGET).elf
|
|
||||||
HEX:=$(BINDIR)/$(TARGET).hex
|
|
||||||
DIS:=$(BINDIR)/$(TARGET).dis
|
|
||||||
MAP:=$(BINDIR)/$(TARGET).map
|
|
||||||
OBJ:=$(CSRC:%.c=$(OBJDIR)/%.o) $(CXXSRC:%.cpp=$(OBJDIR)/%.o)
|
|
||||||
OBJ+=$(SYSSRC:$(SYSDIR)/%.c=$(OBJDIR)/%.o) $(STARTUP:$(SYSDIR)/%.S=$(OBJDIR)/%.o)
|
|
||||||
|
|
||||||
# Replace standard build tools by arm tools
|
|
||||||
CC:=arm-none-eabi-gcc
|
|
||||||
CXX:=arm-none-eabi-g++
|
|
||||||
AS:=arm-none-eabi-gcc
|
|
||||||
LD:=arm-none-eabi-g++
|
|
||||||
OBJCOPY:=arm-none-eabi-objcopy
|
|
||||||
OBJDUMP:=arm-none-eabi-objdump
|
|
||||||
SIZE:=arm-none-eabi-size
|
|
||||||
|
|
||||||
# Common flags
|
|
||||||
COMMON_FLAGS =-mthumb -mlittle-endian -mcpu=$(MCPU)
|
|
||||||
COMMON_FLAGS+= -Wall
|
|
||||||
COMMON_FLAGS+= -I. -I$(CMSISDIR)/Include -I$(CMSISDIR)/Device/ST/STM32F1xx/Include -I$(SYSDIR)
|
|
||||||
COMMON_FLAGS+= $(addprefix -I,$(INCDIR))
|
|
||||||
COMMON_FLAGS+= -D$(MCU) -DMADEBYMAKEFILE -DSTM32F1
|
|
||||||
COMMON_FLAGS+= -Os -flto -ffunction-sections -fdata-sections
|
|
||||||
COMMON_FLAGS+= -g
|
|
||||||
# Assembler flags
|
|
||||||
ASFLAGS:=$(COMMON_FLAGS)
|
|
||||||
# C flags
|
|
||||||
CFLAGS:=$(COMMON_FLAGS) $(addprefix -D,$(CDEFS))
|
|
||||||
CFLAGS+= -std=gnu11 -nostdlib
|
|
||||||
# CXX flags
|
|
||||||
CXXFLAGS:=$(COMMON_FLAGS) $(addprefix -D,$(CXXDEFS))
|
|
||||||
CXXFLAGS+= -nostdlib -fno-exceptions -fno-rtti
|
|
||||||
# LD flags
|
|
||||||
LDFLAGS:=$(COMMON_FLAGS) -Wl,--gc-sections -Wl,-Map=$(MAP) -Wl,--no-wchar-size-warning
|
|
||||||
LDFLAGS+= --specs=nosys.specs --specs=nano.specs
|
|
||||||
LDFLAGS+= -L$(CMSISDIR)/Lib/GCC/ $(addprefix -L,$(LIBDIR))
|
|
||||||
LDLIBS:=-T$(LDSCRIPT) $(LIBS)
|
|
||||||
|
|
||||||
# Dependecies
|
|
||||||
DEPENDS:=$(CSRC:%.c=$(OBJDIR)/%.d) $(CXXSRC:%.cpp=$(OBJDIR)/%.d)
|
|
||||||
|
|
||||||
|
|
||||||
# Additional Suffixes
|
|
||||||
.SUFFIXES: .elf .hex
|
|
||||||
|
|
||||||
# Targets
|
|
||||||
.PHONY: all
|
|
||||||
all: GitVersion.h $(DIS) $(HEX)
|
|
||||||
$(SIZE) $(ELF)
|
|
||||||
|
|
||||||
.PHONY: program
|
|
||||||
program: $(HEX) $(ELF)
|
|
||||||
openocd -f openocd.cfg \
|
|
||||||
-c "program $(HEX) verify reset exit"
|
|
||||||
$(SIZE) $(ELF)
|
|
||||||
|
|
||||||
.PHONY: program_bl
|
|
||||||
program_bl: $(HEX) $(ELF)
|
|
||||||
stm32flash -w $(HEX) -v /dev/$(BL_PORT)
|
|
||||||
$(SIZE) $(ELF)
|
|
||||||
|
|
||||||
.PHONY: run
|
|
||||||
run: $(HEX) $(ELF)
|
|
||||||
openocd -f openocd.cfg \
|
|
||||||
-c "init" -c "reset" -c "exit"
|
|
||||||
|
|
||||||
.PHONY: debug
|
|
||||||
debug: $(ELF)
|
|
||||||
./debug.sh $(ELF)
|
|
||||||
|
|
||||||
.PHONY: clean
|
|
||||||
clean:
|
|
||||||
$(RM) $(OBJ) $(HEX) $(ELF) $(DIS) $(MAP) $(DEPENDS) GitVersion.h
|
|
||||||
|
|
||||||
# implicit rules
|
|
||||||
.elf.hex:
|
|
||||||
$(OBJCOPY) -O ihex $< $@
|
|
||||||
|
|
||||||
$(OBJDIR)/%.o: %.c
|
|
||||||
$(CC) -MMD $(CFLAGS) -c $< -o $@
|
|
||||||
|
|
||||||
$(OBJDIR)/%.o: %.cpp
|
|
||||||
$(CXX) -MMD $(CXXFLAGS) -c $< -o $@
|
|
||||||
|
|
||||||
$(OBJDIR)/%.o: $(SYSDIR)/%.c
|
|
||||||
$(CC) $(CFLAGS) -c $< -o $@
|
|
||||||
|
|
||||||
$(OBJDIR)/%.o: $(SYSDIR)/%.S
|
|
||||||
$(AS) $(ASFLAGS) -c $< -o $@
|
|
||||||
|
|
||||||
# explicit rules
|
|
||||||
$(OBJDIR):
|
|
||||||
mkdir -p $(OBJDIR)
|
|
||||||
|
|
||||||
$(BINDIR):
|
|
||||||
mkdir -p $(BINDIR)
|
|
||||||
|
|
||||||
$(ELF): $(OBJDIR) $(BINDIR) $(OBJ)
|
|
||||||
$(LD) $(OBJ) $(LDFLAGS) $(LDLIBS) -o $@
|
|
||||||
|
|
||||||
$(DIS): $(ELF)
|
|
||||||
$(OBJDUMP) -S $< > $@
|
|
||||||
|
|
||||||
# include dependecies
|
|
||||||
-include $(DEPENDS)
|
|
||||||
|
|
||||||
# Export the current git version if the index file exists, else 000...
|
|
||||||
GitVersion.h:
|
|
||||||
ifdef SYSTEMROOT
|
|
||||||
echo #define GITVERSION "0000000" > $@
|
|
||||||
else ifdef SystemRoot
|
|
||||||
echo #define GITVERSION "0000000" > $@
|
|
||||||
else
|
|
||||||
ifneq ("$(wildcard .git/index)","")
|
|
||||||
echo "#define GITVERSION \"$(shell git rev-parse --short HEAD)\"" > $@
|
|
||||||
else
|
|
||||||
echo "#define GITVERSION \"0000000\"" > $@
|
|
||||||
endif
|
|
||||||
endif
|
|
||||||
|
|
@ -1,8 +1,8 @@
|
||||||
This is the source code of the MMDVM firmware that supports D-Star, DMR, System Fusion, P25, NXDN, M17, POCSAG, AX.25, and FM modes.
|
This is the source code of the MMDVM firmware that supports the D-Star, DMR, System Fusion, P25, NXDN, M17, POCSAG, AX.25, and FM modes.
|
||||||
|
|
||||||
It runs on the Arduino Due, the ST-Micro STM32F1xxx, STM32F4xxx and STM32F7xxx processors, as well as the Teensy 3.1/3.2/3.5/3.6. What these platforms have in common is the use of an ARM Cortex-M3, M4, or M7 processors with a minimum clock speed greater of 70 MHz, and access to at least one analogue to digital converter, one digital to analogue converter, as well as a number of GPIO pins.
|
It runs on the STM32F4xxx and STM32F7xxx processors. What these platforms have in common is the use of an ARM Cortex-M4, or M7 processors with a minimum clock speed greater of 160 MHz, and access to at least one analogue to digital converter, one digital to analogue converter, as well as a number of GPIO pins.
|
||||||
|
|
||||||
In order to build this software for the Arduino Due, you will need to edit a file within the Arduino GUI and that is detailed in the BUILD.txt file. The STM32 support is supplied via the ARM GCC compiler. The Teensy support uses Teensyduino.
|
The STM32 support is supplied via the ARM GCC compiler.
|
||||||
|
|
||||||
This software is licenced under the GPL v2 and is primarily intended for amateur and educational use.
|
This software is licenced under the GPL v2 and is primarily intended for amateur and educational use.
|
||||||
|
|
||||||
|
|
|
||||||
47
RingBuff.h
47
RingBuff.h
|
|
@ -1,47 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (C) 2017 Wojciech Krutnik N0CALL
|
|
||||||
*
|
|
||||||
* This program is free software: you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation, either version 3 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
||||||
*
|
|
||||||
* FIFO ring buffer
|
|
||||||
* source:
|
|
||||||
* http://stackoverflow.com/questions/6822548/correct-way-of-implementing-a-uart-receive-buffer-in-a-small-arm-microcontroller
|
|
||||||
* (modified)
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
|
|
||||||
#if !defined(RINGBUFF_H)
|
|
||||||
#define RINGBUFF_H
|
|
||||||
|
|
||||||
#define RINGBUFF_SIZE(ringBuff) (ringBuff.size) /* serial buffer in bytes (power 2) */
|
|
||||||
#define RINGBUFF_MASK(ringBuff) (ringBuff.size-1U) /* buffer size mask */
|
|
||||||
|
|
||||||
/* Buffer read / write macros */
|
|
||||||
#define RINGBUFF_RESET(ringBuff) (ringBuff).rdIdx = ringBuff.wrIdx = 0
|
|
||||||
#define RINGBUFF_WRITE(ringBuff, dataIn) (ringBuff).data[RINGBUFF_MASK(ringBuff) & ringBuff.wrIdx++] = (dataIn)
|
|
||||||
#define RINGBUFF_READ(ringBuff) ((ringBuff).data[RINGBUFF_MASK(ringBuff) & ((ringBuff).rdIdx++)])
|
|
||||||
#define RINGBUFF_EMPTY(ringBuff) ((ringBuff).rdIdx == (ringBuff).wrIdx)
|
|
||||||
#define RINGBUFF_FULL(ringBuff) ((RINGBUFF_MASK(ringBuff) & ringBuff.rdIdx) == (RINGBUFF_MASK(ringBuff) & ringBuff.wrIdx))
|
|
||||||
#define RINGBUFF_COUNT(ringBuff) (RINGBUFF_MASK(ringBuff) & ((ringBuff).wrIdx - (ringBuff).rdIdx))
|
|
||||||
|
|
||||||
/* Buffer type */
|
|
||||||
#define DECLARE_RINGBUFFER_TYPE(name, _size) \
|
|
||||||
typedef struct{ \
|
|
||||||
uint32_t size; \
|
|
||||||
uint32_t wrIdx; \
|
|
||||||
uint32_t rdIdx; \
|
|
||||||
uint8_t data[_size]; \
|
|
||||||
}name##_t
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
@ -1 +0,0 @@
|
||||||
Subproject commit 417e0c2f4a4571ff836d2705d7551bd07ebbf777
|
|
||||||
52
STM32Utils.h
52
STM32Utils.h
|
|
@ -1,52 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (C) 2017 by Wojciech Krutnik N0CALL
|
|
||||||
*
|
|
||||||
* Source: http://mightydevices.com/?p=144
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#if !defined(STM32UTILS_H)
|
|
||||||
#define STM32UTILS_H
|
|
||||||
|
|
||||||
#include <stdint.h>
|
|
||||||
|
|
||||||
/* ram function */
|
|
||||||
#define RAMFUNC __attribute__ ((long_call, section (".data")))
|
|
||||||
/* eeprom data */
|
|
||||||
/* for placing variables in eeprom memory */
|
|
||||||
#define EEMEM __attribute__((section(".eeprom")))
|
|
||||||
|
|
||||||
/* bitband type */
|
|
||||||
typedef volatile uint32_t * const bitband_t;
|
|
||||||
|
|
||||||
/* base address for bit banding */
|
|
||||||
#define BITBAND_SRAM_REF (0x20000000)
|
|
||||||
/* base address for bit banding */
|
|
||||||
#define BITBAND_SRAM_BASE (0x22000000)
|
|
||||||
/* base address for bit banding */
|
|
||||||
#define BITBAND_PERIPH_REF (0x40000000)
|
|
||||||
/* base address for bit banding */
|
|
||||||
#define BITBAND_PERIPH_BASE (0x42000000)
|
|
||||||
|
|
||||||
/* sram bit band */
|
|
||||||
#define BITBAND_SRAM(address, bit) ((void*)(BITBAND_SRAM_BASE + \
|
|
||||||
(((uint32_t)address) - BITBAND_SRAM_REF) * 32 + (bit) * 4))
|
|
||||||
|
|
||||||
/* periph bit band */
|
|
||||||
#define BITBAND_PERIPH(address, bit) ((void *)(BITBAND_PERIPH_BASE + \
|
|
||||||
(((uint32_t)address) - BITBAND_PERIPH_REF) * 32 + (bit) * 4))
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
@ -1,112 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (C) 2016,2017 by Jonathan Naylor G4KLX
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "Config.h"
|
|
||||||
#include "Globals.h"
|
|
||||||
|
|
||||||
#include "SerialPort.h"
|
|
||||||
|
|
||||||
#if defined(VK6MST_TEENSY_PI3_SHIELD_I2C)
|
|
||||||
//it will load I2CTeensy.cpp
|
|
||||||
|
|
||||||
#elif defined(__SAM3X8E__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
|
|
||||||
|
|
||||||
void CSerialPort::beginInt(uint8_t n, int speed)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
Serial.begin(speed);
|
|
||||||
break;
|
|
||||||
case 2U:
|
|
||||||
Serial2.begin(speed);
|
|
||||||
break;
|
|
||||||
case 3U:
|
|
||||||
Serial3.begin(speed);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
int CSerialPort::availableForReadInt(uint8_t n)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
return Serial.available();
|
|
||||||
case 2U:
|
|
||||||
return Serial2.available();
|
|
||||||
case 3U:
|
|
||||||
return Serial3.available();
|
|
||||||
default:
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
int CSerialPort::availableForWriteInt(uint8_t n)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
return Serial.availableForWrite();
|
|
||||||
case 2U:
|
|
||||||
return Serial2.availableForWrite();
|
|
||||||
case 3U:
|
|
||||||
return Serial3.availableForWrite();
|
|
||||||
default:
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
uint8_t CSerialPort::readInt(uint8_t n)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
return Serial.read();
|
|
||||||
case 2U:
|
|
||||||
return Serial2.read();
|
|
||||||
case 3U:
|
|
||||||
return Serial3.read();
|
|
||||||
default:
|
|
||||||
return 0U;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
Serial.write(data, length);
|
|
||||||
if (flush)
|
|
||||||
Serial.flush();
|
|
||||||
break;
|
|
||||||
case 2U:
|
|
||||||
Serial2.write(data, length);
|
|
||||||
if (flush)
|
|
||||||
Serial2.flush();
|
|
||||||
break;
|
|
||||||
case 3U:
|
|
||||||
Serial3.write(data, length);
|
|
||||||
if (flush)
|
|
||||||
Serial3.flush();
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
|
|
@ -1,170 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (C) 2017 by Wojciech Krutnik N0CALL
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "Config.h"
|
|
||||||
#include "Globals.h"
|
|
||||||
#include "RingBuff.h"
|
|
||||||
|
|
||||||
#include "SerialPort.h"
|
|
||||||
|
|
||||||
/*
|
|
||||||
Pin definitions (configuration in IOSTM_CMSIS.c):
|
|
||||||
|
|
||||||
- Host communication:
|
|
||||||
USART1 - TXD PA9 - RXD PA10
|
|
||||||
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
#if defined(STM32F1)
|
|
||||||
|
|
||||||
// BaudRate calculator macro
|
|
||||||
// source: STM32 HAL Library (stm32f1xx_hal_usart.h)
|
|
||||||
#define USART_DIV(__PCLK__, __BAUD__) (((__PCLK__)*25)/(4*(__BAUD__)))
|
|
||||||
#define USART_DIVMANT(__PCLK__, __BAUD__) (USART_DIV((__PCLK__), (__BAUD__))/100)
|
|
||||||
#define USART_DIVFRAQ(__PCLK__, __BAUD__) (((USART_DIV((__PCLK__), (__BAUD__)) - (USART_DIVMANT((__PCLK__), (__BAUD__)) * 100)) * 16 + 50) / 100)
|
|
||||||
#define USART_BRR(__PCLK__, __BAUD__) ((USART_DIVMANT((__PCLK__), (__BAUD__)) << 4)|(USART_DIVFRAQ((__PCLK__), (__BAUD__)) & 0x0F))
|
|
||||||
|
|
||||||
#define USART_BUFFER_SIZE 256U
|
|
||||||
DECLARE_RINGBUFFER_TYPE(USARTBuffer, USART_BUFFER_SIZE);
|
|
||||||
|
|
||||||
/* ************* USART1 ***************** */
|
|
||||||
static volatile USARTBuffer_t txBuffer1={.size=USART_BUFFER_SIZE};
|
|
||||||
static volatile USARTBuffer_t rxBuffer1={.size=USART_BUFFER_SIZE};
|
|
||||||
|
|
||||||
|
|
||||||
extern "C" {
|
|
||||||
bitband_t txe = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_TXE_Pos);
|
|
||||||
bitband_t rxne = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_RXNE_Pos);
|
|
||||||
bitband_t txeie = (bitband_t)BITBAND_PERIPH(&USART1->CR1, USART_CR1_TXEIE_Pos);
|
|
||||||
|
|
||||||
RAMFUNC void USART1_IRQHandler()
|
|
||||||
{
|
|
||||||
/* Transmitting data */
|
|
||||||
if(*txe){
|
|
||||||
if(!(RINGBUFF_EMPTY(txBuffer1))){
|
|
||||||
USART1->DR = RINGBUFF_READ(txBuffer1);
|
|
||||||
}else{ /* Buffer empty */
|
|
||||||
*txeie = 0; /* Don't send further data */
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Receiving data */
|
|
||||||
if(*rxne){
|
|
||||||
RINGBUFF_WRITE(rxBuffer1, USART1->DR);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void USART1Init(int speed)
|
|
||||||
{
|
|
||||||
RCC->APB2ENR |= RCC_APB2ENR_USART1EN;
|
|
||||||
|
|
||||||
USART1->BRR = USART_BRR(72000000UL, speed);
|
|
||||||
|
|
||||||
USART1->CR1 = USART_CR1_UE | USART_CR1_TE |
|
|
||||||
USART_CR1_RE | USART_CR1_RXNEIE; // Enable USART and RX interrupt
|
|
||||||
NVIC_EnableIRQ(USART1_IRQn);
|
|
||||||
}
|
|
||||||
|
|
||||||
RAMFUNC void USART1TxData(const uint8_t* data, uint16_t length)
|
|
||||||
{
|
|
||||||
NVIC_DisableIRQ(USART1_IRQn);
|
|
||||||
|
|
||||||
/* Check remaining space in buffer */
|
|
||||||
if(RINGBUFF_COUNT(txBuffer1) + length > RINGBUFF_SIZE(txBuffer1)){
|
|
||||||
NVIC_EnableIRQ(USART1_IRQn);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Append data to buffer */
|
|
||||||
while(length--){
|
|
||||||
RINGBUFF_WRITE(txBuffer1, *(data++));
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Start sending data */
|
|
||||||
USART1->CR1 |= USART_CR1_TXEIE;
|
|
||||||
|
|
||||||
NVIC_EnableIRQ(USART1_IRQn);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/////////////////////////////////////////////////////////////////
|
|
||||||
|
|
||||||
void CSerialPort::beginInt(uint8_t n, int speed)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
USART1Init(speed);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
int CSerialPort::availableForReadInt(uint8_t n)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
return !RINGBUFF_EMPTY(rxBuffer1);
|
|
||||||
default:
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
int CSerialPort::availableForWriteInt(uint8_t n)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
return !RINGBUFF_FULL(txBuffer1);
|
|
||||||
default:
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
uint8_t CSerialPort::readInt(uint8_t n)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
return RINGBUFF_READ(rxBuffer1);
|
|
||||||
default:
|
|
||||||
return 0U;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
|
|
||||||
{
|
|
||||||
bitband_t tc = (bitband_t)BITBAND_PERIPH(&USART1->SR, USART_SR_TC_Pos);
|
|
||||||
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
USART1TxData(data, length);
|
|
||||||
*tc = 0;
|
|
||||||
|
|
||||||
if (flush) {
|
|
||||||
while (!RINGBUFF_EMPTY(txBuffer1) || !tc)
|
|
||||||
;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
237
SerialTeensy.cpp
237
SerialTeensy.cpp
|
|
@ -1,237 +0,0 @@
|
||||||
/*
|
|
||||||
* Copyright (C) 2017 by Chris Huitema
|
|
||||||
*
|
|
||||||
* This program is free software; you can redistribute it and/or modify
|
|
||||||
* it under the terms of the GNU General Public License as published by
|
|
||||||
* the Free Software Foundation; either version 2 of the License, or
|
|
||||||
* (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This program is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
* GNU General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this program; if not, write to the Free Software
|
|
||||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
||||||
*
|
|
||||||
* 28-4-2017 Created for MMDVM Pi shield for Teensy by Chris Huitema
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "Config.h"
|
|
||||||
#include "Globals.h"
|
|
||||||
|
|
||||||
#if defined(VK6MST_TEENSY_PI3_SHIELD_I2C)
|
|
||||||
|
|
||||||
#include <i2c_t3.h> //available here https://github.com/nox771/i2c_t3 or maybe the normal wire will work #include <wire.h> justs need to test i guess
|
|
||||||
|
|
||||||
#define I2C_ADDRESS 0x22
|
|
||||||
#define I2C_SPEED 100000
|
|
||||||
|
|
||||||
// Function prototypes
|
|
||||||
void receiveEvent(size_t count);
|
|
||||||
void requestEvent(void);
|
|
||||||
|
|
||||||
#define TX_FIFO_SIZE 512U
|
|
||||||
#define RX_FIFO_SIZE 512U
|
|
||||||
|
|
||||||
volatile uint8_t TXfifo[TX_FIFO_SIZE];
|
|
||||||
volatile uint8_t RXfifo[RX_FIFO_SIZE];
|
|
||||||
volatile uint16_t TXfifohead, TXfifotail;
|
|
||||||
volatile uint16_t RXfifohead, RXfifotail;
|
|
||||||
|
|
||||||
// Init queues
|
|
||||||
void TXfifoinit(void)
|
|
||||||
{
|
|
||||||
TXfifohead = 0U;
|
|
||||||
TXfifotail = 0U;
|
|
||||||
}
|
|
||||||
|
|
||||||
void RXfifoinit()
|
|
||||||
{
|
|
||||||
RXfifohead = 0U;
|
|
||||||
RXfifotail = 0U;
|
|
||||||
}
|
|
||||||
|
|
||||||
// How full is queue
|
|
||||||
|
|
||||||
uint16_t TXfifolevel(void)
|
|
||||||
{
|
|
||||||
uint32_t tail = TXfifotail;
|
|
||||||
uint32_t head = TXfifohead;
|
|
||||||
|
|
||||||
if (tail > head)
|
|
||||||
return TX_FIFO_SIZE + head - tail;
|
|
||||||
else
|
|
||||||
return head - tail;
|
|
||||||
}
|
|
||||||
|
|
||||||
uint16_t RXfifolevel(void)
|
|
||||||
{
|
|
||||||
uint32_t tail = RXfifotail;
|
|
||||||
uint32_t head = RXfifohead;
|
|
||||||
|
|
||||||
if (tail > head)
|
|
||||||
return RX_FIFO_SIZE + head - tail;
|
|
||||||
else
|
|
||||||
return head - tail;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
uint8_t TXfifoput(uint8_t next)
|
|
||||||
{
|
|
||||||
if (TXfifolevel() < TX_FIFO_SIZE) {
|
|
||||||
TXfifo[TXfifohead] = next;
|
|
||||||
|
|
||||||
TXfifohead++;
|
|
||||||
if (TXfifohead >= TX_FIFO_SIZE)
|
|
||||||
TXfifohead = 0U;
|
|
||||||
return 1U;
|
|
||||||
} else {
|
|
||||||
return 0U; // signal an overflow occurred by returning a zero count
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void I2Cbegin(void)
|
|
||||||
{
|
|
||||||
// Setup for Slave mode, address 0x22, pins 18/19, external pullups, speed in hz
|
|
||||||
Wire.begin(I2C_SLAVE, I2C_ADDRESS, I2C_PINS_18_19, I2C_PULLUP_EXT, I2C_SPEED);
|
|
||||||
|
|
||||||
// register events
|
|
||||||
Wire.onReceive(receiveEvent);
|
|
||||||
Wire.onRequest(requestEvent);
|
|
||||||
|
|
||||||
// initialize the fifos
|
|
||||||
TXfifoinit();
|
|
||||||
RXfifoinit();
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
int I2Cavailable(void)
|
|
||||||
{
|
|
||||||
if (RXfifolevel() > 0U)
|
|
||||||
return 1U;
|
|
||||||
else
|
|
||||||
return 0U;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
uint8_t I2Cread(void)
|
|
||||||
{
|
|
||||||
uint8_t data_c = RXfifo[RXfifotail];
|
|
||||||
|
|
||||||
RXfifotail++;
|
|
||||||
if (RXfifotail >= RX_FIFO_SIZE)
|
|
||||||
RXfifotail = 0U;
|
|
||||||
|
|
||||||
return data_c;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void I2Cwrite(const uint8_t* data, uint16_t length)
|
|
||||||
{
|
|
||||||
for (uint16_t i = 0U; i < length; i++)
|
|
||||||
TXfifoput(data[i]); //puts it in the fifo
|
|
||||||
}
|
|
||||||
|
|
||||||
//
|
|
||||||
// handle Rx Event (incoming I2C data)
|
|
||||||
//
|
|
||||||
void receiveEvent(size_t count)
|
|
||||||
{
|
|
||||||
for (uint16_t i = 0U; i < count; i++)
|
|
||||||
{
|
|
||||||
if (RXfifolevel() < RX_FIFO_SIZE) {
|
|
||||||
RXfifo[RXfifohead] = Wire.readByte();
|
|
||||||
if (RXfifo[RXfifohead] != -1){
|
|
||||||
RXfifohead++;
|
|
||||||
if (RXfifohead >= RX_FIFO_SIZE) RXfifohead = 0U;
|
|
||||||
}
|
|
||||||
} else {
|
|
||||||
Wire.readByte(); // drop data if mem full.
|
|
||||||
}
|
|
||||||
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
//
|
|
||||||
// handle Tx Event (outgoing I2C data)
|
|
||||||
//
|
|
||||||
void requestEvent(void)
|
|
||||||
{
|
|
||||||
if (TXfifolevel() > 0) {
|
|
||||||
if (Wire.write(TXfifo[TXfifotail])){ //write to i2c
|
|
||||||
TXfifotail++;
|
|
||||||
if (TXfifotail >= TX_FIFO_SIZE) TXfifotail = 0U;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/************************************/
|
|
||||||
|
|
||||||
void CSerialPort::beginInt(uint8_t n, int speed)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
return I2Cbegin();
|
|
||||||
case 3U:
|
|
||||||
Serial3.begin(speed);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
int CSerialPort::availableForReadInt(uint8_t n)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
return I2Cavailable();
|
|
||||||
case 3U:
|
|
||||||
return Serial3.available();
|
|
||||||
default:
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
int CSerialPort::availableForWriteInt(uint8_t n)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 3U:
|
|
||||||
return Serial3.availableForWrite();
|
|
||||||
default:
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
uint8_t CSerialPort::readInt(uint8_t n)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
return I2Cread();
|
|
||||||
case 3U:
|
|
||||||
return Serial3.read();
|
|
||||||
default:
|
|
||||||
return 0U;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool flush)
|
|
||||||
{
|
|
||||||
switch (n) {
|
|
||||||
case 1U:
|
|
||||||
I2Cwrite(data, length);
|
|
||||||
break;
|
|
||||||
case 3U:
|
|
||||||
Serial3.write(data, length);
|
|
||||||
if (flush)
|
|
||||||
Serial3.flush();
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
#endif
|
|
||||||
98
mmdvmmenu.sh
98
mmdvmmenu.sh
|
|
@ -1,98 +0,0 @@
|
||||||
#!/bin/bash
|
|
||||||
|
|
||||||
###############################################################################
|
|
||||||
#
|
|
||||||
# mmdvmmenu.sh
|
|
||||||
#
|
|
||||||
# Copyright (C) 2016 by Paul Nannery KC2VRJ
|
|
||||||
#
|
|
||||||
# This program is free software; you can redistribute it and/or modify
|
|
||||||
# it under the terms of the GNU General Public License as published by
|
|
||||||
# the Free Software Foundation; either version 2 of the License, or
|
|
||||||
# (at your option) any later version.
|
|
||||||
#
|
|
||||||
# This program is distributed in the hope that it will be useful,
|
|
||||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
||||||
# GNU General Public License for more details.
|
|
||||||
#
|
|
||||||
# You should have received a copy of the GNU General Public License
|
|
||||||
# along with this program; if not, write to the Free Software
|
|
||||||
# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
||||||
#
|
|
||||||
###############################################################################
|
|
||||||
#
|
|
||||||
# On a Linux based system, such as a Raspberry Pi, this script will perform
|
|
||||||
# Modification of the Config.h file for most options. It makes a Back up when
|
|
||||||
# you start the script if none is present. You must recompile and load firmware
|
|
||||||
# onto the Arduino Due if changes are made.
|
|
||||||
#
|
|
||||||
###############################################################################
|
|
||||||
#
|
|
||||||
# CONFIGURATION
|
|
||||||
#
|
|
||||||
# Location of Config.h
|
|
||||||
conf=Config.h
|
|
||||||
#Location of backup file
|
|
||||||
confbak=Config.h.bak
|
|
||||||
|
|
||||||
################################################################################
|
|
||||||
#
|
|
||||||
# Do not edit below here
|
|
||||||
#
|
|
||||||
###############################################################################
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
# Check for backup file and make one if not present
|
|
||||||
|
|
||||||
if [ ! -f $confbak ];then
|
|
||||||
|
|
||||||
cp -f $conf $confbak
|
|
||||||
|
|
||||||
fi
|
|
||||||
|
|
||||||
while :
|
|
||||||
do
|
|
||||||
clear
|
|
||||||
cat<<EOF
|
|
||||||
==============================================================
|
|
||||||
MMDVM Configuration Options
|
|
||||||
--------------------------------------------------------------
|
|
||||||
Please enter your choice:
|
|
||||||
|
|
||||||
(1) Enable 12.000 MHZ Clock
|
|
||||||
(2) Enable 12.288 MHZ Clock
|
|
||||||
(3) Enable 14.400 MHz Clock
|
|
||||||
(4) Enable 19.200 MHz Clock
|
|
||||||
(5) Use the COS to lockout the modem
|
|
||||||
(6) Use pins to output the current mode
|
|
||||||
(7) Use layout for the PAPA board
|
|
||||||
(8) Use layout for ZUM V1.0 and V1.0.1 boards
|
|
||||||
(9) Use layout for SP8NTH board
|
|
||||||
(0) Use modem as display driver
|
|
||||||
(A) Return to Default
|
|
||||||
|
|
||||||
(Q)uit
|
|
||||||
---------------------------------------------------------------
|
|
||||||
EOF
|
|
||||||
read -n1 -s
|
|
||||||
case "$REPLY" in
|
|
||||||
"1") sed -e 's/\/\/ #define EXTERNAL_OSC 12000000/#define EXTERNAL_OSC 12000000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "12.000 MHz clock enabled";;
|
|
||||||
"2") sed -e 's/\/\/ #define EXTERNAL_OSC 12288000/#define EXTERNAL_OSC 12288000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "12.288 MHz clock enabled";;
|
|
||||||
"3") sed -e 's/\/\/ #define EXTERNAL_OSC 14400000/#define EXTERNAL_OSC 14400000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "14.400 MHz clock enabled";;
|
|
||||||
"4") sed -e 's/\/\/ #define EXTERNAL_OSC 19200000/#define EXTERNAL_OSC 19200000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "19.200 MHz clock enabled";;
|
|
||||||
"5") sed -e 's/\/\/ #define USE_COS_AS_LOCKOUT /#define USE_COS_AS_LOCKOUT/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "COS as Lockout enabled";;
|
|
||||||
"6") sed -e 's/\/\/ #define MODE_LEDS/#define MODE_LEDS/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Mode pins enabled";;
|
|
||||||
"7") sed -e 's/\/\/ #define ARDUINO_DUE_PAPA/#define ARDUINO_DUE_PAPA/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for the PAPA board enabled";;
|
|
||||||
"8") sed -e 's/\/\/ #define ARDUINO_DUE_ZUM_V10/#define ARDUINO_DUE_ZUM_V10/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for ZUM V1.0 and V1.0.1 boards enabled";;
|
|
||||||
"9") sed -e 's/\/\/ #define ARDUINO_DUE_NTH/#define ARDUINO_DUE_NTH/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for SP8NTH board enabled";;
|
|
||||||
"0") sed -e 's/\/\/ #define SERIAL_REPEATER/#define SERIAL_REPEATER/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Modem display driver enabled";;
|
|
||||||
"A") mv -f $confbak $conf ;;
|
|
||||||
"a") mv -f $confbak $conf ;;
|
|
||||||
"Q") echo "If any changes are made you need to (re-)upload the firmware to MMDVM" && exit;;
|
|
||||||
"q") echo "If any changes are made you need to (re-)upload the firmware to MMDVM" && exit;;
|
|
||||||
* ) echo "invalid option" ;;
|
|
||||||
esac
|
|
||||||
sleep 1
|
|
||||||
done
|
|
||||||
|
|
@ -1,187 +0,0 @@
|
||||||
/* Linker script to configure memory regions.
|
|
||||||
* STM32F105RB
|
|
||||||
*/
|
|
||||||
MEMORY
|
|
||||||
{
|
|
||||||
FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K
|
|
||||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Linker script to place sections and symbol values. Should be used together
|
|
||||||
* with other linker script that defines memory regions FLASH and RAM.
|
|
||||||
* It references following symbols, which must be defined in code:
|
|
||||||
* Reset_Handler : Entry of reset handler
|
|
||||||
*
|
|
||||||
* It defines following symbols, which code can use without definition:
|
|
||||||
* __exidx_start
|
|
||||||
* __exidx_end
|
|
||||||
* __copy_table_start__
|
|
||||||
* __copy_table_end__
|
|
||||||
* __zero_table_start__
|
|
||||||
* __zero_table_end__
|
|
||||||
* __etext
|
|
||||||
* __data_start__
|
|
||||||
* __preinit_array_start
|
|
||||||
* __preinit_array_end
|
|
||||||
* __init_array_start
|
|
||||||
* __init_array_end
|
|
||||||
* __fini_array_start
|
|
||||||
* __fini_array_end
|
|
||||||
* __data_end__
|
|
||||||
* __bss_start__
|
|
||||||
* __bss_end__
|
|
||||||
* __end__
|
|
||||||
* end
|
|
||||||
* __HeapLimit
|
|
||||||
* __StackLimit
|
|
||||||
* __StackTop
|
|
||||||
* __stack
|
|
||||||
*/
|
|
||||||
ENTRY(Reset_Handler)
|
|
||||||
|
|
||||||
SECTIONS
|
|
||||||
{
|
|
||||||
.text :
|
|
||||||
{
|
|
||||||
KEEP(*(.isr_vector))
|
|
||||||
*(.text*)
|
|
||||||
|
|
||||||
KEEP(*(.init))
|
|
||||||
KEEP(*(.fini))
|
|
||||||
|
|
||||||
/* .ctors */
|
|
||||||
*crtbegin.o(.ctors)
|
|
||||||
*crtbegin?.o(.ctors)
|
|
||||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
|
|
||||||
*(SORT(.ctors.*))
|
|
||||||
*(.ctors)
|
|
||||||
|
|
||||||
/* .dtors */
|
|
||||||
*crtbegin.o(.dtors)
|
|
||||||
*crtbegin?.o(.dtors)
|
|
||||||
*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
|
|
||||||
*(SORT(.dtors.*))
|
|
||||||
*(.dtors)
|
|
||||||
|
|
||||||
*(.rodata*)
|
|
||||||
|
|
||||||
KEEP(*(.eh_frame*))
|
|
||||||
} > FLASH
|
|
||||||
|
|
||||||
.ARM.extab :
|
|
||||||
{
|
|
||||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
|
||||||
} > FLASH
|
|
||||||
|
|
||||||
__exidx_start = .;
|
|
||||||
.ARM.exidx :
|
|
||||||
{
|
|
||||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
|
||||||
} > FLASH
|
|
||||||
__exidx_end = .;
|
|
||||||
|
|
||||||
/* To copy multiple ROM to RAM sections,
|
|
||||||
* uncomment .copy.table section and,
|
|
||||||
* define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
|
|
||||||
/*
|
|
||||||
.copy.table :
|
|
||||||
{
|
|
||||||
. = ALIGN(4);
|
|
||||||
__copy_table_start__ = .;
|
|
||||||
LONG (__etext)
|
|
||||||
LONG (__data_start__)
|
|
||||||
LONG (__data_end__ - __data_start__)
|
|
||||||
LONG (__etext2)
|
|
||||||
LONG (__data2_start__)
|
|
||||||
LONG (__data2_end__ - __data2_start__)
|
|
||||||
__copy_table_end__ = .;
|
|
||||||
} > FLASH
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* To clear multiple BSS sections,
|
|
||||||
* uncomment .zero.table section and,
|
|
||||||
* define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
|
|
||||||
/*
|
|
||||||
.zero.table :
|
|
||||||
{
|
|
||||||
. = ALIGN(4);
|
|
||||||
__zero_table_start__ = .;
|
|
||||||
LONG (__bss_start__)
|
|
||||||
LONG (__bss_end__ - __bss_start__)
|
|
||||||
LONG (__bss2_start__)
|
|
||||||
LONG (__bss2_end__ - __bss2_start__)
|
|
||||||
__zero_table_end__ = .;
|
|
||||||
} > FLASH
|
|
||||||
*/
|
|
||||||
|
|
||||||
__etext = .;
|
|
||||||
|
|
||||||
.data : AT (__etext)
|
|
||||||
{
|
|
||||||
__data_start__ = .;
|
|
||||||
*(vtable)
|
|
||||||
*(.data*)
|
|
||||||
|
|
||||||
. = ALIGN(4);
|
|
||||||
/* preinit data */
|
|
||||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
|
||||||
KEEP(*(.preinit_array))
|
|
||||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
|
||||||
|
|
||||||
. = ALIGN(4);
|
|
||||||
/* init data */
|
|
||||||
PROVIDE_HIDDEN (__init_array_start = .);
|
|
||||||
KEEP(*(SORT(.init_array.*)))
|
|
||||||
KEEP(*(.init_array))
|
|
||||||
PROVIDE_HIDDEN (__init_array_end = .);
|
|
||||||
|
|
||||||
|
|
||||||
. = ALIGN(4);
|
|
||||||
/* finit data */
|
|
||||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
|
||||||
KEEP(*(SORT(.fini_array.*)))
|
|
||||||
KEEP(*(.fini_array))
|
|
||||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
|
||||||
|
|
||||||
KEEP(*(.jcr*))
|
|
||||||
. = ALIGN(4);
|
|
||||||
/* All data end */
|
|
||||||
__data_end__ = .;
|
|
||||||
|
|
||||||
} > RAM
|
|
||||||
|
|
||||||
.bss :
|
|
||||||
{
|
|
||||||
. = ALIGN(4);
|
|
||||||
__bss_start__ = .;
|
|
||||||
*(.bss*)
|
|
||||||
*(COMMON)
|
|
||||||
. = ALIGN(4);
|
|
||||||
__bss_end__ = .;
|
|
||||||
} > RAM
|
|
||||||
|
|
||||||
.heap (COPY):
|
|
||||||
{
|
|
||||||
__end__ = .;
|
|
||||||
PROVIDE(end = .);
|
|
||||||
*(.heap*)
|
|
||||||
__HeapLimit = .;
|
|
||||||
} > RAM
|
|
||||||
|
|
||||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
|
||||||
* used for linker to calculate size of stack sections, and assign
|
|
||||||
* values to stack symbols later */
|
|
||||||
.stack_dummy (COPY):
|
|
||||||
{
|
|
||||||
*(.stack*)
|
|
||||||
} > RAM
|
|
||||||
|
|
||||||
/* Set stack top to end of RAM, and stack limit move down by
|
|
||||||
* size of stack_dummy section */
|
|
||||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
|
||||||
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
|
|
||||||
PROVIDE(__stack = __StackTop);
|
|
||||||
|
|
||||||
/* Check if data + heap + stack exceeds RAM limit */
|
|
||||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
|
||||||
}
|
|
||||||
|
|
@ -1,427 +0,0 @@
|
||||||
/* File: startup_ARMCM3.S
|
|
||||||
* Purpose: startup file for Cortex-M3 devices. Should use with
|
|
||||||
* GCC for ARM Embedded Processors
|
|
||||||
* Version: V2.0
|
|
||||||
* Date: 16 August 2013
|
|
||||||
*/
|
|
||||||
/* Copyright (c) 2011 - 2013 ARM LIMITED
|
|
||||||
|
|
||||||
All rights reserved.
|
|
||||||
Redistribution and use in source and binary forms, with or without
|
|
||||||
modification, are permitted provided that the following conditions are met:
|
|
||||||
- Redistributions of source code must retain the above copyright
|
|
||||||
notice, this list of conditions and the following disclaimer.
|
|
||||||
- Redistributions in binary form must reproduce the above copyright
|
|
||||||
notice, this list of conditions and the following disclaimer in the
|
|
||||||
documentation and/or other materials provided with the distribution.
|
|
||||||
- Neither the name of ARM nor the names of its contributors may be used
|
|
||||||
to endorse or promote products derived from this software without
|
|
||||||
specific prior written permission.
|
|
||||||
*
|
|
||||||
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
|
||||||
ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
|
|
||||||
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
|
||||||
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
|
||||||
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
|
||||||
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
||||||
POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
---------------------------------------------------------------------------*/
|
|
||||||
#if defined(STM32F105xC)
|
|
||||||
|
|
||||||
.syntax unified
|
|
||||||
.arch armv7-m
|
|
||||||
|
|
||||||
.section .stack
|
|
||||||
.align 3
|
|
||||||
#ifdef __STACK_SIZE
|
|
||||||
.equ Stack_Size, __STACK_SIZE
|
|
||||||
#else
|
|
||||||
.equ Stack_Size, 0xc00
|
|
||||||
#endif
|
|
||||||
.globl __StackTop
|
|
||||||
.globl __StackLimit
|
|
||||||
__StackLimit:
|
|
||||||
.space Stack_Size
|
|
||||||
.size __StackLimit, . - __StackLimit
|
|
||||||
__StackTop:
|
|
||||||
.size __StackTop, . - __StackTop
|
|
||||||
|
|
||||||
.section .heap
|
|
||||||
.align 3
|
|
||||||
#ifdef __HEAP_SIZE
|
|
||||||
.equ Heap_Size, __HEAP_SIZE
|
|
||||||
#else
|
|
||||||
.equ Heap_Size, 0
|
|
||||||
#endif
|
|
||||||
.globl __HeapBase
|
|
||||||
.globl __HeapLimit
|
|
||||||
__HeapBase:
|
|
||||||
.if Heap_Size
|
|
||||||
.space Heap_Size
|
|
||||||
.endif
|
|
||||||
.size __HeapBase, . - __HeapBase
|
|
||||||
__HeapLimit:
|
|
||||||
.size __HeapLimit, . - __HeapLimit
|
|
||||||
|
|
||||||
|
|
||||||
.equ BootRAM, 0xF1E0F85F
|
|
||||||
|
|
||||||
.section .isr_vector
|
|
||||||
.align 2
|
|
||||||
.globl __isr_vector
|
|
||||||
__isr_vector:
|
|
||||||
.long __StackTop /* Top of Stack */
|
|
||||||
.long Reset_Handler /* Reset Handler */
|
|
||||||
.long NMI_Handler /* NMI Handler */
|
|
||||||
.long HardFault_Handler /* Hard Fault Handler */
|
|
||||||
.long MemManage_Handler /* MPU Fault Handler */
|
|
||||||
.long BusFault_Handler /* Bus Fault Handler */
|
|
||||||
.long UsageFault_Handler /* Usage Fault Handler */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long SVC_Handler /* SVCall Handler */
|
|
||||||
.long DebugMon_Handler /* Debug Monitor Handler */
|
|
||||||
.long 0 /* Reserved */
|
|
||||||
.long PendSV_Handler /* PendSV Handler */
|
|
||||||
.long SysTick_Handler /* SysTick Handler */
|
|
||||||
|
|
||||||
/* External interrupts */
|
|
||||||
.long WWDG_IRQHandler
|
|
||||||
.long PVD_IRQHandler
|
|
||||||
.long TAMPER_IRQHandler
|
|
||||||
.long RTC_IRQHandler
|
|
||||||
.long FLASH_IRQHandler
|
|
||||||
.long RCC_IRQHandler
|
|
||||||
.long EXTI0_IRQHandler
|
|
||||||
.long EXTI1_IRQHandler
|
|
||||||
.long EXTI2_IRQHandler
|
|
||||||
.long EXTI3_IRQHandler
|
|
||||||
.long EXTI4_IRQHandler
|
|
||||||
.long DMA1_Channel1_IRQHandler
|
|
||||||
.long DMA1_Channel2_IRQHandler
|
|
||||||
.long DMA1_Channel3_IRQHandler
|
|
||||||
.long DMA1_Channel4_IRQHandler
|
|
||||||
.long DMA1_Channel5_IRQHandler
|
|
||||||
.long DMA1_Channel6_IRQHandler
|
|
||||||
.long DMA1_Channel7_IRQHandler
|
|
||||||
.long ADC1_2_IRQHandler
|
|
||||||
.long CAN1_TX_IRQHandler
|
|
||||||
.long CAN1_RX0_IRQHandler
|
|
||||||
.long CAN1_RX1_IRQHandler
|
|
||||||
.long CAN1_SCE_IRQHandler
|
|
||||||
.long EXTI9_5_IRQHandler
|
|
||||||
.long TIM1_BRK_IRQHandler
|
|
||||||
.long TIM1_UP_IRQHandler
|
|
||||||
.long TIM1_TRG_COM_IRQHandler
|
|
||||||
.long TIM1_CC_IRQHandler
|
|
||||||
.long TIM2_IRQHandler
|
|
||||||
.long TIM3_IRQHandler
|
|
||||||
.long TIM4_IRQHandler
|
|
||||||
.long I2C1_EV_IRQHandler
|
|
||||||
.long I2C1_ER_IRQHandler
|
|
||||||
.long I2C2_EV_IRQHandler
|
|
||||||
.long I2C2_ER_IRQHandler
|
|
||||||
.long SPI1_IRQHandler
|
|
||||||
.long SPI2_IRQHandler
|
|
||||||
.long USART1_IRQHandler
|
|
||||||
.long USART2_IRQHandler
|
|
||||||
.long USART3_IRQHandler
|
|
||||||
.long EXTI15_10_IRQHandler
|
|
||||||
.long RTC_Alarm_IRQHandler
|
|
||||||
.long OTG_FS_WKUP_IRQHandler
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long TIM5_IRQHandler
|
|
||||||
.long SPI3_IRQHandler
|
|
||||||
.long UART4_IRQHandler
|
|
||||||
.long UART5_IRQHandler
|
|
||||||
.long TIM6_IRQHandler
|
|
||||||
.long TIM7_IRQHandler
|
|
||||||
.long DMA2_Channel1_IRQHandler
|
|
||||||
.long DMA2_Channel2_IRQHandler
|
|
||||||
.long DMA2_Channel3_IRQHandler
|
|
||||||
.long DMA2_Channel4_IRQHandler
|
|
||||||
.long DMA2_Channel5_IRQHandler
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long CAN2_TX_IRQHandler
|
|
||||||
.long CAN2_RX0_IRQHandler
|
|
||||||
.long CAN2_RX1_IRQHandler
|
|
||||||
.long CAN2_SCE_IRQHandler
|
|
||||||
.long OTG_FS_IRQHandler
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long 0
|
|
||||||
.long BootRAM /* @0x1E0. This is for boot in RAM mode for
|
|
||||||
STM32F10x Connectivity line Devices. */
|
|
||||||
|
|
||||||
.size __isr_vector, . - __isr_vector
|
|
||||||
|
|
||||||
.text
|
|
||||||
.thumb
|
|
||||||
.thumb_func
|
|
||||||
.align 2
|
|
||||||
.globl Reset_Handler
|
|
||||||
.type Reset_Handler, %function
|
|
||||||
Reset_Handler:
|
|
||||||
/* Firstly it copies data from read only memory to RAM. There are two schemes
|
|
||||||
* to copy. One can copy more than one sections. Another can only copy
|
|
||||||
* one section. The former scheme needs more instructions and read-only
|
|
||||||
* data to implement than the latter.
|
|
||||||
* Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */
|
|
||||||
|
|
||||||
#ifdef __STARTUP_COPY_MULTIPLE
|
|
||||||
/* Multiple sections scheme.
|
|
||||||
*
|
|
||||||
* Between symbol address __copy_table_start__ and __copy_table_end__,
|
|
||||||
* there are array of triplets, each of which specify:
|
|
||||||
* offset 0: LMA of start of a section to copy from
|
|
||||||
* offset 4: VMA of start of a section to copy to
|
|
||||||
* offset 8: size of the section to copy. Must be multiply of 4
|
|
||||||
*
|
|
||||||
* All addresses must be aligned to 4 bytes boundary.
|
|
||||||
*/
|
|
||||||
ldr r4, =__copy_table_start__
|
|
||||||
ldr r5, =__copy_table_end__
|
|
||||||
|
|
||||||
.L_loop0:
|
|
||||||
cmp r4, r5
|
|
||||||
bge .L_loop0_done
|
|
||||||
ldr r1, [r4]
|
|
||||||
ldr r2, [r4, #4]
|
|
||||||
ldr r3, [r4, #8]
|
|
||||||
|
|
||||||
.L_loop0_0:
|
|
||||||
subs r3, #4
|
|
||||||
ittt ge
|
|
||||||
ldrge r0, [r1, r3]
|
|
||||||
strge r0, [r2, r3]
|
|
||||||
bge .L_loop0_0
|
|
||||||
|
|
||||||
adds r4, #12
|
|
||||||
b .L_loop0
|
|
||||||
|
|
||||||
.L_loop0_done:
|
|
||||||
#else
|
|
||||||
/* Single section scheme.
|
|
||||||
*
|
|
||||||
* The ranges of copy from/to are specified by following symbols
|
|
||||||
* __etext: LMA of start of the section to copy from. Usually end of text
|
|
||||||
* __data_start__: VMA of start of the section to copy to
|
|
||||||
* __data_end__: VMA of end of the section to copy to
|
|
||||||
*
|
|
||||||
* All addresses must be aligned to 4 bytes boundary.
|
|
||||||
*/
|
|
||||||
ldr r1, =__etext
|
|
||||||
ldr r2, =__data_start__
|
|
||||||
ldr r3, =__data_end__
|
|
||||||
|
|
||||||
.L_loop1:
|
|
||||||
cmp r2, r3
|
|
||||||
ittt lt
|
|
||||||
ldrlt r0, [r1], #4
|
|
||||||
strlt r0, [r2], #4
|
|
||||||
blt .L_loop1
|
|
||||||
#endif /*__STARTUP_COPY_MULTIPLE */
|
|
||||||
|
|
||||||
/* This part of work usually is done in C library startup code. Otherwise,
|
|
||||||
* define this macro to enable it in this startup.
|
|
||||||
*
|
|
||||||
* There are two schemes too. One can clear multiple BSS sections. Another
|
|
||||||
* can only clear one section. The former is more size expensive than the
|
|
||||||
* latter.
|
|
||||||
*
|
|
||||||
* Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former.
|
|
||||||
* Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later.
|
|
||||||
*/
|
|
||||||
#ifdef __STARTUP_CLEAR_BSS_MULTIPLE
|
|
||||||
/* Multiple sections scheme.
|
|
||||||
*
|
|
||||||
* Between symbol address __copy_table_start__ and __copy_table_end__,
|
|
||||||
* there are array of tuples specifying:
|
|
||||||
* offset 0: Start of a BSS section
|
|
||||||
* offset 4: Size of this BSS section. Must be multiply of 4
|
|
||||||
*/
|
|
||||||
ldr r3, =__zero_table_start__
|
|
||||||
ldr r4, =__zero_table_end__
|
|
||||||
|
|
||||||
.L_loop2:
|
|
||||||
cmp r3, r4
|
|
||||||
bge .L_loop2_done
|
|
||||||
ldr r1, [r3]
|
|
||||||
ldr r2, [r3, #4]
|
|
||||||
movs r0, 0
|
|
||||||
|
|
||||||
.L_loop2_0:
|
|
||||||
subs r2, #4
|
|
||||||
itt ge
|
|
||||||
strge r0, [r1, r2]
|
|
||||||
bge .L_loop2_0
|
|
||||||
|
|
||||||
adds r3, #8
|
|
||||||
b .L_loop2
|
|
||||||
.L_loop2_done:
|
|
||||||
#elif defined (__STARTUP_CLEAR_BSS)
|
|
||||||
/* Single BSS section scheme.
|
|
||||||
*
|
|
||||||
* The BSS section is specified by following symbols
|
|
||||||
* __bss_start__: start of the BSS section.
|
|
||||||
* __bss_end__: end of the BSS section.
|
|
||||||
*
|
|
||||||
* Both addresses must be aligned to 4 bytes boundary.
|
|
||||||
*/
|
|
||||||
ldr r1, =__bss_start__
|
|
||||||
ldr r2, =__bss_end__
|
|
||||||
|
|
||||||
movs r0, 0
|
|
||||||
.L_loop3:
|
|
||||||
cmp r1, r2
|
|
||||||
itt lt
|
|
||||||
strlt r0, [r1], #4
|
|
||||||
blt .L_loop3
|
|
||||||
#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */
|
|
||||||
|
|
||||||
#ifndef __NO_SYSTEM_INIT
|
|
||||||
bl SystemInit
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifndef __START
|
|
||||||
#define __START _start
|
|
||||||
#endif
|
|
||||||
bl __START
|
|
||||||
|
|
||||||
.pool
|
|
||||||
.size Reset_Handler, . - Reset_Handler
|
|
||||||
|
|
||||||
.align 1
|
|
||||||
.thumb_func
|
|
||||||
.weak Default_Handler
|
|
||||||
.type Default_Handler, %function
|
|
||||||
Default_Handler:
|
|
||||||
b .
|
|
||||||
.size Default_Handler, . - Default_Handler
|
|
||||||
|
|
||||||
/* Macro to define default handlers. Default handler
|
|
||||||
* will be weak symbol and just dead loops. They can be
|
|
||||||
* overwritten by other handlers */
|
|
||||||
.macro def_irq_handler handler_name
|
|
||||||
.weak \handler_name
|
|
||||||
.set \handler_name, Default_Handler
|
|
||||||
.endm
|
|
||||||
|
|
||||||
def_irq_handler NMI_Handler
|
|
||||||
def_irq_handler HardFault_Handler
|
|
||||||
def_irq_handler MemManage_Handler
|
|
||||||
def_irq_handler BusFault_Handler
|
|
||||||
def_irq_handler UsageFault_Handler
|
|
||||||
def_irq_handler SVC_Handler
|
|
||||||
def_irq_handler DebugMon_Handler
|
|
||||||
def_irq_handler PendSV_Handler
|
|
||||||
def_irq_handler SysTick_Handler
|
|
||||||
def_irq_handler WWDG_IRQHandler
|
|
||||||
def_irq_handler PVD_IRQHandler
|
|
||||||
def_irq_handler TAMPER_IRQHandler
|
|
||||||
def_irq_handler RTC_IRQHandler
|
|
||||||
def_irq_handler FLASH_IRQHandler
|
|
||||||
def_irq_handler RCC_IRQHandler
|
|
||||||
def_irq_handler EXTI0_IRQHandler
|
|
||||||
def_irq_handler EXTI1_IRQHandler
|
|
||||||
def_irq_handler EXTI2_IRQHandler
|
|
||||||
def_irq_handler EXTI3_IRQHandler
|
|
||||||
def_irq_handler EXTI4_IRQHandler
|
|
||||||
def_irq_handler DMA1_Channel1_IRQHandler
|
|
||||||
def_irq_handler DMA1_Channel2_IRQHandler
|
|
||||||
def_irq_handler DMA1_Channel3_IRQHandler
|
|
||||||
def_irq_handler DMA1_Channel4_IRQHandler
|
|
||||||
def_irq_handler DMA1_Channel5_IRQHandler
|
|
||||||
def_irq_handler DMA1_Channel6_IRQHandler
|
|
||||||
def_irq_handler DMA1_Channel7_IRQHandler
|
|
||||||
def_irq_handler ADC1_2_IRQHandler
|
|
||||||
def_irq_handler CAN1_TX_IRQHandler
|
|
||||||
def_irq_handler CAN1_RX0_IRQHandler
|
|
||||||
def_irq_handler CAN1_RX1_IRQHandler
|
|
||||||
def_irq_handler CAN1_SCE_IRQHandler
|
|
||||||
def_irq_handler EXTI9_5_IRQHandler
|
|
||||||
def_irq_handler TIM1_BRK_IRQHandler
|
|
||||||
def_irq_handler TIM1_UP_IRQHandler
|
|
||||||
def_irq_handler TIM1_TRG_COM_IRQHandler
|
|
||||||
def_irq_handler TIM1_CC_IRQHandler
|
|
||||||
def_irq_handler TIM2_IRQHandler
|
|
||||||
def_irq_handler TIM3_IRQHandler
|
|
||||||
def_irq_handler TIM4_IRQHandler
|
|
||||||
def_irq_handler I2C1_EV_IRQHandler
|
|
||||||
def_irq_handler I2C1_ER_IRQHandler
|
|
||||||
def_irq_handler I2C2_EV_IRQHandler
|
|
||||||
def_irq_handler I2C2_ER_IRQHandler
|
|
||||||
def_irq_handler SPI1_IRQHandler
|
|
||||||
def_irq_handler SPI2_IRQHandler
|
|
||||||
def_irq_handler USART1_IRQHandler
|
|
||||||
def_irq_handler USART2_IRQHandler
|
|
||||||
def_irq_handler USART3_IRQHandler
|
|
||||||
def_irq_handler EXTI15_10_IRQHandler
|
|
||||||
def_irq_handler RTC_Alarm_IRQHandler
|
|
||||||
def_irq_handler OTG_FS_WKUP_IRQHandler
|
|
||||||
def_irq_handler TIM5_IRQHandler
|
|
||||||
def_irq_handler SPI3_IRQHandler
|
|
||||||
def_irq_handler UART4_IRQHandler
|
|
||||||
def_irq_handler UART5_IRQHandler
|
|
||||||
def_irq_handler TIM6_IRQHandler
|
|
||||||
def_irq_handler TIM7_IRQHandler
|
|
||||||
def_irq_handler DMA2_Channel1_IRQHandler
|
|
||||||
def_irq_handler DMA2_Channel2_IRQHandler
|
|
||||||
def_irq_handler DMA2_Channel3_IRQHandler
|
|
||||||
def_irq_handler DMA2_Channel4_IRQHandler
|
|
||||||
def_irq_handler DMA2_Channel5_IRQHandler
|
|
||||||
def_irq_handler CAN2_TX_IRQHandler
|
|
||||||
def_irq_handler CAN2_RX0_IRQHandler
|
|
||||||
def_irq_handler CAN2_RX1_IRQHandler
|
|
||||||
def_irq_handler CAN2_SCE_IRQHandler
|
|
||||||
def_irq_handler OTG_FS_IRQHandler
|
|
||||||
|
|
||||||
.end
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
@ -1,227 +0,0 @@
|
||||||
/**
|
|
||||||
******************************************************************************
|
|
||||||
* @file system_stm32f1xx.c
|
|
||||||
* @author MCD Application Team, Wojciech Krutnik
|
|
||||||
* @version V2.2.2
|
|
||||||
* @date 26-June-2015
|
|
||||||
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
|
|
||||||
*
|
|
||||||
* 1. This file provides two functions and one global variable to be called from
|
|
||||||
* user application:
|
|
||||||
* - SystemInit(): This function is called at startup just after reset and
|
|
||||||
* before branch to main program. This call is made inside
|
|
||||||
* the "startup_stm32f1xx.s" file.
|
|
||||||
*
|
|
||||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
|
||||||
* by the user application to setup the SysTick
|
|
||||||
* timer or configure other parameters.
|
|
||||||
*
|
|
||||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
|
||||||
* be called whenever the core clock is changed
|
|
||||||
* during program execution.
|
|
||||||
*
|
|
||||||
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
|
|
||||||
* Then SystemInit() function is called, in "startup_stm32f1xx.s" file, to
|
|
||||||
* configure the system clock before to branch to main program.
|
|
||||||
*
|
|
||||||
* 3. This file configures the system clock and flash as follows:
|
|
||||||
*=============================================================================
|
|
||||||
* Supported STM32F1xx device
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
* System Clock source | PLL
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
* SYSCLK | 72MHz
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
* HCLK | 72Mhz
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
* PCLK1 | 36MHz
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
* PCLK2 | 72MHz
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
* AHB Prescaler | 1
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
* APB1 Prescaler | 2
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
* APB2 Prescaler | 1
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
* PLLSRC | HSE/1
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
* PLLMUL | 9
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
* HSE | 8MHz
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
* Flash Latency(WS) | 2
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
* Prefetch Buffer | ON
|
|
||||||
*-----------------------------------------------------------------------------
|
|
||||||
*=============================================================================
|
|
||||||
******************************************************************************
|
|
||||||
* @attention
|
|
||||||
*
|
|
||||||
* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
|
||||||
*
|
|
||||||
* Redistribution and use in source and binary forms, with or without modification,
|
|
||||||
* are permitted provided that the following conditions are met:
|
|
||||||
* 1. Redistributions of source code must retain the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer.
|
|
||||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
|
||||||
* this list of conditions and the following disclaimer in the documentation
|
|
||||||
* and/or other materials provided with the distribution.
|
|
||||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
|
||||||
* may be used to endorse or promote products derived from this software
|
|
||||||
* without specific prior written permission.
|
|
||||||
*
|
|
||||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
|
||||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
|
||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
|
||||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
|
||||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
|
||||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
|
||||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
|
||||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
*
|
|
||||||
******************************************************************************
|
|
||||||
*/
|
|
||||||
#if defined(STM32F105xC)
|
|
||||||
|
|
||||||
/** @addtogroup CMSIS
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup stm32f1xx_system
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup STM32F1xx_System_Private_Includes
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include "stm32f1xx.h"
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup STM32F1xx_System_Private_Defines
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
#if !defined (HSE_VALUE)
|
|
||||||
#define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.
|
|
||||||
This value can be provided and adapted by the user application. */
|
|
||||||
#endif /* HSE_VALUE */
|
|
||||||
|
|
||||||
#if !defined (HSI_VALUE)
|
|
||||||
#define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.
|
|
||||||
This value can be provided and adapted by the user application. */
|
|
||||||
#endif /* HSI_VALUE */
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup STM32f1xx_System_Private_Macros
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup STM32F1xx_System_Private_Variables
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
uint32_t SystemCoreClock = 48000000;
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
static void SetSysClock(void);
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/** @addtogroup STM32F1xx_System_Private_Functions
|
|
||||||
* @{
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Setup the microcontroller system.
|
|
||||||
* Initialize the default HSI clock source, vector table location and the PLL configuration is reset.
|
|
||||||
* @param None
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
void SystemInit(void)
|
|
||||||
{
|
|
||||||
/* Enable Prefetch Buffer, 2 wait states */
|
|
||||||
FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY_1;
|
|
||||||
|
|
||||||
/* Configure the System clock frequency, AHB/APBx prescalers */
|
|
||||||
SetSysClock();
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @brief Configures the System clock frequency and AHB/APBx prescalers
|
|
||||||
* settings.
|
|
||||||
* @param None
|
|
||||||
* @retval None
|
|
||||||
*/
|
|
||||||
static void SetSysClock(void)
|
|
||||||
{
|
|
||||||
/* Enable HSE and Clock Security System */
|
|
||||||
RCC->CR |= RCC_CR_CSSON | RCC_CR_HSEON;
|
|
||||||
/* Wait for HSE startup */
|
|
||||||
while((RCC->CR & RCC_CR_HSERDY) == 0)
|
|
||||||
;
|
|
||||||
|
|
||||||
/* Enable PLL with 9x multiplier and HSE clock source
|
|
||||||
* APB1 prescaler /2 */
|
|
||||||
RCC->CFGR = (RCC->CFGR & (~RCC_CFGR_PLLMULL)) | RCC_CFGR_PLLMULL9
|
|
||||||
| RCC_CFGR_PLLSRC;
|
|
||||||
RCC->CR |= RCC_CR_PLLON;
|
|
||||||
while((RCC->CR & RCC_CR_PLLRDY) == 0)
|
|
||||||
;
|
|
||||||
|
|
||||||
/* HCLK = SYSCLK */
|
|
||||||
RCC->CFGR = (RCC->CFGR & ~RCC_CFGR_HPRE) | RCC_CFGR_HPRE_DIV1;
|
|
||||||
/* PCLK1 = HCLK/2; PCLK2 = HCLK */
|
|
||||||
RCC->CFGR = (RCC->CFGR & ~(RCC_CFGR_PPRE1|RCC_CFGR_PPRE2))
|
|
||||||
| RCC_CFGR_PPRE1_DIV2;
|
|
||||||
|
|
||||||
/* Switch SYSCLK to PLL */
|
|
||||||
RCC->CFGR |= RCC_CFGR_SW_PLL;
|
|
||||||
while((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL)
|
|
||||||
;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
/**
|
|
||||||
* @}
|
|
||||||
*/
|
|
||||||
|
|
||||||
#endif
|
|
||||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
|
||||||
|
|
||||||
Loading…
Reference in New Issue