Superminaren
/
MMDVM
mirror of https://github.com/g4klx/MMDVM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Adding DMR 1031 Hz Test Pattern

This commit is contained in:
Andy CA6JAU 2018-01-03 00:55:14 -03:00
parent b846e5a7f3
commit 4871ad1210
8 changed files with 196 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

148
CalDMR.cpp
View File

@ -21,19 +21,152 @@
#include "Globals.h" #include "Globals.h"
#include "CalDMR.h" #include "CalDMR.h"
const uint8_t DATALC_1K[] = {0x00U,
0x00U, 0x20U, 0x08U, 0x08U, 0x02U, 0x38U, 0x15U, 0x00U, 0x2CU, 0xA0U, 0x14U,
0x60U, 0x84U, 0x6DU, 0xFFU, 0x57U, 0xD7U, 0x5DU, 0xF5U, 0xDEU, 0x30U, 0x30U,
0x01U, 0x10U, 0x01U, 0x40U, 0x03U, 0xC0U, 0x13U, 0xC1U, 0x1EU, 0x80U, 0x6FU};
const uint8_t DATATERMLC_1K[] = {0x00U,
0x00U, 0x4FU, 0x08U, 0xDCU, 0x02U, 0x88U, 0x15U, 0x78U, 0x2CU, 0xD0U, 0x14U,
0xC0U, 0x84U, 0xADU, 0xFFU, 0x57U, 0xD7U, 0x5DU, 0xF5U, 0xD9U, 0x65U, 0x24U,
0x02U, 0x28U, 0x06U, 0x20U, 0x0FU, 0x80U, 0x1BU, 0xC1U, 0x07U, 0x80U, 0x5CU};
const uint8_t VOICE0_1K[] = {0x00U,
0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU, 0xCEU, 0xA8U,
0xFEU, 0x83U, 0xA7U, 0x55U, 0xFDU, 0x7DU, 0xF7U, 0x5FU, 0x7CU, 0xC4U, 0x58U,
0x20U, 0x0AU, 0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU};
//0xA1U, 0x30U, 0x00U, 0x00U, 0x90U, 0x09U, 0x1CU,
const uint8_t VOICE1_1K[] = {0x00U,
0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU, 0xCEU, 0xA8U,
0xFEU, 0x83U, 0xA1U, 0x30U, 0x00U, 0x00U, 0x90U, 0x09U, 0x1CU, 0xC4U, 0x58U,
0x20U, 0x0AU, 0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU};
//0xA1U, 0x70U, 0x00U, 0x90U, 0x00U, 0x07U, 0x4CU,
const uint8_t VOICE2_1K[] = {0x00U,
0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU, 0xCEU, 0xA8U,
0xFEU, 0x83U, 0xA1U, 0x70U, 0x00U, 0x90U, 0x00U, 0x07U, 0x4CU, 0xC4U, 0x58U,
0x20U, 0x0AU, 0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU};
//0xA1U, 0x70U, 0x00U, 0x31U, 0x40U, 0x07U, 0x4CU,
const uint8_t VOICE3_1K[] = {0x00U,
0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU, 0xCEU, 0xA8U,
0xFEU, 0x83U, 0xA1U, 0x70U, 0x00U, 0x31U, 0x40U, 0x07U, 0x4CU, 0xC4U, 0x58U,
0x20U, 0x0AU, 0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU};
//0xA1U, 0x50U, 0xA1U, 0x71U, 0xD1U, 0x70U, 0x7CU,
const uint8_t VOICE4_1K[] = {0x00U,
0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU, 0xCEU, 0xA8U,
0xFEU, 0x83U, 0xA1U, 0x50U, 0xA1U, 0x71U, 0xD1U, 0x70U, 0x7CU, 0xC4U, 0x58U,
0x20U, 0x0AU, 0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU};
//0xA1U, 0x10U, 0x00U, 0x00U, 0x00U, 0x0EU, 0x2CU,
const uint8_t VOICE5_1K[] = {0x00U,
0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU, 0xCEU, 0xA8U,
0xFEU, 0x83U, 0xA1U, 0x10U, 0x00U, 0x00U, 0x00U, 0x0EU, 0x2CU, 0xC4U, 0x58U,
0x20U, 0x0AU, 0xCEU, 0xA8U, 0xFEU, 0x83U, 0xACU, 0xC4U, 0x58U, 0x20U, 0x0AU};
const uint8_t SHORTLC_1K[] = {0x33U, 0x3AU, 0xA0U, 0x30U, 0x00U, 0x55U, 0xA6U, 0x5FU, 0x50U};
CCalDMR::CCalDMR() : CCalDMR::CCalDMR() :
m_transmit(false) m_transmit(false),
m_state(DMR1KCAL_IDLE),
m_frame_start(0U)
{ {
} }
void CCalDMR::process() void CCalDMR::process()
{ {
if (m_transmit) { switch (m_modemState) {
dmrTX.setCal(true); case STATE_DMRCAL:
dmrTX.process(); case STATE_LFCAL:
} else { if (m_transmit) {
dmrTX.setCal(false); dmrTX.setCal(true);
dmrTX.process();
} else {
dmrTX.setCal(false);
}
break;
case STATE_DMR1KCAL:
dmr1kcal();
break;
default:
break;
}
}
void CCalDMR::dmr1kcal()
{
switch (m_state) {
case DMR1KCAL_IDLE:
dmrTX.setStart(false);
dmrTX.resetFifo2();
m_state = DMR1KCAL_IDLE;
break;
case DMR1KCAL_DATALC:
dmrTX.setColorCode(1U);
dmrTX.writeShortLC(SHORTLC_1K, 9U);
dmrTX.setStart(true);
if (dmrTX.writeData2(DATALC_1K, DMR_FRAME_LENGTH_BYTES + 1U) == 5U)
m_state = DMR1KCAL_DATALC;
else
m_state = DMR1KCAL_V0;
break;
case DMR1KCAL_V0:
if (dmrTX.writeData2(VOICE0_1K, DMR_FRAME_LENGTH_BYTES + 1U) == 5U)
m_state = DMR1KCAL_V0;
else
m_state = DMR1KCAL_V1;
break;
case DMR1KCAL_V1:
if (dmrTX.writeData2(VOICE1_1K, DMR_FRAME_LENGTH_BYTES + 1U) == 5U)
m_state = DMR1KCAL_V1;
else
m_state = DMR1KCAL_V2;
break;
case DMR1KCAL_V2:
if (dmrTX.writeData2(VOICE2_1K, DMR_FRAME_LENGTH_BYTES + 1U) == 5U)
m_state = DMR1KCAL_V2;
else
m_state = DMR1KCAL_V3;
break;
case DMR1KCAL_V3:
if (dmrTX.writeData2(VOICE3_1K, DMR_FRAME_LENGTH_BYTES + 1U) == 5U)
m_state = DMR1KCAL_V3;
else
m_state = DMR1KCAL_V4;
break;
case DMR1KCAL_V4:
if (dmrTX.writeData2(VOICE4_1K, DMR_FRAME_LENGTH_BYTES + 1U) == 5U)
m_state = DMR1KCAL_V4;
else
m_state = DMR1KCAL_V5;
break;
case DMR1KCAL_V5:
if (dmrTX.writeData2(VOICE5_1K, DMR_FRAME_LENGTH_BYTES + 1U) == 5U)
m_state = DMR1KCAL_V5;
else {
if(m_transmit)
m_state = DMR1KCAL_V0;
else
m_state = DMR1KCAL_TERMLC;
}
break;
case DMR1KCAL_TERMLC:
if (dmrTX.writeData2(DATATERMLC_1K, DMR_FRAME_LENGTH_BYTES + 1U) == 5U)
m_state = DMR1KCAL_TERMLC;
else {
m_state = DMR1KCAL_WAIT;
m_frame_start = dmrTX.getFrameCount();
}
break;
case DMR1KCAL_WAIT:
if (dmrTX.getFrameCount() > (m_frame_start + 30U))
m_state = DMR1KCAL_IDLE;
break;
default:
m_state = DMR1KCAL_IDLE;
break;
} }
} }
@ -44,6 +177,9 @@ uint8_t CCalDMR::write(const uint8_t* data, uint8_t length)
m_transmit = data[0U] == 1U; m_transmit = data[0U] == 1U;
if(m_transmit && m_state == DMR1KCAL_IDLE && m_modemState == STATE_DMR1KCAL)
m_state = DMR1KCAL_DATALC;
return 0U; return 0U;
} }

18
CalDMR.h
View File

@ -23,16 +23,32 @@
#include "Config.h" #include "Config.h"
#include "DMRDefines.h" #include "DMRDefines.h"
enum DMR1KCAL {
DMR1KCAL_IDLE,
DMR1KCAL_DATALC,
DMR1KCAL_V0,
DMR1KCAL_V1,
DMR1KCAL_V2,
DMR1KCAL_V3,
DMR1KCAL_V4,
DMR1KCAL_V5,
DMR1KCAL_TERMLC,
DMR1KCAL_WAIT
};
class CCalDMR { class CCalDMR {
public: public:
CCalDMR(); CCalDMR();
void process(); void process();
void dmr1kcal();
uint8_t write(const uint8_t* data, uint8_t length); uint8_t write(const uint8_t* data, uint8_t length);
private: private:
bool m_transmit; bool m_transmit;
DMR1KCAL m_state;
uint32_t m_frame_start;
}; };
#endif #endif

14
DMRTX.cpp
View File

@ -389,3 +389,17 @@ void CDMRTX::setColorCode(uint8_t colorCode)
slotType.encode(colorCode, DT_IDLE, m_idle); slotType.encode(colorCode, DT_IDLE, m_idle);
} }
void CDMRTX::resetFifo1()
{
m_fifo[0U].reset();
}
void CDMRTX::resetFifo2()
{
m_fifo[1U].reset();
}
uint32_t CDMRTX::getFrameCount()
{
return m_frameCount;
}

6
DMRTX.h
View File

@ -48,7 +48,11 @@ public:
void setCal(bool start); void setCal(bool start);
void process(); void process();
void resetFifo1();
void resetFifo2();
uint32_t getFrameCount();
uint8_t getSpace1() const; uint8_t getSpace1() const;
uint8_t getSpace2() const; uint8_t getSpace2() const;

1
Globals.h
View File

@ -50,6 +50,7 @@ enum MMDVM_STATE {
STATE_P25 = 4, STATE_P25 = 4,
// Dummy states start at 90 // Dummy states start at 90
STATE_DMR1KCAL = 94,
STATE_LFCAL = 95, STATE_LFCAL = 95,
STATE_RSSICAL = 96, STATE_RSSICAL = 96,
STATE_CWID = 97, STATE_CWID = 97,

4
MMDVM.cpp
View File

@ -77,7 +77,7 @@ void loop()
if (m_dstarEnable && m_modemState == STATE_DSTAR) if (m_dstarEnable && m_modemState == STATE_DSTAR)
dstarTX.process(); dstarTX.process();
if (m_dmrEnable && m_modemState == STATE_DMR) { if ((m_dmrEnable && m_modemState == STATE_DMR) || m_modemState == STATE_DMR1KCAL) {
if (m_duplex) if (m_duplex)
dmrTX.process(); dmrTX.process();
else else
@ -93,7 +93,7 @@ void loop()
if (m_modemState == STATE_DSTARCAL) if (m_modemState == STATE_DSTARCAL)
calDStarTX.process(); calDStarTX.process();
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL) if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMR1KCAL)
calDMR.process(); calDMR.process();
if (m_modemState == STATE_IDLE) if (m_modemState == STATE_IDLE)

4
MMDVM.ino
View File

@ -74,7 +74,7 @@ void loop()
if (m_dstarEnable && m_modemState == STATE_DSTAR) if (m_dstarEnable && m_modemState == STATE_DSTAR)
dstarTX.process(); dstarTX.process();
if (m_dmrEnable && m_modemState == STATE_DMR) { if ((m_dmrEnable && m_modemState == STATE_DMR) || m_modemState == STATE_DMR1KCAL) {
if (m_duplex) if (m_duplex)
dmrTX.process(); dmrTX.process();
else else
@ -90,7 +90,7 @@ void loop()
if (m_modemState == STATE_DSTARCAL) if (m_modemState == STATE_DSTARCAL)
calDStarTX.process(); calDStarTX.process();
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL) if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMR1KCAL)
calDMR.process(); calDMR.process();
if (m_modemState == STATE_IDLE) if (m_modemState == STATE_IDLE)

16
SerialPort.cpp
View File

@ -243,7 +243,7 @@ uint8_t CSerialPort::setConfig(const uint8_t* data, uint8_t length)
MMDVM_STATE modemState = MMDVM_STATE(data[3U]); MMDVM_STATE modemState = MMDVM_STATE(data[3U]);
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL) if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMR1KCAL)
return 4U; return 4U;
if (modemState == STATE_DSTAR && !dstarEnable) if (modemState == STATE_DSTAR && !dstarEnable)
return 4U; return 4U;
@ -309,7 +309,7 @@ uint8_t CSerialPort::setMode(const uint8_t* data, uint8_t length)
if (modemState == m_modemState) if (modemState == m_modemState)
return 0U; return 0U;
if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL) if (modemState != STATE_IDLE && modemState != STATE_DSTAR && modemState != STATE_DMR && modemState != STATE_YSF && modemState != STATE_P25 && modemState != STATE_DSTARCAL && modemState != STATE_DMRCAL && modemState != STATE_RSSICAL && modemState != STATE_LFCAL && modemState != STATE_DMR1KCAL)
return 4U; return 4U;
if (modemState == STATE_DSTAR && !m_dstarEnable) if (modemState == STATE_DSTAR && !m_dstarEnable)
return 4U; return 4U;
@ -402,6 +402,16 @@ void CSerialPort::setMode(MMDVM_STATE modemState)
p25RX.reset(); p25RX.reset();
cwIdTX.reset(); cwIdTX.reset();
break; break;
case STATE_DMR1KCAL:
DEBUG1("Mode set to DMR 1031 Hz Calibrate");
dmrIdleRX.reset();
dmrDMORX.reset();
dmrRX.reset();
dstarRX.reset();
ysfRX.reset();
p25RX.reset();
cwIdTX.reset();
break;
default: default:
DEBUG1("Mode set to Idle"); DEBUG1("Mode set to Idle");
// STATE_IDLE // STATE_IDLE
@ -483,7 +493,7 @@ void CSerialPort::process()
case MMDVM_CAL_DATA: case MMDVM_CAL_DATA:
if (m_modemState == STATE_DSTARCAL) if (m_modemState == STATE_DSTARCAL)
err = calDStarTX.write(m_buffer + 3U, m_len - 3U); err = calDStarTX.write(m_buffer + 3U, m_len - 3U);
if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL) if (m_modemState == STATE_DMRCAL || m_modemState == STATE_LFCAL || m_modemState == STATE_DMR1KCAL)
err = calDMR.write(m_buffer + 3U, m_len - 3U); err = calDMR.write(m_buffer + 3U, m_len - 3U);
if (err == 0U) { if (err == 0U) {
sendACK(); sendACK();