mirror of https://github.com/g4klx/MMDVM.git
Merge branch 'FM' into dstar_correlator_fm
This commit is contained in:
Jonathan Naylor
commit
48034189d2
|
|
@ -0,0 +1,70 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2019,2020 by BG5HHP
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _IO_PINS_H
|
||||||
|
#define _IO_PINS_H
|
||||||
|
|
||||||
|
#if !defined(CONFIG_H)
|
||||||
|
#error "Requires Config.h to be included first!"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined(STM32F4_RPT_HAT_TGO)
|
||||||
|
#include "pins/pins_f4_rpt_tgo.h"
|
||||||
|
|
||||||
|
#elif defined(STM32F4_DISCOVERY)
|
||||||
|
#include "pins/pins_f4_discovery.h"
|
||||||
|
|
||||||
|
#elif defined(STM32F4_PI)
|
||||||
|
#include "pins/pins_f4_pi.h"
|
||||||
|
|
||||||
|
#elif defined(STM32F722_PI)
|
||||||
|
#include "pins/pins_f7_pi.h"
|
||||||
|
|
||||||
|
#elif defined(STM32F4_F4M)
|
||||||
|
#include "pins/pins_f4_f4m.h"
|
||||||
|
|
||||||
|
#elif defined(STM32F722_F7M)
|
||||||
|
#include "pins/pins_f7_f7m.h"
|
||||||
|
|
||||||
|
#elif defined(STM32F722_RPT_HAT)
|
||||||
|
#include "pins/pins_f7_rpt_hat.h"
|
||||||
|
|
||||||
|
#elif defined(STM32F4_NUCLEO)
|
||||||
|
#if defined(STM32F4_NUCLEO_MORPHO_HEADER)
|
||||||
|
#include "pins/pins_f4_nucleo_morpho.h"
|
||||||
|
#elif defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
||||||
|
#include "pins/pins_f4_nucleo_arduino.h"
|
||||||
|
#else
|
||||||
|
#error "Either STM32F4_NUCLEO_MORPHO_HEADER or STM32F4_NUCLEO_ARDUINO_HEADER need to be defined"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#elif defined(STM32F7_NUCLEO)
|
||||||
|
#include "pins/pins_f7_nucleo.h"
|
||||||
|
|
||||||
|
#elif defined(STM32F4_DVM)
|
||||||
|
#include "pins/pins_f4_stm32dvm_v3.h"
|
||||||
|
|
||||||
|
#elif defined(DRCC_DVM_NQF)
|
||||||
|
#include "pins/pins_f4_drcc_nqf.h"
|
||||||
|
|
||||||
|
#else
|
||||||
|
#error "A valid board type macro need to be defined."
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif //#ifndef _IO_PINS_H
|
||||||
18
Makefile
18
Makefile
|
|
@ -25,6 +25,7 @@ F7_LIB_PATH=./STM32F7XX_Lib
|
||||||
# MCU external clock frequency (Hz)
|
# MCU external clock frequency (Hz)
|
||||||
CLK_MMDVM_PI=12000000
|
CLK_MMDVM_PI=12000000
|
||||||
CLK_NUCLEO=8000000
|
CLK_NUCLEO=8000000
|
||||||
|
CLK_12MHZ=12000000
|
||||||
|
|
||||||
# Directory Structure
|
# Directory Structure
|
||||||
BINDIR=bin
|
BINDIR=bin
|
||||||
|
|
@ -93,6 +94,8 @@ ifndef $(OSC)
|
||||||
OSC=$(CLK_MMDVM_PI)
|
OSC=$(CLK_MMDVM_PI)
|
||||||
else ifeq ($(MAKECMDGOALS),pi-f722)
|
else ifeq ($(MAKECMDGOALS),pi-f722)
|
||||||
OSC=$(CLK_MMDVM_PI)
|
OSC=$(CLK_MMDVM_PI)
|
||||||
|
else ifeq ($(MAKECMDGOALS),drcc_nqf)
|
||||||
|
OSC=$(CLK_12MHZ)
|
||||||
else
|
else
|
||||||
OSC=$(CLK_NUCLEO)
|
OSC=$(CLK_NUCLEO)
|
||||||
endif
|
endif
|
||||||
|
|
@ -134,6 +137,9 @@ DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHS
|
||||||
DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||||
# MMDVM_RPT_Hat BG4TGO, BG5HHP board:
|
# MMDVM_RPT_Hat BG4TGO, BG5HHP board:
|
||||||
DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||||
|
# DRCC_DVM BG7NQF board:
|
||||||
|
DEFS_DRCC_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DDRCC_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE
|
||||||
|
|
||||||
|
|
||||||
# Build compiler flags
|
# Build compiler flags
|
||||||
CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
|
CFLAGS_F4=-c $(MCFLAGS_F4) $(INCLUDES_F4)
|
||||||
|
|
@ -152,7 +158,7 @@ CXXFLAGS=-Os -fno-exceptions -ffunction-sections -fdata-sections -fno-builtin -f
|
||||||
LDFLAGS=-Os --specs=nano.specs
|
LDFLAGS=-Os --specs=nano.specs
|
||||||
|
|
||||||
# Build Rules
|
# Build Rules
|
||||||
.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm clean
|
.PHONY: all release dis pi pi-f722 f4m nucleo f767 dvm drcc_nqf clean
|
||||||
|
|
||||||
# Default target: Nucleo-64 F446RE board
|
# Default target: Nucleo-64 F446RE board
|
||||||
all: nucleo
|
all: nucleo
|
||||||
|
|
@ -217,6 +223,12 @@ dvm: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DVM)
|
||||||
dvm: LDFLAGS+=$(LDFLAGS_F4)
|
dvm: LDFLAGS+=$(LDFLAGS_F4)
|
||||||
dvm: release_f4
|
dvm: release_f4
|
||||||
|
|
||||||
|
drcc_nqf: GitVersion.h
|
||||||
|
drcc_nqf: CFLAGS+=$(CFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
|
||||||
|
drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF
|
||||||
|
drcc_nqf: LDFLAGS+=$(LDFLAGS_F4)
|
||||||
|
drcc_nqf: release_f4
|
||||||
|
|
||||||
release_f4: $(BINDIR)
|
release_f4: $(BINDIR)
|
||||||
release_f4: $(OBJDIR_F4)
|
release_f4: $(OBJDIR_F4)
|
||||||
release_f4: $(BINDIR)/$(BINHEX_F4)
|
release_f4: $(BINDIR)/$(BINHEX_F4)
|
||||||
|
|
@ -365,3 +377,7 @@ else
|
||||||
echo "#define GITVERSION \"0000000\"" > $@
|
echo "#define GITVERSION \"0000000\"" > $@
|
||||||
endif
|
endif
|
||||||
endif
|
endif
|
||||||
|
|
||||||
|
flash_f4:
|
||||||
|
@echo "flashing firmware..."
|
||||||
|
st-flash write bin/$(BINBIN_F4) 0x8000000
|
||||||
|
|
|
||||||
|
|
@ -95,7 +95,9 @@ const uint8_t MMDVM_DEBUG5 = 0xF5U;
|
||||||
#define TCXO "NO TCXO"
|
#define TCXO "NO TCXO"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(STM32F4_RPT_HAT_TGO)
|
#if defined(DRCC_DVM_NQF)
|
||||||
|
#define HW_TYPE "MMDVM DRCC_DVM_NQF"
|
||||||
|
#elif defined(STM32F4_RPT_HAT_TGO)
|
||||||
#define HW_TYPE "MMDVM RPT_HAT_TGO"
|
#define HW_TYPE "MMDVM RPT_HAT_TGO"
|
||||||
#else
|
#else
|
||||||
#define HW_TYPE "MMDVM"
|
#define HW_TYPE "MMDVM"
|
||||||
|
|
|
||||||
|
|
@ -50,7 +50,7 @@ extern "C" {
|
||||||
}
|
}
|
||||||
|
|
||||||
/* ************* USART1 ***************** */
|
/* ************* USART1 ***************** */
|
||||||
#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER))
|
#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM)
|
||||||
|
|
||||||
volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
|
volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE];
|
||||||
volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
|
volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE];
|
||||||
|
|
@ -241,7 +241,7 @@ void WriteUSART1(const uint8_t* data, uint16_t length)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* ************* USART2 ***************** */
|
/* ************* USART2 ***************** */
|
||||||
#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
#if defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) || defined(DRCC_DVM)
|
||||||
|
|
||||||
volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
|
volatile uint8_t TXSerialfifo2[TX_SERIAL_FIFO_SIZE];
|
||||||
volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
|
volatile uint8_t RXSerialfifo2[RX_SERIAL_FIFO_SIZE];
|
||||||
|
|
@ -845,11 +845,15 @@ void CSerialPort::beginInt(uint8_t n, int speed)
|
||||||
InitUSART1(speed);
|
InitUSART1(speed);
|
||||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||||
InitUSART2(speed);
|
InitUSART2(speed);
|
||||||
|
#elif defined(DRCC_DVM)
|
||||||
|
InitUSART1(speed);
|
||||||
#endif
|
#endif
|
||||||
break;
|
break;
|
||||||
case 3U:
|
case 3U:
|
||||||
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
||||||
InitUSART1(speed);
|
InitUSART1(speed);
|
||||||
|
#elif defined(DRCC_DVM)
|
||||||
|
InitUSART2(speed);
|
||||||
#else
|
#else
|
||||||
InitUART5(speed);
|
InitUART5(speed);
|
||||||
#endif
|
#endif
|
||||||
|
|
@ -869,10 +873,14 @@ int CSerialPort::availableInt(uint8_t n)
|
||||||
return AvailUSART1();
|
return AvailUSART1();
|
||||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||||
return AvailUSART2();
|
return AvailUSART2();
|
||||||
|
#elif defined(DRCC_DVM)
|
||||||
|
return AvailUSART1();
|
||||||
#endif
|
#endif
|
||||||
case 3U:
|
case 3U:
|
||||||
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
||||||
return AvailUSART1();
|
return AvailUSART1();
|
||||||
|
#elif defined(DRCC_DVM)
|
||||||
|
return AvailUSART2();
|
||||||
#else
|
#else
|
||||||
return AvailUART5();
|
return AvailUART5();
|
||||||
#endif
|
#endif
|
||||||
|
|
@ -891,10 +899,14 @@ int CSerialPort::availableForWriteInt(uint8_t n)
|
||||||
return AvailForWriteUSART1();
|
return AvailForWriteUSART1();
|
||||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||||
return AvailForWriteUSART2();
|
return AvailForWriteUSART2();
|
||||||
|
#elif defined(DRCC_DVM)
|
||||||
|
return AvailForWriteUSART1();
|
||||||
#endif
|
#endif
|
||||||
case 3U:
|
case 3U:
|
||||||
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
||||||
return AvailForWriteUSART1();
|
return AvailForWriteUSART1();
|
||||||
|
#elif defined(DRCC_DVM)
|
||||||
|
AvailForWriteUSART2();
|
||||||
#else
|
#else
|
||||||
return AvailForWriteUART5();
|
return AvailForWriteUART5();
|
||||||
#endif
|
#endif
|
||||||
|
|
@ -913,10 +925,14 @@ uint8_t CSerialPort::readInt(uint8_t n)
|
||||||
return ReadUSART1();
|
return ReadUSART1();
|
||||||
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
#elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO)
|
||||||
return ReadUSART2();
|
return ReadUSART2();
|
||||||
|
#elif defined(DRCC_DVM)
|
||||||
|
return ReadUSART1();
|
||||||
#endif
|
#endif
|
||||||
case 3U:
|
case 3U:
|
||||||
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
#if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)
|
||||||
return ReadUSART1();
|
return ReadUSART1();
|
||||||
|
#elif defined(DRCC_DVM)
|
||||||
|
return ReadUSART2();
|
||||||
#else
|
#else
|
||||||
return ReadUART5();
|
return ReadUART5();
|
||||||
#endif
|
#endif
|
||||||
|
|
@ -941,6 +957,10 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
|
||||||
WriteUSART2(data, length);
|
WriteUSART2(data, length);
|
||||||
if (flush)
|
if (flush)
|
||||||
TXSerialFlush2();
|
TXSerialFlush2();
|
||||||
|
#elif defined(DRCC_DVM)
|
||||||
|
WriteUSART1(data, length);
|
||||||
|
if (flush)
|
||||||
|
TXSerialFlush1();
|
||||||
#endif
|
#endif
|
||||||
break;
|
break;
|
||||||
case 3U:
|
case 3U:
|
||||||
|
|
@ -948,6 +968,10 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool
|
||||||
WriteUSART1(data, length);
|
WriteUSART1(data, length);
|
||||||
if (flush)
|
if (flush)
|
||||||
TXSerialFlush1();
|
TXSerialFlush1();
|
||||||
|
#elif defined(DRCC_DVM)
|
||||||
|
WriteUSART2(data, length);
|
||||||
|
if (flush)
|
||||||
|
TXSerialFlush2();
|
||||||
#else
|
#else
|
||||||
WriteUART5(data, length);
|
WriteUART5(data, length);
|
||||||
if (flush)
|
if (flush)
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,96 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2019,2020 by BG5HHP
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PINS_F4_DISCOVERY_H
|
||||||
|
#define _PINS_F4_DISCOVERY_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pin definitions for STM32F4 Discovery Board:
|
||||||
|
|
||||||
|
PTT PB13 output P1 Pin37
|
||||||
|
COSLED PA7 output P1 Pin17
|
||||||
|
LED PD15 output P1 Pin47
|
||||||
|
COS PA5 input P1 Pin15
|
||||||
|
|
||||||
|
DSTAR PD12 output P1 Pin44
|
||||||
|
DMR PD13 output P1 Pin45
|
||||||
|
YSF PD14 output P1 Pin46
|
||||||
|
P25 PD11 output P1 Pin43
|
||||||
|
NXDN PD10 output P1 Pin42
|
||||||
|
|
||||||
|
RX PA0 analog input P1 Pin12
|
||||||
|
RSSI PA1 analog input P1 Pin11
|
||||||
|
TX PA4 analog output P1 Pin16
|
||||||
|
|
||||||
|
EXT_CLK PA15 input P2 Pin40
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PIN_COS GPIO_Pin_5
|
||||||
|
#define PORT_COS GPIOA
|
||||||
|
#define RCC_Per_COS RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_PTT GPIO_Pin_13
|
||||||
|
#define PORT_PTT GPIOB
|
||||||
|
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_COSLED GPIO_Pin_7
|
||||||
|
#define PORT_COSLED GPIOA
|
||||||
|
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_LED GPIO_Pin_15
|
||||||
|
#define PORT_LED GPIOD
|
||||||
|
#define RCC_Per_LED RCC_AHB1Periph_GPIOD
|
||||||
|
|
||||||
|
#define PIN_P25 GPIO_Pin_11
|
||||||
|
#define PORT_P25 GPIOD
|
||||||
|
#define RCC_Per_P25 RCC_AHB1Periph_GPIOD
|
||||||
|
|
||||||
|
#define PIN_NXDN GPIO_Pin_10
|
||||||
|
#define PORT_NXDN GPIOD
|
||||||
|
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOD
|
||||||
|
|
||||||
|
#define PIN_DSTAR GPIO_Pin_12
|
||||||
|
#define PORT_DSTAR GPIOD
|
||||||
|
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOD
|
||||||
|
|
||||||
|
#define PIN_DMR GPIO_Pin_13
|
||||||
|
#define PORT_DMR GPIOD
|
||||||
|
#define RCC_Per_DMR RCC_AHB1Periph_GPIOD
|
||||||
|
|
||||||
|
#define PIN_YSF GPIO_Pin_14
|
||||||
|
#define PORT_YSF GPIOD
|
||||||
|
#define RCC_Per_YSF RCC_AHB1Periph_GPIOD
|
||||||
|
|
||||||
|
#define PIN_EXT_CLK GPIO_Pin_15
|
||||||
|
#define SRC_EXT_CLK GPIO_PinSource15
|
||||||
|
#define PORT_EXT_CLK GPIOA
|
||||||
|
|
||||||
|
#define PIN_RX GPIO_Pin_0
|
||||||
|
#define PIN_RX_CH ADC_Channel_0
|
||||||
|
#define PORT_RX GPIOA
|
||||||
|
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_RSSI GPIO_Pin_1
|
||||||
|
#define PIN_RSSI_CH ADC_Channel_1
|
||||||
|
#define PORT_RSSI GPIOA
|
||||||
|
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_TX GPIO_Pin_4
|
||||||
|
#define PIN_TX_CH DAC_Channel_1
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,140 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2019,2020 by BG5HHP
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PINS_F4_DRCC_NQF_H
|
||||||
|
#define _PINS_F4_DRCC_NQF_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pin definitions for DRCC_DVM BG7NQF board rev1
|
||||||
|
|
||||||
|
PTT PB12 output
|
||||||
|
LED_PTT PB4 output
|
||||||
|
LED_COS PB5 output
|
||||||
|
LED_SRV PB10 output
|
||||||
|
COS PB13 input
|
||||||
|
|
||||||
|
DSTAR N/A
|
||||||
|
DMR N/A
|
||||||
|
YSF N/A
|
||||||
|
P25 N/A
|
||||||
|
NXDN N/A
|
||||||
|
POCSAG N/A
|
||||||
|
|
||||||
|
MDSTAR PB14 output
|
||||||
|
MDMR PB8 output
|
||||||
|
MYSF PB9 output
|
||||||
|
MP25 PB15 output
|
||||||
|
MNXDN N/A
|
||||||
|
MPOCSAG N/A
|
||||||
|
|
||||||
|
RX PB0 analog input
|
||||||
|
RSSI PB1 analog input
|
||||||
|
TX PA4 analog output
|
||||||
|
|
||||||
|
EXT_CLK PA15 input
|
||||||
|
|
||||||
|
UART1_TX PA9 output
|
||||||
|
UART1_RX PA10 output
|
||||||
|
UART2_TX PA2 output
|
||||||
|
UART2_RX PA3 output
|
||||||
|
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PIN_COS GPIO_Pin_13
|
||||||
|
#define PORT_COS GPIOB
|
||||||
|
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_PTT GPIO_Pin_12
|
||||||
|
#define PORT_PTT GPIOB
|
||||||
|
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_COSLED GPIO_Pin_5
|
||||||
|
#define PORT_COSLED GPIOB
|
||||||
|
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_LED GPIO_Pin_10
|
||||||
|
#define PORT_LED GPIOB
|
||||||
|
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_TXLED GPIO_Pin_4
|
||||||
|
#define PORT_TXLED GPIOB
|
||||||
|
#define RCC_Per_TXLED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
// #define PIN_P25 GPIO_Pin_3
|
||||||
|
// #define PORT_P25 GPIOB
|
||||||
|
// #define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
// #define PIN_NXDN GPIO_Pin_10
|
||||||
|
// #define PORT_NXDN GPIOA
|
||||||
|
// #define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
// #define PIN_POCSAG GPIO_Pin_12
|
||||||
|
// #define PORT_POCSAG GPIOB
|
||||||
|
// #define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
// #define PIN_DSTAR GPIO_Pin_10
|
||||||
|
// #define PORT_DSTAR GPIOB
|
||||||
|
// #define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
// #define PIN_DMR GPIO_Pin_4
|
||||||
|
// #define PORT_DMR GPIOB
|
||||||
|
// #define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
// #define PIN_YSF GPIO_Pin_5
|
||||||
|
// #define PORT_YSF GPIOB
|
||||||
|
// #define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#if defined(MODE_PINS)
|
||||||
|
#define PIN_MP25 GPIO_Pin_15
|
||||||
|
#define PORT_MP25 GPIOB
|
||||||
|
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_MDSTAR GPIO_Pin_9
|
||||||
|
#define PORT_MDSTAR GPIOB
|
||||||
|
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_MDMR GPIO_Pin_8
|
||||||
|
#define PORT_MDMR GPIOB
|
||||||
|
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_MYSF GPIO_Pin_14
|
||||||
|
#define PORT_MYSF GPIOB
|
||||||
|
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define PIN_EXT_CLK GPIO_Pin_15
|
||||||
|
#define SRC_EXT_CLK GPIO_PinSource15
|
||||||
|
#define PORT_EXT_CLK GPIOA
|
||||||
|
|
||||||
|
#define PIN_RX GPIO_Pin_0
|
||||||
|
#define PIN_RX_CH ADC_Channel_0
|
||||||
|
#define PORT_RX GPIOB
|
||||||
|
#define RCC_Per_RX RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_RSSI GPIO_Pin_1
|
||||||
|
#define PIN_RSSI_CH ADC_Channel_1
|
||||||
|
#define PORT_RSSI GPIOB
|
||||||
|
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_TX GPIO_Pin_4
|
||||||
|
#define PIN_TX_CH DAC_Channel_1
|
||||||
|
#define PORT_TX GPIOA
|
||||||
|
#define RCC_Per_TX RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,101 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2019,2020 by BG5HHP
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PINS_F4_F4M_H
|
||||||
|
#define _PINS_F4_F4M_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pin definitions for MMDVM-F4M Pi-Hat F0DEI board:
|
||||||
|
|
||||||
|
PTT PB13 output
|
||||||
|
COSLED PB14 output
|
||||||
|
LED PB15 output
|
||||||
|
COS PC0 input
|
||||||
|
|
||||||
|
DSTAR PC7 output
|
||||||
|
DMR PC8 output
|
||||||
|
YSF PA8 output
|
||||||
|
P25 PC9 output
|
||||||
|
NXDN PB1 output
|
||||||
|
POCSAG PB12 output
|
||||||
|
|
||||||
|
RX PA0 analog input
|
||||||
|
RSSI PA7 analog input
|
||||||
|
TX PA4 analog output
|
||||||
|
|
||||||
|
EXT_CLK PA15 input
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PIN_COS GPIO_Pin_0
|
||||||
|
#define PORT_COS GPIOC
|
||||||
|
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_PTT GPIO_Pin_13
|
||||||
|
#define PORT_PTT GPIOB
|
||||||
|
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_COSLED GPIO_Pin_14
|
||||||
|
#define PORT_COSLED GPIOB
|
||||||
|
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_LED GPIO_Pin_15
|
||||||
|
#define PORT_LED GPIOB
|
||||||
|
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_P25 GPIO_Pin_9
|
||||||
|
#define PORT_P25 GPIOC
|
||||||
|
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_NXDN GPIO_Pin_1
|
||||||
|
#define PORT_NXDN GPIOB
|
||||||
|
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_POCSAG GPIO_Pin_12
|
||||||
|
#define PORT_POCSAG GPIOB
|
||||||
|
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DSTAR GPIO_Pin_7
|
||||||
|
#define PORT_DSTAR GPIOC
|
||||||
|
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_DMR GPIO_Pin_8
|
||||||
|
#define PORT_DMR GPIOC
|
||||||
|
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_YSF GPIO_Pin_8
|
||||||
|
#define PORT_YSF GPIOA
|
||||||
|
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_EXT_CLK GPIO_Pin_15
|
||||||
|
#define SRC_EXT_CLK GPIO_PinSource15
|
||||||
|
#define PORT_EXT_CLK GPIOA
|
||||||
|
|
||||||
|
#define PIN_RX GPIO_Pin_0
|
||||||
|
#define PIN_RX_CH ADC_Channel_0
|
||||||
|
#define PORT_RX GPIOA
|
||||||
|
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_RSSI GPIO_Pin_7
|
||||||
|
#define PIN_RSSI_CH ADC_Channel_7
|
||||||
|
#define PORT_RSSI GPIOA
|
||||||
|
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_TX GPIO_Pin_4
|
||||||
|
#define PIN_TX_CH DAC_Channel_1
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,101 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2019,2020 by BG5HHP
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PINS_F4_NUCLEO_ARDUINO_H
|
||||||
|
#define _PINS_F4_NUCLEO_ARDUINO_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pin definitions for STM32F4 Nucleo boards (Arduino header):
|
||||||
|
|
||||||
|
PTT PB10 output CN9 Pin7
|
||||||
|
COSLED PB3 output CN9 Pin4
|
||||||
|
LED PB5 output CN9 Pin5
|
||||||
|
COS PB4 input CN9 Pin6
|
||||||
|
|
||||||
|
DSTAR PA1 output CN8 Pin2
|
||||||
|
DMR PA4 output CN8 Pin3
|
||||||
|
YSF PB0 output CN8 Pin4
|
||||||
|
P25 PC1 output CN8 Pin5
|
||||||
|
NXDN PA3 output CN9 Pin1
|
||||||
|
POCSAG PB12 output
|
||||||
|
|
||||||
|
RX PA0 analog input CN8 Pin1
|
||||||
|
RSSI PC0 analog input CN8 Pin6
|
||||||
|
TX PA5 analog output CN5 Pin6
|
||||||
|
|
||||||
|
EXT_CLK PB8 input CN5 Pin10
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PIN_COS GPIO_Pin_4
|
||||||
|
#define PORT_COS GPIOB
|
||||||
|
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_PTT GPIO_Pin_10
|
||||||
|
#define PORT_PTT GPIOB
|
||||||
|
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_COSLED GPIO_Pin_3
|
||||||
|
#define PORT_COSLED GPIOB
|
||||||
|
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_LED GPIO_Pin_5
|
||||||
|
#define PORT_LED GPIOB
|
||||||
|
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_P25 GPIO_Pin_1
|
||||||
|
#define PORT_P25 GPIOC
|
||||||
|
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_NXDN GPIO_Pin_3
|
||||||
|
#define PORT_NXDN GPIOA
|
||||||
|
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_POCSAG GPIO_Pin_12
|
||||||
|
#define PORT_POCSAG GPIOB
|
||||||
|
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DSTAR GPIO_Pin_1
|
||||||
|
#define PORT_DSTAR GPIOA
|
||||||
|
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_DMR GPIO_Pin_4
|
||||||
|
#define PORT_DMR GPIOA
|
||||||
|
#define RCC_Per_DMR RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_YSF GPIO_Pin_0
|
||||||
|
#define PORT_YSF GPIOB
|
||||||
|
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_EXT_CLK GPIO_Pin_8
|
||||||
|
#define SRC_EXT_CLK GPIO_PinSource8
|
||||||
|
#define PORT_EXT_CLK GPIOB
|
||||||
|
|
||||||
|
#define PIN_RX GPIO_Pin_0
|
||||||
|
#define PIN_RX_CH ADC_Channel_0
|
||||||
|
#define PORT_RX GPIOA
|
||||||
|
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_RSSI GPIO_Pin_0
|
||||||
|
#define PIN_RSSI_CH ADC_Channel_10
|
||||||
|
#define PORT_RSSI GPIOC
|
||||||
|
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_TX GPIO_Pin_5
|
||||||
|
#define PIN_TX_CH DAC_Channel_2
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,134 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2019,2020 by BG5HHP
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PINS_F4_NUCLEO_MORPHO_H
|
||||||
|
#define _PINS_F4_NUCLEO_MORPHO_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pin definitions for STM32F4 Nucleo boards (ST Morpho header):
|
||||||
|
|
||||||
|
PTT PB13 output CN10 Pin30
|
||||||
|
COSLED PB14 output CN10 Pin28
|
||||||
|
LED PA5 output CN10 Pin11
|
||||||
|
COS PB15 input CN10 Pin26
|
||||||
|
|
||||||
|
DSTAR PB10 output CN10 Pin25
|
||||||
|
DMR PB4 output CN10 Pin27
|
||||||
|
YSF PB5 output CN10 Pin29
|
||||||
|
P25 PB3 output CN10 Pin31
|
||||||
|
NXDN PA10 output CN10 Pin33
|
||||||
|
POCSAG PB12 output CN10 Pin16
|
||||||
|
|
||||||
|
MDSTAR PC4 output CN10 Pin34
|
||||||
|
MDMR PC5 output CN10 Pin6
|
||||||
|
MYSF PC2 output CN7 Pin35
|
||||||
|
MP25 PC3 output CN7 Pin37
|
||||||
|
MNXDN PC6 output CN10 Pin4
|
||||||
|
MPOCSAG PC8 output CN10 Pin2
|
||||||
|
|
||||||
|
RX PA0 analog input CN7 Pin28
|
||||||
|
RSSI PA1 analog input CN7 Pin30
|
||||||
|
TX PA4 analog output CN7 Pin32
|
||||||
|
|
||||||
|
EXT_CLK PA15 input CN7 Pin17
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PIN_COS GPIO_Pin_15
|
||||||
|
#define PORT_COS GPIOB
|
||||||
|
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_PTT GPIO_Pin_13
|
||||||
|
#define PORT_PTT GPIOB
|
||||||
|
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_COSLED GPIO_Pin_14
|
||||||
|
#define PORT_COSLED GPIOB
|
||||||
|
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_LED GPIO_Pin_5
|
||||||
|
#define PORT_LED GPIOA
|
||||||
|
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_P25 GPIO_Pin_3
|
||||||
|
#define PORT_P25 GPIOB
|
||||||
|
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_NXDN GPIO_Pin_10
|
||||||
|
#define PORT_NXDN GPIOA
|
||||||
|
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_POCSAG GPIO_Pin_12
|
||||||
|
#define PORT_POCSAG GPIOB
|
||||||
|
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DSTAR GPIO_Pin_10
|
||||||
|
#define PORT_DSTAR GPIOB
|
||||||
|
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DMR GPIO_Pin_4
|
||||||
|
#define PORT_DMR GPIOB
|
||||||
|
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_YSF GPIO_Pin_5
|
||||||
|
#define PORT_YSF GPIOB
|
||||||
|
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#if defined(MODE_PINS)
|
||||||
|
#define PIN_MP25 GPIO_Pin_3
|
||||||
|
#define PORT_MP25 GPIOC
|
||||||
|
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MNXDN GPIO_Pin_6
|
||||||
|
#define PORT_MNXDN GPIOC
|
||||||
|
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MDSTAR GPIO_Pin_4
|
||||||
|
#define PORT_MDSTAR GPIOC
|
||||||
|
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MDMR GPIO_Pin_5
|
||||||
|
#define PORT_MDMR GPIOC
|
||||||
|
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MYSF GPIO_Pin_2
|
||||||
|
#define PORT_MYSF GPIOC
|
||||||
|
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MPOCSAG GPIO_Pin_8
|
||||||
|
#define PORT_MPOCSAG GPIOC
|
||||||
|
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define PIN_EXT_CLK GPIO_Pin_15
|
||||||
|
#define SRC_EXT_CLK GPIO_PinSource15
|
||||||
|
#define PORT_EXT_CLK GPIOA
|
||||||
|
|
||||||
|
#define PIN_RX GPIO_Pin_0
|
||||||
|
#define PIN_RX_CH ADC_Channel_0
|
||||||
|
#define PORT_RX GPIOA
|
||||||
|
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_RSSI GPIO_Pin_1
|
||||||
|
#define PIN_RSSI_CH ADC_Channel_1
|
||||||
|
#define PORT_RSSI GPIOA
|
||||||
|
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_TX GPIO_Pin_4
|
||||||
|
#define PIN_TX_CH DAC_Channel_1
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,101 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2019,2020 by BG5HHP
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PINS_F4_PI_H
|
||||||
|
#define _PINS_F4_PI_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pin definitions for STM32F4 Pi Board:
|
||||||
|
|
||||||
|
PTT PB13 output
|
||||||
|
COSLED PB14 output
|
||||||
|
LED PB15 output
|
||||||
|
COS PC0 input
|
||||||
|
|
||||||
|
DSTAR PC7 output
|
||||||
|
DMR PC8 output
|
||||||
|
YSF PA8 output
|
||||||
|
P25 PC9 output
|
||||||
|
NXDN PB1 output
|
||||||
|
POCSAG PB12 output
|
||||||
|
|
||||||
|
RX PA0 analog input
|
||||||
|
RSSI PA7 analog input
|
||||||
|
TX PA4 analog output
|
||||||
|
|
||||||
|
EXT_CLK PA15 input
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PIN_COS GPIO_Pin_0
|
||||||
|
#define PORT_COS GPIOC
|
||||||
|
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_PTT GPIO_Pin_13
|
||||||
|
#define PORT_PTT GPIOB
|
||||||
|
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_COSLED GPIO_Pin_14
|
||||||
|
#define PORT_COSLED GPIOB
|
||||||
|
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_LED GPIO_Pin_15
|
||||||
|
#define PORT_LED GPIOB
|
||||||
|
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_P25 GPIO_Pin_9
|
||||||
|
#define PORT_P25 GPIOC
|
||||||
|
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_NXDN GPIO_Pin_1
|
||||||
|
#define PORT_NXDN GPIOB
|
||||||
|
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_POCSAG GPIO_Pin_12
|
||||||
|
#define PORT_POCSAG GPIOB
|
||||||
|
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DSTAR GPIO_Pin_7
|
||||||
|
#define PORT_DSTAR GPIOC
|
||||||
|
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_DMR GPIO_Pin_8
|
||||||
|
#define PORT_DMR GPIOC
|
||||||
|
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_YSF GPIO_Pin_8
|
||||||
|
#define PORT_YSF GPIOA
|
||||||
|
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_EXT_CLK GPIO_Pin_15
|
||||||
|
#define SRC_EXT_CLK GPIO_PinSource15
|
||||||
|
#define PORT_EXT_CLK GPIOA
|
||||||
|
|
||||||
|
#define PIN_RX GPIO_Pin_0
|
||||||
|
#define PIN_RX_CH ADC_Channel_0
|
||||||
|
#define PORT_RX GPIOA
|
||||||
|
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_RSSI GPIO_Pin_7
|
||||||
|
#define PIN_RSSI_CH ADC_Channel_7
|
||||||
|
#define PORT_RSSI GPIOA
|
||||||
|
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_TX GPIO_Pin_4
|
||||||
|
#define PIN_TX_CH DAC_Channel_1
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,134 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2019,2020 by BG5HHP
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PINS_F4_RPT_TGO_H
|
||||||
|
#define _PINS_F4_RPT_TGO_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pin definitions for MMDVM_RPT_Hat Pi-Hat BG4TGO board::
|
||||||
|
|
||||||
|
PTT PB13 output CN10 Pin30
|
||||||
|
COSLED PB14 output CN10 Pin28
|
||||||
|
LED PA5 output CN10 Pin11
|
||||||
|
COS PB15 input CN10 Pin26
|
||||||
|
|
||||||
|
DSTAR PB10 output CN10 Pin25
|
||||||
|
DMR PB4 output CN10 Pin27
|
||||||
|
YSF PB5 output CN10 Pin29
|
||||||
|
P25 PB3 output CN10 Pin31
|
||||||
|
NXDN PA10 output CN10 Pin33
|
||||||
|
POCSAG PB12 output CN10 Pin16
|
||||||
|
|
||||||
|
MDSTAR PC4 output CN10 Pin34
|
||||||
|
MDMR PC5 output CN10 Pin6
|
||||||
|
MYSF PC2 output CN7 Pin35
|
||||||
|
MP25 PC3 output CN7 Pin37
|
||||||
|
MNXDN PC6 output CN10 Pin4
|
||||||
|
MPOCSAG PC8 output CN10 Pin2
|
||||||
|
|
||||||
|
RX PA0 analog input CN7 Pin28
|
||||||
|
RSSI PA1 analog input CN7 Pin30
|
||||||
|
TX PA4 analog output CN7 Pin32
|
||||||
|
|
||||||
|
EXT_CLK PA15 input CN7 Pin17
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PIN_COS GPIO_Pin_15
|
||||||
|
#define PORT_COS GPIOB
|
||||||
|
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_PTT GPIO_Pin_13
|
||||||
|
#define PORT_PTT GPIOB
|
||||||
|
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_COSLED GPIO_Pin_14
|
||||||
|
#define PORT_COSLED GPIOB
|
||||||
|
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_LED GPIO_Pin_5
|
||||||
|
#define PORT_LED GPIOA
|
||||||
|
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_P25 GPIO_Pin_3
|
||||||
|
#define PORT_P25 GPIOB
|
||||||
|
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_NXDN GPIO_Pin_10
|
||||||
|
#define PORT_NXDN GPIOA
|
||||||
|
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_POCSAG GPIO_Pin_12
|
||||||
|
#define PORT_POCSAG GPIOB
|
||||||
|
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DSTAR GPIO_Pin_10
|
||||||
|
#define PORT_DSTAR GPIOB
|
||||||
|
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DMR GPIO_Pin_4
|
||||||
|
#define PORT_DMR GPIOB
|
||||||
|
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_YSF GPIO_Pin_5
|
||||||
|
#define PORT_YSF GPIOB
|
||||||
|
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#if defined(MODE_PINS)
|
||||||
|
#define PIN_MP25 GPIO_Pin_3
|
||||||
|
#define PORT_MP25 GPIOC
|
||||||
|
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MNXDN GPIO_Pin_6
|
||||||
|
#define PORT_MNXDN GPIOC
|
||||||
|
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MDSTAR GPIO_Pin_4
|
||||||
|
#define PORT_MDSTAR GPIOC
|
||||||
|
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MDMR GPIO_Pin_5
|
||||||
|
#define PORT_MDMR GPIOC
|
||||||
|
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MYSF GPIO_Pin_2
|
||||||
|
#define PORT_MYSF GPIOC
|
||||||
|
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MPOCSAG GPIO_Pin_8
|
||||||
|
#define PORT_MPOCSAG GPIOC
|
||||||
|
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define PIN_EXT_CLK GPIO_Pin_15
|
||||||
|
#define SRC_EXT_CLK GPIO_PinSource15
|
||||||
|
#define PORT_EXT_CLK GPIOA
|
||||||
|
|
||||||
|
#define PIN_RX GPIO_Pin_0
|
||||||
|
#define PIN_RX_CH ADC_Channel_0
|
||||||
|
#define PORT_RX GPIOA
|
||||||
|
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_RSSI GPIO_Pin_1
|
||||||
|
#define PIN_RSSI_CH ADC_Channel_1
|
||||||
|
#define PORT_RSSI GPIOA
|
||||||
|
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_TX GPIO_Pin_4
|
||||||
|
#define PIN_TX_CH DAC_Channel_1
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,102 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2019,2020 by BG5HHP
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PINS_F4_STM32DVM_V3_H
|
||||||
|
#define _PINS_F4_STM32DVM_V3_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pin definitions for STM32F4 STM32-DVM rev 3 Board:
|
||||||
|
|
||||||
|
COS PB13 input
|
||||||
|
PTT PB12 output
|
||||||
|
COSLED PB4 output
|
||||||
|
LED PB3 output
|
||||||
|
|
||||||
|
P25 PB8 output
|
||||||
|
NXDN PB9 output
|
||||||
|
DSTAR PB6 output
|
||||||
|
DMR PB5 output
|
||||||
|
YSF PB7 output
|
||||||
|
POCSAG PC10 output
|
||||||
|
|
||||||
|
RX PB0 analog input
|
||||||
|
RSSI PB1 analog input
|
||||||
|
TX PA4 analog output
|
||||||
|
|
||||||
|
EXT_CLK PA15 input
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PIN_COS GPIO_Pin_13
|
||||||
|
#define PORT_COS GPIOB
|
||||||
|
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
|
||||||
|
#define PIN_PTT GPIO_Pin_12
|
||||||
|
#define PORT_PTT GPIOB
|
||||||
|
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_COSLED GPIO_Pin_4
|
||||||
|
#define PORT_COSLED GPIOB
|
||||||
|
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_LED GPIO_Pin_3
|
||||||
|
#define PORT_LED GPIOB
|
||||||
|
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_P25 GPIO_Pin_8
|
||||||
|
#define PORT_P25 GPIOB
|
||||||
|
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_NXDN GPIO_Pin_9
|
||||||
|
#define PORT_NXDN GPIOB
|
||||||
|
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DSTAR GPIO_Pin_6
|
||||||
|
#define PORT_DSTAR GPIOB
|
||||||
|
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DMR GPIO_Pin_5
|
||||||
|
#define PORT_DMR GPIOB
|
||||||
|
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_YSF GPIO_Pin_7
|
||||||
|
#define PORT_YSF GPIOB
|
||||||
|
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_POCSAG GPIO_Pin_10
|
||||||
|
#define PORT_POCSAG GPIOC
|
||||||
|
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_EXT_CLK GPIO_Pin_15
|
||||||
|
#define SRC_EXT_CLK GPIO_PinSource15
|
||||||
|
#define PORT_EXT_CLK GPIOA
|
||||||
|
|
||||||
|
#define PIN_RX GPIO_Pin_0
|
||||||
|
#define PIN_RX_CH ADC_Channel_8
|
||||||
|
#define PORT_RX GPIOB
|
||||||
|
#define RCC_Per_RX RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_RSSI GPIO_Pin_1
|
||||||
|
#define PIN_RSSI_CH ADC_Channel_9
|
||||||
|
#define PORT_RSSI GPIOB
|
||||||
|
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_TX GPIO_Pin_4
|
||||||
|
#define PIN_TX_CH DAC_Channel_1
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,101 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2019,2020 by BG5HHP
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PINS_F7_F7M_H
|
||||||
|
#define _PINS_F7_F7M_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pin definitions for MMDVM-F7M Pi-Hat F0DEI board:
|
||||||
|
|
||||||
|
PTT PB13 output
|
||||||
|
COSLED PB14 output
|
||||||
|
LED PB15 output
|
||||||
|
COS PC0 input
|
||||||
|
|
||||||
|
DSTAR PC7 output
|
||||||
|
DMR PC8 output
|
||||||
|
YSF PA8 output
|
||||||
|
P25 PC9 output
|
||||||
|
NXDN PB1 output
|
||||||
|
POCSAG PB12 output
|
||||||
|
|
||||||
|
RX PA0 analog input
|
||||||
|
RSSI PA7 analog input
|
||||||
|
TX PA4 analog output
|
||||||
|
|
||||||
|
EXT_CLK PA15 input
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PIN_COS GPIO_Pin_0
|
||||||
|
#define PORT_COS GPIOC
|
||||||
|
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_PTT GPIO_Pin_13
|
||||||
|
#define PORT_PTT GPIOB
|
||||||
|
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_COSLED GPIO_Pin_14
|
||||||
|
#define PORT_COSLED GPIOB
|
||||||
|
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_LED GPIO_Pin_15
|
||||||
|
#define PORT_LED GPIOB
|
||||||
|
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_P25 GPIO_Pin_9
|
||||||
|
#define PORT_P25 GPIOC
|
||||||
|
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_NXDN GPIO_Pin_1
|
||||||
|
#define PORT_NXDN GPIOB
|
||||||
|
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_POCSAG GPIO_Pin_12
|
||||||
|
#define PORT_POCSAG GPIOB
|
||||||
|
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DSTAR GPIO_Pin_7
|
||||||
|
#define PORT_DSTAR GPIOC
|
||||||
|
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_DMR GPIO_Pin_8
|
||||||
|
#define PORT_DMR GPIOC
|
||||||
|
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_YSF GPIO_Pin_8
|
||||||
|
#define PORT_YSF GPIOA
|
||||||
|
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_EXT_CLK GPIO_Pin_15
|
||||||
|
#define SRC_EXT_CLK GPIO_PinSource15
|
||||||
|
#define PORT_EXT_CLK GPIOA
|
||||||
|
|
||||||
|
#define PIN_RX GPIO_Pin_0
|
||||||
|
#define PIN_RX_CH ADC_Channel_0
|
||||||
|
#define PORT_RX GPIOA
|
||||||
|
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_RSSI GPIO_Pin_7
|
||||||
|
#define PIN_RSSI_CH ADC_Channel_7
|
||||||
|
#define PORT_RSSI GPIOA
|
||||||
|
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_TX GPIO_Pin_4
|
||||||
|
#define PIN_TX_CH DAC_Channel_1
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,129 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2019,2020 by BG5HHP
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PINS_F7_NUCLEO_H
|
||||||
|
#define _PINS_F7_NUCLEO_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pin definitions for STM32F7 Nucleo boards (ST Morpho header):
|
||||||
|
|
||||||
|
PTT PB13 output CN12 Pin30
|
||||||
|
COSLED PB14 output CN12 Pin28
|
||||||
|
LED PA5 output CN12 Pin11
|
||||||
|
COS PB15 input CN12 Pin26
|
||||||
|
|
||||||
|
DSTAR PB10 output CN12 Pin25
|
||||||
|
DMR PB4 output CN12 Pin27
|
||||||
|
YSF PB5 output CN12 Pin29
|
||||||
|
P25 PB3 output CN12 Pin31
|
||||||
|
NXDN PA10 output CN12 Pin33
|
||||||
|
POCSAG PB12 output CN12 Pin16
|
||||||
|
|
||||||
|
MDSTAR PC4 output CN12 Pin34
|
||||||
|
MDMR PC5 output CN12 Pin6
|
||||||
|
MYSF PC2 output CN11 Pin35
|
||||||
|
MP25 PC3 output CN11 Pin37
|
||||||
|
MNXDN PC6 output CN12 Pin4
|
||||||
|
|
||||||
|
RX PA0 analog input CN11 Pin28
|
||||||
|
RSSI PA1 analog input CN11 Pin30
|
||||||
|
TX PA4 analog output CN11 Pin32
|
||||||
|
|
||||||
|
EXT_CLK PA15 input CN11 Pin17
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PIN_COS GPIO_Pin_15
|
||||||
|
#define PORT_COS GPIOB
|
||||||
|
#define RCC_Per_COS RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_PTT GPIO_Pin_13
|
||||||
|
#define PORT_PTT GPIOB
|
||||||
|
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_COSLED GPIO_Pin_14
|
||||||
|
#define PORT_COSLED GPIOB
|
||||||
|
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_LED GPIO_Pin_5
|
||||||
|
#define PORT_LED GPIOA
|
||||||
|
#define RCC_Per_LED RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_P25 GPIO_Pin_3
|
||||||
|
#define PORT_P25 GPIOB
|
||||||
|
#define RCC_Per_P25 RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_NXDN GPIO_Pin_10
|
||||||
|
#define PORT_NXDN GPIOA
|
||||||
|
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_POCSAG GPIO_Pin_12
|
||||||
|
#define PORT_POCSAG GPIOB
|
||||||
|
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DSTAR GPIO_Pin_10
|
||||||
|
#define PORT_DSTAR GPIOB
|
||||||
|
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DMR GPIO_Pin_4
|
||||||
|
#define PORT_DMR GPIOB
|
||||||
|
#define RCC_Per_DMR RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_YSF GPIO_Pin_5
|
||||||
|
#define PORT_YSF GPIOB
|
||||||
|
#define RCC_Per_YSF RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#if defined(MODE_PINS)
|
||||||
|
#define PIN_MP25 GPIO_Pin_3
|
||||||
|
#define PORT_MP25 GPIOC
|
||||||
|
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MNXDN GPIO_Pin_6
|
||||||
|
#define PORT_MNXDN GPIOC
|
||||||
|
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MDSTAR GPIO_Pin_4
|
||||||
|
#define PORT_MDSTAR GPIOC
|
||||||
|
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MDMR GPIO_Pin_5
|
||||||
|
#define PORT_MDMR GPIOC
|
||||||
|
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MYSF GPIO_Pin_2
|
||||||
|
#define PORT_MYSF GPIOC
|
||||||
|
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define PIN_EXT_CLK GPIO_Pin_15
|
||||||
|
#define SRC_EXT_CLK GPIO_PinSource15
|
||||||
|
#define PORT_EXT_CLK GPIOA
|
||||||
|
|
||||||
|
#define PIN_RX GPIO_Pin_0
|
||||||
|
#define PIN_RX_CH ADC_Channel_0
|
||||||
|
#define PORT_RX GPIOA
|
||||||
|
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_RSSI GPIO_Pin_1
|
||||||
|
#define PIN_RSSI_CH ADC_Channel_1
|
||||||
|
#define PORT_RSSI GPIOA
|
||||||
|
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_TX GPIO_Pin_4
|
||||||
|
#define PIN_TX_CH DAC_Channel_1
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,101 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2019,2020 by BG5HHP
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PINS_F7_PI_H
|
||||||
|
#define _PINS_F7_PI_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pin definitions for STM32F722 Pi Board:
|
||||||
|
|
||||||
|
PTT PB13 output
|
||||||
|
COSLED PB14 output
|
||||||
|
LED PB15 output
|
||||||
|
COS PC0 input
|
||||||
|
|
||||||
|
DSTAR PC7 output
|
||||||
|
DMR PC8 output
|
||||||
|
YSF PA8 output
|
||||||
|
P25 PC9 output
|
||||||
|
NXDN PB1 output
|
||||||
|
POCSAG PB12 output
|
||||||
|
|
||||||
|
RX PA0 analog input
|
||||||
|
RSSI PA7 analog input
|
||||||
|
TX PA4 analog output
|
||||||
|
|
||||||
|
EXT_CLK PA15 input
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PIN_COS GPIO_Pin_0
|
||||||
|
#define PORT_COS GPIOC
|
||||||
|
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_PTT GPIO_Pin_13
|
||||||
|
#define PORT_PTT GPIOB
|
||||||
|
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_COSLED GPIO_Pin_14
|
||||||
|
#define PORT_COSLED GPIOB
|
||||||
|
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_LED GPIO_Pin_15
|
||||||
|
#define PORT_LED GPIOB
|
||||||
|
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_P25 GPIO_Pin_9
|
||||||
|
#define PORT_P25 GPIOC
|
||||||
|
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_NXDN GPIO_Pin_1
|
||||||
|
#define PORT_NXDN GPIOB
|
||||||
|
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_POCSAG GPIO_Pin_12
|
||||||
|
#define PORT_POCSAG GPIOB
|
||||||
|
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DSTAR GPIO_Pin_7
|
||||||
|
#define PORT_DSTAR GPIOC
|
||||||
|
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_DMR GPIO_Pin_8
|
||||||
|
#define PORT_DMR GPIOC
|
||||||
|
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_YSF GPIO_Pin_8
|
||||||
|
#define PORT_YSF GPIOA
|
||||||
|
#define RCC_Per_YSF RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_EXT_CLK GPIO_Pin_15
|
||||||
|
#define SRC_EXT_CLK GPIO_PinSource15
|
||||||
|
#define PORT_EXT_CLK GPIOA
|
||||||
|
|
||||||
|
#define PIN_RX GPIO_Pin_0
|
||||||
|
#define PIN_RX_CH ADC_Channel_0
|
||||||
|
#define PORT_RX GPIOA
|
||||||
|
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_RSSI GPIO_Pin_7
|
||||||
|
#define PIN_RSSI_CH ADC_Channel_7
|
||||||
|
#define PORT_RSSI GPIOA
|
||||||
|
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_TX GPIO_Pin_4
|
||||||
|
#define PIN_TX_CH DAC_Channel_1
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,144 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2019,2020 by BG5HHP
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _PINS_F7_RPT_HAT_H
|
||||||
|
#define _PINS_F7_RPT_HAT_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
Pin definitions for MMDVM_RPT_Hat Pi-Hat F0DEI DB9MAT DF2ET board:
|
||||||
|
|
||||||
|
PTT PB14 output
|
||||||
|
COSLED PB13 output
|
||||||
|
LED PB12 output
|
||||||
|
COS PC0 input
|
||||||
|
|
||||||
|
DSTAR PB15 output
|
||||||
|
DMR PC6 output
|
||||||
|
YSF PC7 output
|
||||||
|
P25 PC8 output
|
||||||
|
NXDN PC9 output
|
||||||
|
POCSAG PA8 output
|
||||||
|
FM PA11 output
|
||||||
|
|
||||||
|
MDSTAR PC1 output
|
||||||
|
MDMR PC2 output
|
||||||
|
MYSF PC3 output
|
||||||
|
MP25 PC4 output
|
||||||
|
MNXDN PC10 output
|
||||||
|
MPOCSAG PC11 output
|
||||||
|
MFM PC13 output
|
||||||
|
|
||||||
|
RX PA0 analog input
|
||||||
|
RSSI PA7 analog input
|
||||||
|
TX PA4 analog output
|
||||||
|
|
||||||
|
EXT_CLK PA15 input
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define PIN_COS GPIO_Pin_0
|
||||||
|
#define PORT_COS GPIOC
|
||||||
|
#define RCC_Per_COS RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_PTT GPIO_Pin_14
|
||||||
|
#define PORT_PTT GPIOB
|
||||||
|
#define RCC_Per_PTT RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_COSLED GPIO_Pin_13
|
||||||
|
#define PORT_COSLED GPIOB
|
||||||
|
#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_LED GPIO_Pin_12
|
||||||
|
#define PORT_LED GPIOB
|
||||||
|
#define RCC_Per_LED RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_P25 GPIO_Pin_8
|
||||||
|
#define PORT_P25 GPIOC
|
||||||
|
#define RCC_Per_P25 RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_NXDN GPIO_Pin_9
|
||||||
|
#define PORT_NXDN GPIOC
|
||||||
|
#define RCC_Per_NXDN RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_POCSAG GPIO_Pin_8
|
||||||
|
#define PORT_POCSAG GPIOA
|
||||||
|
#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_FM GPIO_Pin_11
|
||||||
|
#define PORT_FM GPIOA
|
||||||
|
#define RCC_Per_FM RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_DSTAR GPIO_Pin_15
|
||||||
|
#define PORT_DSTAR GPIOB
|
||||||
|
#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB
|
||||||
|
|
||||||
|
#define PIN_DMR GPIO_Pin_6
|
||||||
|
#define PORT_DMR GPIOC
|
||||||
|
#define RCC_Per_DMR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_YSF GPIO_Pin_7
|
||||||
|
#define PORT_YSF GPIOC
|
||||||
|
#define RCC_Per_YSF RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#if defined(MODE_PINS)
|
||||||
|
#define PIN_MP25 GPIO_Pin_4
|
||||||
|
#define PORT_MP25 GPIOC
|
||||||
|
#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MNXDN GPIO_Pin_10
|
||||||
|
#define PORT_MNXDN GPIOC
|
||||||
|
#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MDSTAR GPIO_Pin_1
|
||||||
|
#define PORT_MDSTAR GPIOC
|
||||||
|
#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MDMR GPIO_Pin_2
|
||||||
|
#define PORT_MDMR GPIOC
|
||||||
|
#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MYSF GPIO_Pin_3
|
||||||
|
#define PORT_MYSF GPIOC
|
||||||
|
#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MPOCSAG GPIO_Pin_11
|
||||||
|
#define PORT_MPOCSAG GPIOC
|
||||||
|
#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC
|
||||||
|
|
||||||
|
#define PIN_MFM GPIO_Pin_13
|
||||||
|
#define PORT_MFM GPIOC
|
||||||
|
#define RCC_Per_MFM RCC_AHB1Periph_GPIOC
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define PIN_EXT_CLK GPIO_Pin_15
|
||||||
|
#define SRC_EXT_CLK GPIO_PinSource15
|
||||||
|
#define PORT_EXT_CLK GPIOA
|
||||||
|
|
||||||
|
#define PIN_RX GPIO_Pin_0
|
||||||
|
#define PIN_RX_CH ADC_Channel_0
|
||||||
|
#define PORT_RX GPIOA
|
||||||
|
#define RCC_Per_RX RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_RSSI GPIO_Pin_7
|
||||||
|
#define PIN_RSSI_CH ADC_Channel_7
|
||||||
|
#define PORT_RSSI GPIOA
|
||||||
|
#define RCC_Per_RSSI RCC_AHB1Periph_GPIOA
|
||||||
|
|
||||||
|
#define PIN_TX GPIO_Pin_4
|
||||||
|
#define PIN_TX_CH DAC_Channel_1
|
||||||
|
|
||||||
|
#endif
|
||||||
Loading…
Reference in New Issue