Superminaren
/
MMDVM
mirror of https://github.com/g4klx/MMDVM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Make calibration into a seperate step.

This commit is contained in:
Jonathan Naylor 2016-11-28 14:02:21 +00:00 committed by GitHub
parent 0e2e070ae7
commit 4584b20c45
1 changed files with 4 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
IOTeensy.cpp
View File

@ -75,22 +75,15 @@ void CIO::initInt()
void CIO::startInt() void CIO::startInt()
{ {
if ((ADC0_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO)
io.interrupt(0U);
#if defined(SEND_RSSI_DATA)
if ((ADC1_SC1A & ADC_SC1_COCO) == ADC_SC1_COCO)
io.interrupt(1U);
#endif
// Initialise ADC0 // Initialise ADC0
SIM_SCGC6 |= SIM_SCGC6_ADC0; SIM_SCGC6 |= SIM_SCGC6_ADC0;
ADC0_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time ADC0_CFG1 = ADC_CFG1_ADIV(1) | ADC_CFG1_ADICLK(1) | // Single-ended 12 bits, long sample time
ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP; ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
ADC0_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb ADC0_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
ADC0_SC2 = ADC_SC2_REFSEL(1) | ADC_SC2_ADTRG; // Voltage ref internal, hardware trigger ADC0_SC2 = ADC_SC2_REFSEL(1) | ADC_SC2_ADTRG; // Voltage ref internal, hardware trigger
ADC0_SC3 = ADC_SC3_CAL | ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples ADC0_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
ADC0_SC3 = ADC_SC3_CAL;
while ((ADC0_SC3 & ADC_SC3_CAL) != ADC_SC3_CAL) // Wait for calibration while ((ADC0_SC3 & ADC_SC3_CAL) != ADC_SC3_CAL) // Wait for calibration
; ;
@ -109,8 +102,9 @@ void CIO::startInt()
ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP; ADC_CFG1_MODE(1) | ADC_CFG1_ADLSMP;
ADC1_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb ADC1_CFG2 = ADC_CFG2_MUXSEL | ADC_CFG2_ADLSTS(2); // Select channels ADxxxb
ADC1_SC2 = ADC_SC2_REFSEL(1); // Voltage ref internal, software trigger ADC1_SC2 = ADC_SC2_REFSEL(1); // Voltage ref internal, software trigger
ADC1_SC3 = ADC_SC3_CAL | ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples ADC1_SC3 = ADC_SC3_AVGE | ADC_SC3_AVGS(0); // Enable averaging, 4 samples
ADC1_SC3 = ADC_SC3_CAL;
while ((ADC1_SC3 & ADC_SC3_CAL) != ADC_SC3_CAL) // Wait for calibration while ((ADC1_SC3 & ADC_SC3_CAL) != ADC_SC3_CAL) // Wait for calibration
; ;