mirror of https://github.com/g4klx/MMDVM.git
Small tweak to the CACH.
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parent
ca2c7c3418
commit
114f720ccc
34
DMRTX.cpp
34
DMRTX.cpp
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@ -45,7 +45,7 @@ const uint8_t CACH_INTERLEAVE[] =
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73U, 74U, 75U, 77U, 78U, 79U, 81U, 82U, 83U, 85U, 87U, 88U, 89U, 91U, 92U, 93U, 95U};
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const uint8_t EMPTY_SHORT_LC[] =
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{0x00U, 0x08U, 0x44U, 0x00U, 0x88U, 0x18U, 0x63U, 0x89U, 0x18U, 0x64U, 0x80U, 0x00U};
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{0x00U, 0x00U, 0x44U, 0x00U, 0x00U, 0x18U, 0x63U, 0x01U, 0x18U, 0x64U, 0x00U, 0x00U};
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const uint8_t BIT_MASK_TABLE[] = {0x80U, 0x40U, 0x20U, 0x10U, 0x08U, 0x04U, 0x02U, 0x01U};
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@ -182,12 +182,6 @@ uint8_t CDMRTX::writeShortLC(const uint8_t* data, uint8_t length)
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WRITE_BIT1(m_newShortLC, n, b);
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}
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// Set the LCSS bits
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m_newShortLC[1U] |= 0x08U;
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m_newShortLC[4U] |= 0x88U;
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m_newShortLC[7U] |= 0x88U;
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m_newShortLC[10U] |= 0x80U;
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return 0U;
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}
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@ -321,23 +315,25 @@ void CDMRTX::createCACH(uint8_t txSlotIndex, uint8_t rxSlotIndex)
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bool at = m_fifo[rxSlotIndex].getData() > 0U;
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bool tc = txSlotIndex == 1U;
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bool lcss0 = true; // For 1 and 2
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bool lcss1 = true;
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bool ls0 = true; // For 1 and 2
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bool ls1 = true;
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if (m_cachPtr == 0U) // For 0
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lcss0 = false;
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ls0 = false;
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else if (m_cachPtr == 9U) // For 3
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lcss1 = false;
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ls1 = false;
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bool h0 = at ^ tc ^ lcss0;
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bool h1 = tc ^ lcss0 ^ lcss1;
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bool h2 = at ^ tc ^ lcss1;
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bool h0 = at ^ tc ^ ls0;
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bool h1 = tc ^ ls0 ^ ls1;
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bool h2 = at ^ tc ^ ls1;
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m_poBuffer[0U] |= at ? 0x80U : 0x00U;
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m_poBuffer[0U] |= tc ? 0x08U : 0x00U;
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m_poBuffer[1U] |= h0 ? 0x02U : 0x00U;
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m_poBuffer[2U] |= h1 ? 0x20U : 0x00U;
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m_poBuffer[2U] |= h2 ? 0x02U : 0x00U;
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m_poBuffer[0U] |= at ? 0x80U : 0x00U;
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m_poBuffer[0U] |= tc ? 0x08U : 0x00U;
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m_poBuffer[1U] |= ls0 ? 0x80U : 0x00U;
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m_poBuffer[1U] |= ls1 ? 0x08U : 0x00U;
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m_poBuffer[1U] |= h0 ? 0x02U : 0x00U;
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m_poBuffer[2U] |= h1 ? 0x20U : 0x00U;
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m_poBuffer[2U] |= h2 ? 0x02U : 0x00U;
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m_poLen = DMR_CACH_LENGTH_BYTES;
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m_poPtr = 0U;
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