From 5f19cfcb490da10023c46705b46e2b27ec5ecacd Mon Sep 17 00:00:00 2001 From: phl0 Date: Wed, 1 Aug 2018 21:09:57 +0200 Subject: [PATCH 1/7] Rename MODE_PINS to MODE_LEDS --- Config.h | 4 ++-- IO.cpp | 6 +++--- IODue.cpp | 2 +- IOSTM.cpp | 2 +- IOTeensy.cpp | 2 +- MMDVM_STM32F4xx.coproj | 2 +- mmdvmmenu.sh | 2 +- 7 files changed, 10 insertions(+), 10 deletions(-) diff --git a/Config.h b/Config.h index 986a243..485f03f 100644 --- a/Config.h +++ b/Config.h @@ -38,8 +38,8 @@ // Allow the use of the COS line to lockout the modem // #define USE_COS_AS_LOCKOUT -// Use pins to output the current mode -// #define MODE_PINS +// Use pins to output the current mode via LEDs +// #define MODE_LEDS // For the original Arduino Due pin layout // #define ARDUINO_DUE_PAPA diff --git a/IO.cpp b/IO.cpp index 8e718ab..8267070 100644 --- a/IO.cpp +++ b/IO.cpp @@ -137,7 +137,7 @@ void CIO::selfTest() // We exclude PTT to avoid trigger the transmitter setLEDInt(ledValue); setCOSInt(ledValue); -#if defined(MODE_PINS) +#if defined(MODE_LEDS) setDStarInt(ledValue); setDMRInt(ledValue); setYSFInt(ledValue); @@ -148,7 +148,7 @@ void CIO::selfTest() delayInt(250); } -#if defined(MODE_PINS) +#if defined(MODE_LEDS) setDStarInt(true); setDMRInt(false); setYSFInt(false); @@ -546,7 +546,7 @@ void CIO::setADCDetection(bool detect) void CIO::setMode() { -#if defined(MODE_PINS) +#if defined(MODE_LEDS) setDStarInt(m_modemState == STATE_DSTAR); setDMRInt(m_modemState == STATE_DMR); setYSFInt(m_modemState == STATE_YSF); diff --git a/IODue.cpp b/IODue.cpp index e06ce07..569c6e4 100644 --- a/IODue.cpp +++ b/IODue.cpp @@ -95,7 +95,7 @@ void CIO::initInt() pinMode(PIN_LED, OUTPUT); pinMode(PIN_COS, INPUT); -#if defined(MODE_PINS) +#if defined(MODE_LEDS) // Set up the mode output pins pinMode(PIN_DSTAR, OUTPUT); pinMode(PIN_DMR, OUTPUT); diff --git a/IOSTM.cpp b/IOSTM.cpp index 3732282..c8d6be9 100644 --- a/IOSTM.cpp +++ b/IOSTM.cpp @@ -932,7 +932,7 @@ void CIO::initInt() GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN; GPIO_Init(PORT_COS, &GPIO_InitStruct); -#if defined(MODE_PINS) +#if defined(MODE_LEDS) // DSTAR pin RCC_AHB1PeriphClockCmd(RCC_Per_DSTAR, ENABLE); GPIO_InitStruct.GPIO_Pin = PIN_DSTAR; diff --git a/IOTeensy.cpp b/IOTeensy.cpp index 10adde1..1d9aa79 100644 --- a/IOTeensy.cpp +++ b/IOTeensy.cpp @@ -64,7 +64,7 @@ void CIO::initInt() pinMode(PIN_LED, OUTPUT); pinMode(PIN_COS, INPUT); -#if defined(MODE_PINS) +#if defined(MODE_LEDS) // Set up the mode output pins pinMode(PIN_DSTAR, OUTPUT); pinMode(PIN_DMR, OUTPUT); diff --git a/MMDVM_STM32F4xx.coproj b/MMDVM_STM32F4xx.coproj index d269fbd..2990342 100644 --- a/MMDVM_STM32F4xx.coproj +++ b/MMDVM_STM32F4xx.coproj @@ -97,7 +97,7 @@ - + diff --git a/mmdvmmenu.sh b/mmdvmmenu.sh index 014e32b..7c31b4a 100755 --- a/mmdvmmenu.sh +++ b/mmdvmmenu.sh @@ -83,7 +83,7 @@ EOF "3") sed -e 's/\/\/ #define EXTERNAL_OSC 14400000/#define EXTERNAL_OSC 14400000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "14.400 MHz clock enabled";; "4") sed -e 's/\/\/ #define EXTERNAL_OSC 19200000/#define EXTERNAL_OSC 19200000/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "19.200 MHz clock enabled";; "5") sed -e 's/\/\/ #define USE_COS_AS_LOCKOUT /#define USE_COS_AS_LOCKOUT/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "COS as Lockout enabled";; - "6") sed -e 's/\/\/ #define MODE_PINS/#define MODE_PINS/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Mode pins enabled";; + "6") sed -e 's/\/\/ #define MODE_LEDS/#define MODE_LEDS/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Mode pins enabled";; "7") sed -e 's/\/\/ #define ARDUINO_DUE_PAPA/#define ARDUINO_DUE_PAPA/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for the PAPA board enabled";; "8") sed -e 's/\/\/ #define ARDUINO_DUE_ZUM_V10/#define ARDUINO_DUE_ZUM_V10/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for ZUM V1.0 and V1.0.1 boards enabled";; "9") sed -e 's/\/\/ #define ARDUINO_DUE_NTH/#define ARDUINO_DUE_NTH/' $conf > $conf.tmp && mv -f $conf.tmp $conf && echo "Layout for SP8NTH board enabled";; From c2e785cdc435dae7cac225458d6b04873bfe07be Mon Sep 17 00:00:00 2001 From: phl0 Date: Wed, 1 Aug 2018 21:12:31 +0200 Subject: [PATCH 2/7] Generalize MODE_PINS (not F4 specific any more) --- Config.h | 4 ++-- IOSTM.cpp | 22 +++++++++++----------- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/Config.h b/Config.h index 485f03f..c738e21 100644 --- a/Config.h +++ b/Config.h @@ -57,8 +57,8 @@ // #define STM32F4_NUCLEO_MORPHO_HEADER // #define STM32F4_NUCLEO_ARDUINO_HEADER -// Use separate mode pins to switch external filters/bandwidth for example -// #define STM32F4_NUCLEO_MODE_PINS +// Use separate mode pins to switch external channel/filters/bandwidth for example +// #define MODE_PINS // For the VK6MST Pi3 Shield communicating over i2c. i2c address & speed defined in i2cTeensy.cpp // #define VK6MST_TEENSY_PI3_SHIELD_I2C diff --git a/IOSTM.cpp b/IOSTM.cpp index c8d6be9..05b5c27 100644 --- a/IOSTM.cpp +++ b/IOSTM.cpp @@ -570,7 +570,7 @@ EXT_CLK PA15 input CN7 Pin17 #define PORT_YSF GPIOB #define RCC_Per_YSF RCC_AHB1Periph_GPIOB -#if defined(STM32F4_NUCLEO_MODE_PINS) +#if defined(MODE_PINS) #define PIN_MP25 GPIO_Pin_3 #define PORT_MP25 GPIOC #define RCC_Per_MP25 RCC_AHB1Periph_GPIOC @@ -762,7 +762,7 @@ EXT_CLK PA15 input CN11 Pin17 #define PORT_YSF GPIOB #define RCC_Per_YSF RCC_AHB1Periph_GPIOB -#if defined(STM32F4_NUCLEO_MODE_PINS) +#if defined(MODE_PINS) #define PIN_MP25 GPIO_Pin_3 #define PORT_MP25 GPIOC #define RCC_Per_MP25 RCC_AHB1Periph_GPIOC @@ -974,7 +974,7 @@ void CIO::initInt() #endif #endif -#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) +#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) // DSTAR mode pin RCC_AHB1PeriphClockCmd(RCC_Per_MDSTAR, ENABLE); GPIO_InitStruct.GPIO_Pin = PIN_MDSTAR; @@ -1224,7 +1224,7 @@ void CIO::setCOSInt(bool on) void CIO::setDStarInt(bool on) { GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET); -#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) +#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET); #endif } @@ -1232,7 +1232,7 @@ void CIO::setDStarInt(bool on) void CIO::setDMRInt(bool on) { GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET); -#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) +#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET); #endif } @@ -1240,7 +1240,7 @@ void CIO::setDMRInt(bool on) void CIO::setYSFInt(bool on) { GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET); -#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) +#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET); #endif } @@ -1248,7 +1248,7 @@ void CIO::setYSFInt(bool on) void CIO::setP25Int(bool on) { GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET); -#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) +#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET); #endif } @@ -1258,13 +1258,13 @@ void CIO::setNXDNInt(bool on) #if defined(USE_ALTERNATE_NXDN_LEDS) GPIO_WriteBit(PORT_YSF, PIN_YSF, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_P25, PIN_P25, on ? Bit_SET : Bit_RESET); -#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) +#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) GPIO_WriteBit(PORT_MYSF, PIN_MYSF, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_MP25, PIN_MP25, on ? Bit_SET : Bit_RESET); #endif #else GPIO_WriteBit(PORT_NXDN, PIN_NXDN, on ? Bit_SET : Bit_RESET); -#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) +#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) GPIO_WriteBit(PORT_MNXDN, PIN_MNXDN, on ? Bit_SET : Bit_RESET); #endif #endif @@ -1275,13 +1275,13 @@ void CIO::setPOCSAGInt(bool on) #if defined(USE_ALTERNATE_POCSAG_LEDS) GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_DMR, PIN_DMR, on ? Bit_SET : Bit_RESET); -#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) +#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET); GPIO_WriteBit(PORT_MDMR, PIN_MDMR, on ? Bit_SET : Bit_RESET); #endif #else GPIO_WriteBit(PORT_POCSAG, PIN_POCSAG, on ? Bit_SET : Bit_RESET); -#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) +#if defined(MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO) GPIO_WriteBit(PORT_MPOCSAG, PIN_MPOCSAG, on ? Bit_SET : Bit_RESET); #endif #endif From f8ab4fe9bdaa4644aa115043cd9f270047108e21 Mon Sep 17 00:00:00 2001 From: Andy CA6JAU Date: Mon, 6 Aug 2018 14:53:47 -0400 Subject: [PATCH 3/7] Fix for STM32F105 startup hang --- Globals.h | 6 ++++++ NXDNTX.cpp | 2 +- P25TX.cpp | 2 +- SerialRB.h | 4 ++++ YSFTX.cpp | 2 +- 5 files changed, 13 insertions(+), 3 deletions(-) diff --git a/Globals.h b/Globals.h index d68e2c5..a44e888 100644 --- a/Globals.h +++ b/Globals.h @@ -97,6 +97,12 @@ const uint16_t RX_BLOCK_SIZE = 2U; const uint16_t TX_RINGBUFFER_SIZE = 500U; const uint16_t RX_RINGBUFFER_SIZE = 600U; +#if defined(STM32F105xC) +const uint16_t TX_BUFFER_LEN = 2000U; +#else +const uint16_t TX_BUFFER_LEN = 4000U; +#endif + extern MMDVM_STATE m_modemState; extern bool m_dstarEnable; diff --git a/NXDNTX.cpp b/NXDNTX.cpp index 2601101..45d8ffa 100644 --- a/NXDNTX.cpp +++ b/NXDNTX.cpp @@ -45,7 +45,7 @@ const uint8_t NXDN_PREAMBLE[] = {0x57U, 0x75U, 0xFDU}; const uint8_t NXDN_SYNC = 0x5FU; CNXDNTX::CNXDNTX() : -m_buffer(4000U), +m_buffer(TX_BUFFER_LEN), m_modFilter(), m_sincFilter(), m_modState(), diff --git a/P25TX.cpp b/P25TX.cpp index 7cc75d9..9db1747 100644 --- a/P25TX.cpp +++ b/P25TX.cpp @@ -43,7 +43,7 @@ const q15_t P25_LEVELD = -1260; const uint8_t P25_START_SYNC = 0x77U; CP25TX::CP25TX() : -m_buffer(4000U), +m_buffer(TX_BUFFER_LEN), m_modFilter(), m_lpFilter(), m_modState(), diff --git a/SerialRB.h b/SerialRB.h index 22667d5..a2ccb8b 100644 --- a/SerialRB.h +++ b/SerialRB.h @@ -32,7 +32,11 @@ Boston, MA 02110-1301, USA. #include #endif +#if defined(STM32F105xC) +const uint16_t SERIAL_RINGBUFFER_SIZE = 370U; +#else const uint16_t SERIAL_RINGBUFFER_SIZE = 1000U; +#endif class CSerialRB { public: diff --git a/YSFTX.cpp b/YSFTX.cpp index 5790334..4f0400d 100644 --- a/YSFTX.cpp +++ b/YSFTX.cpp @@ -44,7 +44,7 @@ const uint8_t YSF_END_SYNC = 0xFFU; const uint8_t YSF_HANG = 0x00U; CYSFTX::CYSFTX() : -m_buffer(4000U), +m_buffer(TX_BUFFER_LEN), m_modFilter(), m_modState(), m_poBuffer(), From 1fef7772cb4c94e9b8a6960ca29b2772ef8b2f95 Mon Sep 17 00:00:00 2001 From: phl0 Date: Wed, 8 Aug 2018 11:16:16 +0200 Subject: [PATCH 4/7] Add MODE pin for POCSAG --- IOSTM.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/IOSTM.cpp b/IOSTM.cpp index 05b5c27..1a8af14 100644 --- a/IOSTM.cpp +++ b/IOSTM.cpp @@ -515,13 +515,14 @@ DMR PB4 output CN10 Pin27 YSF PB5 output CN10 Pin29 P25 PB3 output CN10 Pin31 NXDN PA10 output CN10 Pin33 -POCSAG PB12 output +POCSAG PB12 output CN10 Pin16 MDSTAR PC4 output CN10 Pin34 MDMR PC5 output CN10 Pin6 MYSF PC2 output CN7 Pin35 MP25 PC3 output CN7 Pin37 MNXDN PC6 output CN10 Pin4 +MPOCSAG PC8 output CN10 Pin2 RX PA0 analog input CN7 Pin28 RSSI PA1 analog input CN7 Pin30 @@ -590,6 +591,10 @@ EXT_CLK PA15 input CN7 Pin17 #define PIN_MYSF GPIO_Pin_2 #define PORT_MYSF GPIOC #define RCC_Per_MYSF RCC_AHB1Periph_GPIOC + +#define PIN_MPOCSAG GPIO_Pin_8 +#define PORT_MPOCSAG GPIOC +#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC #endif #define PIN_EXT_CLK GPIO_Pin_15 From 99966e20ade7ba9b103c748feec8f1bf4c58e0da Mon Sep 17 00:00:00 2001 From: Andy CA6JAU Date: Sun, 19 Aug 2018 12:16:36 -0300 Subject: [PATCH 5/7] Reduce buffer sizes for Teensy 3.2/3.1 --- Globals.h | 2 +- SerialRB.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Globals.h b/Globals.h index a44e888..c082d60 100644 --- a/Globals.h +++ b/Globals.h @@ -97,7 +97,7 @@ const uint16_t RX_BLOCK_SIZE = 2U; const uint16_t TX_RINGBUFFER_SIZE = 500U; const uint16_t RX_RINGBUFFER_SIZE = 600U; -#if defined(STM32F105xC) +#if defined(STM32F105xC) || defined(__MK20DX256__) const uint16_t TX_BUFFER_LEN = 2000U; #else const uint16_t TX_BUFFER_LEN = 4000U; diff --git a/SerialRB.h b/SerialRB.h index a2ccb8b..ee244d2 100644 --- a/SerialRB.h +++ b/SerialRB.h @@ -32,7 +32,7 @@ Boston, MA 02110-1301, USA. #include #endif -#if defined(STM32F105xC) +#if defined(STM32F105xC) || defined(__MK20DX256__) const uint16_t SERIAL_RINGBUFFER_SIZE = 370U; #else const uint16_t SERIAL_RINGBUFFER_SIZE = 1000U; From 328e88856aa9ade522b78081be3abecbd1903caa Mon Sep 17 00:00:00 2001 From: phl0 Date: Tue, 28 Aug 2018 15:22:54 +0200 Subject: [PATCH 6/7] Add MODE_PINS for F7hat boards --- IOSTM.cpp | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/IOSTM.cpp b/IOSTM.cpp index 1a8af14..0ce6903 100644 --- a/IOSTM.cpp +++ b/IOSTM.cpp @@ -435,6 +435,13 @@ P25 PC8 output NXDN PC9 output POCSAG PA8 output +MDSTAR PC1 output +MDMR PC2 output +MYSF PC3 output +MP25 PC4 output +MNXDN PC10 output +MPOCSAG PC11 output + RX PA0 analog input RSSI PA7 analog input TX PA4 analog output @@ -482,6 +489,31 @@ EXT_CLK PA15 input #define PORT_YSF GPIOC #define RCC_Per_YSF RCC_AHB1Periph_GPIOC +#if defined(MODE_PINS) +#define PIN_MP25 GPIO_Pin_4 +#define PORT_MP25 GPIOC +#define RCC_Per_MP25 RCC_AHB1Periph_GPIOC + +#define PIN_MNXDN GPIO_Pin_10 +#define PORT_MNXDN GPIOC +#define RCC_Per_MNXDN RCC_AHB1Periph_GPIOC + +#define PIN_MDSTAR GPIO_Pin_1 +#define PORT_MDSTAR GPIOC +#define RCC_Per_MDSTAR RCC_AHB1Periph_GPIOC + +#define PIN_MDMR GPIO_Pin_2 +#define PORT_MDMR GPIOC +#define RCC_Per_MDMR RCC_AHB1Periph_GPIOC + +#define PIN_MYSF GPIO_Pin_3 +#define PORT_MYSF GPIOC +#define RCC_Per_MYSF RCC_AHB1Periph_GPIOC + +#define PIN_MPOCSAG GPIO_Pin_11 +#define PORT_MPOCSAG GPIOC +#define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC +#endif #define PIN_EXT_CLK GPIO_Pin_15 #define SRC_EXT_CLK GPIO_PinSource15 #define PORT_EXT_CLK GPIOA From 428d36da90c5d8b73469b2e3a0ea1d9d4c47d083 Mon Sep 17 00:00:00 2001 From: phl0 Date: Wed, 29 Aug 2018 09:49:53 +0200 Subject: [PATCH 7/7] Rename F7Hat to (MMDVM_)RPT_Hat --- IOSTM.cpp | 5 +++-- Makefile | 16 ++++++++-------- SerialSTM.cpp | 12 ++++++------ 3 files changed, 17 insertions(+), 16 deletions(-) diff --git a/IOSTM.cpp b/IOSTM.cpp index 0ce6903..13a68ee 100644 --- a/IOSTM.cpp +++ b/IOSTM.cpp @@ -419,9 +419,9 @@ EXT_CLK PA15 input #define PIN_TX GPIO_Pin_4 #define PIN_TX_CH DAC_Channel_1 -#elif defined(STM32F722_F7HAT) +#elif defined(STM32F722_RPT_HAT) /* -Pin definitions for MMDVM-F7Hat Pi-Hat F0DEI DB9MAT DF2ET board: +Pin definitions for MMDVM_RPT_Hat Pi-Hat F0DEI DB9MAT DF2ET board: PTT PB14 output COSLED PB13 output @@ -514,6 +514,7 @@ EXT_CLK PA15 input #define PORT_MPOCSAG GPIOC #define RCC_Per_MPOCSAG RCC_AHB1Periph_GPIOC #endif + #define PIN_EXT_CLK GPIO_Pin_15 #define SRC_EXT_CLK GPIO_PinSource15 #define PORT_EXT_CLK GPIOA diff --git a/Makefile b/Makefile index 433dc9b..ddb3b36 100644 --- a/Makefile +++ b/Makefile @@ -128,8 +128,8 @@ DEFS_NUCLEO_F767=-DUSE_HAL_DRIVER -DSTM32F767xx -DSTM32F7XX -DSTM32F7_NUCLEO -DH DEFS_PI_F722=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_PI -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE # MMDVM-F7M F0DEI board: DEFS_F7M=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_F7M -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE -# MMDVM-F7-Hat F0DEI, DB9MAT, DF2ET board: -DEFS_F7HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_F7HAT -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE +# MMDVM_RPT_Hat F0DEI, DB9MAT, DF2ET board: +DEFS_RPT_HAT=-DUSE_HAL_DRIVER -DSTM32F722xx -DSTM32F7XX -DSTM32F722_RPT_HAT -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE # STM32F4 DVM board: DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE @@ -179,11 +179,11 @@ f7m: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_F7M) f7m: LDFLAGS+=$(LDFLAGS_F722) f7m: release_f7 -f7hat: GitVersion.h -f7hat: CFLAGS+=$(CFLAGS_F7) $(DEFS_F7HAT) -f7hat: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_F7HAT) -f7hat: LDFLAGS+=$(LDFLAGS_F722) -f7hat: release_f7 +rpt_hat: GitVersion.h +rpt_hat: CFLAGS+=$(CFLAGS_F7) $(DEFS_RPT_HAT) +rpt_hat: CXXFLAGS+=$(CXXFLAGS_F7) $(DEFS_RPT_HAT) +rpt_hat: LDFLAGS+=$(LDFLAGS_F722) +rpt_hat: release_f7 nucleo: GitVersion.h nucleo: CFLAGS+=$(CFLAGS_F4) $(DEFS_NUCLEO) @@ -345,7 +345,7 @@ ifneq ($(wildcard /usr/bin/stm32flash),) endif deploy-f7m: deploy-pi-f7 -deploy-f7hat: deploy-pi-f7 +deploy-rpt_hat: deploy-pi-f7 # Export the current git version if the index file exists, else 000... GitVersion.h: diff --git a/SerialSTM.cpp b/SerialSTM.cpp index f6d26f8..df4ae67 100644 --- a/SerialSTM.cpp +++ b/SerialSTM.cpp @@ -50,7 +50,7 @@ extern "C" { } /* ************* USART1 ***************** */ -#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_F7HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) +#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE]; volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE]; @@ -841,7 +841,7 @@ void CSerialPort::beginInt(uint8_t n, int speed) case 1U: #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO) InitUSART3(speed); - #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_F7HAT) || defined(STM32F4_DVM) + #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) InitUSART1(speed); #elif defined(STM32F4_NUCLEO) InitUSART2(speed); @@ -865,7 +865,7 @@ int CSerialPort::availableInt(uint8_t n) case 1U: #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO) return AvailUSART3(); - #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_F7HAT) || defined(STM32F4_DVM) + #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) return AvailUSART1(); #elif defined(STM32F4_NUCLEO) return AvailUSART2(); @@ -887,7 +887,7 @@ int CSerialPort::availableForWriteInt(uint8_t n) case 1U: #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO) return AvailForWriteUSART3(); - #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_F7HAT) || defined(STM32F4_DVM) + #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) return AvailForWriteUSART1(); #elif defined(STM32F4_NUCLEO) return AvailForWriteUSART2(); @@ -909,7 +909,7 @@ uint8_t CSerialPort::readInt(uint8_t n) case 1U: #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO) return ReadUSART3(); - #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_F7HAT) || defined(STM32F4_DVM) + #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) return ReadUSART1(); #elif defined(STM32F4_NUCLEO) return ReadUSART2(); @@ -933,7 +933,7 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool WriteUSART3(data, length); if (flush) TXSerialFlush3(); - #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_F7HAT) || defined(STM32F4_DVM) + #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) WriteUSART1(data, length); if (flush) TXSerialFlush1();