From a1794b44eddbc5387bb1dd5495be5ff2a4aaa3c4 Mon Sep 17 00:00:00 2001 From: Clint Chance Date: Sun, 12 Jul 2026 16:42:47 -0500 Subject: [PATCH] Fix RX interrupt flag being cleared on the wrong USART in STMUART. handleIRQ() hardcoded USART1 when clearing the RXNE pending bit, so on boards where the repeater/display UART is not USART1 (Nucleo, Discovery, F767, UART5-based boards) the flag was cleared on the wrong peripheral. Use the m_usart member, matching the TXE handling below. Also fix flush(): it passed a flag constant to USART_GetITStatus and span while TXE was set, which returns immediately since TXE indicates the data register is already empty. Wait for the software TX FIFO to drain and then for the TC flag, which indicates the shift register has actually emptied. --- STMUART.cpp | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/STMUART.cpp b/STMUART.cpp index c2e779d..8742dc5 100644 --- a/STMUART.cpp +++ b/STMUART.cpp @@ -61,7 +61,7 @@ void CSTMUART::handleIRQ() if (USART_GetITStatus(m_usart, USART_IT_RXNE)) { if(!m_rxFifo.isFull()) m_rxFifo.put((uint8_t) USART_ReceiveData(m_usart)); - USART_ClearITPendingBit(USART1, USART_IT_RXNE); + USART_ClearITPendingBit(m_usart, USART_IT_RXNE); } if (USART_GetITStatus(m_usart, USART_IT_TXE)) { @@ -82,8 +82,12 @@ void CSTMUART::flush() if(m_usart == NULL) return; - // wait until the TXE shows the shift register is empty - while (USART_GetITStatus(m_usart, USART_FLAG_TXE)) + // wait until the TX FIFO has drained + while (!m_txFifo.isEmpty()) + ; + + // wait until the TC flag shows the shift register is empty + while (USART_GetFlagStatus(m_usart, USART_FLAG_TC) == RESET) ; }