From 955a804cde795743665d0d13ccc17d0f6f50ed65 Mon Sep 17 00:00:00 2001
From: Jonathan Naylor <naylorjs@yahoo.com>
Date: Thu, 1 Dec 2016 10:26:18 +0000
Subject: [PATCH] Disable the LPTMR before configuring it.

---
 IOTeensy.cpp | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/IOTeensy.cpp b/IOTeensy.cpp
index ac09ca6..632dccf 100644
--- a/IOTeensy.cpp
+++ b/IOTeensy.cpp
@@ -129,12 +129,13 @@ void CIO::startInt()
   CORE_PIN13_CONFIG = PORT_PCR_MUX(3);
 
   SIM_SCGC5  |= SIM_SCGC5_LPTIMER;                                    // Enable Low Power Timer Access
+  LPTMR0_CSR  = 0;                                                    // Disable
+  LPTMR0_PSR  = LPTMR_PSR_PBYP;                                       // Bypass prescaler/filter
+  LPTMR0_CMR  = EXTERNAL_OSC / 24000;
   LPTMR0_CSR  = LPTMR_CSR_TIE |                                       // Interrupt Enable
                 LPTMR_CSR_TPS(2) |                                    // Pin: 0=CMP0, 1=xtal, 2=pin13
                 LPTMR_CSR_TFC |                                       // Free-Running Counter
                 LPTMR_CSR_TMS;                                        // Mode Select, 0=timer, 1=counter
-  LPTMR0_PSR  = LPTMR_PSR_PBYP;                                       // Bypass prescaler/filter
-  LPTMR0_CMR  = EXTERNAL_OSC / 24000;
   LPTMR0_CSR |= LPTMR_CSR_TEN;                                        // Enable
 #else
   // Setup PDB for ADC0 at 24 kHz