From 2c76d67098af58c7687d3ec1e4bc53d19358669b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pawe=C5=82=20Gomu=C5=82ka?= Date: Tue, 20 Dec 2016 20:32:54 +0100 Subject: [PATCH 1/3] RSSI readout support for NTH board @Arduino Due --- IODue.cpp | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/IODue.cpp b/IODue.cpp index 17d4fa4..93faf35 100644 --- a/IODue.cpp +++ b/IODue.cpp @@ -64,6 +64,8 @@ #define ADC_CDR_Chan 7 #define DACC_MR_USER_SEL_Chan DACC_MR_USER_SEL_CHANNEL0 // DAC on Due DAC0 #define DACC_CHER_Chan DACC_CHER_CH0 +#define RSSI_CHER_Chan (1<<1) // ADC on Due pin A6 - Due AD1 - (1 << 1) +#define RSSI_CDR_Chan 1 #else #error "Either ARDUINO_DUE_PAPA, ARDUINO_DUE_ZUM_V10, or ARDUINO_DUE_NTH need to be defined" #endif @@ -104,7 +106,8 @@ void CIO::startInt() ADC->ADC_IDR = 0xFFFFFFFF; // Disable interrupts ADC->ADC_IER = ADC_CHER_Chan; // Enable End-Of-Conv interrupt ADC->ADC_CHDR = 0xFFFF; // Disable all channels - ADC->ADC_CHER = ADC_CHER_Chan; // Enable just one channel + ADC->ADC_CHER = ADC_CHER_Chan | // Enable rx input channel + RSSI_CHER_Chan; // and RSSI input ADC->ADC_CGR = 0x15555555; // All gains set to x1 ADC->ADC_COR = 0x00000000; // All offsets off ADC->ADC_MR = (ADC->ADC_MR & 0xFFFFFFF0) | (1 << 1) | ADC_MR_TRGEN; // 1 = trig source TIO from TC0 @@ -169,7 +172,7 @@ void CIO::interrupt(uint8_t source) sample = ADC->ADC_CDR[ADC_CDR_Chan]; m_rxBuffer.put(sample, control); - m_rssiBuffer.put(0U); + m_rssiBuffer.put(ADC->ADC_CDR[RSSI_CDR_Chan]); m_watchdog++; } From bef0d9cfd650354dc223235f2ab5e285b796141d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pawe=C5=82=20Gomu=C5=82ka?= Date: Wed, 21 Dec 2016 01:55:35 +0100 Subject: [PATCH 2/3] Added missing conditions for preprocessor --- Config.h | 1 - IODue.cpp | 15 ++++++++++----- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/Config.h b/Config.h index 3eb0ed4..c68fba1 100644 --- a/Config.h +++ b/Config.h @@ -62,4 +62,3 @@ // #define SERIAL_REPEATER #endif - diff --git a/IODue.cpp b/IODue.cpp index 93faf35..4c41752 100644 --- a/IODue.cpp +++ b/IODue.cpp @@ -106,8 +106,10 @@ void CIO::startInt() ADC->ADC_IDR = 0xFFFFFFFF; // Disable interrupts ADC->ADC_IER = ADC_CHER_Chan; // Enable End-Of-Conv interrupt ADC->ADC_CHDR = 0xFFFF; // Disable all channels - ADC->ADC_CHER = ADC_CHER_Chan | // Enable rx input channel - RSSI_CHER_Chan; // and RSSI input + ADC->ADC_CHER = ADC_CHER_Chan; // Enable rx input channel +#if defined(RSSI_CHER_Chan) + ADC->ADC_CHER |= RSSI_CHER_Chan; // and RSSI input +#endif ADC->ADC_CGR = 0x15555555; // All gains set to x1 ADC->ADC_COR = 0x00000000; // All offsets off ADC->ADC_MR = (ADC->ADC_MR & 0xFFFFFFF0) | (1 << 1) | ADC_MR_TRGEN; // 1 = trig source TIO from TC0 @@ -172,7 +174,11 @@ void CIO::interrupt(uint8_t source) sample = ADC->ADC_CDR[ADC_CDR_Chan]; m_rxBuffer.put(sample, control); +#if defined(RSSI_CHER_Chan) && defined(SEND_RSSI_DATA) m_rssiBuffer.put(ADC->ADC_CDR[RSSI_CDR_Chan]); +#else + m_rssiBuffer.put(0U); +#endif m_watchdog++; } @@ -203,7 +209,7 @@ void CIO::setDStarInt(bool on) digitalWrite(PIN_DSTAR, on ? HIGH : LOW); } -void CIO::setDMRInt(bool on) +void CIO::setDMRInt(bool on) { digitalWrite(PIN_DMR, on ? HIGH : LOW); } @@ -213,10 +219,9 @@ void CIO::setYSFInt(bool on) digitalWrite(PIN_YSF, on ? HIGH : LOW); } -void CIO::setP25Int(bool on) +void CIO::setP25Int(bool on) { digitalWrite(PIN_P25, on ? HIGH : LOW); } #endif - From 414f3eb19387da0fe1dcb3c1a81a2e9cb40c9fbc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pawe=C5=82=20Gomu=C5=82ka?= Date: Wed, 21 Dec 2016 01:57:58 +0100 Subject: [PATCH 3/3] typo :/ --- IODue.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/IODue.cpp b/IODue.cpp index 4c41752..34913ec 100644 --- a/IODue.cpp +++ b/IODue.cpp @@ -174,7 +174,7 @@ void CIO::interrupt(uint8_t source) sample = ADC->ADC_CDR[ADC_CDR_Chan]; m_rxBuffer.put(sample, control); -#if defined(RSSI_CHER_Chan) && defined(SEND_RSSI_DATA) +#if defined(RSSI_CDR_Chan) && defined(SEND_RSSI_DATA) m_rssiBuffer.put(ADC->ADC_CDR[RSSI_CDR_Chan]); #else m_rssiBuffer.put(0U);