From 5c61ee6be8233fd48cc42728aca9d91ae0c94177 Mon Sep 17 00:00:00 2001
From: Jonathan Naylor <naylorjs@yahoo.com>
Date: Thu, 5 Jul 2018 18:29:18 +0100
Subject: [PATCH] Add an mode output pin on the STM32-F7M board as suggested by
 Tom BG4TGO.

---
 IODue.cpp       |  4 ++++
 IOSTM.cpp       | 32 +++++++++++++++++++++++++++++++-
 IOSTM_CMSIS.cpp |  6 +++++-
 IOTeensy.cpp    |  4 ++++
 4 files changed, 44 insertions(+), 2 deletions(-)

diff --git a/IODue.cpp b/IODue.cpp
index e57de1a..e06ce07 100644
--- a/IODue.cpp
+++ b/IODue.cpp
@@ -101,9 +101,13 @@ void CIO::initInt()
   pinMode(PIN_DMR,    OUTPUT);
   pinMode(PIN_YSF,    OUTPUT);
   pinMode(PIN_P25,    OUTPUT);
+#if !defined(USE_ALTERNATE_NXDN_LEDS)
   pinMode(PIN_NXDN,   OUTPUT);
+#endif
+#if !defined(USE_ALTERNATE_POCSAG_LEDS)
   pinMode(PIN_POCSAG, OUTPUT);
 #endif
+#endif
 }
 
 void CIO::startInt()
diff --git a/IOSTM.cpp b/IOSTM.cpp
index ff4d742..6557496 100644
--- a/IOSTM.cpp
+++ b/IOSTM.cpp
@@ -338,6 +338,7 @@ DMR      PC8    output
 YSF      PA8    output
 P25      PC9    output
 NXDN     PB1    output
+POCSAG   PB12   output
 
 RX       PA0    analog input
 RSSI     PA7    analog input
@@ -370,6 +371,10 @@ EXT_CLK  PA15   input
 #define PORT_NXDN         GPIOB
 #define RCC_Per_NXDN      RCC_AHB1Periph_GPIOB
 
+#define PIN_POCSAG        GPIO_Pin_12
+#define PORT_NXDN         GPIOB
+#define RCC_Per_POCSAG    RCC_AHB1Periph_GPIOB
+
 #define PIN_DSTAR         GPIO_Pin_7
 #define PORT_DSTAR        GPIOC
 #define RCC_Per_DSTAR     RCC_AHB1Periph_GPIOC
@@ -837,6 +842,7 @@ void CIO::initInt()
    GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
    GPIO_Init(PORT_P25, &GPIO_InitStruct);
 
+#if !defined(USE_ALTERNATE_NXDN_LEDS)
    // NXDN pin
    RCC_AHB1PeriphClockCmd(RCC_Per_NXDN, ENABLE);
    GPIO_InitStruct.GPIO_Pin   = PIN_NXDN;
@@ -844,6 +850,15 @@ void CIO::initInt()
    GPIO_Init(PORT_NXDN, &GPIO_InitStruct);
 #endif
 
+#if !defined(USE_ALTERNATE_POCSAG_LEDS)
+   // POCSAG pin
+   RCC_AHB1PeriphClockCmd(RCC_Per_POCSAG, ENABLE);
+   GPIO_InitStruct.GPIO_Pin   = PIN_POCSAG;
+   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
+   GPIO_Init(PORT_POCSAG, &GPIO_InitStruct);
+#endif
+#endif
+
 #if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
    // DSTAR mode pin
    RCC_AHB1PeriphClockCmd(RCC_Per_MDSTAR, ENABLE);
@@ -869,12 +884,22 @@ void CIO::initInt()
    GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
    GPIO_Init(PORT_MP25, &GPIO_InitStruct);
 
+#if !defined(USE_ALTERNATE_NXDN_LEDS)
    // NXDN mode pin
    RCC_AHB1PeriphClockCmd(RCC_Per_MNXDN, ENABLE);
    GPIO_InitStruct.GPIO_Pin   = PIN_MNXDN;
    GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
    GPIO_Init(PORT_MNXDN, &GPIO_InitStruct);
 #endif
+
+#if !defined(USE_ALTERNATE_POCSAG_LEDS)
+   // POCSAG mode pin
+   RCC_AHB1PeriphClockCmd(RCC_Per_MPOCSAG, ENABLE);
+   GPIO_InitStruct.GPIO_Pin   = PIN_MPOCSAG;
+   GPIO_InitStruct.GPIO_Mode  = GPIO_Mode_OUT;
+   GPIO_Init(PORT_MPOCSAG, &GPIO_InitStruct);
+#endif
+#endif
 }
 
 void CIO::startInt()
@@ -1134,11 +1159,16 @@ void CIO::setPOCSAGInt(bool on)
 {
 #if defined(USE_ALTERNATE_POCSAG_LEDS)
    GPIO_WriteBit(PORT_DSTAR, PIN_DSTAR, on ? Bit_SET : Bit_RESET);
-   GPIO_WriteBit(PORT_DMR, PIN_DMR,     on ? Bit_SET : Bit_RESET);
+   GPIO_WriteBit(PORT_DMR,   PIN_DMR,   on ? Bit_SET : Bit_RESET);
 #if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
    GPIO_WriteBit(PORT_MDSTAR, PIN_MDSTAR, on ? Bit_SET : Bit_RESET);
    GPIO_WriteBit(PORT_MDMR,   PIN_MDMR,   on ? Bit_SET : Bit_RESET);
 #endif
+#else
+   GPIO_WriteBit(PORT_POCSAG,  PIN_POCSAG, on ? Bit_SET : Bit_RESET);
+#if defined(STM32F4_NUCLEO_MODE_PINS) && defined(STM32F4_NUCLEO_MORPHO_HEADER) && defined(STM32F4_NUCLEO)
+   GPIO_WriteBit(PORT_MPOCSAG, PIN_MPOCSAG, on ? Bit_SET : Bit_RESET);
+#endif
 #endif
 }
 
diff --git a/IOSTM_CMSIS.cpp b/IOSTM_CMSIS.cpp
index d996fce..b669d07 100644
--- a/IOSTM_CMSIS.cpp
+++ b/IOSTM_CMSIS.cpp
@@ -222,9 +222,13 @@ static inline void GPIOInit()
   GPIOConfigPin(PORT_DMR,    PIN_DMR,    GPIO_CRL_MODE0_1);
   GPIOConfigPin(PORT_YSF,    PIN_YSF,    GPIO_CRL_MODE0_1);
   GPIOConfigPin(PORT_P25,    PIN_P25,    GPIO_CRL_MODE0_1);
+#if !defined(USE_ALTERNATE_NXDN_LEDS)
   GPIOConfigPin(PORT_NXDN,   PIN_NXDN,   GPIO_CRL_MODE0_1);
+#endif
+#if !defined(USE_ALTERNATE_POCSAG_LEDS)
   GPIOConfigPin(PORT_POCSAG, PIN_POCSAG, GPIO_CRL_MODE0_1);
-  
+#endif
+
   GPIOConfigPin(PORT_RX, PIN_RX, 0);
 #if defined(SEND_RSSI_DATA)
   GPIOConfigPin(PORT_RSSI, PIN_RSSI, 0);
diff --git a/IOTeensy.cpp b/IOTeensy.cpp
index 03c6ebf..10adde1 100644
--- a/IOTeensy.cpp
+++ b/IOTeensy.cpp
@@ -70,9 +70,13 @@ void CIO::initInt()
   pinMode(PIN_DMR,    OUTPUT);
   pinMode(PIN_YSF,    OUTPUT);
   pinMode(PIN_P25,    OUTPUT);
+#if !defined(USE_ALTERNATE_NXDN_LEDS)
   pinMode(PIN_NXDN,   OUTPUT);
+#endif
+#if !defined(USE_ALTERNATE_POCSAG_LEDS)
   pinMode(PIN_POCSAG, OUTPUT);
 #endif
+#endif
 }
 
 void CIO::startInt()