diff --git a/IOPins.h b/IOPins.h index f3ea4ad..77e3bdc 100644 --- a/IOPins.h +++ b/IOPins.h @@ -62,9 +62,12 @@ #elif defined(DRCC_DVM_NQF) #include "pins/pins_f4_drcc_nqf.h" +#elif defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446) + #include "pins/pins_f4_stm32eda.h" + #else #error "A valid board type macro need to be defined." #endif -#endif //#ifndef _IO_PINS_H \ No newline at end of file +#endif //#ifndef _IO_PINS_H diff --git a/Makefile b/Makefile index cd29ef8..2887a25 100644 --- a/Makefile +++ b/Makefile @@ -139,6 +139,10 @@ DEFS_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_DVM -DHSE_VA DEFS_RPT_HAT_TGO=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_RPT_HAT_TGO -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE # DRCC_DVM BG7NQF board: DEFS_DRCC_DVM=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DDRCC_DVM -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE +# WA0EDA F405 MTR2K, MASTR3 board: +DEFS_EDA_405=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F40_41xxx -DSTM32F4_EDA_405 -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE +# WA0EDA F446 MTR2K, MASTR3 board: +DEFS_EDA_446=-DUSE_STDPERIPH_DRIVER -DSTM32F4XX -DSTM32F446xx -DSTM32F4_EDA_446 -DHSE_VALUE=$(OSC) -DMADEBYMAKEFILE # Build compiler flags @@ -229,6 +233,18 @@ drcc_nqf: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_DRCC_DVM) -DDRCC_DVM_NQF drcc_nqf: LDFLAGS+=$(LDFLAGS_F4) drcc_nqf: release_f4 +eda405: GitVersion.h +eda405: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_405) +eda405: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_405) +eda405: LDFLAGS+=$(LDFLAGS_F4) +eda405: release_f4 + +eda446: GitVersion.h +eda446: CFLAGS+=$(CFLAGS_F4) $(DEFS_EDA_446) +eda446: CXXFLAGS+=$(CXXFLAGS_F4) $(DEFS_EDA_446) +eda446: LDFLAGS+=$(LDFLAGS_F4) +eda446: release_f4 + release_f4: $(BINDIR) release_f4: $(OBJDIR_F4) release_f4: $(BINDIR)/$(BINHEX_F4) @@ -350,6 +366,8 @@ endif deploy-f4m: deploy-pi deploy-dvm: deploy-pi +deploy-eda405: deploy-pi +deploy-eda446: deploy-pi deploy-pi-f7: ifneq ($(wildcard /usr/local/bin/stm32flash),) diff --git a/SerialSTM.cpp b/SerialSTM.cpp index 16c930d..b1bd27d 100644 --- a/SerialSTM.cpp +++ b/SerialSTM.cpp @@ -50,7 +50,7 @@ extern "C" { } /* ************* USART1 ***************** */ -#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM) +#if defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_F7M) || defined(STM32F722_PI) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || (defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER)) || defined(DRCC_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446) volatile uint8_t TXSerialfifo1[TX_SERIAL_FIFO_SIZE]; volatile uint8_t RXSerialfifo1[RX_SERIAL_FIFO_SIZE]; @@ -841,7 +841,7 @@ void CSerialPort::beginInt(uint8_t n, int speed) case 1U: #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO) InitUSART3(speed); - #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) + #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446) InitUSART1(speed); #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) InitUSART2(speed); @@ -869,7 +869,7 @@ int CSerialPort::availableInt(uint8_t n) case 1U: #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO) return AvailUSART3(); - #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) + #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446) return AvailUSART1(); #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) return AvailUSART2(); @@ -895,7 +895,7 @@ int CSerialPort::availableForWriteInt(uint8_t n) case 1U: #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO) return AvailForWriteUSART3(); - #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) + #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446) return AvailForWriteUSART1(); #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) return AvailForWriteUSART2(); @@ -921,7 +921,7 @@ uint8_t CSerialPort::readInt(uint8_t n) case 1U: #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO) return ReadUSART3(); - #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) + #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446) return ReadUSART1(); #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) return ReadUSART2(); @@ -949,7 +949,7 @@ void CSerialPort::writeInt(uint8_t n, const uint8_t* data, uint16_t length, bool WriteUSART3(data, length); if (flush) TXSerialFlush3(); - #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) + #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) || defined(STM32F4_EDA_405) || defined(STM32F4_EDA_446) WriteUSART1(data, length); if (flush) TXSerialFlush1(); diff --git a/pins/pins_f4_stm32eda.h b/pins/pins_f4_stm32eda.h new file mode 100644 index 0000000..ea3ae75 --- /dev/null +++ b/pins/pins_f4_stm32eda.h @@ -0,0 +1,108 @@ +/* + * Copyright (C) 2019,2020 by BG5HHP + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef _PINS_F4_STM32EDA +#define _PINS_F4_STM32EDA + +/* +Pin definitions for STM32F4 STM32-DVM-MTR2K & STM32-DVM-MASTR3: + +COS PB13 input +PTT PB12 output +COSLED PB4 output +LED PB3 output + +P25 PB8 output +NXDN PB9 output +DSTAR PB6 output +DMR PB5 output +YSF PB7 output +POCSAG PC10 output +FM PC11 output + +RX PB0 analog input +RSSI PB1 analog input +TX PA4 analog output + +EXT_CLK PA15 input +*/ + +#define PIN_COS GPIO_Pin_13 +#define PORT_COS GPIOB +#define RCC_Per_COS RCC_AHB1Periph_GPIOB + + +#define PIN_PTT GPIO_Pin_12 +#define PORT_PTT GPIOB +#define RCC_Per_PTT RCC_AHB1Periph_GPIOB + +#define PIN_COSLED GPIO_Pin_4 +#define PORT_COSLED GPIOB +#define RCC_Per_COSLED RCC_AHB1Periph_GPIOB + +#define PIN_LED GPIO_Pin_3 +#define PORT_LED GPIOB +#define RCC_Per_LED RCC_AHB1Periph_GPIOB + +#define PIN_P25 GPIO_Pin_8 +#define PORT_P25 GPIOB +#define RCC_Per_P25 RCC_AHB1Periph_GPIOB + +#define PIN_NXDN GPIO_Pin_9 +#define PORT_NXDN GPIOB +#define RCC_Per_NXDN RCC_AHB1Periph_GPIOB + +#define PIN_DSTAR GPIO_Pin_6 +#define PORT_DSTAR GPIOB +#define RCC_Per_DSTAR RCC_AHB1Periph_GPIOB + +#define PIN_DMR GPIO_Pin_5 +#define PORT_DMR GPIOB +#define RCC_Per_DMR RCC_AHB1Periph_GPIOB + +#define PIN_YSF GPIO_Pin_7 +#define PORT_YSF GPIOB +#define RCC_Per_YSF RCC_AHB1Periph_GPIOB + +#define PIN_POCSAG GPIO_Pin_10 +#define PORT_POCSAG GPIOC +#define RCC_Per_POCSAG RCC_AHB1Periph_GPIOC + +#define PIN_FM GPIO_Pin_11 +#define PORT_FM GPIOC +#define RCC_Per_FM RCC_AHB1Periph_GPIOC + +#define PIN_EXT_CLK GPIO_Pin_15 +#define SRC_EXT_CLK GPIO_PinSource15 +#define PORT_EXT_CLK GPIOA + +#define PIN_RX GPIO_Pin_0 +#define PIN_RX_CH ADC_Channel_8 +#define PORT_RX GPIOB +#define RCC_Per_RX RCC_AHB1Periph_GPIOB + +#define PIN_RSSI GPIO_Pin_1 +#define PIN_RSSI_CH ADC_Channel_9 +#define PORT_RSSI GPIOB +#define RCC_Per_RSSI RCC_AHB1Periph_GPIOB + +#define PIN_TX GPIO_Pin_4 +#define PIN_TX_CH DAC_Channel_1 + +#endif +